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3.3V at U36 feeds through to VCCO_HR on the FPGA input pins. Potential solutions include reviewing U36 to find an alternative chip that allows using VCCO_HR as power supply or using a level shifter on the Rx pin. The TI ISO1042 isolated CAN transceiver allows VDD from 1.71V on the FPGA side but needs 5V on the CAN interface side.
The text was updated successfully, but these errors were encountered:
#CIAA-ACC
3.3V at U36 feeds through to VCCO_HR on the FPGA input pins. Potential solutions include reviewing U36 to find an alternative chip that allows using VCCO_HR as power supply or using a level shifter on the Rx pin. The TI ISO1042 isolated CAN transceiver allows VDD from 1.71V on the FPGA side but needs 5V on the CAN interface side.
The text was updated successfully, but these errors were encountered: