ciaa_acc.pro

update=Mon 21 Oct 2019 01:05:58 PM -03
version=1
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=output_files/
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=118
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=12
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.08889999999999999
MinViaDiameter=0.4064
MinViaDrill=0.2032
MinMicroViaDiameter=0
MinMicroViaDrill=0
MinHoleToHole=0.25
TrackWidth1=0.0889
TrackWidth2=0.10668
TrackWidth3=0.127
TrackWidth4=0.13208
TrackWidth5=0.1524
TrackWidth6=0.1651
TrackWidth7=0.254
TrackWidth8=0.381
TrackWidth9=0.762
ViaDiameter1=0.4572
ViaDrill1=0.2032
ViaDiameter2=0.4064
ViaDrill2=0.2032
ViaDiameter3=0.635
ViaDrill3=0.3048
ViaDiameter4=1.27
ViaDrill4=0.7112
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2032
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.0508
SolderMaskMinWidth=0.25
SolderPasteClearance=-0.0254
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=TOP_L1.Sig
Type=2
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=L2.GND
Type=1
Enabled=1
[pcbnew/Layer.In2.Cu]
Name=L3.Sig
Type=0
Enabled=1
[pcbnew/Layer.In3.Cu]
Name=L4.GND
Type=2
Enabled=1
[pcbnew/Layer.In4.Cu]
Name=L5.Sig
Type=0
Enabled=1
[pcbnew/Layer.In5.Cu]
Name=L6.GND
Type=1
Enabled=1
[pcbnew/Layer.In6.Cu]
Name=L7.GND
Type=1
Enabled=1
[pcbnew/Layer.In7.Cu]
Name=L8.Sig
Type=0
Enabled=1
[pcbnew/Layer.In8.Cu]
Name=L9.GND
Type=1
Enabled=1
[pcbnew/Layer.In9.Cu]
Name=L10.Sig
Type=0
Enabled=1
[pcbnew/Layer.In10.Cu]
Name=L11.GND
Type=1
Enabled=1
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=BOT_L12.Sig
Type=2
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=0
[pcbnew/Layer.F.Adhes]
Enabled=0
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=0
[pcbnew/Layer.Eco1.User]
Enabled=0
[pcbnew/Layer.Eco2.User]
Enabled=0
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=0
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.1016
TrackWidth=0.0889
ViaDiameter=0.4572
ViaDrill=0.2032
uViaDiameter=0.4572
uViaDrill=0.2032
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25