diff --git a/index.md b/index.md
index fcad092b7..799827a93 100644
--- a/index.md
+++ b/index.md
@@ -58,4 +58,4 @@ See the [README file for further information.](README.md)
 
 ## Version
 
-Generated on 2024-09-16 21:03:31 -0700 from [14ca40e](https://github.com/google/verible/commit/14ca40e153266700cfc79d0c1c3b2bfe8a6a77cc)
+Generated on 2024-09-17 23:27:45 -0700 from [88bf4fb](https://github.com/google/verible/commit/88bf4fb8320377ce61340a2d05d7417deb1d4608)
diff --git a/lint.md b/lint.md
index 4bca80d09..0ae9fcd3c 100644
--- a/lint.md
+++ b/lint.md
@@ -58,6 +58,24 @@ Checks that enum type names follow a naming convention defined by a RE2 regular
 
 Enabled by default: true
 
+### explicit-begin
+Checks that a Verilog ``begin`` directive follows all if, else, always, always_comb, always_latch, always_ff, for, forever, foreach, while and initial statements. See [Style: explicit-begin].
+
+##### Parameters
+  * `if_enable` Default: `true` All if statements require an explicit begin-end block
+  * `else_enable` Default: `true` All else statements require an explicit begin-end block
+  * `always_enable` Default: `true` All always statements require an explicit begin-end block
+  * `always_comb_enable` Default: `true` All always_comb statements require an explicit begin-end block
+  * `always_latch_enable` Default: `true` All always_latch statements require an explicit begin-end block
+  * `always_ff_enable` Default: `true` All always_ff statements require an explicit begin-end block
+  * `for_enable` Default: `true` All for statements require an explicit begin-end block
+  * `forever_enable` Default: `true` All forever statements require an explicit begin-end block
+  * `foreach_enable` Default: `true` All foreach statements require an explicit begin-end block
+  * `while_enable` Default: `true` All while statements require an explicit begin-end block
+  * `initial_enable` Default: `true` All initial statements require an explicit begin-end block
+
+Enabled by default: false
+
 ### explicit-function-lifetime
 Checks that every function declared outside of a class is declared with an explicit lifetime (static or automatic). See [Style: function-task-explicit-lifetime].
 
@@ -350,4 +368,4 @@ Enabled by default: true
 
 ## Version
 
-Generated on 2024-09-16 21:03:31 -0700 from [14ca40e](https://github.com/google/verible/commit/14ca40e153266700cfc79d0c1c3b2bfe8a6a77cc)
+Generated on 2024-09-17 23:27:45 -0700 from [88bf4fb](https://github.com/google/verible/commit/88bf4fb8320377ce61340a2d05d7417deb1d4608)
diff --git a/verilog_format.md b/verilog_format.md
index 3e7d2d8d9..367f6390f 100644
--- a/verilog_format.md
+++ b/verilog_format.md
@@ -129,4 +129,4 @@ path.
 
 ## Version
 
-Generated on 2024-09-16 21:03:31 -0700 from [14ca40e](https://github.com/google/verible/commit/14ca40e153266700cfc79d0c1c3b2bfe8a6a77cc)
+Generated on 2024-09-17 23:27:45 -0700 from [88bf4fb](https://github.com/google/verible/commit/88bf4fb8320377ce61340a2d05d7417deb1d4608)
diff --git a/verilog_lint.md b/verilog_lint.md
index 827d72d27..947b02419 100644
--- a/verilog_lint.md
+++ b/verilog_lint.md
@@ -129,6 +129,24 @@ Checks that enum type names follow a naming convention defined by a RE2 regular
 
 Enabled by default: true
 
+### explicit-begin
+Checks that a Verilog ``begin`` directive follows all if, else, always, always_comb, always_latch, always_ff, for, forever, foreach, while and initial statements. See [Style: explicit-begin].
+
+##### Parameters
+  * `if_enable` Default: `true` All if statements require an explicit begin-end block
+  * `else_enable` Default: `true` All else statements require an explicit begin-end block
+  * `always_enable` Default: `true` All always statements require an explicit begin-end block
+  * `always_comb_enable` Default: `true` All always_comb statements require an explicit begin-end block
+  * `always_latch_enable` Default: `true` All always_latch statements require an explicit begin-end block
+  * `always_ff_enable` Default: `true` All always_ff statements require an explicit begin-end block
+  * `for_enable` Default: `true` All for statements require an explicit begin-end block
+  * `forever_enable` Default: `true` All forever statements require an explicit begin-end block
+  * `foreach_enable` Default: `true` All foreach statements require an explicit begin-end block
+  * `while_enable` Default: `true` All while statements require an explicit begin-end block
+  * `initial_enable` Default: `true` All initial statements require an explicit begin-end block
+
+Enabled by default: false
+
 ### explicit-function-lifetime
 Checks that every function declared outside of a class is declared with an explicit lifetime (static or automatic). See [Style: function-task-explicit-lifetime].
 
@@ -421,4 +439,4 @@ Enabled by default: true
 
 ## Version
 
-Generated on 2024-09-16 21:03:31 -0700 from [14ca40e](https://github.com/google/verible/commit/14ca40e153266700cfc79d0c1c3b2bfe8a6a77cc)
+Generated on 2024-09-17 23:27:45 -0700 from [88bf4fb](https://github.com/google/verible/commit/88bf4fb8320377ce61340a2d05d7417deb1d4608)
diff --git a/verilog_syntax.md b/verilog_syntax.md
index a6e4995a9..6cda29ff1 100644
--- a/verilog_syntax.md
+++ b/verilog_syntax.md
@@ -51,4 +51,4 @@ path.
 
 ## Version
 
-Generated on 2024-09-16 21:03:31 -0700 from [14ca40e](https://github.com/google/verible/commit/14ca40e153266700cfc79d0c1c3b2bfe8a6a77cc)
+Generated on 2024-09-17 23:27:45 -0700 from [88bf4fb](https://github.com/google/verible/commit/88bf4fb8320377ce61340a2d05d7417deb1d4608)