From bf81a14c9fcc244fb1acf1f959434927c57e3fe7 Mon Sep 17 00:00:00 2001
From: qinjun-li <liqinjun1994@gmail.com>
Date: Fri, 14 Jun 2024 13:23:35 +0800
Subject: [PATCH] [rtl] Handling compilation errors.

---
 t1/src/Bundles.scala                          |    8 +-
 t1/src/Lane.scala                             |    3 +-
 t1/src/T1.scala                               |    9 +-
 t1/src/VectorDecoder.scala                    |    8 +-
 t1/src/decoder/Decoder.scala                  | 1502 +++--------------
 t1/src/decoder/InstructionDocumentation.scala |    3 +-
 t1/src/decoder/T1DecodePattern.scala          |    4 +-
 t1/src/decoder/attribute/adderUop.scala       |    2 +-
 t1/src/decoder/attribute/floatUop.scala       |    4 +-
 .../decoder/attribute/fpExecutionType.scala   |    6 +-
 t1/src/decoder/attribute/isAdder.scala        |    4 +-
 t1/src/decoder/attribute/isAverage.scala      |    4 +-
 t1/src/decoder/attribute/isCompress.scala     |    4 +-
 t1/src/decoder/attribute/isCrossread.scala    |    4 +-
 t1/src/decoder/attribute/isCrosswrite.scala   |    4 +-
 t1/src/decoder/attribute/isDivider.scala      |    4 +-
 .../attribute/isDontneedexecuteinlane.scala   |    4 +-
 t1/src/decoder/attribute/isExtend.scala       |    4 +-
 t1/src/decoder/attribute/isFcompare.scala     |    4 +-
 t1/src/decoder/attribute/isFfo.scala          |    4 +-
 t1/src/decoder/attribute/isFirstwiden.scala   |    4 +-
 t1/src/decoder/attribute/isFloat.scala        |    6 +-
 t1/src/decoder/attribute/isFloatmul.scala     |    6 +-
 t1/src/decoder/attribute/isFloattype.scala    |    6 +-
 t1/src/decoder/attribute/isFma.scala          |    4 +-
 t1/src/decoder/attribute/isFother.scala       |    4 +-
 t1/src/decoder/attribute/isGather.scala       |    4 +-
 t1/src/decoder/attribute/isGather16.scala     |    4 +-
 t1/src/decoder/attribute/isId.scala           |    4 +-
 t1/src/decoder/attribute/isIndextype.scala    |    4 +-
 t1/src/decoder/attribute/isIota.scala         |    4 +-
 t1/src/decoder/attribute/isItype.scala        |    4 +-
 t1/src/decoder/attribute/isLogic.scala        |    4 +-
 t1/src/decoder/attribute/isMa.scala           |    4 +-
 .../decoder/attribute/isMaskdestination.scala |    4 +-
 t1/src/decoder/attribute/isMasklogic.scala    |    4 +-
 t1/src/decoder/attribute/isMasksource.scala   |    4 +-
 t1/src/decoder/attribute/isMaskunit.scala     |    4 +-
 t1/src/decoder/attribute/isMulticycle.scala   |    4 +-
 t1/src/decoder/attribute/isMultiplier.scala   |    4 +-
 t1/src/decoder/attribute/isMv.scala           |    4 +-
 t1/src/decoder/attribute/isNarrow.scala       |    4 +-
 t1/src/decoder/attribute/isNr.scala           |    4 +-
 t1/src/decoder/attribute/isOrderreduce.scala  |    4 +-
 t1/src/decoder/attribute/isOther.scala        |    4 +-
 t1/src/decoder/attribute/isPopcount.scala     |    4 +-
 t1/src/decoder/attribute/isReadonly.scala     |    4 +-
 t1/src/decoder/attribute/isRed.scala          |    4 +-
 t1/src/decoder/attribute/isReverse.scala      |    4 +-
 t1/src/decoder/attribute/isSaturate.scala     |    4 +-
 t1/src/decoder/attribute/isScheduler.scala    |    4 +-
 t1/src/decoder/attribute/isShift.scala        |    4 +-
 t1/src/decoder/attribute/isSlid.scala         |    4 +-
 t1/src/decoder/attribute/isSpecial.scala      |    4 +-
 t1/src/decoder/attribute/isSpecialslot.scala  |    4 +-
 t1/src/decoder/attribute/isSreadvd.scala      |    4 +-
 t1/src/decoder/attribute/isSwrite.scala       |    4 +-
 t1/src/decoder/attribute/isTargetrd.scala     |    4 +-
 t1/src/decoder/attribute/isUnorderwrite.scala |    4 +-
 t1/src/decoder/attribute/isUnsigned0.scala    |    4 +-
 t1/src/decoder/attribute/isUnsigned1.scala    |    4 +-
 t1/src/decoder/attribute/isVector.scala       |    4 +-
 t1/src/decoder/attribute/isVtype.scala        |    4 +-
 t1/src/decoder/attribute/isVwmacc.scala       |    4 +-
 t1/src/decoder/attribute/isWidenreduce.scala  |    4 +-
 t1/src/decoder/attribute/logicUop.scala       |    2 +-
 t1/src/decoder/attribute/mulUop.scala         |    2 +-
 t1/src/decoder/attribute/topUop.scala         |    4 +-
 t1/src/decoder/attribute/uop.scala            |   16 +-
 t1/src/laneStage/LaneExecutionBridge.scala    |    4 +-
 t1/src/laneStage/LaneStage.scala              |    2 +-
 t1/src/laneStage/LaneStage0.scala             |    4 +-
 t1/src/laneStage/LaneStage1.scala             |    4 +-
 t1/src/laneStage/LaneStage2.scala             |    4 +-
 t1/src/laneStage/LaneStage3.scala             |    2 +-
 75 files changed, 420 insertions(+), 1399 deletions(-)

diff --git a/t1/src/Bundles.scala b/t1/src/Bundles.scala
index f9a19239a4..250e68d132 100644
--- a/t1/src/Bundles.scala
+++ b/t1/src/Bundles.scala
@@ -139,7 +139,7 @@ class ExtendInstructionType extends Bundle {
 class LaneRequest(param: LaneParameter) extends Bundle {
   val instructionIndex: UInt = UInt(param.instructionIndexBits.W)
   // decode
-  val decodeResult: DecodeBundle = Decoder.bundle(param.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(param.decoderParam)
   val loadStore:    Bool = Bool()
   val issueInst:    Bool = Bool()
   val store:        Bool = Bool()
@@ -503,7 +503,7 @@ class InstructionPipeBundle(parameter: T1Parameter) extends Bundle {
   // 原始指令信息
   val request: VRequest = new VRequest(parameter.xLen)
   // decode 的结果
-  val decodeResult: DecodeBundle = new DecodeBundle(Decoder.all(parameter.fpuEnable))
+  val decodeResult: DecodeBundle = new DecodeBundle(Decoder.allFields(parameter.decoderParam))
   // 这条指令被vector分配的index
   val instructionIndex: UInt = UInt(parameter.instructionIndexBits.W)
   // 指令的csr信息
@@ -629,7 +629,7 @@ class LaneExecuteStage(parameter: LaneParameter)(isLastSlot: Boolean) extends Bu
   val sSendResponse: Option[Bool] = Option.when(isLastSlot)(Bool())
 
   // pipe state for stage3
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
   val instructionIndex: UInt = UInt(parameter.instructionIndexBits.W)
   val loadStore: Bool = Bool()
   val vd: UInt = UInt(5.W)
@@ -653,7 +653,7 @@ class ExecutionUnitRecord(parameter: LaneParameter)(isLastSlot: Boolean) extends
   val maskType: Bool = Bool()
   val laneIndex: UInt = UInt(parameter.laneNumberBits.W)
   // pipe state
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
 }
 
 class SlotRequestToVFU(parameter: LaneParameter) extends Bundle {
diff --git a/t1/src/Lane.scala b/t1/src/Lane.scala
index 83b5ec30d2..2929093786 100644
--- a/t1/src/Lane.scala
+++ b/t1/src/Lane.scala
@@ -10,7 +10,7 @@ import chisel3.probe.{Probe, ProbeValue, define}
 import chisel3.properties.{AnyClassType, Class, ClassType, Path, Property}
 import chisel3.util._
 import chisel3.util.experimental.decode.DecodeBundle
-import org.chipsalliance.t1.rtl.decoder.Decoder
+import org.chipsalliance.t1.rtl.decoder.{Decoder, DecoderParam}
 import org.chipsalliance.t1.rtl.lane._
 import org.chipsalliance.t1.rtl.vrf.{RamType, VRF, VRFParam, VRFProbe}
 
@@ -72,6 +72,7 @@ case class LaneParameter(
                           fpuEnable:                        Boolean,
                           portFactor:                       Int,
                           vrfRamType:                       RamType,
+                          decoderParam:                     DecoderParam,
                           vfuInstantiateParameter: VFUInstantiateParameter)
     extends SerializableModuleParameter {
 
diff --git a/t1/src/T1.scala b/t1/src/T1.scala
index 2038c8d5b2..9cb2cd3a76 100644
--- a/t1/src/T1.scala
+++ b/t1/src/T1.scala
@@ -13,7 +13,7 @@ import chisel3.probe.{Probe, ProbeValue, define, force}
 import chisel3.properties.{AnyClassType, Class, ClassType, Property}
 import chisel3.util.experimental.BitSet
 import org.chipsalliance.rvdecoderdb.Instruction
-import org.chipsalliance.t1.rtl.decoder.{Decoder, T1CustomInstruction}
+import org.chipsalliance.t1.rtl.decoder.{Decoder, DecoderParam, T1CustomInstruction}
 import org.chipsalliance.t1.rtl.lsu.{LSU, LSUParameter, LSUProbe}
 import org.chipsalliance.t1.rtl.vrf.{RamType, VRFParam, VRFProbe}
 
@@ -114,7 +114,7 @@ case class T1Parameter(
        |""".stripMargin
 
   // FIXME
-  def allInstuctions: Set[Instruction] = Set.empty
+  val allInstructions: Set[Instruction] = Set.empty
 
   require(extensions.forall(Seq("Zve32x", "Zve32f").contains), "unsupported extension.")
   // TODO: require bank not overlap
@@ -213,6 +213,8 @@ case class T1Parameter(
   // and the values are their respective delays.
   val crossLaneConnectCycles: Seq[Seq[Int]] = Seq.tabulate(laneNumber)(_ => Seq(1, 1))
 
+  val decoderParam: DecoderParam = DecoderParam(fpuEnable, allInstructions)
+
   /** parameter for TileLink. */
   val tlParam: TLBundleParameter = TLBundleParameter(
     a = TLChannelAParameter(physicalAddressWidth, sourceWidth, memoryDataWidthBytes * 8, sizeWidth, maskWidth),
@@ -233,6 +235,7 @@ case class T1Parameter(
       fpuEnable = fpuEnable,
       portFactor = vrfBankSize,
       vrfRamType = vrfRamType,
+      decoderParam = decoderParam,
       vfuInstantiateParameter = vfuInstantiateParameter
     )
   /** Parameter for each LSU. */
@@ -313,7 +316,7 @@ class T1(val parameter: T1Parameter) extends Module with SerializableModule[T1Pa
   /** the LSU Module */
 
   val lsu: Instance[LSU] = Instantiate(new LSU(parameter.lsuParameters))
-  val decode: Instance[VectorDecoder] = Instantiate(new VectorDecoder(parameter.fpuEnable))
+  val decode: Instance[VectorDecoder] = Instantiate(new VectorDecoder(parameter.decoderParam))
 
   // TODO: cover overflow
   // TODO: uarch doc about the order of instructions
diff --git a/t1/src/VectorDecoder.scala b/t1/src/VectorDecoder.scala
index edb931cc33..8f3e7107d7 100644
--- a/t1/src/VectorDecoder.scala
+++ b/t1/src/VectorDecoder.scala
@@ -6,14 +6,14 @@ package org.chipsalliance.t1.rtl
 import chisel3._
 import chisel3.experimental.hierarchy.{instantiable, public}
 import chisel3.util.experimental.decode._
-import org.chipsalliance.t1.rtl.decoder.Decoder
+import org.chipsalliance.t1.rtl.decoder.{Decoder, DecoderParam}
 
 @instantiable
-class VectorDecoder(decoder: Decoder) extends Module {
+class VectorDecoder(param: DecoderParam) extends Module {
   @public
   val decodeInput: UInt = IO(Input(UInt(32.W)))
   @public
-  val decodeResult: DecodeBundle = IO(Output(new DecodeBundle(decoder.all)))
+  val decodeResult: DecodeBundle = IO(Output(new DecodeBundle(Decoder.allFields(param))))
 
-  decodeResult := Decoder.decode(fpuEnable)(decodeInput)
+  decodeResult := Decoder.decode(param)(decodeInput)
 }
diff --git a/t1/src/decoder/Decoder.scala b/t1/src/decoder/Decoder.scala
index 15b960e451..b2b0046921 100644
--- a/t1/src/decoder/Decoder.scala
+++ b/t1/src/decoder/Decoder.scala
@@ -10,9 +10,14 @@ import org.chipsalliance.rvdecoderdb.Instruction
 import org.chipsalliance.t1.rtl.T1Parameter
 import org.chipsalliance.t1.rtl.decoder.attribute._
 
+object DecoderParam {
+  implicit def rwP: upickle.default.ReadWriter[DecoderParam] = upickle.default.macroRW
+}
+case class DecoderParam(fpuEnable: Boolean, allInstructions: Set[Instruction])
+
 trait T1DecodeFiled[D <: Data] extends DecodeField[T1DecodePattern, D] with FieldName
 
-trait T1BoolField extends T1DecodeFiled[Bool] with BoolDecodeField[T1DecodePattern] {
+trait BoolField extends T1DecodeFiled[Bool] with BoolDecodeField[T1DecodePattern] {
   def getTriState(pattern: T1DecodePattern): TriState
 
   override def genTable(pattern: T1DecodePattern): BitPat =
@@ -27,303 +32,303 @@ trait T1UopField extends T1DecodeFiled[UInt] with FieldName {
   def chiselType: UInt = UInt(4.W)
 }
 
-object logic extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isLogic.value
-}
-
-object adder extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isAdder.value
-}
+object Decoder {
+  object logic extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isLogic.value
+  }
 
-object shift extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isShift.value
-}
+  object adder extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isAdder.value
+  }
 
-object multiplier extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMultiplier.value
-}
+  object shift extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isShift.value
+  }
 
-object divider extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isDivider.value
-}
+  object multiplier extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMultiplier.value
+  }
 
-object multiCycle extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMulticycle.value
-}
+  object divider extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isDivider.value
+  }
 
-object other extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isOther.value
-}
+  object multiCycle extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMulticycle.value
+  }
 
-object unsigned0 extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isUnsigned0.value
-}
+  object other extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isOther.value
+  }
 
-object unsigned1 extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isUnsigned1.value
-}
+  object unsigned0 extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isUnsigned0.value
+  }
 
-object itype extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isItype.value
-}
+  object unsigned1 extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isUnsigned1.value
+  }
 
-object nr extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isNr.value
-}
+  object itype extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isItype.value
+  }
 
-object red extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isRed.value
-}
+  object nr extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isNr.value
+  }
 
-object widenReduce extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isWidenreduce.value
-}
+  object red extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isRed.value
+  }
 
-object targetRd extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isTargetrd.value
-}
+  object widenReduce extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isWidenreduce.value
+  }
 
-object slid extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSlid.value
-}
+  object targetRd extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isTargetrd.value
+  }
 
-object gather extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isGather.value
-}
+  object slid extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSlid.value
+  }
 
-object gather16 extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isGather16.value
-}
+  object gather extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isGather.value
+  }
 
-object compress extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isCompress.value
-}
+  object gather16 extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isGather16.value
+  }
 
-object unOrderWrite extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isUnorderwrite.value
-}
+  object compress extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isCompress.value
+  }
 
-object extend extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isExtend.value
-}
+  object unOrderWrite extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isUnorderwrite.value
+  }
 
-object mv extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMv.value
-}
+  object extend extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isExtend.value
+  }
 
-object iota extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isIota.value
-}
+  object mv extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMv.value
+  }
 
-object maskLogic extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMasklogic.value
-}
+  object iota extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isIota.value
+  }
 
-object maskDestination extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMaskdestination.value
-}
+  object maskLogic extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMasklogic.value
+  }
 
-object maskSource extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMasksource.value
-}
+  object maskDestination extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMaskdestination.value
+  }
 
-object readOnly extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isReadonly.value
-}
+  object maskSource extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMasksource.value
+  }
 
-object vwmacc extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isVwmacc.value
-}
+  object readOnly extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isReadonly.value
+  }
 
-object saturate extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSaturate.value
-}
+  object vwmacc extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isVwmacc.value
+  }
 
-object special extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSpecial.value
-}
+  object saturate extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSaturate.value
+  }
 
-object maskUnit extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMaskunit.value
-}
+  object special extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSpecial.value
+  }
 
-object crossWrite extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isCrosswrite.value
-}
+  object maskUnit extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isMaskunit.value
+  }
 
-object crossRead extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isCrossread.value
-}
+  object crossWrite extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isCrosswrite.value
+  }
 
-object sWrite extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSwrite.value
-}
+  object crossRead extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isCrossread.value
+  }
 
-object vtype extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isVtype.value
-}
+  object sWrite extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSwrite.value
+  }
 
-object sReadVD extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSreadvd.value
-}
+  object vtype extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isVtype.value
+  }
 
-object scheduler extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isScheduler.value
-}
+  object sReadVD extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSreadvd.value
+  }
 
-object dontNeedExecuteInLane extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isDontneedexecuteinlane.value
-}
+  object scheduler extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isScheduler.value
+  }
 
-object reverse extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isReverse.value
-}
+  object dontNeedExecuteInLane extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isDontneedexecuteinlane.value
+  }
 
-object average extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isAverage.value
-}
+  object reverse extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isReverse.value
+  }
 
-object ffo extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isFfo.value
-}
+  object average extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isAverage.value
+  }
 
-object popCount extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isPopcount.value
-}
+  object ffo extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isFfo.value
+  }
 
-object specialSlot extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSpecialslot.value
-}
+  object popCount extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isPopcount.value
+  }
 
-object float extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isFloat.value
-}
+  object specialSlot extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isSpecialslot.value
+  }
 
-object floatMul extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isFloatmul.value
-}
+  object float extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isFloat.value
+  }
 
-object orderReduce extends T1BoolField {
-  override def getTriState(pattern: T1DecodePattern): TriState = pattern.isOrderreduce.value
-}
+  object floatMul extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isFloatmul.value
+  }
 
-object topUop extends T1UopField {
-  override def genTable(pattern: T1DecodePattern): BitPat = pattern.topUop.value match {
-    case TopT0 => BitPat("b0000")
-    case TopT1 => BitPat("b0001")
-    case TopT2 => BitPat("b0010")
-    case TopT3 => BitPat("b0011")
-    case TopT5 => BitPat("b0101")
-    case TopT6 => BitPat("b0110")
-    case TopT7 => BitPat("b0111")
-    case _ => BitPat.dontCare(4)
+  object orderReduce extends BoolField {
+    override def getTriState(pattern: T1DecodePattern): TriState = pattern.isOrderreduce.value
+  }
+
+  object topUop extends T1UopField {
+    override def genTable(pattern: T1DecodePattern): BitPat = pattern.topUop.value match {
+      case TopT0 => BitPat("b0000")
+      case TopT1 => BitPat("b0001")
+      case TopT2 => BitPat("b0010")
+      case TopT3 => BitPat("b0011")
+      case TopT5 => BitPat("b0101")
+      case TopT6 => BitPat("b0110")
+      case TopT7 => BitPat("b0111")
+      case _ => BitPat.dontCare(4)
+    }
   }
-}
 
-object uop extends T1UopField {
-  override def genTable(pattern: T1DecodePattern): BitPat = pattern.decoderUop.value match {
-    case addCase: AdderUOPType =>
-      addCase match {
-        case addUop0 => BitPat("b0000")
-        case addUop1 => BitPat("b0001")
-        case addUop10 => BitPat("b1010")
-        case addUop11 => BitPat("b1011")
-        case addUop2 => BitPat("b0010")
-        case addUop3 => BitPat("b0011")
-        case addUop4 => BitPat("b0100")
-        case addUop6 => BitPat("b0110")
-        case addUop7 => BitPat("b0111")
-        case addUop8 => BitPat("b1000")
-        case addUop9 => BitPat("b1001")
-        case _ => BitPat.dontCare(4)
-      }
-    case divCase: DivUOPType =>
-      divCase match {
-        case divUop0 => BitPat("b0000")
-        case divUop1 => BitPat("b0001")
-        case divUop10 => BitPat("b1010")
-        case divUop8 => BitPat("b1000")
-        case divUop9 => BitPat("b1001")
-        case _ => BitPat.dontCare(4)
-      }
-    case floatCase: FloatUopType =>
-      floatCase match {
-        case FUT0 => BitPat("b0000")
-        case FUT1 => BitPat("b0001")
-        case FUT10 => BitPat("b1010")
-        case FUT12 => BitPat("b1100")
-        case FUT13 => BitPat("b1101")
-        case FUT14 => BitPat("b1110")
-        case FUT2 => BitPat("b0010")
-        case FUT3 => BitPat("b0011")
-        case FUT4 => BitPat("b0100")
-        case FUT5 => BitPat("b0101")
-        case FUT6 => BitPat("b0110")
-        case FUT7 => BitPat("b0111")
-        case FUT8 => BitPat("b1000")
-        case FUT9 => BitPat("b1001")
-        case _ => BitPat.dontCare(4)
-      }
-    case logicCase: LogicUopType =>
-      logicCase match {
-        case logicUop0 => BitPat("b0000")
-        case logicUop1 => BitPat("b0001")
-        case logicUop2 => BitPat("b0010")
-        case logicUop4 => BitPat("b0100")
-        case logicUop5 => BitPat("b0101")
-        case logicUop6 => BitPat("b0110")
-        case logicUop8 => BitPat("b1000")
-        case logicUop9 => BitPat("b1001")
-        case _ => BitPat.dontCare(4)
-      }
-    case mulCase: MulUOPType =>
-      mulCase match {
-        case mulUop0 => BitPat("b0000")
-        case mulUop1 => BitPat("b0001")
-        case mulUop10 => BitPat("b1010")
-        case mulUop14 => BitPat("b1110")
-        case mulUop3 => BitPat("b0011")
-        case mulUop5 => BitPat("b0101")
-        case _ => BitPat.dontCare(4)
-      }
-    case otherCase: OtherUopType =>
-      otherCase match {
-        case otherUop0 => BitPat("b0000")
-        case otherUop1 => BitPat("b0001")
-        case otherUop2 => BitPat("b0010")
-        case otherUop3 => BitPat("b0011")
-        case otherUop4 => BitPat("b0100")
-        case otherUop5 => BitPat("b0101")
-        case otherUop6 => BitPat("b0110")
-        case otherUop7 => BitPat("b0111")
-        case otherUop8 => BitPat("b1000")
-        case otherUop9 => BitPat("b1001")
-        case _ => BitPat.dontCare(4)
-      }
-    case shiftCase: ShiftUopType =>
-      shiftCase match {
-        case shiftUop0 => BitPat("b0000")
-        case shiftUop1 => BitPat("b0001")
-        case shiftUop2 => BitPat("b0010")
-        case shiftUop4 => BitPat("b0100")
-        case shiftUop6 => BitPat("b0110")
-        case _ => BitPat.dontCare(4)
-      }
-    case _ => BitPat.dontCare(4)
+  object uop extends T1UopField {
+    override def genTable(pattern: T1DecodePattern): BitPat = pattern.decoderUop.value match {
+      case addCase: AdderUOPType =>
+        addCase match {
+          case addUop0 => BitPat("b0000")
+          case addUop1 => BitPat("b0001")
+          case addUop10 => BitPat("b1010")
+          case addUop11 => BitPat("b1011")
+          case addUop2 => BitPat("b0010")
+          case addUop3 => BitPat("b0011")
+          case addUop4 => BitPat("b0100")
+          case addUop6 => BitPat("b0110")
+          case addUop7 => BitPat("b0111")
+          case addUop8 => BitPat("b1000")
+          case addUop9 => BitPat("b1001")
+          case _ => BitPat.dontCare(4)
+        }
+      case divCase: DivUOPType =>
+        divCase match {
+          case divUop0 => BitPat("b0000")
+          case divUop1 => BitPat("b0001")
+          case divUop10 => BitPat("b1010")
+          case divUop8 => BitPat("b1000")
+          case divUop9 => BitPat("b1001")
+          case _ => BitPat.dontCare(4)
+        }
+      case floatCase: FloatUopType =>
+        floatCase match {
+          case FUT0 => BitPat("b0000")
+          case FUT1 => BitPat("b0001")
+          case FUT10 => BitPat("b1010")
+          case FUT12 => BitPat("b1100")
+          case FUT13 => BitPat("b1101")
+          case FUT14 => BitPat("b1110")
+          case FUT2 => BitPat("b0010")
+          case FUT3 => BitPat("b0011")
+          case FUT4 => BitPat("b0100")
+          case FUT5 => BitPat("b0101")
+          case FUT6 => BitPat("b0110")
+          case FUT7 => BitPat("b0111")
+          case FUT8 => BitPat("b1000")
+          case FUT9 => BitPat("b1001")
+          case _ => BitPat.dontCare(4)
+        }
+      case logicCase: LogicUopType =>
+        logicCase match {
+          case logicUop0 => BitPat("b0000")
+          case logicUop1 => BitPat("b0001")
+          case logicUop2 => BitPat("b0010")
+          case logicUop4 => BitPat("b0100")
+          case logicUop5 => BitPat("b0101")
+          case logicUop6 => BitPat("b0110")
+          case logicUop8 => BitPat("b1000")
+          case logicUop9 => BitPat("b1001")
+          case _ => BitPat.dontCare(4)
+        }
+      case mulCase: MulUOPType =>
+        mulCase match {
+          case mulUop0 => BitPat("b0000")
+          case mulUop1 => BitPat("b0001")
+          case mulUop10 => BitPat("b1010")
+          case mulUop14 => BitPat("b1110")
+          case mulUop3 => BitPat("b0011")
+          case mulUop5 => BitPat("b0101")
+          case _ => BitPat.dontCare(4)
+        }
+      case otherCase: OtherUopType =>
+        otherCase match {
+          case otherUop0 => BitPat("b0000")
+          case otherUop1 => BitPat("b0001")
+          case otherUop2 => BitPat("b0010")
+          case otherUop3 => BitPat("b0011")
+          case otherUop4 => BitPat("b0100")
+          case otherUop5 => BitPat("b0101")
+          case otherUop6 => BitPat("b0110")
+          case otherUop7 => BitPat("b0111")
+          case otherUop8 => BitPat("b1000")
+          case otherUop9 => BitPat("b1001")
+          case _ => BitPat.dontCare(4)
+        }
+      case shiftCase: ShiftUopType =>
+        shiftCase match {
+          case shiftUop0 => BitPat("b0000")
+          case shiftUop1 => BitPat("b0001")
+          case shiftUop2 => BitPat("b0010")
+          case shiftUop4 => BitPat("b0100")
+          case shiftUop6 => BitPat("b0110")
+          case _ => BitPat.dontCare(4)
+        }
+      case _ => BitPat.dontCare(4)
+    }
   }
-}
 
-object fpExecutionType extends T1UopField {
-  override def genTable(pattern: T1DecodePattern): BitPat = pattern.fpExecutionType match {
-    case FpExecutionType.Compare => BitPat("b10")
-    case FpExecutionType.MA => BitPat("b00")
-    case FpExecutionType.Other => BitPat("b11")
-    case FpExecutionType.Nil => BitPat.dontCare(2)
+  object fpExecutionType extends T1UopField {
+    override def genTable(pattern: T1DecodePattern): BitPat = pattern.fpExecutionType match {
+      case FpExecutionType.Compare => BitPat("b10")
+      case FpExecutionType.MA => BitPat("b00")
+      case FpExecutionType.Other => BitPat("b11")
+      case FpExecutionType.Nil => BitPat.dontCare(2)
+    }
   }
-}
 
-class Decoder(t1Parameter: T1Parameter) {
-  def allFields: Seq[T1DecodeFiled[_ >: Bool <: UInt]] = Seq(
+  def allFields(param: DecoderParam): Seq[T1DecodeFiled[_ >: Bool <: UInt]] = Seq(
     logic,
     adder,
     shift,
@@ -373,7 +378,7 @@ class Decoder(t1Parameter: T1Parameter) {
     topUop,
     specialSlot
   ) ++ {
-    if (t1Parameter.fpuEnable)
+    if (param.fpuEnable)
       Seq(
         float,
         fpExecutionType,
@@ -382,13 +387,15 @@ class Decoder(t1Parameter: T1Parameter) {
       )
     else Seq()
   }
-  def allDecodePattern = t1Parameter.allInstuctions.map(T1DecodePattern(_, t1Parameter)).toSeq.sortBy(_.instruction.name)
+  def allDecodePattern(param: DecoderParam) = param.allInstructions.map(T1DecodePattern(_, param)).toSeq.sortBy(_.instruction.name)
 
-  def decodeTable: DecodeTable[T1DecodePattern] =
+  def decodeTable(param: DecoderParam): DecodeTable[T1DecodePattern] =
     new DecodeTable[T1DecodePattern](
-      allDecodePattern,
-      allFields
+      allDecodePattern(param),
+      allFields(param)
     )
+  def decode(param: DecoderParam): UInt => DecodeBundle = decodeTable(param).decode
+  def bundle(param: DecoderParam): DecodeBundle = decodeTable(param).bundle
 }
 
 trait FieldName {
@@ -407,14 +414,6 @@ trait TopUopField extends DecodeField[Op, UInt] with FieldName {
   def chiselType: UInt = UInt(3.W)
 }
 
-trait BoolField extends BoolDecodeField[Op] with FieldName {
-  def dontCareCase(op: Op): Boolean = false
-  // 如果包含lsu, 那么value不会被纠正, 否则value只在不是lsu的情况下被视为1
-  def containsLSU: Boolean = false
-  def value(op:    Op): Boolean
-  def genTable(op: Op): BitPat = if (dontCareCase(op)) dc else if (value(op) && (containsLSU || op.notLSU)) y else n
-}
-
 case class SpecialAux(name: String, vs: Int, value: String)
 case class SpecialMap(name: String, vs: Int, data: Map[String, String])
 case class SpecialAuxInstr(instrName: String, vs: Int, value: String, name: String)
@@ -437,984 +436,3 @@ case class Op(tpe: String, funct6: String, tpeOp2: String, funct3: String,
       opcode
   )
 }
-
-object Decoder {
-  // Opcode: instruction[6:0]
-  // refer to [https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#vector-instruction-formats]
-  private val opcodeV      = "1010111"
-  private val opcodeLoadF  = "0000111"
-  private val opcodeStoreF = "0100111"
-
-  // Funct3: instruction[14:12]
-  // refer to [https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#101-vector-arithmetic-instruction-encoding]
-  private val funct3IVV = "000"
-  private val funct3IVI = "011"
-  private val funct3IVX = "100"
-  private val funct3MVV = "010"
-  private val funct3MVX = "110"
-  private val funct3FVV = "001"
-  private val funct3FVF = "101"
-  private val funct3CFG = "111" // TODO: need implementations
-
-  // type of rs1
-  private val op1iFunct3 = Seq(funct3IVV, funct3IVI, funct3IVX)
-  private val op1mFunct3 = Seq(funct3MVV, funct3MVX)
-  private val op1fFunct3 = Seq(funct3FVV, funct3FVF)
-  private val op1cFunct3 = Seq(funct3CFG)
-  // type of rs2
-  private val op2vFunct3 = Seq(funct3IVV, funct3MVV, funct3FVV)
-  private val op2xFunct3 = Seq(funct3IVX, funct3MVX)
-  private val op2iFunct3 = Seq(funct3IVI)
-  private val op2fFunct3 = Seq(funct3FVF)
-
-  // special instrctions
-  // refer to [https://github.com/riscv/riscv-v-spec/blob/master/inst-table.adoc]
-  private val insnVRXUNARY0 = SpecialMap("VRXUNARY0", 2, Map("vmv.s.x" -> "00000"))
-  private val insnVWXUNARY0 = SpecialMap("VWXUNARY0", 1, Map(
-      "vmv.x.s" -> "00000",
-      "vcpop"   -> "10000",
-      "vfirst"  -> "10001",
-    )
-  )
-  private val insnVXUNARY0 = SpecialMap("VXUNARY0", 1, Map(
-      "vzext.vf8" -> "00010",
-      "vsext.vf8" -> "00011",
-      "vzext.vf4" -> "00100",
-      "vsext.vf4" -> "00101",
-      "vzext.vf2" -> "00110",
-      "vsext.vf2" -> "00111"
-    )
-  )
-  private val insnVRFUNARY0 = SpecialMap("VRFUNARY0", 2, Map("vfmv.s.f" -> "00000"))
-  private val insnVWFUNARY0 = SpecialMap("VWFUNARY0", 1, Map("vfmv.f.s" -> "00000"))
-  private val insnVFUNARY0 = SpecialMap("VFUNARY0", 1, Map(
-      // single-width converts
-      "vfcvt.xu.f.v"      -> "00000",
-      "vfcvt.x.f.v"       -> "00001",
-      "vfcvt.f.xu.v"      -> "00010",
-      "vfcvt.f.x.v"       -> "00011",
-      "vfcvt.rtz.xu.f.v"  -> "00110",
-      "vfcvt.rtz.x.f.v"   -> "00111",
-      // widening converts
-      "vfwcvt.xu.f.v"     -> "01000",
-      "vfwcvt.x.f.v"      -> "01001",
-      "vfwcvt.f.xu.v"     -> "01010",
-      "vfwcvt.f.x.v"      -> "01011",
-      "vfwcvt.f.f.v"      -> "01100",
-      "vfwcvt.rtz.xu.f.v" -> "01110",
-      "vfwcvt.rtz.x.f.v"  -> "01111",
-      // narrowing converts
-      "vfncvt.xu.f.w"     -> "10000",
-      "vfncvt.x.f.w"      -> "10001",
-      "vfncvt.f.xu.w"     -> "10010",
-      "vfncvt.f.x.w"      -> "10011",
-      "vfncvt.f.f.w"      -> "10100",
-      "vfncvt.rod.f.f.w"  -> "10101",
-      "vfncvt.rtz.xu.f.w" -> "10110",
-      "vfncvt.rtz.x.f.w"  -> "10111",
-    )
-  )
-  private val insnVFUNARY1 = SpecialMap("VFUNARY1", 1, Map(
-      "vfsqrt.v"   -> "00000",
-      "vfrsqrt7.v" -> "00100",
-      "vfrec7.v"   -> "00101",
-      "vfclass.v"  -> "10000",
-    )
-  )
-  private val insnVMUNARY0 = SpecialMap("VMUNARY0", 1, Map(
-      "vmsbf" -> "00001",
-      "vmsof" -> "00010",
-      "vmsif" -> "00011",
-      "viota" -> "10000",
-      "vid"   -> "10001",
-    )
-  )
-  def insnVToSpecialAux(insns: SpecialMap): Seq[SpecialAuxInstr] = {
-    val vs = insns.vs
-    val name = insns.name
-    insns.data.map { case (instrName, value) =>
-      SpecialAuxInstr(instrName, vs, value, name)
-    }.toSeq
-  }
-  private val insnSpec: Seq[SpecialAuxInstr] = insnVToSpecialAux(insnVRXUNARY0) ++ insnVToSpecialAux(insnVWXUNARY0) ++ insnVToSpecialAux(insnVXUNARY0)  ++ insnVToSpecialAux(insnVRFUNARY0) ++ insnVToSpecialAux(insnVWFUNARY0) ++ insnVToSpecialAux(insnVFUNARY0) ++ insnVToSpecialAux(insnVFUNARY1)  ++ insnVToSpecialAux(insnVMUNARY0)
-
-  def ops(fpuEnable: Boolean): Array[Op] = {
-    val instructions: Seq[Instruction] = (org.chipsalliance.rvdecoderdb.instructions(org.chipsalliance.rvdecoderdb.extractResource(getClass.getClassLoader))).filter { i =>
-        i.instructionSets.map(_.name) match {
-          case s if s.contains("rv_v") => true
-          case _ => false
-        }
-    }.filter { i =>
-      i.name match {
-          // csr instructions
-          case s if Seq("vsetivli", "vsetvli", "vsetvl").contains(s) => false
-          // instrctions `vmv` and `vmerge` share the same opcode, as defined in [https://github.com/riscv/riscv-v-spec/blob/master/inst-table.adoc]
-          case s if s.contains("vmv.v") => false
-          // instructions `vfmv.v.f` and `vfmerge.vfm` share the same opcode, as defined in [https://github.com/riscv/riscv-v-spec/blob/master/inst-table.adoc]
-          case s if s.contains("vfmv.v.f") => false
-          case _ => true
-      }
-    }.toSeq.distinct
-    val expandedOps: Array[Op] =
-      // case of notLSU instructions
-      (instructions.filter(_.encoding.toString.substring(32-6-1, 32-0) == opcodeV).map{ insn =>
-        val funct3 = insn.encoding.toString.substring(32-14-1, 32-12)
-
-        val tpe = if (op1iFunct3.contains(funct3)) "I" else if (op1mFunct3.contains(funct3)) "M" else if (op1fFunct3.contains(funct3)) "F" else "" // TODO: OPCFG
-        val tpeOp2 = if (op2vFunct3.contains(funct3)) "V" else if (op2xFunct3.contains(funct3)) "X" else if (op2iFunct3.contains(funct3)) "I" else if (op2fFunct3.contains(funct3)) "F" else "" // TODO: OPCFG
-        val funct6 = insn.encoding.toString.substring(32-31-1, 32-26)
-        val special = insnSpec.collectFirst { case s if (insn.name.contains(s.instrName)) => SpecialAux(s.name, s.vs, s.value) }
-        val vd = insn.encoding.toString.substring(32-11-1, 32-7)
-        val opcode = insn.encoding.toString.substring(32-6-1, 32-0)
-        Op(tpe, funct6, tpeOp2, funct3, insn.name, special, notLSU=true, vd, opcode)
-      }
-      // case of LSU instructions: `opcodeLoadF` and `opcodeStoreF`
-      ++ instructions.filter(_.encoding.toString.substring(32-6-1, 32-0) == opcodeLoadF).map{ insn =>
-        val funct6 = insn.encoding.toString.substring(32-31-1, 32-26)
-        Op(
-          "I",               // tpe
-          funct6,
-          "?",               // tpeOp2
-          "???",             // funct3
-          insn.name,
-          None,
-          notLSU = false,
-          "?????",           // vd
-          opcodeLoadF
-        )
-      }
-      ++ instructions.filter(_.encoding.toString.substring(32-6-1, 32-0) == opcodeStoreF).map{ insn =>
-        val funct6 = insn.encoding.toString.substring(32-31-1, 32-26)
-        Op(
-          "I",               // tpe
-          funct6,
-          "?",               // tpeOp2
-          "???",             // funct3
-          insn.name,
-          None,
-          notLSU = false,
-          "?????",           // vd
-          opcodeStoreF
-        )
-      }
-    ).toArray
-    expandedOps.filter(_.tpe != "F" || fpuEnable)
-  }
-
-  /** Instruction should use [[org.chipsalliance.t1.rtl.decoder.TableGenerator.LaneDecodeTable.LogicUnit]].
-    * "vand.vi"
-    * "vand.vv"
-    * "vand.vx"
-    * "vmand.mm"
-    * "vmandn.mm"
-    * "vmnand.mm"
-    * "vredand.vs"
-    * "vmnor.mm"
-    * "vmor.mm"
-    * "vmorn.mm"
-    * "vmxnor.mm"
-    * "vmxor.mm"
-    * "vor.vi"
-    * "vor.vv"
-    * "vor.vx"
-    * "vredor.vs"
-    * "vredxor.vs"
-    * "vxor.vi"
-    * "vxor.vv"
-    * "vxor.vx"
-    */
-  object logic extends BoolField {
-    val subs: Seq[String] = Seq("and", "or")
-    // 执行单元现在不做dc,因为会在top判断是否可以chain
-    def value(op: Op): Boolean = subs.exists(op.name.contains) && op.tpe != "F"
-  }
-
-  /** goes to [[org.chipsalliance.t1.rtl.LaneAdder]]. */
-  object adder extends BoolField {
-    val subs: Seq[String] = Seq(
-      "add",
-      "sub",
-      "slt",
-      "sle",
-      "sgt",
-      "sge",
-      "max",
-      "min",
-      "seq",
-      "sne",
-      "adc",
-      "sbc",
-      "sum"
-    )
-    def value(op: Op): Boolean = subs.exists(op.name.contains) &&
-      !(op.tpe == "M" && Seq("vm", "vnm").exists(op.name.startsWith)) && op.tpe != "F"
-  }
-
-  /** goes to [[org.chipsalliance.t1.rtl.LaneShifter]]. */
-  object shift extends BoolField {
-    val subs: Seq[String] = Seq(
-      "srl",
-      "sll",
-      "sra"
-    )
-    def value(op: Op): Boolean = subs.exists(op.name.contains) && op.tpe != "F"
-  }
-
-  /** goes to [[org.chipsalliance.t1.rtl.LaneMul]].
-    * only apply to int mul
-    */
-  object multiplier extends BoolField {
-    val subs: Seq[String] = Seq(
-      "mul",
-      "madd",
-      "macc",
-      "msub",
-      "msac"
-    )
-    def value(op: Op): Boolean = subs.exists(op.name.contains) && op.tpe != "F"
-  }
-
-  /** goes to [[org.chipsalliance.t1.rtl.LaneDiv]] or [[org.chipsalliance.t1.rtl.LaneDivFP]].
-    * if FP exist, all div goes to [[org.chipsalliance.t1.rtl.LaneDivFP]]
-    */
-  object divider extends BoolField {
-    val intDiv: Seq[String] = Seq(
-      "div",
-      "rem"
-    )
-    val floatDiv: Seq[String] = Seq(
-      "fdiv",
-      "fsqrt",
-      "frdiv"
-    )
-    val subs: Seq[String] = intDiv ++ floatDiv
-    def value(op: Op): Boolean = subs.exists(op.name.contains)
-  }
-
-  /** TODO: remove? only Div or customer */
-  object multiCycle extends BoolField {
-    def value(op: Op): Boolean = divider.value(op) || float.value(op)
-  }
-
-  /** goes to [[org.chipsalliance.t1.rtl.OtherUnit]] */
-  object other extends BoolField {
-    val subs: Seq[String] = Seq(
-      "rgather",
-      "merge",
-      "mv",
-      // TODO: move to shift
-      "clip"
-    )
-    def getType(op: Op): (Boolean, Int) = {
-      // todo: vType gather -> mv
-      val isGather = op.name.contains("rgather")
-      val isMerge = op.name.contains("merge")
-      val isClip = op.name.contains("clip")
-      val isFFO = ffo.value(op)
-      // extend read only
-      val extendType = Seq(mv, popCount, id)
-      val isMVtoFP = op.special.isDefined && op.special.get.name == "VWFUNARY0"
-      val isOtherType: Boolean =
-        !isMVtoFP && (Seq(isGather, isMerge, isClip, isFFO) ++ extendType.map(_.value(op))).reduce(_ || _)
-      // ++ffo
-      val otherType = Seq(isGather, isMerge, isClip) ++ extendType.map(_.value(op))
-      val typeIndex = if (otherType.contains(true)) 4 + otherType.indexOf(true) else 0
-      // ffo 占据 0, 1, 2, 3 作为字编码
-      val otherUop = if (isFFO) ffo.subs.indexOf(op.name) else typeIndex
-      (isOtherType, otherUop)
-    }
-
-    def value(op: Op): Boolean = getType(op)._1
-  }
-
-  /** is a float type.
-    * TODO: remove it.
-    */
-  object floatType extends BoolField {
-    def value(op: Op): Boolean = op.tpe == "F"
-  }
-
-  /** goes to [[org.chipsalliance.t1.rtl.LaneFloat]]. */
-  object float extends BoolField {
-    def value(op: Op): Boolean = op.tpe == "F" &&
-      !(
-        other.value(op) ||
-          dontNeedExecuteInLane.value(op) ||
-          slid.value(op) || divider.value(op))
-  }
-
-  /** TODO: remove it. */
-  object floatConvertUnsigned extends BoolField {
-    override def dontCareCase(op: Op): Boolean = !float.value(op)
-    def value(op: Op): Boolean = {
-      op.name.contains("fcvt") && op.name.contains(".xu.")
-    }
-  }
-
-  /** uop of FMA,
-    * goes to [[org.chipsalliance.t1.rtl.LaneFloat]] FMA unit.
-    */
-  object FMA extends BoolField {
-    val adderSubsMap: Seq[(String, Int)] = Seq(
-      "vfadd" -> 0,
-      "vfsub" -> 1,
-      "vfrsub" -> 5,
-    )
-
-    // need read vd
-    val maMap: Seq[(String, Int)] = Seq(
-      "vfmacc" -> 0,
-      "vfnmacc" -> 3,
-      "vfmsac" -> 1,
-      "vfnmsac" -> 2,
-      "vfmadd" -> 4,
-      "vfnmadd" -> 7,
-      "vfmsub" -> 5,
-      "vfnmsub" -> 6,
-    )
-
-    val subsMap: Seq[(String, Int)] = Seq(
-      "vfmul" -> 0,
-      "vfredosum" -> 0,
-      "vfredusum" -> 0,
-    ) ++ adderSubsMap ++ maMap
-
-    def value(op: Op): Boolean = subsMap.exists(a => op.name.contains(a._1))
-
-    def uop(op: Op): Int = {
-      val isAdder = adderSubsMap.exists(a => op.name.contains(a._1)) || op.name.contains("sum")
-      val msbCode = if (isAdder) 8 else 0
-      // vfwadd 暂时不支持,所以没处理, 所有的widen narrow 会被解成 fma-0
-      val mapFilter: Seq[(String, Int)] = subsMap.filter(a => op.name.contains(a._1))
-      val lsbCode: Int = if (mapFilter.isEmpty) 0 else mapFilter.head._2
-      msbCode + lsbCode
-    }
-  }
-
-  /** TODO: add op. */
-  object floatMul extends BoolField {
-    def value(op: Op): Boolean = op.name.contains("vfmul")
-  }
-
-  /** don't use it, it's slow, lane read all elements from VRF, send to Top.
-    */
-  object orderReduce extends BoolField {
-    def value(op: Op): Boolean = op.name.contains("vfredosum")
-  }
-
-  object FDiv extends BoolField {
-    // todo: remove FDiv
-    val subsMap: Seq[(String, Int)] = Seq.empty[(String, Int)]
-    def value(op: Op): Boolean = subsMap.exists(a => op.name.contains(a._1))
-
-    def uop(op: Op): Int = {
-      val mapFilter = subsMap.filter(a => op.name.contains(a._1))
-      if (mapFilter.isEmpty) 0 else mapFilter.head._2
-    }
-  }
-
-  /** TODO: remove it, but remains attribute. */
-  object FCompare extends BoolField {
-    val subsMap = Seq(
-      "vmfeq" -> 1,
-      "vmfge" -> 5,
-      "vmfgt" -> 4,
-      "vmfle" -> 3,
-      "vmflt" -> 2,
-      "vmfne" -> 0,
-      "vfmin" -> 8,
-      "vfmax" -> 12,
-      "vfredmin" -> 8,
-      "vfredmax" -> 12,
-    )
-
-    def value(op: Op): Boolean = subsMap.exists(a => op.name.contains(a._1))
-
-    def uop(op: Op): Int = {
-      val mapFilter = subsMap.filter(a => op.name.contains(a._1))
-      if (mapFilter.isEmpty) 0 else mapFilter.head._2
-    }
-  }
-
-  /** designed for Other Unit in FP.
-    * goes to [[org.chipsalliance.t1.rtl.LaneFloat]] OtherUnit.
-    * TODO: perf it.
-    */
-  object FOther extends BoolField {
-    val unsignedMap = Seq(
-      "vfcvt.f.xu.v" -> 8,
-      "vfcvt.rtz.xu.f.v" -> 13,
-    )
-    val subsMap = Seq(
-      "vfcvt.f.x.v" -> 8,
-      "vfcvt.rtz.x.f.v" -> 14,
-      "vfcvt.x.f.v" -> 10,
-      "vfcvt.xu.f.v" -> 9,
-      "vfsgnjn" -> 2,
-      "vfsgnjx" -> 3,
-      "vfsgnj" -> 1,
-      "vfclass" -> 4,
-      "vfrsqrt7" -> 7,
-      "vfrec7" -> 6,
-    ) ++ unsignedMap
-
-    def value(op: Op): Boolean = subsMap.exists(a => op.name.contains(a._1))
-
-    def uop(op: Op): Int = {
-      val mapFilter = subsMap.filter(a => op.name.contains(a._1))
-      if (mapFilter.isEmpty) 0 else mapFilter.head._2
-    }
-  }
-
-  /** float uop, goes to [[org.chipsalliance.t1.rtl.LaneFloatRequest.unitSelet]]
-    * TODO: remove FDiv. move to VFU uop
-    */
-  object fpExecutionType extends FloatType {
-    def genTable(op: Op): BitPat = {
-      val code: Int = if (FDiv.value(op)) 1 else if (FCompare.value(op)) 2 else if (FOther.value(op)) 3 else 0 /* FMA */
-      BitPat("b" + ("00" + code.toBinaryString).takeRight(2))
-    }
-  }
-
-  /** There are two types of widen:
-    * - vd -> widen.
-    * - vs2, vd -> widen.
-    *
-    * This op will widen vs2.
-    * TODO: remove it as attribute.
-    */
-  object firstWiden extends BoolField {
-    def value(op: Op): Boolean = {
-      val nameWoW = op.name.replace(".wf", ".w").replace(".wx", ".w").replace(".wv", ".w")
-      nameWoW.endsWith(".w") || vwmacc.value(op)
-    }
-  }
-
-  /** for vmvnr, move vreg group to another vreg group.
-    * it will ignore lmul, use from instr.
-    * chainable
-    */
-  object nr extends BoolField {
-    // for instructions `vmv1r.v`,`vmv2r.v`, `vmv4r.v`, `vmv8r.v`
-    def value(op: Op): Boolean = Seq("vmv1r.v","vmv2r.v", "vmv4r.v", "vmv8r.v").contains(op.name)
-  }
-
-  /** do reduce in each lane.
-    * each element will sequentially executed in each lanes.
-    * after finishing, pop it to Top, and use ALU at top to get the final result and send to element0
-    * TODO: better name.
-    */
-  object red extends BoolField {
-    // reduce 会影响special, special会极大地影响性能, 所以不能dc
-    def value(op: Op): Boolean = op.name.contains("red") || op.name.contains("pop")
-  }
-
-  // TODO: remove this.
-  object maskOp extends BoolField {
-    def value(op: Op): Boolean = op.name.startsWith("vm") &&
-      ((adder.value(op) && !Seq("min", "max").exists(op.name.contains)) || logic.value(op))
-  }
-
-  /** only instruction will switch src.
-    * TODO: send it to uop.
-    */
-  object reverse extends BoolField {
-    def value(op: Op): Boolean = op.name.contains("vrsub")
-  }
-
-  /** dual width of src will be convert to single width to dst.
-    * narrow can be the src of chain.
-    * as the dst of chain, only can be fed with Load.
-    *
-    * TODO: remove it as attribute.
-    */
-  object narrow extends BoolField {
-    val subs: Seq[String] = Seq(
-      "vnsrl",
-      "vnsra",
-      "vnclip"
-    )
-    // todo: 确认是否可以dc
-    override def dontCareCase(op: Op): Boolean = op.special.nonEmpty
-    def value(op:                 Op): Boolean = subs.exists(op.name.contains)
-  }
-
-  /** lane should write to another lane
-    */
-  object crossWrite extends BoolField {
-    override def dontCareCase(op: Op): Boolean = op.special.nonEmpty
-    def value(op:                 Op): Boolean = op.name.startsWith("vw") && !op.name.startsWith("vwred")
-  }
-
-  /** a special widen, only write dual vd from Top to element0
-    * it doesn't cross.
-    * TODO: better name.
-    */
-  object widenReduce extends BoolField {
-    override def dontCareCase(op: Op): Boolean = op.special.nonEmpty
-    def value(op:                 Op): Boolean = op.name.startsWith("vwred")
-  }
-
-  /** For adder, does it need to take care of saturate.
-    * TODO: add to uop
-    */
-  object saturate extends BoolField {
-    override def dontCareCase(op: Op): Boolean = op.special.nonEmpty
-    def value(op:                 Op): Boolean = Seq("vsa", "vss", "vsm").exists(op.name.startsWith)
-  }
-
-  /** For adder, does it need to take care of saturate.
-    * TODO: add to uop
-    */
-  object average extends BoolField {
-    val subs: Seq[String] = Seq(
-      "vaa",
-      "vas"
-    )
-    override def dontCareCase(op: Op): Boolean = op.special.nonEmpty
-    def value(op:                 Op): Boolean = subs.exists(op.name.startsWith)
-  }
-
-  /** is src0 unsigned?
-    * used everywhere in Lane and VFU.
-    */
-  object unsigned0 extends BoolField {
-    def value(op: Op): Boolean = {
-      val nameWoW = op.name.replace(".vv", "").replace(".vi", "").replace(".vx", "").replace(".vs", "").replace(".wi", "").replace(".wx", "").replace(".wv", "")
-      val logicShift = shift.genTable(op) == y && nameWoW.endsWith("l")
-      val UIntOperation = nameWoW.endsWith("u") && !nameWoW.endsWith("su")
-      val mul = op.name.contains("mulhsu") || op.name.contains("wmulsu") || op.name.contains("vwmaccus")
-      val madc = Seq("adc", "sbc").exists(op.name.contains) && op.name.startsWith("vm")
-      op.special.nonEmpty || logicShift || UIntOperation || mul || madc
-    }
-  }
-
-  /** is src1 unsigned?
-    * used everywhere in Lane and VFU.
-    */
-  object unsigned1 extends BoolField {
-    def value(op: Op): Boolean = {
-      val nameWoW = op.name.replace(".vv", "").replace(".vi", "").replace(".vx", "").replace(".vs", "").replace(".wi", "").replace(".wx", "").replace(".wv", "")
-      val logicShift = shift.genTable(op) == y && nameWoW.endsWith("l")
-      val UIntOperation = nameWoW.endsWith("u") && !nameWoW.endsWith("su")
-      val madc = Seq("adc", "sbc").exists(op.name.contains) && op.name.startsWith("vm")
-      val vwmaccsu = op.name.contains("vwmaccsu")
-      if (floatType.value(op)) {
-        FOther.unsignedMap.exists(a => op.name.contains(a._1))
-      } else {
-        op.special.nonEmpty || logicShift || UIntOperation || madc || vwmaccsu
-      }
-    }
-  }
-
-  /** src1 is vtype. */
-  object vtype extends BoolField {
-    def value(op: Op): Boolean = op.tpeOp2 == "V"
-  }
-
-  /** src is imm. */
-  object itype extends BoolField {
-    def value(op: Op): Boolean = op.tpeOp2 == "I"
-  }
-
-  /** write rd/fd at scalar core. */
-  object targetRd extends BoolField {
-    def value(op: Op): Boolean = op.special.isDefined &&
-      (op.special.get.name == "VWXUNARY0" || op.special.get.name == "VWFUNARY0")
-  }
-
-  /** send element to MaskUnit at top, extend and broadcast to multiple Lanes. */
-  object extend extends BoolField {
-    def value(op: Op): Boolean = op.special.isDefined && op.special.get.name == "VXUNARY0"
-  }
-
-  /** move instruction, v->v s->v x->v,
-    * single element move.
-    * TODO: split them into multiple op since datapath differs
-    */
-  object mv extends BoolField {
-    def value(op: Op): Boolean = (op.name.startsWith("vmv") || op.name.startsWith("vfmv")) && !nr.value(op)
-  }
-
-  /** find first one,
-    * lane will report if 1 is found, Sequencer should decide which is exactly the first 1 in lanes.
-    * after 1 is found, tell each lane, 1 has been found at which the corresponding location.
-    * lane will stale at stage2.
-    * TODO: should split into lane control uop
-    */
-  object ffo extends BoolField {
-    val subs: Seq[String] = Seq(
-      "vfirst.m",
-      "vmsbf.m",
-      "vmsof.m",
-      "vmsif.m"
-    )
-
-    def value(op: Op): Boolean = subs.exists(op.name.contains)
-  }
-
-  /** used in Sequencer mask unit, decide which vrf should be read.
-    * send read request to corresponding lane, lane will respond data to Sequencer.
-    * Sequencer will write data to VD.
-    * mask unit is work as the router here.
-    *
-    * TODO: opimize mask unit.
-    */
-  object slid extends BoolField {
-    def value(op: Op): Boolean = op.name.contains("slid")
-  }
-
-  /** lane will read index from vs1, send to Sequencer.
-    * mask unit will calculate vrf address based on the vs1 from lane, and send read request to lanes,
-    * lanes should read it and send vs2 to Sequencer.
-    * Sequencer will write vd at last.
-    * address: 0 -> vlmax(sew decide address width.)
-    */
-  object gather extends BoolField {
-    def value(op: Op): Boolean = op.name.contains("rgather")
-  }
-
-  /** same with [[gather]]
-    * ignore sew, address width is fixed to 16.
-    *
-    * @note
-    * When SEW=8, vrgather.vv can only reference vector elements 0-255.
-    * The vrgatherei16 form can index 64K elements,
-    * and can also be used to reduce the register capacity needed to hold indices when SEW > 16.
-    */
-  object gather16 extends BoolField {
-    def value(op: Op): Boolean = op.name.contains("rgatherei16")
-  }
-
-  /** lane will read data from vs2, send to Sequencer.
-    * then Sequencer will read vs1 for mask.
-    * use mask to compress data in vs2.
-    * and write to vd at last.
-    */
-  object compress extends BoolField {
-    def value(op: Op): Boolean = op.name.contains("compress")
-  }
-
-  /** lane read only instructions.
-    * for these instructions lane will only read vrf and send data back to Sequencer.
-    */
-  object readOnly extends BoolField {
-    def value(op: Op): Boolean = {
-      val vGather:  Boolean = op.name.contains("gather") && vtype.genTable(op) == y
-      val compress: Boolean = op.name.contains("compress")
-      val iota:     Boolean = op.name.contains("iota")
-      val extend:   Boolean = op.name.contains("ext.vf")
-      vGather || compress || iota || extend
-    }
-  }
-
-  /** count how many 1s in VS2.
-    * lane will use [[org.chipsalliance.t1.rtl.OtherUnit]] to how many 1s locally;
-    * use reduce datapath to accumulate,
-    * send total result to top
-    * top will send result to vd.
-    */
-  object popCount extends BoolField {
-    def value(op: Op): Boolean = op.name.contains("vcpop")
-  }
-
-  /** lane will read vs2 from VRF, send to Top.
-    * Top read v0(at register) calculate the result and write back to VRFs
-    */
-  object iota extends BoolField {
-    def value(op: Op): Boolean = op.name.contains("viota")
-  }
-
-  /** write 0...vlmax to VRF.
-    * Lane other unit should handle it.
-    * TODO: remove it, it's a uop.
-    */
-  object id extends BoolField {
-    def value(op: Op): Boolean = op.name.contains("vid")
-  }
-
-  /** special MAC instruction, MAC use vd as source, it cross read vd.
-    * TODO: cross read vd + mac uop.
-    */
-  object vwmacc extends BoolField {
-    def value(op: Op): Boolean = op.name.contains("vwmacc")
-  }
-
-  /** unmanaged write for VRF. these instructions cannot be chain as source.
-    *
-    * TODO: add an attribute these instruction cannot be the source of chaining.
-    */
-  object unOrderWrite extends BoolField {
-    def value(op: Op): Boolean = slid.value(op) || iota.value(op) || mv.value(op) || orderReduce.value(op)
-  }
-
-  /** VFU uop:
-    * TODO: need full documentation on how to encode it.
-    */
-  object uop extends UopField {
-    val mul: Seq[String] = Seq(
-      "mul",
-      "ma",
-      "ms"
-    )
-
-    def y: BitPat = BitPat.Y(1)
-    def genTable(op: Op): BitPat = {
-      val firstIndexContains = (xs: Iterable[String], s: String) =>
-        xs.map(s.indexOf).zipWithIndex.filter(_._1 != -1).head._2
-      val opcode: Int = if(float.value(op)) {
-        if (FMA.value(op)) {
-          FMA.uop(op)
-        } else if (FDiv.value(op)) {
-          FDiv.uop(op)
-        } else if (FCompare.value(op)) {
-          FCompare.uop(op)
-        } else {
-          FOther.uop(op)
-        }
-      } else if (multiplier.value(op)) {
-        val nameWoW = op.name.replace(".vv", "").replace(".vi", "").replace(".vx", "").replace(".vs", "")
-        val high = nameWoW.contains("mulh")
-        // 0b1000
-        val negative = if (nameWoW.startsWith("vn")) 8 else 0
-        // 0b100
-        val asAddend = if (Seq("c", "cu", "cus", "csu").exists(nameWoW.endsWith)) 4 else 0
-        val n = if (high) 3 else firstIndexContains(mul, nameWoW)
-        negative + asAddend + n
-      } else if (divider.value(op)) {
-        if (op.tpe != "F") {
-          firstIndexContains(divider.intDiv, op.name)
-        } else {
-          8 + firstIndexContains(divider.floatDiv, op.name)
-        }
-      } else if (adder.value(op)) {
-        if (op.name.contains("sum")) 0 else firstIndexContains(adder.subs, op.name)
-      } else if (logic.value(op)) {
-        val nameWoW = op.name.replace(".mm", "")
-        val isXnor = op.name.contains("vmxnor")
-        val isXor = op.name.contains("xor")
-        val notX = if (op.name.startsWith("vmn")) 8 else 0
-        val xNot = if (isXnor || nameWoW.endsWith("n")) 4 else 0
-        val subOp = if (isXnor || isXor) 2 else firstIndexContains(logic.subs, op.name)
-        notX + xNot + subOp
-      } else if (shift.value(op)) {
-        val subOp = firstIndexContains(shift.subs, op.name)
-        require(subOp < 4)
-        val ssr = if (op.name.contains("ssr")) 4 else 0
-        subOp + ssr
-      } else if (other.value(op)) {
-        other.getType(op)._2
-      } else 0
-      if (!op.notLSU) {
-        BitPat("b" + "????")
-      } else {
-        BitPat("b" + ("0000" + opcode.toBinaryString).takeRight(4))
-      }
-    }
-  }
-
-
-  /** uop for mask unit. */
-  object topUop extends TopUopField {
-    def genTable(op: Op): BitPat = {
-      val isSlide = slid.value(op)
-      val isExtend = extend.value(op)
-      val log2 = (x: Int) => (math.log10(x) / math.log10(2)).toInt
-      val opcode = if (isSlide) {
-        val up = if (op.name.contains("up")) 2 else 0
-        val slid1 = if (op.name.contains("slide1")) 1 else 0
-        up + slid1
-      } else if (isExtend) {
-        val signExtend = if (op.name.startsWith("vs")) 4 else 0
-        val extUop = log2(op.name.last.toString.toInt)
-        signExtend + extUop
-      } else 0
-      BitPat("b" + ("000" + opcode.toBinaryString).takeRight(3))
-    }
-  }
-
-  /** only one or two operators
-    * src is mask format(one element one bit).
-    * vl should align with src.
-    * if datapath is unaligned, need to take care the tail.
-    */
-  object maskLogic extends BoolField {
-    def value(op: Op): Boolean = {
-      // todo: rename maskLogic -> maskOperation
-      val otherMaskOperation = Seq("sbf", "sif", "sof", "first", "cpop", "viota").exists(op.name.contains)
-      val logicMaskOperation = op.name.startsWith("vm") && logic.genTable(op) == y
-      logicMaskOperation || otherMaskOperation
-    }
-  }
-
-  /** vd is mask format.
-    * execute at lane, send result to Sequencer, regroup it and write to vd.
-    * if datapath is unaligned, need to take care the tail.
-    */
-  object maskDestination extends BoolField {
-    def value(op: Op): Boolean =
-      (op.name.startsWith("vm") && adder.value(op) && !Seq("min", "max").exists(op.name.contains)) ||
-        (op.name.startsWith("vm") && floatType.value(op))
-  }
-
-  /** three ops. these ops don't use mask. use v0 as third op, read it from duplicate V0.
-    * it will read
-    * use mask(v0) in mask format as source.
-    */
-  object maskSource extends BoolField {
-    def value(op: Op): Boolean = Seq("vadc", "vsbc", "vmadc", "vmsbc", "vmerge", "vfmerge").exists(op.name.startsWith)
-  }
-
-
-  /** TODO: remove it. */
-  object indexType extends BoolField {
-    override def containsLSU: Boolean = true
-    // funct6 的最低位是mop(0)
-    def value(op: Op): Boolean = !op.notLSU && op.funct6.endsWith("1")
-  }
-
-  /** if Sequencer is the router for data from Lane to LSU or Sequencer mask unit.
-    * special -> maskUnit || index type load store
-    */
-  object special extends BoolField {
-    override def containsLSU: Boolean = true
-    def value(op: Op): Boolean = {
-      Seq(indexType, maskUnit).map(_.value(op)).reduce(_ || _)
-    }
-  }
-
-  // mask unit -> red || compress || viota || ffo || slid || maskDestination || gather(v) || mv || popCount || extend
-  /** all instruction in Sequencer mask unit. */
-  object maskUnit extends BoolField {
-    def value(op: Op): Boolean = {
-      Seq(red, compress, iota, ffo, slid, maskDestination, mv, popCount, extend)
-        .map(_.value(op))
-        .reduce(_ || _) || (gather.value(op) && vtype.value(op))
-    }
-  }
-
-  /** Read vs2 or vd with cross read channel. */
-  // crossRead -> narrow || firstWiden
-  object crossRead extends BoolField {
-    def value(op: Op): Boolean = Seq(narrow, firstWiden).map(_.value(op)).reduce(_ || _)
-  }
-
-  //sWrite -> targetRd || readOnly || crossWrite || maskDestination || reduce || loadStore
-  /** instruction will write vd or rd(scalar) from outside of lane.
-    * It will request vrf wait, and lane will not write.
-    */
-  object sWrite extends BoolField {
-    override def containsLSU: Boolean = true
-    def value(op: Op): Boolean =
-      Seq(targetRd, readOnly, crossWrite, maskDestination, red).map(_.value(op)).reduce(_ || _) || !op.notLSU
-  }
-
-  // decodeResult(Decoder.multiplier) && decodeResult(Decoder.uop)(1, 0).xorR && !decodeResult(Decoder.vwmacc)
-  /** TODO: remove it. */
-  object ma extends BoolField {
-    def value(op: Op): Boolean = {
-      (multiplier.value(op) && Seq(BitPat("b??01"), BitPat("b??10")).exists(_.cover(uop.genTable(op))) &&
-      !vwmacc.value(op)) || (floatType.value(op) && FMA.maMap.exists(a => op.name.contains(a._1)))
-    }
-  }
-
-  // sReadVD -> !(ma || maskLogic)
-  /** instruction need to read vd as operator. */
-  object sReadVD extends BoolField {
-    def value(op: Op): Boolean = !Seq(ma, maskLogic).map(_.value(op)).reduce(_ || _)
-  }
-
-  // wScheduler 原来与 sScheduler 如果出错了需要检查一下,真不一样需要说明记录
-  //sScheduler -> maskDestination || red || readOnly || ffo || popCount || loadStore
-  /** lane will send request to Sequencer and wait ack from Sequencer. */
-  object scheduler extends BoolField {
-    override def containsLSU: Boolean = true
-    def value(op: Op): Boolean = !(Seq(maskDestination, red, readOnly, ffo, popCount).map(_.value(op)).reduce(_ || _) || !op.notLSU)
-  }
-
-  // sExecute 与 wExecuteRes 也不一样,需要校验
-  // sExecute -> readOnly || nr || loadStore
-  /** Lane doesn't need VFU to execute the instruction.
-    * datapath will directly goes to VRF.
-    */
-  object dontNeedExecuteInLane extends BoolField {
-    override def containsLSU: Boolean = true
-    def value(op: Op): Boolean =
-      Seq(readOnly, nr).map(_.value(op)).reduce(_ || _) || !op.notLSU
-  }
-
-  // lane中只能在slot0中执行的指令
-  // specialSlot -> crossRead || crossWrite || maskLogic || maskDestination || maskSource
-  /** instructions schedule to slot0. */
-  object specialSlot extends BoolField {
-    def value(op: Op): Boolean =
-      Seq(crossRead, crossWrite, maskLogic, maskDestination, maskSource).map(_.value(op)).reduce(_ || _)
-  }
-
-  // TODO: how to add custom decoder for niche customer: linking.
-  def all(fpuEnable: Boolean): Seq[DecodeField[Op, _ >: Bool <: UInt]] = {
-    Seq(
-      logic,
-      adder,
-      shift,
-      multiplier,
-      divider,
-      multiCycle,
-      other,
-      unsigned0,
-      unsigned1,
-      itype,
-      nr,
-      red,
-      // top only
-      widenReduce,
-      targetRd,
-      slid,
-      gather,
-      gather16,
-      compress,
-      unOrderWrite,
-      // top uop
-      extend, // top uop
-      mv, // top uop
-      iota, // top uop
-      uop,
-      maskLogic,
-      maskDestination,
-      maskSource,
-      readOnly,
-      vwmacc,
-      saturate,
-      special,
-      maskUnit,
-      crossWrite,
-      crossRead,
-      // state
-      sWrite,
-      //sRead1 -> vType
-      vtype,
-      sReadVD,
-      scheduler,
-      dontNeedExecuteInLane,
-      reverse, // uop
-      average, // uop
-      ffo, // todo: add mask select -> top uop
-      popCount, // top uop add, red, uop popCount
-      topUop,
-      specialSlot
-    ) ++ {
-      if (fpuEnable)
-        Seq(
-          float,
-          fpExecutionType,
-          floatMul,
-          orderReduce
-        )
-      else Seq()
-    }
-  }
-
-  def decodeTable(fpuEnable: Boolean): DecodeTable[Op] = new DecodeTable[Op](ops(fpuEnable), all(fpuEnable))
-  def decode(fpuEnable: Boolean): UInt => DecodeBundle = decodeTable(fpuEnable).decode
-  def bundle(fpuEnable: Boolean): DecodeBundle = decodeTable(fpuEnable).bundle
-}
diff --git a/t1/src/decoder/InstructionDocumentation.scala b/t1/src/decoder/InstructionDocumentation.scala
index 4b1c2a7501..22cf95823a 100644
--- a/t1/src/decoder/InstructionDocumentation.scala
+++ b/t1/src/decoder/InstructionDocumentation.scala
@@ -4,13 +4,12 @@
 package org.chipsalliance.t1.rtl.decoder
 
 import org.chipsalliance.rvdecoderdb.Instruction
-import org.chipsalliance.t1.rtl.T1Parameter
 
 /** Generate documentation for each instructions for T1.
   * The documentation should contain the behavior for instruction in a specific configuration in T1.
   * @todo should it be a post process at omreader?
   */
-case class InstructionDocumentation(instruction: Instruction, t1Parameter: T1Parameter) {
+case class InstructionDocumentation(instruction: Instruction, param: DecoderParam) {
   override def toString: String = instruction.name match {
     case "vaadd.vv" => "TODO!"
     case "vaadd.vx" => "TODO!"
diff --git a/t1/src/decoder/T1DecodePattern.scala b/t1/src/decoder/T1DecodePattern.scala
index e9e225d98c..31e41f33d3 100644
--- a/t1/src/decoder/T1DecodePattern.scala
+++ b/t1/src/decoder/T1DecodePattern.scala
@@ -52,7 +52,7 @@ class T1InstructionOM extends Class {
   * This is used to store the attribute for Vector Instruction under the T1 uArch.
   * It generates [[chisel3.util.experimental.decode.TruthTable]], as well as documentation field.
   */
-case class T1DecodePattern(instruction: Instruction, t1Parameter: T1Parameter) extends DecodePattern {
+case class T1DecodePattern(instruction: Instruction, param: DecoderParam) extends DecodePattern {
   override def bitPat: BitPat = BitPat("b" + instruction.encoding.toString)
 
   // use the attribute w/ [[isVector.value]]
@@ -115,7 +115,7 @@ case class T1DecodePattern(instruction: Instruction, t1Parameter: T1Parameter) e
   def topUop: TopUop = attribute.TopUop(this)
   def decoderUop: DecoderUop = attribute.DecoderUop(this)
 
-  private def documentation: String = InstructionDocumentation(instruction, t1Parameter).toString
+  private def documentation: String = InstructionDocumentation(instruction, param).toString
 
   // This is the OM for this instruction
   def om: Property[ClassType] = {
diff --git a/t1/src/decoder/attribute/adderUop.scala b/t1/src/decoder/attribute/adderUop.scala
index 3494a5682c..468c1731fb 100644
--- a/t1/src/decoder/attribute/adderUop.scala
+++ b/t1/src/decoder/attribute/adderUop.scala
@@ -19,7 +19,7 @@ object addUop10 extends AdderUOPType
 object addUop11 extends AdderUOPType
 
 object AdderUOP {
-  def apply(t1DecodePattern: T1DecodePattern): AdderUOPType = {
+  def apply(t1DecodePattern: T1DecodePattern): Uop = {
     Seq(
       t0 _ -> addUop0,
       t1 _ -> addUop1,
diff --git a/t1/src/decoder/attribute/floatUop.scala b/t1/src/decoder/attribute/floatUop.scala
index e0bcad20bf..7ee40cb514 100644
--- a/t1/src/decoder/attribute/floatUop.scala
+++ b/t1/src/decoder/attribute/floatUop.scala
@@ -43,7 +43,7 @@ object FloatUop {
     }.getOrElse(UopDC)
   }
   def t0(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(t1(t1DecodePattern) 
         || t2(t1DecodePattern)
         || t3(t1DecodePattern)
@@ -59,7 +59,7 @@ object FloatUop {
         || t14(t1DecodePattern)
       )
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
   def t1(t1DecodePattern: T1DecodePattern): Boolean = {
     val allMatched: Seq[String] = Seq(
diff --git a/t1/src/decoder/attribute/fpExecutionType.scala b/t1/src/decoder/attribute/fpExecutionType.scala
index d9b0701243..223f458566 100644
--- a/t1/src/decoder/attribute/fpExecutionType.scala
+++ b/t1/src/decoder/attribute/fpExecutionType.scala
@@ -10,13 +10,13 @@ object FpExecutionType {
     def apply(t1DecodePattern: T1DecodePattern): Boolean
   }
   case object Compare extends Type {
-    def apply(t1DecodePattern: T1DecodePattern): Boolean = isFcompare(this)
+    def apply(t1DecodePattern: T1DecodePattern): Boolean = isFcompare.y(t1DecodePattern)
   }
   case object Other extends Type {
-    def apply(t1DecodePattern: T1DecodePattern): Boolean = isFother(this)
+    def apply(t1DecodePattern: T1DecodePattern): Boolean = isFother.y(t1DecodePattern)
   }
   case object MA extends Type {
-    def apply(t1DecodePattern: T1DecodePattern): Boolean = ~(isFcompare(this) && isFother(this))
+    def apply(t1DecodePattern: T1DecodePattern): Boolean = !(isFcompare.y(t1DecodePattern) && isFother.y(t1DecodePattern))
   }
   case object Nil extends Type {
     def apply(t1DecodePattern: T1DecodePattern): Boolean = {
diff --git a/t1/src/decoder/attribute/isAdder.scala b/t1/src/decoder/attribute/isAdder.scala
index c15b5b70de..10653c4464 100644
--- a/t1/src/decoder/attribute/isAdder.scala
+++ b/t1/src/decoder/attribute/isAdder.scala
@@ -112,10 +112,10 @@ object isAdder {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isAverage.scala b/t1/src/decoder/attribute/isAverage.scala
index 13c8a9e1fb..0d52502e07 100644
--- a/t1/src/decoder/attribute/isAverage.scala
+++ b/t1/src/decoder/attribute/isAverage.scala
@@ -29,10 +29,10 @@ object isAverage {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isCompress.scala b/t1/src/decoder/attribute/isCompress.scala
index aff2b52d14..744d3c530a 100644
--- a/t1/src/decoder/attribute/isCompress.scala
+++ b/t1/src/decoder/attribute/isCompress.scala
@@ -22,10 +22,10 @@ object isCompress {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isCrossread.scala b/t1/src/decoder/attribute/isCrossread.scala
index 6680686ec2..34c11bed3d 100644
--- a/t1/src/decoder/attribute/isCrossread.scala
+++ b/t1/src/decoder/attribute/isCrossread.scala
@@ -60,10 +60,10 @@ object isCrossread {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isCrosswrite.scala b/t1/src/decoder/attribute/isCrosswrite.scala
index 350b5e43c3..7523e6176a 100644
--- a/t1/src/decoder/attribute/isCrosswrite.scala
+++ b/t1/src/decoder/attribute/isCrosswrite.scala
@@ -50,10 +50,10 @@ object isCrosswrite {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isDivider.scala b/t1/src/decoder/attribute/isDivider.scala
index 0cc14f9d1e..b89b2d79fb 100644
--- a/t1/src/decoder/attribute/isDivider.scala
+++ b/t1/src/decoder/attribute/isDivider.scala
@@ -33,10 +33,10 @@ object isDivider {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isDontneedexecuteinlane.scala b/t1/src/decoder/attribute/isDontneedexecuteinlane.scala
index 4229027801..e9786ef288 100644
--- a/t1/src/decoder/attribute/isDontneedexecuteinlane.scala
+++ b/t1/src/decoder/attribute/isDontneedexecuteinlane.scala
@@ -129,10 +129,10 @@ object isDontneedexecuteinlane {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isExtend.scala b/t1/src/decoder/attribute/isExtend.scala
index 0ef2eb768a..b2c3bb418f 100644
--- a/t1/src/decoder/attribute/isExtend.scala
+++ b/t1/src/decoder/attribute/isExtend.scala
@@ -27,10 +27,10 @@ object isExtend {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isFcompare.scala b/t1/src/decoder/attribute/isFcompare.scala
index 66e387a3b1..10383b2a84 100644
--- a/t1/src/decoder/attribute/isFcompare.scala
+++ b/t1/src/decoder/attribute/isFcompare.scala
@@ -37,10 +37,10 @@ object isFcompare {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isFfo.scala b/t1/src/decoder/attribute/isFfo.scala
index 10d2b21c9b..b446268ee4 100644
--- a/t1/src/decoder/attribute/isFfo.scala
+++ b/t1/src/decoder/attribute/isFfo.scala
@@ -25,10 +25,10 @@ object isFfo {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isFirstwiden.scala b/t1/src/decoder/attribute/isFirstwiden.scala
index fdad68757a..6f4b46ef3a 100644
--- a/t1/src/decoder/attribute/isFirstwiden.scala
+++ b/t1/src/decoder/attribute/isFirstwiden.scala
@@ -56,10 +56,10 @@ object isFirstwiden {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isFloat.scala b/t1/src/decoder/attribute/isFloat.scala
index ca39d27020..65eb6d35e6 100644
--- a/t1/src/decoder/attribute/isFloat.scala
+++ b/t1/src/decoder/attribute/isFloat.scala
@@ -16,7 +16,7 @@ object isFloat {
     }.get
 
   def y(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = if(t1DecodePattern.t1Parameter.fpuEnable) Seq(
+    val allMatched = if(t1DecodePattern.param.fpuEnable) Seq(
       "vfadd.vf",
       "vfadd.vv",
       "vfclass.v",
@@ -121,10 +121,10 @@ object isFloat {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isFloatmul.scala b/t1/src/decoder/attribute/isFloatmul.scala
index 8665cab87e..139e3ffc31 100644
--- a/t1/src/decoder/attribute/isFloatmul.scala
+++ b/t1/src/decoder/attribute/isFloatmul.scala
@@ -16,17 +16,17 @@ object isFloatmul {
     }.get
 
   def y(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = if(t1DecodePattern.t1Parameter.fpuEnable) Seq(
+    val allMatched = if(t1DecodePattern.param.fpuEnable) Seq(
       "vfmul.vf",
       "vfmul.vv",
     ) else Seq()
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isFloattype.scala b/t1/src/decoder/attribute/isFloattype.scala
index d7281e74d1..bca90f8b58 100644
--- a/t1/src/decoder/attribute/isFloattype.scala
+++ b/t1/src/decoder/attribute/isFloattype.scala
@@ -16,7 +16,7 @@ object isFloattype {
     }.get
 
   def y(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = if(t1DecodePattern.t1Parameter.fpuEnable) Seq(
+    val allMatched = if(t1DecodePattern.param.fpuEnable) Seq(
       "vfadd.vf",
       "vfadd.vv",
       "vfclass.v",
@@ -121,10 +121,10 @@ object isFloattype {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isFma.scala b/t1/src/decoder/attribute/isFma.scala
index aed19ef9f2..c2bc6d4957 100644
--- a/t1/src/decoder/attribute/isFma.scala
+++ b/t1/src/decoder/attribute/isFma.scala
@@ -46,10 +46,10 @@ object isFma {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isFother.scala b/t1/src/decoder/attribute/isFother.scala
index 70017bc16a..7f4d556ea9 100644
--- a/t1/src/decoder/attribute/isFother.scala
+++ b/t1/src/decoder/attribute/isFother.scala
@@ -36,10 +36,10 @@ object isFother {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isGather.scala b/t1/src/decoder/attribute/isGather.scala
index 227f57efcd..4741dd45f6 100644
--- a/t1/src/decoder/attribute/isGather.scala
+++ b/t1/src/decoder/attribute/isGather.scala
@@ -25,10 +25,10 @@ object isGather {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isGather16.scala b/t1/src/decoder/attribute/isGather16.scala
index 7eaebb1d10..4d2a936615 100644
--- a/t1/src/decoder/attribute/isGather16.scala
+++ b/t1/src/decoder/attribute/isGather16.scala
@@ -22,10 +22,10 @@ object isGather16 {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isId.scala b/t1/src/decoder/attribute/isId.scala
index 1c99390d94..d530c26ed2 100644
--- a/t1/src/decoder/attribute/isId.scala
+++ b/t1/src/decoder/attribute/isId.scala
@@ -79,10 +79,10 @@ object isId {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isIndextype.scala b/t1/src/decoder/attribute/isIndextype.scala
index 121aff4838..6a3b781a77 100644
--- a/t1/src/decoder/attribute/isIndextype.scala
+++ b/t1/src/decoder/attribute/isIndextype.scala
@@ -53,10 +53,10 @@ object isIndextype {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isIota.scala b/t1/src/decoder/attribute/isIota.scala
index 755be9e488..d9194845e7 100644
--- a/t1/src/decoder/attribute/isIota.scala
+++ b/t1/src/decoder/attribute/isIota.scala
@@ -22,10 +22,10 @@ object isIota {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isItype.scala b/t1/src/decoder/attribute/isItype.scala
index 2d49c7dcb9..aa6311ded0 100644
--- a/t1/src/decoder/attribute/isItype.scala
+++ b/t1/src/decoder/attribute/isItype.scala
@@ -54,10 +54,10 @@ object isItype {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isLogic.scala b/t1/src/decoder/attribute/isLogic.scala
index 075e74a66a..96cc6c57f0 100644
--- a/t1/src/decoder/attribute/isLogic.scala
+++ b/t1/src/decoder/attribute/isLogic.scala
@@ -41,10 +41,10 @@ object isLogic {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isMa.scala b/t1/src/decoder/attribute/isMa.scala
index 0eca6c903c..02cf8aaa63 100644
--- a/t1/src/decoder/attribute/isMa.scala
+++ b/t1/src/decoder/attribute/isMa.scala
@@ -162,10 +162,10 @@ object isMa {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isMaskdestination.scala b/t1/src/decoder/attribute/isMaskdestination.scala
index e89438a7ce..528f00a329 100644
--- a/t1/src/decoder/attribute/isMaskdestination.scala
+++ b/t1/src/decoder/attribute/isMaskdestination.scala
@@ -61,10 +61,10 @@ object isMaskdestination {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isMasklogic.scala b/t1/src/decoder/attribute/isMasklogic.scala
index 975a45d42b..d9f1a35994 100644
--- a/t1/src/decoder/attribute/isMasklogic.scala
+++ b/t1/src/decoder/attribute/isMasklogic.scala
@@ -35,10 +35,10 @@ object isMasklogic {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isMasksource.scala b/t1/src/decoder/attribute/isMasksource.scala
index a2d8141076..5528a0bd6e 100644
--- a/t1/src/decoder/attribute/isMasksource.scala
+++ b/t1/src/decoder/attribute/isMasksource.scala
@@ -40,10 +40,10 @@ object isMasksource {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isMaskunit.scala b/t1/src/decoder/attribute/isMaskunit.scala
index 0978362e3a..c5e5537983 100644
--- a/t1/src/decoder/attribute/isMaskunit.scala
+++ b/t1/src/decoder/attribute/isMaskunit.scala
@@ -104,10 +104,10 @@ object isMaskunit {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isMulticycle.scala b/t1/src/decoder/attribute/isMulticycle.scala
index dc5cd2100e..d1b3a661dd 100644
--- a/t1/src/decoder/attribute/isMulticycle.scala
+++ b/t1/src/decoder/attribute/isMulticycle.scala
@@ -125,10 +125,10 @@ object isMulticycle {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isMultiplier.scala b/t1/src/decoder/attribute/isMultiplier.scala
index 8bae92c6e6..fa36dcb65f 100644
--- a/t1/src/decoder/attribute/isMultiplier.scala
+++ b/t1/src/decoder/attribute/isMultiplier.scala
@@ -52,10 +52,10 @@ object isMultiplier {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isMv.scala b/t1/src/decoder/attribute/isMv.scala
index db02d44f2d..75fb59ecf7 100644
--- a/t1/src/decoder/attribute/isMv.scala
+++ b/t1/src/decoder/attribute/isMv.scala
@@ -29,10 +29,10 @@ object isMv {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isNarrow.scala b/t1/src/decoder/attribute/isNarrow.scala
index 7ad7ff7038..bc9576073d 100644
--- a/t1/src/decoder/attribute/isNarrow.scala
+++ b/t1/src/decoder/attribute/isNarrow.scala
@@ -33,10 +33,10 @@ object isNarrow {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isNr.scala b/t1/src/decoder/attribute/isNr.scala
index dd4c479286..e4252d9536 100644
--- a/t1/src/decoder/attribute/isNr.scala
+++ b/t1/src/decoder/attribute/isNr.scala
@@ -25,10 +25,10 @@ object isNr {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isOrderreduce.scala b/t1/src/decoder/attribute/isOrderreduce.scala
index eebb8c01b6..abb32796e8 100644
--- a/t1/src/decoder/attribute/isOrderreduce.scala
+++ b/t1/src/decoder/attribute/isOrderreduce.scala
@@ -22,10 +22,10 @@ object isOrderreduce {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isOther.scala b/t1/src/decoder/attribute/isOther.scala
index 897ce82c4f..48d1b12458 100644
--- a/t1/src/decoder/attribute/isOther.scala
+++ b/t1/src/decoder/attribute/isOther.scala
@@ -44,10 +44,10 @@ object isOther {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isPopcount.scala b/t1/src/decoder/attribute/isPopcount.scala
index 822df758e9..0137b77b0c 100644
--- a/t1/src/decoder/attribute/isPopcount.scala
+++ b/t1/src/decoder/attribute/isPopcount.scala
@@ -22,10 +22,10 @@ object isPopcount {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isReadonly.scala b/t1/src/decoder/attribute/isReadonly.scala
index 0d63a0555c..cd5754b4b4 100644
--- a/t1/src/decoder/attribute/isReadonly.scala
+++ b/t1/src/decoder/attribute/isReadonly.scala
@@ -31,10 +31,10 @@ object isReadonly {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isRed.scala b/t1/src/decoder/attribute/isRed.scala
index 811b3a462f..bad01b4ce5 100644
--- a/t1/src/decoder/attribute/isRed.scala
+++ b/t1/src/decoder/attribute/isRed.scala
@@ -38,10 +38,10 @@ object isRed {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isReverse.scala b/t1/src/decoder/attribute/isReverse.scala
index 922d8e2d97..5a26fb5075 100644
--- a/t1/src/decoder/attribute/isReverse.scala
+++ b/t1/src/decoder/attribute/isReverse.scala
@@ -23,10 +23,10 @@ object isReverse {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isSaturate.scala b/t1/src/decoder/attribute/isSaturate.scala
index 589854f41e..a9a5287dcd 100644
--- a/t1/src/decoder/attribute/isSaturate.scala
+++ b/t1/src/decoder/attribute/isSaturate.scala
@@ -48,10 +48,10 @@ object isSaturate {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isScheduler.scala b/t1/src/decoder/attribute/isScheduler.scala
index cea60fa4a0..096f5f9677 100644
--- a/t1/src/decoder/attribute/isScheduler.scala
+++ b/t1/src/decoder/attribute/isScheduler.scala
@@ -260,10 +260,10 @@ object isScheduler {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isShift.scala b/t1/src/decoder/attribute/isShift.scala
index 9a4e46d494..7c78f2f91f 100644
--- a/t1/src/decoder/attribute/isShift.scala
+++ b/t1/src/decoder/attribute/isShift.scala
@@ -42,10 +42,10 @@ object isShift {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isSlid.scala b/t1/src/decoder/attribute/isSlid.scala
index 4521297980..bb60e9a747 100644
--- a/t1/src/decoder/attribute/isSlid.scala
+++ b/t1/src/decoder/attribute/isSlid.scala
@@ -29,10 +29,10 @@ object isSlid {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isSpecial.scala b/t1/src/decoder/attribute/isSpecial.scala
index db712ab5fd..81b5ebf3c5 100644
--- a/t1/src/decoder/attribute/isSpecial.scala
+++ b/t1/src/decoder/attribute/isSpecial.scala
@@ -206,10 +206,10 @@ object isSpecial {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isSpecialslot.scala b/t1/src/decoder/attribute/isSpecialslot.scala
index c61781821c..8e6a19942c 100644
--- a/t1/src/decoder/attribute/isSpecialslot.scala
+++ b/t1/src/decoder/attribute/isSpecialslot.scala
@@ -137,10 +137,10 @@ object isSpecialslot {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isSreadvd.scala b/t1/src/decoder/attribute/isSreadvd.scala
index c74a7b87ce..96676714cd 100644
--- a/t1/src/decoder/attribute/isSreadvd.scala
+++ b/t1/src/decoder/attribute/isSreadvd.scala
@@ -387,10 +387,10 @@ object isSreadvd {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isSwrite.scala b/t1/src/decoder/attribute/isSwrite.scala
index ce4ae8089e..cfddf2e04f 100644
--- a/t1/src/decoder/attribute/isSwrite.scala
+++ b/t1/src/decoder/attribute/isSwrite.scala
@@ -214,10 +214,10 @@ object isSwrite {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isTargetrd.scala b/t1/src/decoder/attribute/isTargetrd.scala
index 0437dfd037..d4f6b7dcce 100644
--- a/t1/src/decoder/attribute/isTargetrd.scala
+++ b/t1/src/decoder/attribute/isTargetrd.scala
@@ -25,10 +25,10 @@ object isTargetrd {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isUnorderwrite.scala b/t1/src/decoder/attribute/isUnorderwrite.scala
index 0325a72e39..36a87f9107 100644
--- a/t1/src/decoder/attribute/isUnorderwrite.scala
+++ b/t1/src/decoder/attribute/isUnorderwrite.scala
@@ -35,10 +35,10 @@ object isUnorderwrite {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isUnsigned0.scala b/t1/src/decoder/attribute/isUnsigned0.scala
index 15f0cb02d6..c180180bd7 100644
--- a/t1/src/decoder/attribute/isUnsigned0.scala
+++ b/t1/src/decoder/attribute/isUnsigned0.scala
@@ -134,10 +134,10 @@ object isUnsigned0 {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isUnsigned1.scala b/t1/src/decoder/attribute/isUnsigned1.scala
index 22dfaa3fac..1f71f23101 100644
--- a/t1/src/decoder/attribute/isUnsigned1.scala
+++ b/t1/src/decoder/attribute/isUnsigned1.scala
@@ -106,10 +106,10 @@ object isUnsigned1 {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isVector.scala b/t1/src/decoder/attribute/isVector.scala
index 7ef1d746d7..170c6c43be 100644
--- a/t1/src/decoder/attribute/isVector.scala
+++ b/t1/src/decoder/attribute/isVector.scala
@@ -16,13 +16,13 @@ object isVector {
     }.get
 
   def y(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       i.instructionSets.map(_.name).contains("rv_v")
     )
     allMatched.contains(t1DecodePattern.instruction)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
     allMatched.contains(t1DecodePattern.instruction)
diff --git a/t1/src/decoder/attribute/isVtype.scala b/t1/src/decoder/attribute/isVtype.scala
index 6b1ab50c37..1b64e0fc4c 100644
--- a/t1/src/decoder/attribute/isVtype.scala
+++ b/t1/src/decoder/attribute/isVtype.scala
@@ -184,10 +184,10 @@ object isVtype {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isVwmacc.scala b/t1/src/decoder/attribute/isVwmacc.scala
index 812dafe8af..1d8978e252 100644
--- a/t1/src/decoder/attribute/isVwmacc.scala
+++ b/t1/src/decoder/attribute/isVwmacc.scala
@@ -28,10 +28,10 @@ object isVwmacc {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/isWidenreduce.scala b/t1/src/decoder/attribute/isWidenreduce.scala
index 7d4dc897d9..4902238806 100644
--- a/t1/src/decoder/attribute/isWidenreduce.scala
+++ b/t1/src/decoder/attribute/isWidenreduce.scala
@@ -23,10 +23,10 @@ object isWidenreduce {
     allMatched.contains(t1DecodePattern.instruction.name)
   }
   def n(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(y(t1DecodePattern) || dc(t1DecodePattern))
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
 
   def dc(t1DecodePattern: T1DecodePattern): Boolean = false
diff --git a/t1/src/decoder/attribute/logicUop.scala b/t1/src/decoder/attribute/logicUop.scala
index d4fb7cfe0a..dcda5a7d05 100644
--- a/t1/src/decoder/attribute/logicUop.scala
+++ b/t1/src/decoder/attribute/logicUop.scala
@@ -16,7 +16,7 @@ object logicUop8 extends LogicUopType
 object logicUop9 extends LogicUopType
 
 object LogicUop {
-  def apply(t1DecodePattern: T1DecodePattern): LogicUopType = {
+  def apply(t1DecodePattern: T1DecodePattern): Uop = {
     Seq(
       t0 _ -> logicUop0,
       t1 _ -> logicUop1,
diff --git a/t1/src/decoder/attribute/mulUop.scala b/t1/src/decoder/attribute/mulUop.scala
index cd7cac9f5a..a498af695c 100644
--- a/t1/src/decoder/attribute/mulUop.scala
+++ b/t1/src/decoder/attribute/mulUop.scala
@@ -14,7 +14,7 @@ object mulUop10 extends MulUOPType
 object mulUop14 extends MulUOPType
 
 object MulUOP {
-  def apply(t1DecodePattern: T1DecodePattern): MulUOPType = {
+  def apply(t1DecodePattern: T1DecodePattern): Uop = {
     Seq(
       t0 _ -> mulUop0,
       t1 _ -> mulUop1,
diff --git a/t1/src/decoder/attribute/topUop.scala b/t1/src/decoder/attribute/topUop.scala
index b68e35a9b3..1151410832 100644
--- a/t1/src/decoder/attribute/topUop.scala
+++ b/t1/src/decoder/attribute/topUop.scala
@@ -29,7 +29,7 @@ object TopUop {
     }.getOrElse(TopUop(TopT0))
   }
   def t0(t1DecodePattern: T1DecodePattern): Boolean = {
-    val allMatched = t1DecodePattern.t1Parameter.allInstuctions.filter( i =>
+    val allMatched = t1DecodePattern.param.allInstructions.filter(i =>
       !(t1(t1DecodePattern) 
         || t2(t1DecodePattern)
         || t3(t1DecodePattern)
@@ -38,7 +38,7 @@ object TopUop {
         || t7(t1DecodePattern)
       )
     )
-    allMatched.contains(t1DecodePattern.instruction.name)
+    allMatched.contains(t1DecodePattern.instruction)
   }
   def t1(t1DecodePattern: T1DecodePattern): Boolean = {
     val allMatched: Seq[String] = Seq(
diff --git a/t1/src/decoder/attribute/uop.scala b/t1/src/decoder/attribute/uop.scala
index a251b00aa3..82df29ab25 100644
--- a/t1/src/decoder/attribute/uop.scala
+++ b/t1/src/decoder/attribute/uop.scala
@@ -8,15 +8,15 @@ import org.chipsalliance.t1.rtl.decoder.T1DecodePattern
 object DecoderUop {
   def apply(t1DecodePattern: T1DecodePattern): DecoderUop = {
     val tpe: Option[DecoderUop] = Seq(
-      isDivider.y -> DivUOP(t1DecodePattern),
-      isFloat.y -> FloatUop(t1DecodePattern),
-      isMultiplier.y -> MulUOP(t1DecodePattern),
-      isAdder.y -> AdderUOP(t1DecodePattern),
-      isLogic.y -> LogicUop(t1DecodePattern),
-      isShift.y -> ShiftUop(t1DecodePattern),
-      isOther.y -> OtherUop(t1DecodePattern)
+      isDivider.y(t1DecodePattern) -> DivUOP(t1DecodePattern),
+      isFloat.y(t1DecodePattern) -> FloatUop(t1DecodePattern),
+      isMultiplier.y(t1DecodePattern) -> MulUOP(t1DecodePattern),
+      isAdder.y(t1DecodePattern) -> AdderUOP(t1DecodePattern),
+      isLogic.y(t1DecodePattern) -> LogicUop(t1DecodePattern),
+      isShift.y(t1DecodePattern) -> ShiftUop(t1DecodePattern),
+      isOther.y(t1DecodePattern) -> OtherUop(t1DecodePattern)
     ).collectFirst {
-      case (fn, tpe) if fn(t1DecodePattern) => DecoderUop(tpe)
+      case (fn, tpe) if fn => DecoderUop(tpe)
     }
     require(tpe.size <= 1)
     tpe.getOrElse(DecoderUop(UopDC))
diff --git a/t1/src/laneStage/LaneExecutionBridge.scala b/t1/src/laneStage/LaneExecutionBridge.scala
index 5b21674ac3..79a74b59c4 100644
--- a/t1/src/laneStage/LaneExecutionBridge.scala
+++ b/t1/src/laneStage/LaneExecutionBridge.scala
@@ -19,7 +19,7 @@ class LaneExecuteRequest(parameter: LaneParameter, isLastSlot: Boolean) extends
   val groupCounter: UInt = UInt(parameter.groupNumberBits.W)
   val sSendResponse: Option[Bool] = Option.when(isLastSlot)(Bool())
   // pipe state
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
   val vSew1H: UInt = UInt(3.W)
   val csr: CSRInterface = new CSRInterface(parameter.vlMaxBits)
   val maskType: Bool = Bool()
@@ -43,7 +43,7 @@ class ExecutionBridgeRecordQueue(parameter: LaneParameter, isLastSlot: Boolean)
   val executeIndex: Bool = Bool()
   val source2: UInt = UInt(parameter.datapathWidth.W)
   // pipe state
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
   val vSew1H: UInt = UInt(3.W)
 }
 
diff --git a/t1/src/laneStage/LaneStage.scala b/t1/src/laneStage/LaneStage.scala
index 3947bf1e74..9175975512 100644
--- a/t1/src/laneStage/LaneStage.scala
+++ b/t1/src/laneStage/LaneStage.scala
@@ -14,7 +14,7 @@ class LaneState(parameter: LaneParameter) extends Bundle {
   val vSew1H: UInt = UInt(3.W)
   val loadStore: Bool = Bool()
   val laneIndex: UInt = UInt(parameter.laneNumberBits.W)
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
   /** which group is the last group for instruction. */
   val lastGroupForInstruction: UInt = UInt(parameter.groupNumberBits.W)
   val isLastLaneForInstruction: Bool = Bool()
diff --git a/t1/src/laneStage/LaneStage0.scala b/t1/src/laneStage/LaneStage0.scala
index 87300d1df9..83b7522003 100644
--- a/t1/src/laneStage/LaneStage0.scala
+++ b/t1/src/laneStage/LaneStage0.scala
@@ -20,7 +20,7 @@ class LaneStage0Enqueue(parameter: LaneParameter) extends Bundle {
   val vSew1H: UInt = UInt(3.W)
   val loadStore: Bool = Bool()
   val laneIndex: UInt = UInt(parameter.laneNumberBits.W)
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
   /** which group is the last group for instruction. */
   val lastGroupForInstruction: UInt = UInt(parameter.groupNumberBits.W)
   val isLastLaneForInstruction: Bool = Bool()
@@ -63,7 +63,7 @@ class LaneStage0Dequeue(parameter: LaneParameter, isLastSlot: Boolean) extends B
 
   // pipe state
   val instructionIndex: UInt = UInt(parameter.instructionIndexBits.W)
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
   val laneIndex: UInt = UInt(parameter.laneNumberBits.W)
   // skip vrf read in stage 1?
   val skipRead: Bool = Bool()
diff --git a/t1/src/laneStage/LaneStage1.scala b/t1/src/laneStage/LaneStage1.scala
index a614c85238..792771abf6 100644
--- a/t1/src/laneStage/LaneStage1.scala
+++ b/t1/src/laneStage/LaneStage1.scala
@@ -18,7 +18,7 @@ class LaneStage1Enqueue(parameter: LaneParameter, isLastSlot: Boolean) extends B
   val sSendResponse: Option[Bool] = Option.when(isLastSlot)(Bool())
   // pipe state
   val instructionIndex: UInt = UInt(parameter.instructionIndexBits.W)
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
   val laneIndex: UInt = UInt(parameter.laneNumberBits.W)
   // skip vrf read in stage 1?
   val skipRead: Bool = Bool()
@@ -47,7 +47,7 @@ class LaneStage1Dequeue(parameter: LaneParameter, isLastSlot: Boolean) extends B
 
   // pipe state
   // for exe stage
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
   val vSew1H: UInt = UInt(3.W)
   val csr: CSRInterface = new CSRInterface(parameter.vlMaxBits)
   val maskType: Bool = Bool()
diff --git a/t1/src/laneStage/LaneStage2.scala b/t1/src/laneStage/LaneStage2.scala
index 367bef1c80..f9bd76621c 100644
--- a/t1/src/laneStage/LaneStage2.scala
+++ b/t1/src/laneStage/LaneStage2.scala
@@ -19,7 +19,7 @@ class LaneStage2Enqueue(parameter: LaneParameter, isLastSlot: Boolean) extends B
   val bordersForMaskLogic: Bool = Bool()
   // pipe state
   // for stage3
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
   val instructionIndex: UInt = UInt(parameter.instructionIndexBits.W)
   val loadStore: Bool = Bool()
   /** vd or rd */
@@ -37,7 +37,7 @@ class LaneStage2Dequeue(parameter: LaneParameter, isLastSlot: Boolean) extends B
   val pipeData: Option[UInt] = Option.when(isLastSlot)(UInt(parameter.datapathWidth.W))
 
   // pipe state for stage3
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
   val instructionIndex: UInt = UInt(parameter.instructionIndexBits.W)
   val loadStore: Bool = Bool()
   val vd: UInt = UInt(5.W)
diff --git a/t1/src/laneStage/LaneStage3.scala b/t1/src/laneStage/LaneStage3.scala
index fb68529f8f..8ccc6fbc11 100644
--- a/t1/src/laneStage/LaneStage3.scala
+++ b/t1/src/laneStage/LaneStage3.scala
@@ -21,7 +21,7 @@ class LaneStage3Enqueue(parameter: LaneParameter, isLastSlot: Boolean) extends B
   val ffoSuccess: Bool = Bool()
   val fpReduceValid: Option[Bool] = Option.when(parameter.fpuEnable && isLastSlot)(Bool())
   // pipe state
-  val decodeResult: DecodeBundle = Decoder.bundle(parameter.fpuEnable)
+  val decodeResult: DecodeBundle = Decoder.bundle(parameter.decoderParam)
   val instructionIndex: UInt = UInt(parameter.instructionIndexBits.W)
   // Need real-time status, no pipe
   val ffoByOtherLanes: Bool = Bool()