From bc191b1ec38b1026d127083899846602d08d36b9 Mon Sep 17 00:00:00 2001 From: Lucas-Wye Date: Mon, 24 Jun 2024 18:54:42 +0800 Subject: [PATCH] [doc] filter out vset csr insn --- t1/src/T1.scala | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/t1/src/T1.scala b/t1/src/T1.scala index 2e3f054c6b..1972886397 100644 --- a/t1/src/T1.scala +++ b/t1/src/T1.scala @@ -123,7 +123,12 @@ case class T1Parameter( org.chipsalliance.rvdecoderdb.instructions(org.chipsalliance.rvdecoderdb.extractResource(getClass.getClassLoader)) .filter(instruction => instruction.instructionSet.name == "rv_v")++ t1customInstructions.map(_.instruction) - }.toSeq.sortBy(_.instructionSet.name) + }.toSeq.sortBy(_.instructionSet.name).filter{ + insn => insn.name match { + case s if Seq("vsetivli", "vsetvli", "vsetvl").contains(s) => false + case _ => true + } + } require(extensions.forall(Seq("Zve32x", "Zve32f").contains), "unsupported extension.") // TODO: require bank not overlap