From a9ee87007e233b3fb17d18ce649f61d703105fa2 Mon Sep 17 00:00:00 2001
From: Jiuyang Liu <liu@jiuyang.me>
Date: Sat, 22 Jun 2024 15:59:53 +0800
Subject: [PATCH] [om] get instruction om to work

---
 t1/src/T1.scala                      |  7 +++++++
 t1/src/VectorDecoder.scala           | 21 ++++++++++++++++++++-
 t1/src/decoder/T1DecodePattern.scala | 17 +++++------------
 3 files changed, 32 insertions(+), 13 deletions(-)

diff --git a/t1/src/T1.scala b/t1/src/T1.scala
index 2148f948fc..2e3f054c6b 100644
--- a/t1/src/T1.scala
+++ b/t1/src/T1.scala
@@ -40,6 +40,12 @@ class T1OM extends Class {
   @public
   val lanesIn = IO(Input(Property[Seq[AnyClassType]]()))
   lanes := lanesIn
+
+  @public
+  val decoder = IO(Output(Property[AnyClassType]()))
+  @public
+  val decoderIn = IO(Input(Property[AnyClassType]()))
+  decoder := decoderIn
 }
 
 object T1Parameter {
@@ -320,6 +326,7 @@ class T1(val parameter: T1Parameter) extends Module with SerializableModule[T1Pa
 
   val lsu: Instance[LSU] = Instantiate(new LSU(parameter.lsuParameters))
   val decode: Instance[VectorDecoder] = Instantiate(new VectorDecoder(parameter.decoderParam))
+  omInstance.decoderIn := Property(decode.om.asAnyClassType)
 
   // TODO: cover overflow
   // TODO: uarch doc about the order of instructions
diff --git a/t1/src/VectorDecoder.scala b/t1/src/VectorDecoder.scala
index 8f3e7107d7..f6f7cd1edc 100644
--- a/t1/src/VectorDecoder.scala
+++ b/t1/src/VectorDecoder.scala
@@ -4,16 +4,35 @@
 package org.chipsalliance.t1.rtl
 
 import chisel3._
-import chisel3.experimental.hierarchy.{instantiable, public}
+import chisel3.experimental.hierarchy.{Instance, Instantiate, instantiable, public}
+import chisel3.properties.{AnyClassType, Class, ClassType, Property}
 import chisel3.util.experimental.decode._
 import org.chipsalliance.t1.rtl.decoder.{Decoder, DecoderParam}
 
+
+@instantiable
+class VectorDecoderOM extends Class {
+  @public
+  val instructions = IO(Output(Property[Seq[AnyClassType]]()))
+  @public
+  val instructionsIn = IO(Input(Property[Seq[AnyClassType]]()))
+  instructions := instructionsIn
+}
+
 @instantiable
 class VectorDecoder(param: DecoderParam) extends Module {
+  val omInstance: Instance[VectorDecoderOM] = Instantiate(new VectorDecoderOM)
+  val omType: ClassType = omInstance.toDefinition.getClassType
+  @public
+  val om: Property[ClassType] = IO(Output(Property[omType.Type]()))
+  om := omInstance.getPropertyReference
+
   @public
   val decodeInput: UInt = IO(Input(UInt(32.W)))
   @public
   val decodeResult: DecodeBundle = IO(Output(new DecodeBundle(Decoder.allFields(param))))
 
+  omInstance.instructionsIn := Property(Decoder.allDecodePattern(param).map(_.om.asAnyClassType))
+
   decodeResult := Decoder.decode(param)(decodeInput)
 }
diff --git a/t1/src/decoder/T1DecodePattern.scala b/t1/src/decoder/T1DecodePattern.scala
index 31e41f33d3..2a0da9d74d 100644
--- a/t1/src/decoder/T1DecodePattern.scala
+++ b/t1/src/decoder/T1DecodePattern.scala
@@ -6,7 +6,7 @@ package org.chipsalliance.t1.rtl.decoder
 import chisel3._
 import chisel3.experimental.hierarchy.core.Definition
 import chisel3.experimental.hierarchy.{Instantiate, instantiable, public}
-import chisel3.properties.{Class, ClassType, Property}
+import chisel3.properties.{AnyClassType, Class, ClassType, Property}
 import chisel3.util.BitPat
 import chisel3.util.experimental.decode.DecodePattern
 import org.chipsalliance.rvdecoderdb.Instruction
@@ -28,19 +28,15 @@ class T1DecodeAttributeOM extends Class {
 
 @instantiable
 class T1InstructionOM extends Class {
-  // get type of [[T1DecodeAttributeOM]]
-  val attributeClass = Instantiate.definition(new T1DecodeAttributeOM)
-  val attributeClassTpe = attributeClass.getClassType
-
   val instructionName = IO(Output(Property[String]()))
   val documentation = IO(Output(Property[String]()))
   val bitPat = IO(Output(Property[String]()))
-  val attributes = IO(Output(Property[Seq[attributeClassTpe.Type]]))
+  val attributes = IO(Output(Property[Seq[AnyClassType]]))
 
   @public val instructionNameIn = IO(Input(Property[String]()))
   @public val documentationIn = IO(Input(Property[String]()))
   @public val bitPatIn = IO(Input(Property[String]()))
-  @public val attributesIn = IO(Input(Property[Seq[attributeClassTpe.Type]]))
+  @public val attributesIn = IO(Input(Property[Seq[AnyClassType]]))
 
   instructionName := instructionNameIn
   documentation := documentationIn
@@ -120,14 +116,11 @@ case class T1DecodePattern(instruction: Instruction, param: DecoderParam) extend
   // This is the OM for this instruction
   def om: Property[ClassType] = {
     val obj = Instantiate(new T1InstructionOM)
-    // get type of [[T1DecodeAttributeOM]]
-    val attributeClass = Definition(new T1DecodeAttributeOM)
-    val attributeClassTpe = attributeClass.getClassType
-
     obj.instructionNameIn := Property(instruction.name)
     obj.bitPatIn := Property(bitPat.rawString)
     obj.documentationIn := Property(documentation)
     // convert in-memory attributes to Chisel Property
+    // get type of [[T1DecodeAttributeOM]]
     obj.attributesIn :#= Property(
       Seq(
         isVector,
@@ -185,7 +178,7 @@ case class T1DecodePattern(instruction: Instruction, param: DecoderParam) extend
         isVtype,
         isVwmacc,
         isWidenreduce,
-      ).map(_.om.as(attributeClassTpe))
+      ).map(_.om.asAnyClassType)
     )
     obj.getPropertyReference
   }