From 1d8e14fa890aa0a2ba524eaac0544a8496f41fa4 Mon Sep 17 00:00:00 2001
From: qinjun-li <liqinjun1994@gmail.com>
Date: Tue, 20 Aug 2024 12:51:33 +0800
Subject: [PATCH] [rocketv] add isVector in write rf rob.

---
 rocketv/src/RocketCore.scala | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/rocketv/src/RocketCore.scala b/rocketv/src/RocketCore.scala
index 64cd56d98f..b55cd1a709 100644
--- a/rocketv/src/RocketCore.scala
+++ b/rocketv/src/RocketCore.scala
@@ -27,6 +27,7 @@ class RocketROB(param: RocketParameter) extends Bundle {
   val tag: UInt = UInt(5.W)
   val wbSetScoreboard: Bool = Bool()
   val longLatencyWrite: Bool = Bool()
+  val isVector: Bool = Bool()
 }
 
 class RocketProbe(param: RocketParameter) extends Bundle {
@@ -1092,6 +1093,9 @@ class Rocket(val parameter: RocketParameter)
     probeWire.rob.tag := wbWaddr
     probeWire.rob.wbSetScoreboard := wbSetSboard && wbWen
     probeWire.rob.longLatencyWrite := longLatencyWenable
+    probeWire.rob.isVector := io.t1.map { t1 =>
+      wbRegDecodeOutput(parameter.decoderParameter.vector) && !wbRegDecodeOutput(parameter.decoderParameter.vectorCSR)
+    }.getOrElse(false.B)
 
     // hook up control/status regfile
     csr.io.ungatedClock := io.clock