From 0dab960e1fdec7be70c7f215c59b88510fbc0c22 Mon Sep 17 00:00:00 2001 From: qinjun-li Date: Thu, 26 Dec 2024 14:27:52 +0800 Subject: [PATCH] [rtl] fix mask update. --- t1/src/Lane.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/t1/src/Lane.scala b/t1/src/Lane.scala index 1c8893634..a7285018d 100644 --- a/t1/src/Lane.scala +++ b/t1/src/Lane.scala @@ -965,7 +965,7 @@ class Lane(val parameter: LaneParameter) extends Module with SerializableModule[ maskSelectSew := Mux1H(maskControlReqSelect, maskControlVec.map(_.sew)) maskControlDataDeq := slotMaskRequestVec.zipWithIndex.map { case (req, index) => val slotIndex = slotControl(index).laneRequest.instructionIndex - val hitMaskControl = VecInit(maskControlVec.map(_.index === slotIndex)).asUInt + val hitMaskControl = VecInit(maskControlVec.map(c => c.index === slotIndex && c.controlValid)).asUInt val dataValid = Mux1H(hitMaskControl, maskControlVec.map(_.dataValid)) val data = Mux1H(hitMaskControl, maskControlVec.map(_.maskData)) val group = Mux1H(hitMaskControl, maskControlVec.map(_.group))