Skip to content

Latest commit

 

History

History
45 lines (32 loc) · 2.96 KB

README.md

File metadata and controls

45 lines (32 loc) · 2.96 KB

F4PGA examples

'Doc' workflow status

This repository provides example FPGA designs that can be built using the F4PGA open source toolchain. These examples target the Xilinx 7-Series and the QuickLogic EOS S3 devices.

  • Please refer to the for a proper guide on how to run these examples, as well as instructions on how to build and compile your own HDL designs using the F4PGA toolchain.
  • See to contribute on the development of architecture support in F4PGA.

The repository includes:

  • xc7/ and eos-s3/ - Examples for Xilinx 7-Series and EOS-S3 devices, including:

    • Verilog code

    • Pin constraints files

    • Timing constraints files

    • Makefiles for running the F4PGA toolchain

  • docs/ - Guide on how to get started with F4PGA and build provided examples

  • .github/ - Directory with CI configuration and scripts

The examples provided in this repository are automatically built and tested in CI by extracting necessary code snippets with tuttest.