From f0bfdd271d91281a67d513a42b0cc61b6c0924b2 Mon Sep 17 00:00:00 2001 From: Alain Dargelas Date: Fri, 28 Jul 2023 22:02:48 -0700 Subject: [PATCH] Rsd design typespec fix --- .../DesignCompile/CompileFileContent.h | 5 +- src/DesignCompile/CompileDesign.cpp | 5 +- src/DesignCompile/CompileFileContent.cpp | 4 + src/DesignCompile/UhdmWriter.cpp | 153 +++++----- tests/BitsLogic/BitsLogic.log | 32 +- tests/ClassCons/ClassCons.log | 4 +- tests/ClassTypeParam/ClassTypeParam.log | 6 +- tests/FilePackageImport/FilePackageImport.log | 284 ++++++++++++++++++ tests/FilePackageImport/FilePackageImport.sl | 1 + tests/FilePackageImport/dut.sv | 12 + tests/FileTypespec/FileTypespec.log | 2 - tests/InterfBinding/InterfBinding.log | 46 ++- tests/LowMemPkg/LowMemPkg.log | 6 + tests/SimpleClass1/SimpleClass1.log | 146 ++++----- tests/SimpleInterface/SimpleInterface.log | 45 +-- tests/UnitPackage/UnitPackage.log | 155 +++++++++- .../UnsupportedTypespecRange.log | 4 +- third_party/UHDM | 2 +- third_party/googletest | 2 +- third_party/tests/AmiqEth/AmiqEth.log | 46 +-- .../AmiqSimpleTestSuite.log | 46 +-- third_party/tests/ApbSlave/ApbSlave.log | 21 +- third_party/tests/AzadiRTL/AzadiRTL.log | 24 +- .../tests/CoresSweRVMP/CoresSweRVMP.log | 10 +- third_party/tests/Driver/Driver.log | 45 +-- third_party/tests/Monitor/Monitor.log | 46 +-- .../tests/NyuziProcessor/NyuziProcessor.log | 38 +-- third_party/tests/OVMSwitch/OVMSwitch.log | 43 +-- third_party/tests/Opentitan/Earlgrey.log | 36 +-- third_party/tests/Opentitan/Opentitan.log | 36 +-- third_party/tests/Rp32/rp32.log | 70 ++--- third_party/tests/Scoreboard/Scoreboard.log | 45 +-- third_party/tests/SimpleOVM/SimpleOVM.log | 27 +- third_party/tests/SimpleUVM/SimpleUVM.log | 45 +-- third_party/tests/SimpleVMM/SimpleVMM.log | 16 +- third_party/tests/UVMSwitch/UVMSwitch.log | 45 +-- 36 files changed, 1040 insertions(+), 513 deletions(-) create mode 100644 tests/FilePackageImport/FilePackageImport.log create mode 100644 tests/FilePackageImport/FilePackageImport.sl create mode 100644 tests/FilePackageImport/dut.sv diff --git a/include/Surelog/DesignCompile/CompileFileContent.h b/include/Surelog/DesignCompile/CompileFileContent.h index 0bb10bd178..57d1a5d6bd 100644 --- a/include/Surelog/DesignCompile/CompileFileContent.h +++ b/include/Surelog/DesignCompile/CompileFileContent.h @@ -57,10 +57,10 @@ struct FunctorCompileFileContent { class CompileFileContent final { public: CompileFileContent(CompileDesign* compiler, FileContent* file, - [[maybe_unused]] Design* design, + Design* design, [[maybe_unused]] SymbolTable* symbols, [[maybe_unused]] ErrorContainer* errors) - : m_compileDesign(compiler), m_fileContent(file) { + : m_compileDesign(compiler), m_fileContent(file), m_design(design) { m_helper.seterrorReporting(errors, symbols); } @@ -72,6 +72,7 @@ class CompileFileContent final { bool collectObjects_(); CompileDesign* const m_compileDesign; FileContent* const m_fileContent; + Design* const m_design; CompileHelper m_helper; }; diff --git a/src/DesignCompile/CompileDesign.cpp b/src/DesignCompile/CompileDesign.cpp index cbb4552378..de3f44ff2f 100644 --- a/src/DesignCompile/CompileDesign.cpp +++ b/src/DesignCompile/CompileDesign.cpp @@ -311,8 +311,6 @@ bool CompileDesign::compilation_() { compileMT_( all_files, maxThreadCount); - compileMT_(all_files, maxThreadCount); collectObjects_(all_files, design, false); m_compiler->getDesign()->orderPackages(); @@ -323,6 +321,9 @@ bool CompileDesign::compilation_() { funct.operator()(); } + compileMT_(all_files, maxThreadCount); + // Compile modules compileMT_( diff --git a/src/DesignCompile/CompileFileContent.cpp b/src/DesignCompile/CompileFileContent.cpp index d79eac3d70..98124b7d72 100644 --- a/src/DesignCompile/CompileFileContent.cpp +++ b/src/DesignCompile/CompileFileContent.cpp @@ -64,6 +64,10 @@ bool CompileFileContent::collectObjects_() { VObjectType type = fC->Type(id); switch (type) { case VObjectType::slPackage_import_item: { + m_helper.importPackage(m_fileContent, m_design, fC, id, + m_compileDesign); + m_helper.compileImportDeclaration(m_fileContent, fC, id, + m_compileDesign); FileCNodeId fnid(fC, id); m_fileContent->addObject(type, fnid); break; diff --git a/src/DesignCompile/UhdmWriter.cpp b/src/DesignCompile/UhdmWriter.cpp index 2f83c4b4a3..d76ffd3f97 100644 --- a/src/DesignCompile/UhdmWriter.cpp +++ b/src/DesignCompile/UhdmWriter.cpp @@ -2313,13 +2313,15 @@ void UhdmWriter::lateTypedefBinding(UHDM::Serializer& s, DesignComponent* mod, tps = n->Typespec(); break; } - const std::string pname = StrCat(m->VpiName(), "::", name); - if (n->VpiName() == pname) { - if (n->UhdmType() == uhdmref_var) continue; - if (n->UhdmType() == uhdmref_obj) continue; - found = true; - tps = n->Typespec(); - break; + if (m) { + const std::string pname = StrCat(m->VpiName(), "::", name); + if (n->VpiName() == pname) { + if (n->UhdmType() == uhdmref_var) continue; + if (n->UhdmType() == uhdmref_obj) continue; + found = true; + tps = n->Typespec(); + break; + } } } } @@ -2362,13 +2364,15 @@ void UhdmWriter::lateTypedefBinding(UHDM::Serializer& s, DesignComponent* mod, tps = n->Typespec(); break; } - const std::string pname = StrCat(m->VpiName(), "::", name); - if (n->VpiName() == pname) { - if (n->UhdmType() == uhdmref_var) continue; - if (n->UhdmType() == uhdmref_obj) continue; - found = true; - tps = n->Typespec(); - break; + if (m) { + const std::string pname = StrCat(m->VpiName(), "::", name); + if (n->VpiName() == pname) { + if (n->UhdmType() == uhdmref_var) continue; + if (n->UhdmType() == uhdmref_obj) continue; + found = true; + tps = n->Typespec(); + break; + } } } } @@ -2448,32 +2452,34 @@ void UhdmWriter::lateTypedefBinding(UHDM::Serializer& s, DesignComponent* mod, } } if (found) break; - VectorOfport* ports = m->Ports(); - if (ports) { - for (auto port : *ports) { - if (port->VpiName() == name) { - if (typespec* tmp = port->Typespec()) { - found = true; - tps = tmp; - break; + if (m) { + VectorOfport* ports = m->Ports(); + if (ports) { + for (auto port : *ports) { + if (port->VpiName() == name) { + if (typespec* tmp = port->Typespec()) { + found = true; + tps = tmp; + break; + } } } } - } - if (found) break; - VectorOfnet* nets = m->Nets(); - if (nets) { - for (auto net : *nets) { - if (net->VpiName() == name) { - if (typespec* tmp = net->Typespec()) { - found = true; - tps = tmp; - break; + if (found) break; + VectorOfnet* nets = m->Nets(); + if (nets) { + for (auto net : *nets) { + if (net->VpiName() == name) { + if (typespec* tmp = net->Typespec()) { + found = true; + tps = tmp; + break; + } } } } + if (found) break; } - if (found) break; } else if (parent->UhdmType() == uhdmbegin) { begin* b = (begin*)parent; if (auto vars = b->Variables()) { @@ -2815,12 +2821,15 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { ref->Actual_group(n); break; } - const std::string pname = StrCat(m->VpiName(), "::", typeName); - if (n->VpiName() == pname) { - if (n->UhdmType() == uhdmref_var) continue; - if (n->UhdmType() == uhdmref_obj) continue; - ref->Actual_group(n); - break; + if (m) { + const std::string pname = + StrCat(m->VpiName(), "::", typeName); + if (n->VpiName() == pname) { + if (n->UhdmType() == uhdmref_var) continue; + if (n->UhdmType() == uhdmref_obj) continue; + ref->Actual_group(n); + break; + } } } } @@ -2832,12 +2841,15 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { ref->Actual_group(n); break; } - const std::string pname = StrCat(m->VpiName(), "::", typeName); - if (n->VpiName() == pname) { - if (n->UhdmType() == uhdmref_var) continue; - if (n->UhdmType() == uhdmref_obj) continue; - ref->Actual_group(n); - break; + if (m) { + const std::string pname = + StrCat(m->VpiName(), "::", typeName); + if (n->VpiName() == pname) { + if (n->UhdmType() == uhdmref_var) continue; + if (n->UhdmType() == uhdmref_obj) continue; + ref->Actual_group(n); + break; + } } } } @@ -2902,12 +2914,14 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { ref->Actual_group(n); break; } - const std::string pname = StrCat(m->VpiName(), "::", name); - if (n->VpiName() == pname) { - if (n->UhdmType() == uhdmref_var) continue; - if (n->UhdmType() == uhdmref_obj) continue; - ref->Actual_group(n); - break; + if (m) { + const std::string pname = StrCat(m->VpiName(), "::", name); + if (n->VpiName() == pname) { + if (n->UhdmType() == uhdmref_var) continue; + if (n->UhdmType() == uhdmref_obj) continue; + ref->Actual_group(n); + break; + } } } } @@ -2947,12 +2961,14 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { ref->Actual_group(n); break; } - const std::string pname = StrCat(m->VpiName(), "::", name); - if (n->VpiName() == pname) { - if (n->UhdmType() == uhdmref_var) continue; - if (n->UhdmType() == uhdmref_obj) continue; - ref->Actual_group(n); - break; + if (m) { + const std::string pname = StrCat(m->VpiName(), "::", name); + if (n->VpiName() == pname) { + if (n->UhdmType() == uhdmref_var) continue; + if (n->UhdmType() == uhdmref_obj) continue; + ref->Actual_group(n); + break; + } } } } @@ -3142,7 +3158,7 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { parent = parent->VpiParent(); } if (ref->Actual_group()) continue; - if (m->UhdmType() == uhdmmodule_inst) { + if (m && (m->UhdmType() == uhdmmodule_inst)) { module_inst* minst = (module_inst*)m; if (minst->Interfaces()) { for (auto n : *minst->Interfaces()) { @@ -3163,8 +3179,9 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { if (ref->Actual_group()) continue; } } - if (m->UhdmType() == uhdmmodule_inst || - m->UhdmType() == uhdminterface_inst || m->UhdmType() == uhdmprogram) { + if (m && + (m->UhdmType() == uhdmmodule_inst || + m->UhdmType() == uhdminterface_inst || m->UhdmType() == uhdmprogram)) { instance* inst = (instance*)m; if (inst->Nets()) { for (auto n : *inst->Nets()) { @@ -3185,7 +3202,7 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { if (ref->Actual_group()) continue; } } - if (m->Variables()) { + if (m && m->Variables()) { for (auto n : *m->Variables()) { if (n->VpiName() == name) { ref->Actual_group(n); @@ -3200,7 +3217,7 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { if (ref->Actual_group()) continue; } - if (m->Param_assigns()) { + if (m && m->Param_assigns()) { bool isParam = false; for (auto p : *m->Param_assigns()) { const any* lhs = p->Lhs(); @@ -3213,7 +3230,7 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { } if (isParam) continue; } - if (m->Parameters()) { + if (m && m->Parameters()) { bool isParam = false; for (auto p : *m->Parameters()) { if (p->VpiName() == name) { @@ -3224,7 +3241,7 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { if (isParam) continue; } - if (m->Typespecs()) { + if (m && m->Typespecs()) { bool isTypespec = false; std::vector importedPackages; for (auto n : *m->Typespecs()) { @@ -3283,7 +3300,7 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { if (ref->Actual_group()) break; } - if (m->Variables()) { + if (m && m->Variables()) { for (auto var : *m->Variables()) { if (var->UhdmType() == uhdmenum_var) { const enum_typespec* tps = @@ -3318,9 +3335,9 @@ void UhdmWriter::lateBinding(Serializer& s, DesignComponent* mod, scope* m) { ->getCommandLineParser() ->muteStdout()); } else { - if (m->UhdmType() == uhdmmodule_inst || - m->UhdmType() == uhdminterface_inst || - m->UhdmType() == uhdmprogram) { + if (m && (m->UhdmType() == uhdmmodule_inst || + m->UhdmType() == uhdminterface_inst || + m->UhdmType() == uhdmprogram)) { instance* inst = (instance*)m; logic_net* net = s.MakeLogic_net(); net->VpiName(name); diff --git a/tests/BitsLogic/BitsLogic.log b/tests/BitsLogic/BitsLogic.log index 2f66cba547..053608ca69 100644 --- a/tests/BitsLogic/BitsLogic.log +++ b/tests/BitsLogic/BitsLogic.log @@ -202,8 +202,9 @@ AST_DEBUG_END [INF:UH0706] Creating UHDM Model... === UHDM Object Stats Begin (Non-Elaborated Model) === -constant 21 +constant 22 design 1 +import_typespec 1 int_typespec 2 logic_net 1 logic_typespec 7 @@ -222,8 +223,9 @@ typespec_member 6 [INF:UH0707] Elaborating UHDM... === UHDM Object Stats Begin (Elaborated Model) === -constant 21 +constant 22 design 1 +import_typespec 1 int_typespec 2 logic_net 1 logic_typespec 7 @@ -260,7 +262,7 @@ design: (work@top) |vpiTypedef: \_struct_typespec: (SchedulerTypes::IntIssueQueueEntry), line:3:9, endln:6:2 |vpiParent: - \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/BitsLogic/dut.sv, line:12:1, endln:28:10 + \_package: SchedulerTypes (SchedulerTypes::), file:${SURELOG_DIR}/tests/BitsLogic/dut.sv, line:1:1, endln:8:11 |vpiName:SchedulerTypes::IntIssueQueueEntry |vpiInstance: \_package: SchedulerTypes (SchedulerTypes::), file:${SURELOG_DIR}/tests/BitsLogic/dut.sv, line:1:1, endln:8:11 @@ -290,6 +292,28 @@ design: (work@top) |vpiFullName:SchedulerTypes:: |vpiTypedef: \_struct_typespec: (SchedulerTypes::IntIssueQueueEntry), line:3:9, endln:6:2 + |vpiParent: + \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/BitsLogic/dut.sv, line:12:1, endln:28:10 + |vpiName:SchedulerTypes::IntIssueQueueEntry + |vpiInstance: + \_package: SchedulerTypes (SchedulerTypes::), file:${SURELOG_DIR}/tests/BitsLogic/dut.sv, line:1:1, endln:8:11 + |vpiPacked:1 + |vpiTypespecMember: + \_typespec_member: (a), line:5:11, endln:5:12 + |vpiParent: + \_struct_typespec: (SchedulerTypes::IntIssueQueueEntry), line:3:9, endln:6:2 + |vpiName:a + |vpiTypespec: + \_logic_typespec: , line:5:5, endln:5:10 + |vpiParent: + \_typespec_member: (a), line:5:11, endln:5:12 + |vpiInstance: + \_package: SchedulerTypes (SchedulerTypes::), file:${SURELOG_DIR}/tests/BitsLogic/dut.sv, line:1:1, endln:8:11 + |vpiRefFile:${SURELOG_DIR}/tests/BitsLogic/dut.sv + |vpiRefLineNo:5 + |vpiRefColumnNo:5 + |vpiRefEndLineNo:5 + |vpiRefEndColumnNo:10 |vpiDefName:SchedulerTypes |vpiTop:1 |uhdmallModules: @@ -510,6 +534,8 @@ design: (work@top) |vpiName:b |vpiFullName:work@top.b |vpiNetType:36 +|vpiTypedef: +\_struct_typespec: (SchedulerTypes::IntIssueQueueEntry), line:3:9, endln:6:2 |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/BitsLogic/dut.sv, line:12:1, endln:28:10 |vpiName:work@top diff --git a/tests/ClassCons/ClassCons.log b/tests/ClassCons/ClassCons.log index 862eb7dca2..282209963c 100644 --- a/tests/ClassCons/ClassCons.log +++ b/tests/ClassCons/ClassCons.log @@ -830,14 +830,14 @@ begin 9 class_defn 13 class_typespec 13 class_var 7 -constant 12 +constant 13 design 1 enum_const 5 enum_typespec 1 enum_var 1 function 13 hier_path 12 -import_typespec 1 +import_typespec 2 initial 1 int_typespec 9 int_var 4 diff --git a/tests/ClassTypeParam/ClassTypeParam.log b/tests/ClassTypeParam/ClassTypeParam.log index b448c3ae23..8a4a3768c8 100644 --- a/tests/ClassTypeParam/ClassTypeParam.log +++ b/tests/ClassTypeParam/ClassTypeParam.log @@ -32,7 +32,7 @@ === UHDM Object Stats Begin (Non-Elaborated Model) === class_defn 5 -class_typespec 8 +class_typespec 9 class_var 3 design 1 extends 1 @@ -46,13 +46,12 @@ param_assign 6 ref_obj 4 string_typespec 4 type_parameter 10 -unsupported_typespec 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... === UHDM Object Stats Begin (Elaborated Model) === class_defn 5 -class_typespec 13 +class_typespec 14 class_var 4 design 1 extends 3 @@ -66,7 +65,6 @@ param_assign 18 ref_obj 4 string_typespec 4 type_parameter 22 -unsupported_typespec 1 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ClassTypeParam/slpp_unit/surelog.uhdm ... diff --git a/tests/FilePackageImport/FilePackageImport.log b/tests/FilePackageImport/FilePackageImport.log new file mode 100644 index 0000000000..37e068a19f --- /dev/null +++ b/tests/FilePackageImport/FilePackageImport.log @@ -0,0 +1,284 @@ +[INF:CM0023] Creating log file ${SURELOG_DIR}/build/regression/FilePackageImport/slpp_all/surelog.log. + +AST_DEBUG_BEGIN +LIB: work +FILE: ${SURELOG_DIR}/tests/FilePackageImport/dut.sv +n<> u<0> t<_INVALID_> f<0> l<0:0> +n<> u<1> t p<65> s<64> l<2:1> el<1:2> +n<> u<2> t p<23> s<3> l<2:1> el<2:8> +n u<3> t p<23> s<20> l<2:9> el<2:14> +n<> u<4> t p<15> s<14> l<3:9> el<3:14> +n<1> u<5> t p<6> l<3:16> el<3:17> +n<> u<6> t p<7> c<5> l<3:16> el<3:17> +n<> u<7> t p<8> c<6> l<3:16> el<3:17> +n<> u<8> t p<13> c<7> s<12> l<3:16> el<3:17> +n<0> u<9> t p<10> l<3:18> el<3:19> +n<> u<10> t p<11> c<9> l<3:18> el<3:19> +n<> u<11> t p<12> c<10> l<3:18> el<3:19> +n<> u<12> t p<13> c<11> l<3:18> el<3:19> +n<> u<13> t p<14> c<8> l<3:16> el<3:19> +n<> u<14> t p<15> c<13> l<3:15> el<3:20> +n<> u<15> t p<17> c<4> s<16> l<3:9> el<3:20> +n u<16> t p<17> l<3:21> el<3:34> +n<> u<17> t p<18> c<15> l<3:1> el<3:35> +n<> u<18> t p<19> c<17> l<3:1> el<3:35> +n<> u<19> t p<20> c<18> l<3:1> el<3:35> +n<> u<20> t p<23> c<19> s<22> l<3:1> el<3:35> +n u<21> t p<23> l<5:14> el<5:19> +n<> u<22> t p<23> s<21> l<5:1> el<5:11> +n<> u<23> t p<24> c<2> l<2:1> el<5:19> +n<> u<24> t p<64> c<23> s<31> l<2:1> el<5:19> +n u<25> t p<26> l<7:8> el<7:13> +n<> u<26> t p<27> c<25> l<7:8> el<7:16> +n<> u<27> t p<28> c<26> l<7:1> el<7:17> +n<> u<28> t p<29> c<27> l<7:1> el<7:17> +n<> u<29> t p<30> c<28> l<7:1> el<7:17> +n<> u<30> t p<31> c<29> l<7:1> el<7:17> +n<> u<31> t p<64> c<30> s<63> l<7:1> el<7:17> +n<> u<32> t p<60> s<59> l<9:10> el<9:19> +n<> u<33> t p<34> l<9:20> el<9:23> +n<> u<34> t p<35> c<33> l<9:20> el<9:23> +n<> u<35> t p<36> c<34> l<9:20> el<9:23> +n<> u<36> t p<59> c<35> s<37> l<9:20> el<9:23> +n u<37> t p<59> s<48> l<10:1> el<10:24> +n<> u<38> t p<39> l<10:25> el<10:30> +n<> u<39> t p<40> c<38> l<10:25> el<10:30> +n<> u<40> t p<42> c<39> s<41> l<10:25> el<10:30> +n u<41> t p<42> l<10:31> el<10:35> +n<> u<42> t p<48> c<40> s<47> l<10:25> el<10:35> +n u<43> t p<44> l<10:37> el<10:50> +n<> u<44> t p<45> c<43> l<10:37> el<10:50> +n<> u<45> t p<47> c<44> s<46> l<10:37> el<10:50> +n u<46> t p<47> l<10:51> el<10:54> +n<> u<47> t p<48> c<45> l<10:37> el<10:54> +n<> u<48> t p<59> c<42> s<57> l<10:25> el<10:54> +n u<49> t p<50> l<11:12> el<11:14> +n<> u<50> t p<51> c<49> l<11:12> el<11:14> +n<> u<51> t p<52> c<50> l<11:12> el<11:14> +n<> u<52> t p<54> c<51> l<11:12> el<11:14> +n<> u<53> t p<54> s<52> l<11:5> el<11:11> +n<> u<54> t p<55> c<53> l<11:5> el<11:15> +n<> u<55> t p<56> c<54> l<11:5> el<11:15> +n<> u<56> t p<57> c<55> l<11:5> el<11:15> +n<> u<57> t p<59> c<56> s<58> l<11:5> el<11:15> +n<> u<58> t p<59> l<12:1> el<12:12> +n<> u<59> t p<60> c<36> l<9:20> el<12:12> +n<> u<60> t p<61> c<32> l<9:1> el<12:12> +n<> u<61> t p<62> c<60> l<9:1> el<12:12> +n<> u<62> t p<63> c<61> l<9:1> el<12:12> +n<> u<63> t p<64> c<62> l<9:1> el<12:12> +n<> u<64> t p<65> c<24> l<2:1> el<12:12> +n<> u<65> t c<1> l<2:1> el<12:12> +AST_DEBUG_END +[WRN:PA0205] ${SURELOG_DIR}/tests/FilePackageImport/dut.sv:2:1: No timescale set for "pkg_b". + +[INF:CP0300] Compilation... + +[INF:CP0301] ${SURELOG_DIR}/tests/FilePackageImport/dut.sv:2:1: Compile package "pkg_b". + +[INF:EL0526] Design Elaboration... + +[NTE:EL0508] Nb Top level modules: 0. + +[NTE:EL0509] Max instance depth: 0. + +[NTE:EL0510] Nb instances: 0. + +[NTE:EL0511] Nb leaf instances: 0. + +[INF:UH0706] Creating UHDM Model... + +=== UHDM Object Stats Begin (Non-Elaborated Model) === +constant 11 +design 1 +function 1 +import_typespec 1 +int_typespec 1 +int_var 1 +io_decl 2 +logic_typespec 4 +module_inst 1 +package 2 +packed_array_typespec 2 +range 5 +ref_obj 1 +return_stmt 1 +=== UHDM Object Stats End === +[INF:UH0707] Elaborating UHDM... + +=== UHDM Object Stats Begin (Elaborated Model) === +constant 11 +design 1 +function 1 +import_typespec 1 +int_typespec 1 +int_var 1 +io_decl 2 +logic_typespec 4 +module_inst 1 +package 2 +packed_array_typespec 2 +range 5 +ref_obj 1 +return_stmt 1 +=== UHDM Object Stats End === +[INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/FilePackageImport/slpp_all/surelog.uhdm ... + +[INF:UH0709] Writing UHDM Html Coverage: ${SURELOG_DIR}/build/regression/FilePackageImport/slpp_all/checker/surelog.chk.html ... + +[INF:UH0710] Loading UHDM DB: ${SURELOG_DIR}/build/regression/FilePackageImport/slpp_all/surelog.uhdm ... + +[INF:UH0711] Decompiling UHDM... + +====== UHDM ======= +design: (unnamed) +|vpiElaborated:1 +|vpiName:unnamed +|uhdmallPackages: +\_package: pkg_b (pkg_b::), file:${SURELOG_DIR}/tests/FilePackageImport/dut.sv, line:2:1, endln:5:19 + |vpiParent: + \_design: (unnamed) + |vpiName:pkg_b + |vpiFullName:pkg_b:: + |vpiTypedef: + \_logic_typespec: (pkg_b::DCacheWayPath), line:3:9, endln:3:20 + |vpiParent: + \_package: pkg_b (pkg_b::), file:${SURELOG_DIR}/tests/FilePackageImport/dut.sv, line:2:1, endln:5:19 + |vpiName:pkg_b::DCacheWayPath + |vpiInstance: + \_package: pkg_b (pkg_b::), file:${SURELOG_DIR}/tests/FilePackageImport/dut.sv, line:2:1, endln:5:19 + |vpiRange: + \_range: , line:3:15, endln:3:20 + |vpiParent: + \_logic_typespec: (pkg_b::DCacheWayPath), line:3:9, endln:3:20 + |vpiLeftRange: + \_constant: , line:3:16, endln:3:17 + |vpiParent: + \_range: , line:3:15, endln:3:20 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiRightRange: + \_constant: , line:3:18, endln:3:19 + |vpiParent: + \_range: , line:3:15, endln:3:20 + |vpiDecompile:0 + |vpiSize:64 + |UINT:0 + |vpiConstType:9 + |vpiDefName:pkg_b +|uhdmtopPackages: +\_package: pkg_b (pkg_b::), file:${SURELOG_DIR}/tests/FilePackageImport/dut.sv, line:2:1, endln:5:19 + |vpiParent: + \_design: (unnamed) + |vpiName:pkg_b + |vpiFullName:pkg_b:: + |vpiTypedef: + \_logic_typespec: (pkg_b::DCacheWayPath), line:3:9, endln:3:20 + |vpiParent: + \_package: pkg_b (pkg_b::), file:${SURELOG_DIR}/tests/FilePackageImport/dut.sv, line:2:1, endln:5:19 + |vpiName:pkg_b::DCacheWayPath + |vpiInstance: + \_package: pkg_b (pkg_b::), file:${SURELOG_DIR}/tests/FilePackageImport/dut.sv, line:2:1, endln:5:19 + |vpiRange: + \_range: , line:3:15, endln:3:20 + |vpiParent: + \_logic_typespec: (pkg_b::DCacheWayPath), line:3:9, endln:3:20 + |vpiLeftRange: + \_constant: , line:3:16, endln:3:17 + |vpiParent: + \_range: , line:3:15, endln:3:20 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiRightRange: + \_constant: , line:3:18, endln:3:19 + |vpiParent: + \_range: , line:3:15, endln:3:20 + |vpiDecompile:0 + |vpiSize:64 + |UINT:0 + |vpiConstType:9 + |vpiDefName:pkg_b + |vpiTop:1 +|vpiTypedef: +\_logic_typespec: (pkg_b::DCacheWayPath), line:3:9, endln:3:20 +|vpiTaskFunc: +\_function: (TreeLRU_CalcWriteEnable), line:9:1, endln:12:12 + |vpiParent: + \_design: (unnamed) + |vpiName:TreeLRU_CalcWriteEnable + |vpiMethod:1 + |vpiVisibility:1 + |vpiAutomatic:1 + |vpiReturn: + \_int_var: (TreeLRU_CalcWriteEnable), line:9:20, endln:9:23 + |vpiParent: + \_function: (TreeLRU_CalcWriteEnable), line:9:1, endln:12:12 + |vpiTypespec: + \_int_typespec: , line:9:20, endln:9:23 + |vpiSigned:1 + |vpiFullName:TreeLRU_CalcWriteEnable + |vpiSigned:1 + |vpiIODecl: + \_io_decl: (weIn), line:10:31, endln:10:35 + |vpiParent: + \_function: (TreeLRU_CalcWriteEnable), line:9:1, endln:12:12 + |vpiDirection:1 + |vpiName:weIn + |vpiTypedef: + \_logic_typespec: , line:10:25, endln:10:30 + |vpiIODecl: + \_io_decl: (way), line:10:51, endln:10:54 + |vpiParent: + \_function: (TreeLRU_CalcWriteEnable), line:9:1, endln:12:12 + |vpiDirection:1 + |vpiName:way + |vpiTypedef: + \_logic_typespec: (DCacheWayPath), line:10:37, endln:10:50 + |vpiName:DCacheWayPath + |vpiTypedefAlias: + \_logic_typespec: (pkg_b::DCacheWayPath), line:3:9, endln:3:20 + |vpiInstance: + \_package: pkg_b (pkg_b::), file:${SURELOG_DIR}/tests/FilePackageImport/dut.sv, line:2:1, endln:5:19 + |vpiRange: + \_range: , line:3:15, endln:3:20 + |vpiParent: + \_logic_typespec: (DCacheWayPath), line:10:37, endln:10:50 + |vpiLeftRange: + \_constant: , line:3:16, endln:3:17 + |vpiParent: + \_range: , line:3:15, endln:3:20 + |vpiDecompile:1 + |vpiSize:64 + |UINT:1 + |vpiConstType:9 + |vpiRightRange: + \_constant: , line:3:18, endln:3:19 + |vpiParent: + \_range: , line:3:15, endln:3:20 + |vpiDecompile:0 + |vpiSize:64 + |UINT:0 + |vpiConstType:9 + |vpiStmt: + \_return_stmt: , line:11:5, endln:11:11 + |vpiParent: + \_function: (TreeLRU_CalcWriteEnable), line:9:1, endln:12:12 + |vpiCondition: + \_ref_obj: (TreeLRU_CalcWriteEnable.we), line:11:12, endln:11:14 + |vpiParent: + \_return_stmt: , line:11:5, endln:11:11 + |vpiName:we + |vpiFullName:TreeLRU_CalcWriteEnable.we +=================== +[ FATAL] : 0 +[ SYNTAX] : 0 +[ ERROR] : 0 +[WARNING] : 1 +[ NOTE] : 4 + + +[roundtrip]: ${SURELOG_DIR}/tests/FilePackageImport/dut.sv | ${SURELOG_DIR}/build/regression/FilePackageImport/roundtrip/dut_000.sv | 4 | 12 | \ No newline at end of file diff --git a/tests/FilePackageImport/FilePackageImport.sl b/tests/FilePackageImport/FilePackageImport.sl new file mode 100644 index 0000000000..b461620aca --- /dev/null +++ b/tests/FilePackageImport/FilePackageImport.sl @@ -0,0 +1 @@ +-parse -d uhdm -d coveruhdm -elabuhdm -d ast dut.sv -nobuiltin diff --git a/tests/FilePackageImport/dut.sv b/tests/FilePackageImport/dut.sv new file mode 100644 index 0000000000..57b5c7bc71 --- /dev/null +++ b/tests/FilePackageImport/dut.sv @@ -0,0 +1,12 @@ + +package pkg_b; +typedef logic [1:0] DCacheWayPath; + +endpackage : pkg_b + +import pkg_b::*; + +function automatic int +TreeLRU_CalcWriteEnable(logic weIn, DCacheWayPath way); + return we; +endfunction \ No newline at end of file diff --git a/tests/FileTypespec/FileTypespec.log b/tests/FileTypespec/FileTypespec.log index d0ab3cfee1..62a2e6a009 100644 --- a/tests/FileTypespec/FileTypespec.log +++ b/tests/FileTypespec/FileTypespec.log @@ -186,7 +186,6 @@ struct_typespec 3 typespec_member 5 union_typespec 1 union_var 2 -unsupported_typespec 2 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -207,7 +206,6 @@ struct_typespec 3 typespec_member 5 union_typespec 1 union_var 2 -unsupported_typespec 2 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/FileTypespec/slpp_all/surelog.uhdm ... diff --git a/tests/InterfBinding/InterfBinding.log b/tests/InterfBinding/InterfBinding.log index 03806ccac7..212edbf35f 100644 --- a/tests/InterfBinding/InterfBinding.log +++ b/tests/InterfBinding/InterfBinding.log @@ -145,9 +145,11 @@ AST_DEBUG_END [INF:UH0706] Creating UHDM Model... === UHDM Object Stats Begin (Non-Elaborated Model) === +constant 1 cont_assign 1 design 1 hier_path 1 +import_typespec 1 interface_inst 2 interface_typespec 6 io_decl 2 @@ -166,9 +168,11 @@ typespec_member 4 [INF:UH0707] Elaborating UHDM... === UHDM Object Stats Begin (Elaborated Model) === +constant 1 cont_assign 2 design 1 hier_path 2 +import_typespec 1 interface_inst 2 interface_typespec 6 io_decl 2 @@ -205,7 +209,7 @@ design: (work@BypassNetwork) |vpiTypedef: \_struct_typespec: (pack::PipelineControll), line:2:9, endln:6:2 |vpiParent: - \_module_inst: work@BypassNetwork (work@BypassNetwork), file:${SURELOG_DIR}/tests/InterfBinding/dut.sv, line:29:1, endln:36:10 + \_package: pack (pack::), file:${SURELOG_DIR}/tests/InterfBinding/dut.sv, line:1:1, endln:8:11 |vpiName:pack::PipelineControll |vpiInstance: \_package: pack (pack::), file:${SURELOG_DIR}/tests/InterfBinding/dut.sv, line:1:1, endln:8:11 @@ -251,6 +255,44 @@ design: (work@BypassNetwork) |vpiFullName:pack:: |vpiTypedef: \_struct_typespec: (pack::PipelineControll), line:2:9, endln:6:2 + |vpiParent: + \_module_inst: work@BypassNetwork (work@BypassNetwork), file:${SURELOG_DIR}/tests/InterfBinding/dut.sv, line:29:1, endln:36:10 + |vpiName:pack::PipelineControll + |vpiInstance: + \_package: pack (pack::), file:${SURELOG_DIR}/tests/InterfBinding/dut.sv, line:1:1, endln:8:11 + |vpiPacked:1 + |vpiTypespecMember: + \_typespec_member: (stall), line:4:11, endln:4:16 + |vpiParent: + \_struct_typespec: (pack::PipelineControll), line:2:9, endln:6:2 + |vpiName:stall + |vpiTypespec: + \_logic_typespec: , line:4:5, endln:4:10 + |vpiParent: + \_typespec_member: (stall), line:4:11, endln:4:16 + |vpiInstance: + \_package: pack (pack::), file:${SURELOG_DIR}/tests/InterfBinding/dut.sv, line:1:1, endln:8:11 + |vpiRefFile:${SURELOG_DIR}/tests/InterfBinding/dut.sv + |vpiRefLineNo:4 + |vpiRefColumnNo:5 + |vpiRefEndLineNo:4 + |vpiRefEndColumnNo:10 + |vpiTypespecMember: + \_typespec_member: (clear), line:5:11, endln:5:16 + |vpiParent: + \_struct_typespec: (pack::PipelineControll), line:2:9, endln:6:2 + |vpiName:clear + |vpiTypespec: + \_logic_typespec: , line:5:5, endln:5:10 + |vpiParent: + \_typespec_member: (clear), line:5:11, endln:5:16 + |vpiInstance: + \_package: pack (pack::), file:${SURELOG_DIR}/tests/InterfBinding/dut.sv, line:1:1, endln:8:11 + |vpiRefFile:${SURELOG_DIR}/tests/InterfBinding/dut.sv + |vpiRefLineNo:5 + |vpiRefColumnNo:5 + |vpiRefEndLineNo:5 + |vpiRefEndColumnNo:10 |vpiDefName:pack |vpiTop:1 |uhdmallInterfaces: @@ -391,6 +433,8 @@ design: (work@BypassNetwork) |vpiFullName:work@BypassNetwork.o |vpiActual: \_logic_net: (work@BypassNetwork.o), line:33:9, endln:33:10 +|vpiTypedef: +\_struct_typespec: (pack::PipelineControll), line:2:9, endln:6:2 |uhdmtopModules: \_module_inst: work@BypassNetwork (work@BypassNetwork), file:${SURELOG_DIR}/tests/InterfBinding/dut.sv, line:29:1, endln:36:10 |vpiName:work@BypassNetwork diff --git a/tests/LowMemPkg/LowMemPkg.log b/tests/LowMemPkg/LowMemPkg.log index ffcda56593..bb34e7b58c 100644 --- a/tests/LowMemPkg/LowMemPkg.log +++ b/tests/LowMemPkg/LowMemPkg.log @@ -95,7 +95,9 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/LowMemPkg/dut.sv [INF:UH0706] Creating UHDM Model... === UHDM Object Stats Begin (Non-Elaborated Model) === +constant 1 design 1 +import_typespec 1 include_file_info 1 logic_net 2 logic_typespec 5 @@ -106,7 +108,9 @@ package 2 [INF:UH0707] Elaborating UHDM... === UHDM Object Stats Begin (Elaborated Model) === +constant 1 design 1 +import_typespec 1 include_file_info 1 logic_net 2 logic_typespec 5 @@ -184,6 +188,8 @@ design: (work@top) |vpiName:b |vpiFullName:work@top.b |vpiNetType:36 +|vpiTypedef: +\_logic_typespec: (wddr_pkg::my_logic), line:20:9, endln:20:14 |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LowMemPkg/dut.sv, line:4:1, endln:8:10 |vpiName:work@top diff --git a/tests/SimpleClass1/SimpleClass1.log b/tests/SimpleClass1/SimpleClass1.log index e7e37eb519..dce85b0efb 100644 --- a/tests/SimpleClass1/SimpleClass1.log +++ b/tests/SimpleClass1/SimpleClass1.log @@ -790,93 +790,93 @@ Instance tree: [INF:UH0706] Creating UHDM Model... === UHDM Object Stats Begin (Non-Elaborated Model) === -array_typespec 1484 -array_var 1463 -assign_stmt 5234 -assignment 15477 -begin 16140 -bit_select 5398 -bit_typespec 11692 -bit_var 2166 -break_stmt 129 -byte_typespec 245 -byte_var 89 -case_item 1436 -case_stmt 211 -chandle_typespec 14 +array_typespec 685 +array_var 664 +assign_stmt 3550 +assignment 6293 +begin 6772 +bit_select 2126 +bit_typespec 9936 +bit_var 1190 +break_stmt 53 +byte_typespec 121 +byte_var 37 +case_item 544 +case_stmt 83 +chandle_typespec 6 chandle_var 2 class_defn 640 -class_typespec 16501 -class_var 8799 -constant 79415 -constraint 12 -continue_stmt 124 -delay_control 129 +class_typespec 9308 +class_var 4008 +constant 44653 +constraint 4 +continue_stmt 52 +delay_control 53 design 1 -disable_fork 13 -do_while 95 -enum_const 4700 -enum_typespec 957 -enum_var 400 -event_control 17 -event_stmt 14 +disable_fork 5 +do_while 51 +enum_const 1874 +enum_typespec 226 +enum_var 229 +event_control 13 +event_stmt 10 event_typespec 10 extends 287 -for_stmt 589 -foreach_stmt 2021 -forever_stmt 23 -fork_stmt 79 -func_call 13094 -function 8207 -hier_path 19281 -if_else 1895 -if_stmt 10696 -import_typespec 1 +for_stmt 237 +foreach_stmt 773 +forever_stmt 11 +fork_stmt 31 +func_call 5082 +function 4707 +hier_path 8143 +if_else 811 +if_stmt 4420 +import_typespec 2 include_file_info 166 -indexed_part_select 121 -int_typespec 6606 -int_var 2699 -io_decl 12883 -logic_net 253 -logic_typespec 202 -logic_var 71 -long_int_typespec 179 -long_int_var 26 -method_func_call 17747 +indexed_part_select 41 +int_typespec 4847 +int_var 1450 +io_decl 6919 +logic_net 279 +logic_typespec 78 +logic_var 39 +long_int_typespec 99 +long_int_var 18 +method_func_call 8015 module_inst 30 -named_begin 18 +named_begin 6 named_event 8 -named_fork 7 -operation 23409 +named_fork 3 +operation 10042 package 8 packed_array_typespec 8 -param_assign 1825 -parameter 3379 -part_select 123 -range 12189 -real_typespec 41 +param_assign 2276 +parameter 4281 +part_select 43 +range 9968 +real_typespec 33 real_var 8 -ref_obj 100585 -ref_var 4429 -repeat 70 -return_stmt 6760 -string_typespec 6859 -string_var 3104 -struct_typespec 110 -struct_var 107 -sys_func_call 2833 +ref_obj 41385 +ref_var 1789 +repeat 26 +return_stmt 3276 +string_typespec 3665 +string_var 1628 +struct_typespec 14 +struct_var 34 +sys_func_call 1314 tagged_pattern 1 -task 999 -task_call 37 -time_typespec 203 -time_var 74 +task 583 +task_call 17 +time_typespec 107 +time_var 38 type_parameter 289 -typespec_member 415 -unsupported_typespec 4536 -var_select 350 +typespec_member 47 +unsupported_typespec 1904 +var_select 306 wait_fork 1 -wait_stmt 117 -while_stmt 268 +wait_stmt 45 +while_stmt 108 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/SimpleClass1/slpp_all/surelog.uhdm ... diff --git a/tests/SimpleInterface/SimpleInterface.log b/tests/SimpleInterface/SimpleInterface.log index 4eb2d066c7..8c15a77f41 100644 --- a/tests/SimpleInterface/SimpleInterface.log +++ b/tests/SimpleInterface/SimpleInterface.log @@ -2177,13 +2177,13 @@ Instance tree: === UHDM Object Stats Begin (Non-Elaborated Model) === always 3 -array_typespec 675 -array_var 654 +array_typespec 614 +array_var 593 assign_stmt 3548 assignment 6303 begin 6770 bit_select 2128 -bit_typespec 3384 +bit_typespec 4736 bit_var 1190 break_stmt 53 byte_typespec 120 @@ -2193,20 +2193,20 @@ case_stmt 83 chandle_typespec 6 chandle_var 2 class_defn 613 -class_typespec 8660 -class_var 3403 +class_typespec 8763 +class_var 3422 clocking_block 4 clocking_io_decl 12 -constant 29365 +constant 32662 constraint 4 continue_stmt 52 delay_control 60 design 1 disable_fork 5 do_while 51 -enum_const 611 -enum_typespec 99 -enum_var 188 +enum_const 871 +enum_typespec 125 +enum_var 194 event_control 19 event_stmt 10 event_typespec 10 @@ -2218,18 +2218,19 @@ fork_stmt 31 func_call 5081 function 4692 gen_for 1 -hier_path 8249 +hier_path 8479 if_else 812 if_stmt 4422 +import_typespec 1 include_file_info 166 indexed_part_select 41 initial 1 -int_typespec 2693 -int_var 1188 +int_typespec 3260 +int_var 1364 interface_inst 5 interface_typespec 3 io_decl 6913 -logic_net 384 +logic_net 540 logic_typespec 116 logic_var 42 long_int_typespec 99 @@ -2240,26 +2241,26 @@ module_inst 39 named_begin 6 named_event 8 named_fork 3 -operation 10015 +operation 10021 package 4 packed_array_typespec 8 -param_assign 632 -parameter 878 +param_assign 1124 +parameter 1657 part_select 43 port 22 -range 3225 +range 4615 real_typespec 33 real_var 8 ref_module 2 -ref_obj 41468 +ref_obj 41710 ref_var 1789 repeat 26 return_stmt 3272 -string_typespec 3267 -string_var 1387 +string_typespec 3335 +string_var 1417 struct_typespec 14 -struct_var 35 -sys_func_call 1279 +struct_var 34 +sys_func_call 1285 tagged_pattern 1 task 583 task_call 17 diff --git a/tests/UnitPackage/UnitPackage.log b/tests/UnitPackage/UnitPackage.log index 5126b53519..efdb32b5c4 100644 --- a/tests/UnitPackage/UnitPackage.log +++ b/tests/UnitPackage/UnitPackage.log @@ -1032,12 +1032,12 @@ Instance tree: === UHDM Object Stats Begin (Non-Elaborated Model) === assignment 8 begin 9 -bit_typespec 12 -bit_var 3 +bit_typespec 13 +bit_var 4 class_defn 8 class_typespec 4 class_var 3 -constant 53 +constant 59 delay_control 3 design 1 enum_const 9 @@ -1049,13 +1049,14 @@ gen_if 1 gen_scope 2 gen_scope_array 2 if_stmt 3 +import_typespec 2 initial 1 int_typespec 12 int_var 4 -integer_typespec 16 -integer_var 14 +integer_typespec 18 +integer_var 16 io_decl 23 -logic_net 6 +logic_net 10 logic_var 1 module_inst 7 named_begin 1 @@ -1066,8 +1067,8 @@ parameter 6 range 4 ref_module 2 ref_obj 40 -string_typespec 14 -string_var 3 +string_typespec 15 +string_var 4 struct_typespec 2 sys_func_call 21 task 19 @@ -1079,12 +1080,12 @@ typespec_member 6 === UHDM Object Stats Begin (Elaborated Model) === assignment 24 begin 26 -bit_typespec 12 -bit_var 3 +bit_typespec 13 +bit_var 4 class_defn 8 class_typespec 4 class_var 3 -constant 53 +constant 59 delay_control 6 design 1 enum_const 14 @@ -1096,13 +1097,14 @@ gen_if 1 gen_scope 3 gen_scope_array 3 if_stmt 8 +import_typespec 2 initial 2 int_typespec 12 int_var 4 -integer_typespec 16 -integer_var 14 +integer_typespec 18 +integer_var 16 io_decl 58 -logic_net 6 +logic_net 10 logic_var 1 module_inst 8 named_begin 1 @@ -1113,8 +1115,8 @@ parameter 6 range 4 ref_module 2 ref_obj 117 -string_typespec 14 -string_var 3 +string_typespec 15 +string_var 4 struct_typespec 2 sys_func_call 62 task 48 @@ -3403,6 +3405,40 @@ design: (work@simple_package) |vpiName:msgName |vpiFullName:work@simple_package.msgName |vpiNet: + \_logic_net: (work@simple_package.errCnt), line:5:12, endln:5:18 + |vpiParent: + \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 + |vpiTypespec: + \_integer_typespec: , line:5:3, endln:5:23 + |vpiSigned:1 + |vpiName:errCnt + |vpiFullName:work@simple_package.errCnt + |vpiNet: + \_logic_net: (work@simple_package.warnCnt), line:6:12, endln:6:19 + |vpiParent: + \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 + |vpiTypespec: + \_integer_typespec: , line:6:3, endln:6:23 + |vpiSigned:1 + |vpiName:warnCnt + |vpiFullName:work@simple_package.warnCnt + |vpiNet: + \_logic_net: (work@simple_package.terminate_on_error), line:7:12, endln:7:30 + |vpiParent: + \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 + |vpiTypespec: + \_bit_typespec: , line:7:3, endln:7:6 + |vpiName:terminate_on_error + |vpiFullName:work@simple_package.terminate_on_error + |vpiNet: + \_logic_net: (work@simple_package.msgName), line:8:12, endln:8:19 + |vpiParent: + \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 + |vpiTypespec: + \_string_typespec: , line:8:3, endln:8:28 + |vpiName:msgName + |vpiFullName:work@simple_package.msgName + |vpiNet: \_logic_net: (work@simple_package.value), line:13:8, endln:13:13 |vpiParent: \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 @@ -3620,6 +3656,22 @@ design: (work@simple_package) \_named_begin: (work@simple_package.inst) |vpiName:u1 |vpiDefName:work@M1 +|vpiTypedef: +\_enum_typespec: (definesPkg::bool), line:10:3, endln:10:36 +|vpiTaskFunc: +\_task: (msgPkg::initMsgPkg), line:12:3, endln:15:10 +|vpiTaskFunc: +\_task: (msgPkg::msg_info), line:19:3, endln:21:10 +|vpiTaskFunc: +\_task: (msgPkg::msg_warn), line:25:3, endln:28:10 +|vpiTaskFunc: +\_task: (msgPkg::msg_error), line:32:3, endln:36:10 +|vpiTaskFunc: +\_task: (msgPkg::msg_fatal), line:40:3, endln:43:10 +|vpiTaskFunc: +\_function: (msgPkg::getErrCnt), line:47:3, endln:49:14 +|vpiTaskFunc: +\_function: (msgPkg::getWarnCnt), line:53:3, endln:55:14 |uhdmtopModules: \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 |vpiName:work@simple_package @@ -3705,6 +3757,77 @@ design: (work@simple_package) |STRING:NULL |vpiConstType:6 |vpiVariables: + \_integer_var: (work@simple_package.errCnt), line:5:12, endln:5:23 + |vpiParent: + \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 + |vpiTypespec: + \_integer_typespec: , line:5:3, endln:5:10 + |vpiName:errCnt + |vpiFullName:work@simple_package.errCnt + |vpiAutomatic:1 + |vpiVisibility:1 + |vpiExpr: + \_constant: , line:5:22, endln:5:23 + |vpiParent: + \_integer_var: (work@simple_package.errCnt), line:5:12, endln:5:23 + |vpiDecompile:0 + |vpiSize:32 + |UINT:0 + |vpiConstType:9 + |vpiVariables: + \_integer_var: (work@simple_package.warnCnt), line:6:12, endln:6:23 + |vpiParent: + \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 + |vpiTypespec: + \_integer_typespec: , line:6:3, endln:6:10 + |vpiName:warnCnt + |vpiFullName:work@simple_package.warnCnt + |vpiAutomatic:1 + |vpiVisibility:1 + |vpiExpr: + \_constant: , line:6:22, endln:6:23 + |vpiParent: + \_integer_var: (work@simple_package.warnCnt), line:6:12, endln:6:23 + |vpiDecompile:0 + |vpiSize:32 + |UINT:0 + |vpiConstType:9 + |vpiVariables: + \_bit_var: (work@simple_package.terminate_on_error), line:7:12, endln:7:30 + |vpiParent: + \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 + |vpiTypespec: + \_bit_typespec: , line:7:3, endln:7:6 + |vpiName:terminate_on_error + |vpiFullName:work@simple_package.terminate_on_error + |vpiVisibility:1 + |vpiExpr: + \_constant: , line:7:33, endln:7:34 + |vpiParent: + \_bit_var: (work@simple_package.terminate_on_error), line:7:12, endln:7:30 + |vpiDecompile:0 + |vpiSize:1 + |UINT:0 + |vpiConstType:9 + |vpiVariables: + \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + |vpiParent: + \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 + |vpiTypespec: + \_string_typespec: , line:8:3, endln:8:9 + |vpiName:msgName + |vpiFullName:work@simple_package.msgName + |vpiAutomatic:1 + |vpiVisibility:1 + |vpiExpr: + \_constant: , line:8:22, endln:8:28 + |vpiParent: + \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + |vpiDecompile:"NULL" + |vpiSize:32 + |STRING:NULL + |vpiConstType:6 + |vpiVariables: \_enum_var: (work@simple_package.value), line:13:8, endln:13:13 |vpiParent: \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 diff --git a/tests/UnsupportedTypespecRange/UnsupportedTypespecRange.log b/tests/UnsupportedTypespecRange/UnsupportedTypespecRange.log index 40f3234222..08c4da5da7 100644 --- a/tests/UnsupportedTypespecRange/UnsupportedTypespecRange.log +++ b/tests/UnsupportedTypespecRange/UnsupportedTypespecRange.log @@ -99,7 +99,6 @@ range 2 struct_typespec 2 typespec_member 3 union_typespec 1 -unsupported_typespec 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -114,7 +113,6 @@ range 2 struct_typespec 2 typespec_member 3 union_typespec 1 -unsupported_typespec 1 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/UnsupportedTypespecRange/slpp_all/surelog.uhdm ... @@ -206,6 +204,8 @@ design: (unnamed) |vpiName:atype_t |vpiTypespec: \_packed_array_typespec: + |vpiParent: + \_typespec_member: (atype_t), line:10:47, endln:10:54 |vpiRange: \_range: , line:10:36, endln:10:41 |vpiParent: diff --git a/third_party/UHDM b/third_party/UHDM index 8f106c342d..640e1c4c28 160000 --- a/third_party/UHDM +++ b/third_party/UHDM @@ -1 +1 @@ -Subproject commit 8f106c342dce43f75e255251b95ebceb3f184f87 +Subproject commit 640e1c4c2824ef1a21b3c3a9d7881fa5934627c9 diff --git a/third_party/googletest b/third_party/googletest index 40412d8512..c875c4e224 160000 --- a/third_party/googletest +++ b/third_party/googletest @@ -1 +1 @@ -Subproject commit 40412d85124f7c6f3d88454583c4633e5e10fc8c +Subproject commit c875c4e2249ec124c24f72141b3780c22256fd44 diff --git a/third_party/tests/AmiqEth/AmiqEth.log b/third_party/tests/AmiqEth/AmiqEth.log index 26ecc5a56c..604624634e 100644 --- a/third_party/tests/AmiqEth/AmiqEth.log +++ b/third_party/tests/AmiqEth/AmiqEth.log @@ -1612,13 +1612,13 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv [INF:UH0706] Creating UHDM Model... === UHDM Object Stats Begin (Non-Elaborated Model) === -array_typespec 4907 -array_var 4662 +array_typespec 3996 +array_var 3751 assign_stmt 8663 assignment 26129 begin 27526 bit_select 8927 -bit_typespec 136132 +bit_typespec 92920 bit_var 4595 break_stmt 209 byte_typespec 531 @@ -1628,9 +1628,9 @@ case_stmt 393 chandle_typespec 18 chandle_var 2 class_defn 1256 -class_typespec 42973 -class_var 31170 -constant 418776 +class_typespec 35851 +class_var 23963 +constant 310370 constraint 19 continue_stmt 161 delay_control 208 @@ -1638,9 +1638,9 @@ design 1 disable 8 disable_fork 19 do_while 168 -enum_const 30160 -enum_typespec 3772 -enum_var 1550 +enum_const 21850 +enum_typespec 2941 +enum_var 1131 event_control 66 event_stmt 30 event_typespec 21 @@ -1651,20 +1651,20 @@ forever_stmt 50 fork_stmt 156 func_call 21524 function 14045 -hier_path 31746 +hier_path 31822 if_else 3494 if_stmt 18089 immediate_assert 18 -import_typespec 12 +import_typespec 14 include_file_info 332 indexed_part_select 241 initial 1 -int_typespec 49273 -int_var 6910 +int_typespec 36148 +int_var 6249 integer_typespec 190 integer_var 107 io_decl 22344 -logic_net 890 +logic_net 500 logic_typespec 439 logic_var 129 long_int_typespec 256 @@ -1674,24 +1674,24 @@ module_inst 91 named_begin 24 named_event 17 named_fork 17 -operation 43738 +operation 43319 package 14 packed_array_typespec 126 -param_assign 43624 -parameter 58937 +param_assign 26654 +parameter 41887 part_select 181 -range 140970 +range 96089 real_typespec 71 real_var 11 -ref_obj 172630 +ref_obj 171868 ref_var 6605 repeat 94 return_stmt 11549 -string_typespec 22451 -string_var 11171 +string_typespec 18695 +string_var 8639 struct_typespec 158 -struct_var 143 -sys_func_call 6525 +struct_var 142 +sys_func_call 6106 tagged_pattern 1 task 1518 task_call 78 diff --git a/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log b/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log index cf283257f0..6538c3b5de 100644 --- a/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log +++ b/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log @@ -870,14 +870,14 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/third_party/UVM/uvm-1.2/src/uvm_pkg.sv === UHDM Object Stats Begin (Non-Elaborated Model) === always 1 -array_typespec 1560 -array_var 1539 +array_typespec 1491 +array_var 1470 assert_stmt 32 assign_stmt 5509 assignment 15786 begin 16817 bit_select 5585 -bit_typespec 13318 +bit_typespec 14878 bit_var 2218 break_stmt 129 byte_typespec 244 @@ -887,9 +887,9 @@ case_stmt 211 chandle_typespec 14 chandle_var 2 class_defn 645 -class_typespec 17206 -class_var 9024 -constant 85044 +class_typespec 17241 +class_var 8974 +constant 88734 constraint 13 continue_stmt 124 cover 30 @@ -897,9 +897,9 @@ delay_control 135 design 1 disable_fork 17 do_while 96 -enum_const 5027 -enum_typespec 992 -enum_var 421 +enum_const 5327 +enum_typespec 1022 +enum_var 423 event_control 35 event_stmt 14 event_typespec 10 @@ -913,20 +913,20 @@ function 8542 gen_region 1 gen_scope 2 gen_scope_array 2 -hier_path 20404 +hier_path 20683 if_else 1980 if_stmt 10932 immediate_assert 9 -import_typespec 17 +import_typespec 19 include_file_info 200 indexed_part_select 121 initial 8 -int_typespec 7235 -int_var 2834 +int_typespec 7867 +int_var 3015 interface_inst 14 interface_typespec 3 io_decl 13178 -logic_net 640 +logic_net 692 logic_typespec 250 logic_var 92 long_int_typespec 179 @@ -936,27 +936,27 @@ module_inst 42 named_begin 18 named_event 8 named_fork 7 -operation 23859 +operation 23861 package 8 packed_array_typespec 8 -param_assign 2734 -parameter 4407 +param_assign 3226 +parameter 5309 part_select 123 port 9 property_spec 62 -range 13913 +range 15507 real_typespec 41 real_var 8 ref_module 5 -ref_obj 103716 +ref_obj 103999 ref_var 4666 repeat 76 return_stmt 6983 -string_typespec 7288 -string_var 3294 +string_typespec 7332 +string_var 3288 struct_typespec 110 -struct_var 107 -sys_func_call 3086 +struct_var 106 +sys_func_call 3088 tagged_pattern 1 task 1023 task_call 50 diff --git a/third_party/tests/ApbSlave/ApbSlave.log b/third_party/tests/ApbSlave/ApbSlave.log index 95fb6f1ee4..63d5782e8e 100644 --- a/third_party/tests/ApbSlave/ApbSlave.log +++ b/third_party/tests/ApbSlave/ApbSlave.log @@ -70,8 +70,8 @@ === UHDM Object Stats Begin (Non-Elaborated Model) === always 1 -array_typespec 8 -array_var 8 +array_typespec 7 +array_var 7 assign_stmt 36 assignment 79 begin 78 @@ -81,9 +81,9 @@ bit_var 7 case_item 3 case_stmt 1 class_defn 15 -class_typespec 41 -class_var 25 -constant 322 +class_typespec 42 +class_var 26 +constant 324 delay_control 6 design 1 disable_fork 4 @@ -100,14 +100,15 @@ function 64 hier_path 40 if_else 14 if_stmt 21 +import_typespec 1 include_file_info 8 initial 2 -int_typespec 26 -int_var 14 +int_typespec 27 +int_var 15 integer_typespec 7 integer_var 7 io_decl 55 -logic_net 49 +logic_net 51 logic_typespec 63 logic_var 11 method_func_call 67 @@ -124,8 +125,8 @@ ref_obj 397 ref_var 4 repeat 1 return_stmt 12 -string_typespec 52 -string_var 26 +string_typespec 53 +string_var 27 sys_func_call 91 task 30 task_call 21 diff --git a/third_party/tests/AzadiRTL/AzadiRTL.log b/third_party/tests/AzadiRTL/AzadiRTL.log index 89e43a9132..af0ac34ad0 100644 --- a/third_party/tests/AzadiRTL/AzadiRTL.log +++ b/third_party/tests/AzadiRTL/AzadiRTL.log @@ -21743,7 +21743,7 @@ case_stmt 178 class_defn 8 class_typespec 4 class_var 3 -constant 271726 +constant 274281 cont_assign 7035 delay_control 4 design 1 @@ -21764,11 +21764,11 @@ hier_path 5133 if_else 752 if_stmt 563 immediate_assert 23 -import_typespec 29 +import_typespec 34 include_file_info 10 indexed_part_select 222 initial 17 -int_typespec 11038 +int_typespec 12748 int_var 272 integer_typespec 256 integer_var 20 @@ -21785,12 +21785,12 @@ package 28 packed_array_net 3 packed_array_typespec 19096 packed_array_var 10 -param_assign 8677 -parameter 10391 +param_assign 9247 +parameter 11531 part_select 1757 port 13121 property_spec 31 -range 89011 +range 90001 ref_module 476 ref_obj 57554 ref_var 67 @@ -21825,7 +21825,7 @@ case_stmt 316 class_defn 8 class_typespec 4 class_var 3 -constant 273344 +constant 275899 cont_assign 15432 delay_control 8 design 1 @@ -21846,11 +21846,11 @@ hier_path 12348 if_else 2156 if_stmt 1619 immediate_assert 111 -import_typespec 29 +import_typespec 34 include_file_info 10 indexed_part_select 365 initial 92 -int_typespec 11038 +int_typespec 12748 int_var 528 integer_typespec 256 integer_var 78 @@ -21867,12 +21867,12 @@ package 28 packed_array_net 3 packed_array_typespec 19096 packed_array_var 18 -param_assign 11281 -parameter 10391 +param_assign 11851 +parameter 11531 part_select 2783 port 23276 property_spec 110 -range 90183 +range 91173 ref_module 476 ref_obj 124699 ref_var 95 diff --git a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log index 1c7c92d25b..29d35bf6d0 100644 --- a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log +++ b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log @@ -11,7 +11,7 @@ CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required): CMake that the project does not need compatibility with older versions. --- Configuring done (0.0s) +-- Configuring done (0.1s) -- Generating done (0.0s) -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser [100%] Generating preprocessing @@ -131,20 +131,20 @@ CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required): CMake that the project does not need compatibility with older versions. --- Configuring done (0.0s) +-- Configuring done (0.1s) -- Generating done (0.0s) -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess [ 6%] Generating 10_lsu_bus_intf.sv -[ 12%] Generating 11_ifu_bp_ctl.sv [ 18%] Generating 12_beh_lib.sv +[ 18%] Generating 11_ifu_bp_ctl.sv [ 25%] Generating 13_ifu_mem_ctl.sv [ 31%] Generating 14_mem_lib.sv [ 37%] Generating 15_exu.sv [ 43%] Generating 16_dec_decode_ctl.sv [ 50%] Generating 1_lsu_stbuf.sv [ 56%] Generating 2_ahb_to_axi4.sv -[ 62%] Generating 3_rvjtag_tap.sv -[ 68%] Generating 4_dec_tlu_ctl.sv +[ 62%] Generating 4_dec_tlu_ctl.sv +[ 68%] Generating 3_rvjtag_tap.sv [ 75%] Generating 5_lsu_bus_buffer.sv [ 81%] Generating 6_dbg.sv [ 87%] Generating 7_axi4_to_ahb.sv diff --git a/third_party/tests/Driver/Driver.log b/third_party/tests/Driver/Driver.log index 2f5e45934c..04f7f37ad9 100644 --- a/third_party/tests/Driver/Driver.log +++ b/third_party/tests/Driver/Driver.log @@ -793,13 +793,13 @@ there are 1 more instances of this message. [INF:UH0706] Creating UHDM Model... === UHDM Object Stats Begin (Non-Elaborated Model) === -array_typespec 685 -array_var 664 +array_typespec 623 +array_var 602 assign_stmt 3586 assignment 6339 begin 6842 bit_select 2128 -bit_typespec 3243 +bit_typespec 4595 bit_var 1202 break_stmt 53 byte_typespec 120 @@ -809,11 +809,11 @@ case_stmt 83 chandle_typespec 6 chandle_var 2 class_defn 628 -class_typespec 8662 -class_var 3445 +class_typespec 8768 +class_var 3466 clocking_block 2 clocking_io_decl 4 -constant 29046 +constant 32266 constraint 4 continue_stmt 52 delay_control 56 @@ -821,9 +821,9 @@ design 1 disable 2 disable_fork 7 do_while 51 -enum_const 589 -enum_typespec 100 -enum_var 192 +enum_const 849 +enum_typespec 126 +enum_var 198 event_control 21 event_stmt 10 event_typespec 12 @@ -834,20 +834,21 @@ forever_stmt 12 fork_stmt 35 func_call 5086 function 4766 -hier_path 8163 +hier_path 8319 if_else 824 if_stmt 4452 +import_typespec 3 include_file_info 175 indexed_part_select 41 initial 1 -int_typespec 2656 -int_var 1198 +int_typespec 3236 +int_var 1387 integer_typespec 5 integer_var 5 interface_inst 3 interface_typespec 1 io_decl 6955 -logic_net 251 +logic_net 305 logic_typespec 90 logic_var 42 long_int_typespec 99 @@ -857,26 +858,26 @@ module_inst 31 named_begin 8 named_event 8 named_fork 5 -operation 10042 +operation 10048 package 6 packed_array_typespec 8 -param_assign 509 -parameter 755 +param_assign 919 +parameter 1493 part_select 43 port 7 -range 3063 +range 4453 real_typespec 33 real_var 8 ref_module 1 -ref_obj 41607 +ref_obj 41775 ref_var 1795 repeat 30 return_stmt 3301 -string_typespec 3307 -string_var 1432 +string_typespec 3378 +string_var 1454 struct_typespec 14 -struct_var 35 -sys_func_call 1350 +struct_var 34 +sys_func_call 1356 tagged_pattern 1 task 603 task_call 26 diff --git a/third_party/tests/Monitor/Monitor.log b/third_party/tests/Monitor/Monitor.log index 3ff35d2659..622a356e42 100644 --- a/third_party/tests/Monitor/Monitor.log +++ b/third_party/tests/Monitor/Monitor.log @@ -861,13 +861,13 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/third_party/UVM/1800.2-2017-1.0/src/uvm_pk [INF:UH0706] Creating UHDM Model... === UHDM Object Stats Begin (Non-Elaborated Model) === -array_typespec 1138 -array_var 1117 +array_typespec 1076 +array_var 1055 assign_stmt 4660 assignment 11190 begin 12089 bit_select 3949 -bit_typespec 7576 +bit_typespec 9136 bit_var 1730 break_stmt 91 byte_typespec 182 @@ -877,11 +877,11 @@ case_stmt 147 chandle_typespec 10 chandle_var 2 class_defn 648 -class_typespec 13116 -class_var 6222 +class_typespec 13221 +class_var 6242 clocking_block 2 clocking_io_decl 4 -constant 55568 +constant 59294 constraint 8 continue_stmt 88 delay_control 99 @@ -889,9 +889,9 @@ design 1 disable 2 disable_fork 15 do_while 74 -enum_const 2687 -enum_typespec 537 -enum_var 314 +enum_const 2987 +enum_typespec 567 +enum_var 320 event_control 22 event_stmt 12 event_typespec 12 @@ -902,22 +902,22 @@ forever_stmt 18 fork_stmt 69 func_call 9578 function 6840 -hier_path 14068 +hier_path 14301 if_else 1436 if_stmt 7735 immediate_assert 9 -import_typespec 4 +import_typespec 8 include_file_info 245 indexed_part_select 81 initial 2 -int_typespec 4797 -int_var 2063 +int_typespec 5437 +int_var 2252 integer_typespec 5 integer_var 5 interface_inst 4 interface_typespec 2 io_decl 10201 -logic_net 332 +logic_net 412 logic_typespec 152 logic_var 61 long_int_typespec 139 @@ -927,26 +927,26 @@ module_inst 34 named_begin 14 named_event 8 named_fork 7 -operation 17102 +operation 17108 package 8 packed_array_typespec 8 -param_assign 1298 -parameter 2108 +param_assign 1790 +parameter 2969 part_select 83 port 7 -range 7775 +range 9377 real_typespec 37 real_var 8 ref_module 1 -ref_obj 73075 +ref_obj 73320 ref_var 3347 repeat 50 return_stmt 5240 -string_typespec 5431 -string_var 2419 +string_typespec 5505 +string_var 2440 struct_typespec 62 -struct_var 71 -sys_func_call 2300 +struct_var 70 +sys_func_call 2306 tagged_pattern 1 task 830 task_call 44 diff --git a/third_party/tests/NyuziProcessor/NyuziProcessor.log b/third_party/tests/NyuziProcessor/NyuziProcessor.log index 21ab6e34f7..e89805f054 100644 --- a/third_party/tests/NyuziProcessor/NyuziProcessor.log +++ b/third_party/tests/NyuziProcessor/NyuziProcessor.log @@ -1732,7 +1732,7 @@ case_stmt 141 class_defn 8 class_typespec 4 class_var 3 -constant 120721 +constant 142465 cont_assign 2227 design 1 enum_const 13507 @@ -1752,10 +1752,11 @@ hier_path 2878 if_else 936 if_stmt 328 immediate_assert 239 +import_typespec 50 include_file_info 100 indexed_part_select 689 initial 16 -int_typespec 54152 +int_typespec 90332 int_var 92 integer_typespec 121 integer_var 1 @@ -1764,29 +1765,29 @@ interface_inst 48 interface_typespec 118 io_decl 831 logic_net 3881 -logic_typespec 20291 +logic_typespec 21311 logic_var 2684 modport 77 module_array 3 module_inst 1041 module_typespec 3 named_begin 8 -operation 23183 +operation 24393 package 102 packed_array_typespec 2304 -param_assign 30076 -parameter 43737 +param_assign 52536 +parameter 76397 part_select 435 port 3931 -range 17699 +range 18719 ref_module 187 -ref_obj 30781 +ref_obj 33674 string_typespec 84 string_var 1 struct_net 81 struct_typespec 1115 struct_var 77 -sys_func_call 2213 +sys_func_call 2663 task 13 task_call 11 typespec_member 7610 @@ -1811,7 +1812,7 @@ case_stmt 434 class_defn 8 class_typespec 4 class_var 3 -constant 121966 +constant 144487 cont_assign 5561 design 1 enum_const 13512 @@ -1831,10 +1832,11 @@ hier_path 7248 if_else 3353 if_stmt 1263 immediate_assert 691 +import_typespec 50 include_file_info 100 indexed_part_select 1611 initial 189 -int_typespec 54152 +int_typespec 90332 int_var 253 integer_typespec 121 integer_var 1 @@ -1843,29 +1845,29 @@ interface_inst 48 interface_typespec 118 io_decl 845 logic_net 3881 -logic_typespec 20291 +logic_typespec 21311 logic_var 6026 modport 77 module_array 3 module_inst 1209 module_typespec 3 named_begin 50 -operation 44052 +operation 46039 package 102 packed_array_typespec 2304 -param_assign 46058 -parameter 43737 +param_assign 84058 +parameter 76397 part_select 1179 port 7513 -range 18761 +range 19781 ref_module 187 -ref_obj 87689 +ref_obj 90582 string_typespec 84 string_var 1 struct_net 81 struct_typespec 1115 struct_var 135 -sys_func_call 3175 +sys_func_call 3625 task 26 task_call 22 typespec_member 7610 diff --git a/third_party/tests/OVMSwitch/OVMSwitch.log b/third_party/tests/OVMSwitch/OVMSwitch.log index 7dc9b5091b..ae00798277 100644 --- a/third_party/tests/OVMSwitch/OVMSwitch.log +++ b/third_party/tests/OVMSwitch/OVMSwitch.log @@ -720,25 +720,25 @@ there are 7 more instances of this message. === UHDM Object Stats Begin (Non-Elaborated Model) === always 13 array_net 5 -array_typespec 253 -array_var 234 +array_typespec 334 +array_var 315 assign_stmt 1209 assignment 2940 begin 2825 bit_select 963 -bit_typespec 991 -bit_var 646 +bit_typespec 1091 +bit_var 721 break_stmt 21 byte_typespec 90 byte_var 26 case_item 350 case_stmt 64 class_defn 549 -class_typespec 3797 -class_var 2008 +class_typespec 4647 +class_var 2854 clocking_block 10 clocking_io_decl 30 -constant 11825 +constant 13643 constraint 6 cont_assign 90 delay_control 49 @@ -757,26 +757,27 @@ for_stmt 138 foreach_stmt 139 forever_stmt 11 fork_stmt 25 -func_call 2003 +func_call 2103 function 2386 -hier_path 3404 +hier_path 3420 if_else 507 if_stmt 1797 immediate_assert 7 +import_typespec 1 include_file_info 128 indexed_part_select 32 initial 2 -int_typespec 4534 -int_var 721 +int_typespec 7413 +int_var 835 integer_typespec 129 integer_var 75 interface_inst 17 interface_typespec 6 io_decl 3594 -logic_net 425 +logic_net 474 logic_typespec 356 logic_var 35 -method_func_call 3512 +method_func_call 3687 modport 17 module_array 1 module_inst 51 @@ -784,24 +785,24 @@ module_typespec 1 named_begin 1 named_event 6 named_fork 4 -operation 5315 +operation 5340 package 4 packed_array_typespec 6 -param_assign 1310 -parameter 2358 +param_assign 2444 +parameter 4584 part_select 8 port 73 -range 859 +range 1088 real_typespec 18 real_var 3 ref_module 3 -ref_obj 18999 +ref_obj 19065 ref_var 388 repeat 6 return_stmt 1617 -string_typespec 2573 -string_var 1007 -sys_func_call 727 +string_typespec 3110 +string_var 1216 +sys_func_call 752 task 255 task_call 19 time_typespec 81 diff --git a/third_party/tests/Opentitan/Earlgrey.log b/third_party/tests/Opentitan/Earlgrey.log index c19cdfbbb7..f520dad353 100644 --- a/third_party/tests/Opentitan/Earlgrey.log +++ b/third_party/tests/Opentitan/Earlgrey.log @@ -39276,7 +39276,7 @@ Instance tree: === UHDM Object Stats Begin (Non-Elaborated Model) === always 808 array_net 23 -array_typespec 539 +array_typespec 559 array_var 229 assert_stmt 2 assign_stmt 235 @@ -39289,7 +39289,7 @@ case_stmt 132 class_defn 8 class_typespec 4 class_var 3 -constant 211765 +constant 212807 cont_assign 13781 design 1 enum_const 2016 @@ -39307,29 +39307,29 @@ gen_scope_array 5350 hier_path 11769 if_else 1316 if_stmt 983 -import_typespec 91 +import_typespec 92 indexed_part_select 624 -int_typespec 15545 +int_typespec 15552 int_var 318 integer_typespec 310 integer_var 2 io_decl 149 logic_net 20837 -logic_typespec 48767 +logic_typespec 48983 logic_var 9306 module_inst 4525 named_begin 354 -operation 70745 +operation 70788 package 52 packed_array_net 8 packed_array_typespec 133 packed_array_var 10 -param_assign 11765 -parameter 13968 +param_assign 11855 +parameter 14119 part_select 1855 port 29628 property_spec 2 -range 35451 +range 35693 ref_module 1426 ref_obj 112360 ref_var 51 @@ -39350,7 +39350,7 @@ var_select 258 === UHDM Object Stats Begin (Elaborated Model) === always 4380 array_net 23 -array_typespec 782 +array_typespec 802 array_var 373 assert_stmt 4 assign_stmt 1430 @@ -39363,7 +39363,7 @@ case_stmt 336 class_defn 8 class_typespec 4 class_var 3 -constant 215381 +constant 216423 cont_assign 30746 design 1 enum_const 2021 @@ -39381,29 +39381,29 @@ gen_scope_array 9785 hier_path 27194 if_else 6097 if_stmt 3760 -import_typespec 91 +import_typespec 92 indexed_part_select 2143 -int_typespec 15545 +int_typespec 15552 int_var 1335 integer_typespec 310 integer_var 518 io_decl 2054 logic_net 20837 -logic_typespec 48771 +logic_typespec 48987 logic_var 14989 module_inst 4960 named_begin 736 -operation 133339 +operation 133382 package 52 packed_array_net 8 packed_array_typespec 133 packed_array_var 10 -param_assign 15803 -parameter 13968 +param_assign 15893 +parameter 14119 part_select 4274 port 51234 property_spec 4 -range 38415 +range 38657 ref_module 1426 ref_obj 265298 ref_var 51 diff --git a/third_party/tests/Opentitan/Opentitan.log b/third_party/tests/Opentitan/Opentitan.log index 4e955f80f8..86aff9c988 100644 --- a/third_party/tests/Opentitan/Opentitan.log +++ b/third_party/tests/Opentitan/Opentitan.log @@ -8312,7 +8312,7 @@ there are 1 more instances of this message. === UHDM Object Stats Begin (Non-Elaborated Model) === always 814 array_net 23 -array_typespec 1201 +array_typespec 1221 array_var 870 assert_stmt 526 assign_stmt 3789 @@ -8332,7 +8332,7 @@ chandle_var 2 class_defn 613 class_typespec 8456 class_var 3302 -constant 246274 +constant 247316 constraint 4 cont_assign 13810 continue_stmt 52 @@ -8364,18 +8364,18 @@ hier_path 20338 if_else 2138 if_stmt 5411 immediate_assert 651 -import_typespec 93 +import_typespec 94 include_file_info 153 indexed_part_select 669 initial 136 -int_typespec 18510 +int_typespec 18517 int_var 1511 integer_typespec 325 integer_var 2 interface_inst 5 io_decl 7058 logic_net 20864 -logic_typespec 48890 +logic_typespec 49106 logic_var 9369 long_int_typespec 99 long_int_var 18 @@ -8384,18 +8384,18 @@ module_inst 4553 named_begin 370 named_event 8 named_fork 3 -operation 84036 +operation 84079 package 54 packed_array_net 8 packed_array_typespec 144 packed_array_var 12 -param_assign 12000 -parameter 14738 +param_assign 12090 +parameter 14889 part_select 1898 port 29632 property_inst 4 property_spec 641 -range 37502 +range 37744 real_typespec 33 real_var 8 ref_module 1427 @@ -8427,7 +8427,7 @@ while_stmt 108 === UHDM Object Stats Begin (Elaborated Model) === always 4396 array_net 23 -array_typespec 1447 +array_typespec 1467 array_var 5403 assert_stmt 4393 assign_stmt 11571 @@ -8447,7 +8447,7 @@ chandle_var 2 class_defn 613 class_typespec 9904 class_var 21999 -constant 250203 +constant 251245 constraint 10 cont_assign 30814 continue_stmt 173 @@ -8479,18 +8479,18 @@ hier_path 81430 if_else 9050 if_stmt 34803 immediate_assert 2589 -import_typespec 93 +import_typespec 94 include_file_info 153 indexed_part_select 2254 initial 529 -int_typespec 18522 +int_typespec 18529 int_var 9865 integer_typespec 325 integer_var 518 interface_inst 7 io_decl 57608 logic_net 20864 -logic_typespec 48894 +logic_typespec 49110 logic_var 15192 long_int_typespec 99 long_int_var 161 @@ -8500,18 +8500,18 @@ module_inst 4988 named_begin 768 named_event 50 named_fork 10 -operation 204096 +operation 204139 package 54 packed_array_net 8 packed_array_typespec 144 packed_array_var 14 -param_assign 16087 -parameter 14742 +param_assign 16177 +parameter 14893 part_select 4379 port 51240 property_inst 8 property_spec 4755 -range 42273 +range 42515 real_typespec 33 real_var 10 ref_module 1427 diff --git a/third_party/tests/Rp32/rp32.log b/third_party/tests/Rp32/rp32.log index 99f313d082..6a30e396e1 100644 --- a/third_party/tests/Rp32/rp32.log +++ b/third_party/tests/Rp32/rp32.log @@ -410,12 +410,12 @@ case_stmt 50 class_defn 8 class_typespec 4 class_var 3 -constant 7100 -cont_assign 172 +constant 7922 +cont_assign 220 design 1 -enum_const 482 -enum_typespec 57 -enum_var 60 +enum_const 532 +enum_typespec 62 +enum_var 100 event_control 15 for_stmt 1 func_call 23 @@ -427,6 +427,7 @@ gen_scope_array 30 hier_path 839 if_else 25 if_stmt 31 +import_typespec 7 int_typespec 169 int_var 17 integer_typespec 23 @@ -434,33 +435,33 @@ interface_array 2 interface_inst 13 interface_typespec 21 io_decl 235 -logic_net 417 -logic_typespec 1225 -logic_var 210 +logic_net 561 +logic_typespec 1528 +logic_var 245 modport 22 module_array 7 module_inst 80 module_typespec 7 named_begin 31 -operation 2276 +operation 2487 package 6 packed_array_typespec 2 param_assign 158 parameter 163 part_select 80 port 438 -range 1092 +range 1359 ref_module 25 -ref_obj 5940 +ref_obj 6413 return_stmt 2 -string_typespec 752 -struct_net 52 -struct_typespec 1161 -struct_var 79 +string_typespec 1330 +struct_net 100 +struct_typespec 1209 +struct_var 114 sys_func_call 54 -tagged_pattern 741 +tagged_pattern 1319 task 9 -typespec_member 6883 +typespec_member 7051 union_typespec 6 union_var 1 unsupported_typespec 15 @@ -482,12 +483,12 @@ case_stmt 249 class_defn 8 class_typespec 4 class_var 3 -constant 7822 -cont_assign 247 +constant 8644 +cont_assign 319 design 1 -enum_const 487 -enum_typespec 58 -enum_var 88 +enum_const 537 +enum_typespec 63 +enum_var 128 event_control 26 for_stmt 2 func_call 66 @@ -499,6 +500,7 @@ gen_scope_array 45 hier_path 4681 if_else 95 if_stmt 190 +import_typespec 7 int_typespec 169 int_var 18 integer_typespec 23 @@ -506,33 +508,33 @@ interface_array 2 interface_inst 13 interface_typespec 21 io_decl 428 -logic_net 417 -logic_typespec 1225 -logic_var 214 +logic_net 561 +logic_typespec 1528 +logic_var 249 modport 22 module_array 7 module_inst 84 module_typespec 7 named_begin 32 -operation 5947 +operation 6182 package 6 packed_array_typespec 2 param_assign 158 parameter 163 part_select 217 port 542 -range 1096 +range 1363 ref_module 25 -ref_obj 20568 +ref_obj 21113 return_stmt 16 -string_typespec 752 -struct_net 52 -struct_typespec 1161 -struct_var 107 +string_typespec 1330 +struct_net 100 +struct_typespec 1209 +struct_var 142 sys_func_call 148 -tagged_pattern 741 +tagged_pattern 1319 task 18 -typespec_member 6883 +typespec_member 7051 union_typespec 6 union_var 1 unsupported_typespec 15 diff --git a/third_party/tests/Scoreboard/Scoreboard.log b/third_party/tests/Scoreboard/Scoreboard.log index d92cc6563e..d35b04af2b 100644 --- a/third_party/tests/Scoreboard/Scoreboard.log +++ b/third_party/tests/Scoreboard/Scoreboard.log @@ -781,13 +781,13 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/third_party/UVM/uvm-1.2/src/uvm_pkg.sv [INF:UH0706] Creating UHDM Model... === UHDM Object Stats Begin (Non-Elaborated Model) === -array_typespec 671 -array_var 650 +array_typespec 599 +array_var 578 assign_stmt 3577 assignment 6324 begin 6823 bit_select 2126 -bit_typespec 2354 +bit_typespec 2666 bit_var 1197 break_stmt 53 byte_typespec 120 @@ -797,18 +797,18 @@ case_stmt 83 chandle_typespec 6 chandle_var 2 class_defn 622 -class_typespec 8519 -class_var 3345 -constant 26880 +class_typespec 8538 +class_var 3279 +constant 27609 constraint 4 continue_stmt 52 delay_control 56 design 1 disable_fork 8 do_while 51 -enum_const 419 -enum_typespec 83 -enum_var 187 +enum_const 479 +enum_typespec 89 +enum_var 188 event_control 17 event_stmt 10 event_typespec 12 @@ -819,17 +819,18 @@ forever_stmt 11 fork_stmt 37 func_call 5083 function 4752 -hier_path 8062 +hier_path 8102 if_else 822 if_stmt 4432 +import_typespec 2 include_file_info 174 indexed_part_select 41 -int_typespec 2384 -int_var 1186 +int_typespec 2655 +int_var 1366 integer_typespec 6 integer_var 6 io_decl 6943 -logic_net 10 +logic_net 12 logic_typespec 78 logic_var 42 long_int_typespec 99 @@ -839,24 +840,24 @@ module_inst 30 named_begin 9 named_event 8 named_fork 3 -operation 10023 +operation 10024 package 6 packed_array_typespec 8 -param_assign 224 -parameter 263 +param_assign 306 +parameter 427 part_select 43 -range 2142 +range 2462 real_typespec 33 real_var 8 -ref_obj 41393 +ref_obj 41435 ref_var 1793 repeat 26 return_stmt 3287 -string_typespec 3229 -string_var 1395 +string_typespec 3243 +string_var 1384 struct_typespec 14 -struct_var 35 -sys_func_call 1351 +struct_var 34 +sys_func_call 1352 tagged_pattern 1 task 601 task_call 23 diff --git a/third_party/tests/SimpleOVM/SimpleOVM.log b/third_party/tests/SimpleOVM/SimpleOVM.log index 38a442f633..87f6ed1693 100644 --- a/third_party/tests/SimpleOVM/SimpleOVM.log +++ b/third_party/tests/SimpleOVM/SimpleOVM.log @@ -645,8 +645,8 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv [INF:UH0706] Creating UHDM Model... === UHDM Object Stats Begin (Non-Elaborated Model) === -array_typespec 142 -array_var 126 +array_typespec 123 +array_var 107 assign_stmt 1150 assignment 2675 begin 2597 @@ -660,8 +660,8 @@ case_item 326 case_stmt 59 class_defn 525 class_typespec 2795 -class_var 1089 -constant 8899 +class_var 1085 +constant 8948 constraint 3 delay_control 26 design 1 @@ -681,14 +681,15 @@ forever_stmt 6 fork_stmt 24 func_call 1811 function 2316 -hier_path 3098 +hier_path 3106 if_else 464 if_stmt 1695 immediate_assert 4 +import_typespec 1 include_file_info 119 indexed_part_select 32 -int_typespec 1623 -int_var 623 +int_typespec 1767 +int_var 662 integer_typespec 110 integer_var 65 io_decl 3530 @@ -701,18 +702,18 @@ named_fork 4 operation 4767 package 4 packed_array_typespec 6 -param_assign 186 -parameter 186 +param_assign 228 +parameter 270 part_select 8 -range 420 +range 423 real_typespec 18 real_var 3 -ref_obj 17287 +ref_obj 17295 ref_var 359 repeat 2 return_stmt 1573 -string_typespec 1989 -string_var 756 +string_typespec 1998 +string_var 740 sys_func_call 647 task 247 task_call 18 diff --git a/third_party/tests/SimpleUVM/SimpleUVM.log b/third_party/tests/SimpleUVM/SimpleUVM.log index 64521e640c..5edac17048 100644 --- a/third_party/tests/SimpleUVM/SimpleUVM.log +++ b/third_party/tests/SimpleUVM/SimpleUVM.log @@ -758,13 +758,13 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/third_party/UVM/uvm-1.2/src/uvm_pkg.sv === UHDM Object Stats Begin (Non-Elaborated Model) === always 1 -array_typespec 666 -array_var 645 +array_typespec 597 +array_var 576 assign_stmt 3547 assignment 6293 begin 6779 bit_select 2126 -bit_typespec 2554 +bit_typespec 3074 bit_var 1191 break_stmt 53 byte_typespec 120 @@ -774,20 +774,20 @@ case_stmt 83 chandle_typespec 6 chandle_var 2 class_defn 615 -class_typespec 8514 -class_var 3338 +class_typespec 8549 +class_var 3288 clocking_block 1 clocking_io_decl 4 -constant 27315 +constant 28556 constraint 4 continue_stmt 52 delay_control 54 design 1 disable_fork 5 do_while 51 -enum_const 451 -enum_typespec 83 -enum_var 184 +enum_const 551 +enum_typespec 93 +enum_var 186 event_control 17 event_stmt 10 event_typespec 10 @@ -798,19 +798,20 @@ forever_stmt 12 fork_stmt 31 func_call 5091 function 4694 -hier_path 8070 +hier_path 8148 if_else 812 if_stmt 4425 immediate_assert 1 +import_typespec 1 include_file_info 166 indexed_part_select 41 initial 3 -int_typespec 2435 -int_var 1180 +int_typespec 2767 +int_var 1361 interface_inst 1 interface_typespec 1 io_decl 6908 -logic_net 218 +logic_net 244 logic_typespec 93 logic_var 39 long_int_typespec 99 @@ -820,26 +821,26 @@ module_inst 32 named_begin 6 named_event 8 named_fork 3 -operation 10000 +operation 10002 package 4 packed_array_typespec 8 -param_assign 304 -parameter 386 +param_assign 468 +parameter 673 part_select 43 port 16 -range 2362 +range 2896 real_typespec 33 real_var 8 ref_module 1 -ref_obj 41246 +ref_obj 41328 ref_var 1788 repeat 27 return_stmt 3272 -string_typespec 3194 -string_var 1375 +string_typespec 3218 +string_var 1369 struct_typespec 14 -struct_var 35 -sys_func_call 1271 +struct_var 34 +sys_func_call 1273 tagged_pattern 1 task 584 task_call 18 diff --git a/third_party/tests/SimpleVMM/SimpleVMM.log b/third_party/tests/SimpleVMM/SimpleVMM.log index d6eaa69475..49cff720b7 100644 --- a/third_party/tests/SimpleVMM/SimpleVMM.log +++ b/third_party/tests/SimpleVMM/SimpleVMM.log @@ -196,8 +196,8 @@ [INF:UH0706] Creating UHDM Model... === UHDM Object Stats Begin (Non-Elaborated Model) === -array_typespec 87 -array_var 87 +array_typespec 92 +array_var 92 assign_stmt 280 assignment 654 begin 1034 @@ -210,8 +210,8 @@ byte_var 1 case_item 42 case_stmt 9 class_defn 56 -class_typespec 362 -class_var 192 +class_typespec 587 +class_var 333 constant 3353 continue_stmt 12 design 1 @@ -234,8 +234,8 @@ hier_path 1065 if_else 87 if_stmt 650 include_file_info 28 -int_typespec 560 -int_var 294 +int_typespec 555 +int_var 289 integer_typespec 1 integer_var 1 io_decl 911 @@ -249,7 +249,7 @@ package 2 part_select 14 range 184 ref_obj 3929 -ref_var 317 +ref_var 176 return_stmt 278 string_typespec 568 string_var 247 @@ -257,7 +257,7 @@ sys_func_call 272 task 83 time_typespec 9 time_var 7 -unsupported_typespec 355 +unsupported_typespec 130 var_select 214 while_stmt 13 === UHDM Object Stats End === diff --git a/third_party/tests/UVMSwitch/UVMSwitch.log b/third_party/tests/UVMSwitch/UVMSwitch.log index c14d8ba708..037eb689e1 100644 --- a/third_party/tests/UVMSwitch/UVMSwitch.log +++ b/third_party/tests/UVMSwitch/UVMSwitch.log @@ -6915,13 +6915,13 @@ Instance tree: === UHDM Object Stats Begin (Non-Elaborated Model) === always 13 array_net 5 -array_typespec 739 -array_var 705 +array_typespec 716 +array_var 682 assign_stmt 3601 assignment 6523 begin 6997 bit_select 2244 -bit_typespec 6516 +bit_typespec 10624 bit_var 1215 break_stmt 54 byte_typespec 131 @@ -6931,11 +6931,11 @@ case_stmt 90 chandle_typespec 6 chandle_var 2 class_defn 637 -class_typespec 9016 -class_var 3796 +class_typespec 9442 +class_var 4137 clocking_block 10 clocking_io_decl 30 -constant 37543 +constant 47225 constraint 7 cont_assign 90 continue_stmt 52 @@ -6943,9 +6943,9 @@ delay_control 76 design 1 disable_fork 5 do_while 51 -enum_const 1143 -enum_typespec 153 -enum_var 208 +enum_const 1933 +enum_typespec 232 +enum_var 233 event_control 50 event_stmt 10 event_typespec 10 @@ -6956,21 +6956,22 @@ forever_stmt 16 fork_stmt 32 func_call 5169 function 4762 -hier_path 8308 +hier_path 8386 if_else 873 if_stmt 4542 immediate_assert 3 +import_typespec 1 include_file_info 175 indexed_part_select 41 initial 2 -int_typespec 3566 -int_var 1240 +int_typespec 4979 +int_var 1467 integer_typespec 17 integer_var 9 interface_inst 17 interface_typespec 6 io_decl 6968 -logic_net 473 +logic_net 499 logic_typespec 351 logic_var 44 long_int_typespec 99 @@ -6983,26 +6984,26 @@ module_typespec 1 named_begin 7 named_event 8 named_fork 3 -operation 10493 +operation 10518 package 4 packed_array_typespec 8 -param_assign 1279 -parameter 2302 +param_assign 2386 +parameter 4475 part_select 43 port 73 -range 6605 +range 10842 real_typespec 33 real_var 8 ref_module 3 -ref_obj 42723 +ref_obj 42851 ref_var 1821 repeat 30 return_stmt 3331 -string_typespec 3470 -string_var 1539 +string_typespec 3724 +string_var 1671 struct_typespec 14 -struct_var 35 -sys_func_call 1326 +struct_var 34 +sys_func_call 1351 tagged_pattern 1 task 591 task_call 18