From 7e6cd4d5416babf95e462b903a1e47326abeca52 Mon Sep 17 00:00:00 2001
From: Alain Dargelas <alain.dargelas@gmail.com>
Date: Mon, 21 Aug 2023 21:10:18 -0700
Subject: [PATCH] tests

---
 tests/FuncInModule/FuncInModule.log       | 3887 +++++++++++++++++++++
 tests/FuncInModule/FuncInModule.sl        |    1 +
 tests/FuncInModule/dut.sv                 |   71 +
 tests/LogicArrayParam/LogicArrayParam.log | 2746 +++++++++++++++
 tests/LogicArrayParam/LogicArrayParam.sl  |    1 +
 tests/LogicArrayParam/dut.sv              |  108 +
 6 files changed, 6814 insertions(+)
 create mode 100644 tests/FuncInModule/FuncInModule.log
 create mode 100644 tests/FuncInModule/FuncInModule.sl
 create mode 100644 tests/FuncInModule/dut.sv
 create mode 100644 tests/LogicArrayParam/LogicArrayParam.log
 create mode 100644 tests/LogicArrayParam/LogicArrayParam.sl
 create mode 100644 tests/LogicArrayParam/dut.sv

diff --git a/tests/FuncInModule/FuncInModule.log b/tests/FuncInModule/FuncInModule.log
new file mode 100644
index 0000000000..79b2810b14
--- /dev/null
+++ b/tests/FuncInModule/FuncInModule.log
@@ -0,0 +1,3887 @@
+[INF:CM0023] Creating log file ${SURELOG_DIR}/build/regression/FuncInModule/slpp_all/surelog.log.
+
+AST_DEBUG_BEGIN
+LIB:  work
+FILE: ${SURELOG_DIR}/tests/FuncInModule/dut.sv
+n<> u<0> t<_INVALID_> f<0> l<0:0>
+n<> u<1> t<Null_rule> p<993> s<992> l<2:1> el<1:2>
+n<module> u<2> t<Module_keyword> p<35> s<3> l<2:1> el<2:7>
+n<rggen_or_reducer> u<3> t<StringConst> p<35> s<32> l<2:8> el<2:24>
+n<> u<4> t<IntegerAtomType_Int> p<5> l<3:13> el<3:16>
+n<> u<5> t<Data_type> p<6> c<4> l<3:13> el<3:16>
+n<> u<6> t<Data_type_or_implicit> p<16> c<5> s<15> l<3:13> el<3:16>
+n<WIDTH> u<7> t<StringConst> p<14> s<13> l<3:17> el<3:22>
+n<2> u<8> t<IntConst> p<9> l<3:25> el<3:26>
+n<> u<9> t<Primary_literal> p<10> c<8> l<3:25> el<3:26>
+n<> u<10> t<Constant_primary> p<11> c<9> l<3:25> el<3:26>
+n<> u<11> t<Constant_expression> p<12> c<10> l<3:25> el<3:26>
+n<> u<12> t<Constant_mintypmax_expression> p<13> c<11> l<3:25> el<3:26>
+n<> u<13> t<Constant_param_expression> p<14> c<12> l<3:25> el<3:26>
+n<> u<14> t<Param_assignment> p<15> c<7> l<3:17> el<3:26>
+n<> u<15> t<List_of_param_assignments> p<16> c<14> l<3:17> el<3:26>
+n<> u<16> t<Parameter_declaration> p<17> c<6> l<3:3> el<3:26>
+n<> u<17> t<Parameter_port_declaration> p<32> c<16> s<31> l<3:3> el<3:26>
+n<> u<18> t<IntegerAtomType_Int> p<19> l<4:13> el<4:16>
+n<> u<19> t<Data_type> p<20> c<18> l<4:13> el<4:16>
+n<> u<20> t<Data_type_or_implicit> p<30> c<19> s<29> l<4:13> el<4:16>
+n<N> u<21> t<StringConst> p<28> s<27> l<4:17> el<4:18>
+n<4> u<22> t<IntConst> p<23> l<4:25> el<4:26>
+n<> u<23> t<Primary_literal> p<24> c<22> l<4:25> el<4:26>
+n<> u<24> t<Constant_primary> p<25> c<23> l<4:25> el<4:26>
+n<> u<25> t<Constant_expression> p<26> c<24> l<4:25> el<4:26>
+n<> u<26> t<Constant_mintypmax_expression> p<27> c<25> l<4:25> el<4:26>
+n<> u<27> t<Constant_param_expression> p<28> c<26> l<4:25> el<4:26>
+n<> u<28> t<Param_assignment> p<29> c<21> l<4:17> el<4:26>
+n<> u<29> t<List_of_param_assignments> p<30> c<28> l<4:17> el<4:26>
+n<> u<30> t<Parameter_declaration> p<31> c<20> l<4:3> el<4:26>
+n<> u<31> t<Parameter_port_declaration> p<32> c<30> l<4:3> el<4:26>
+n<> u<32> t<Parameter_port_list> p<35> c<17> s<34> l<2:25> el<5:2>
+n<> u<33> t<Port> p<34> l<8:1> el<7:48>
+n<> u<34> t<List_of_ports> p<35> c<33> l<5:2> el<8:2>
+n<> u<35> t<Module_nonansi_header> p<990> c<2> s<415> l<2:1> el<8:3>
+n<> u<36> t<Lifetime_Automatic> p<409> s<408> l<10:12> el<10:21>
+n<> u<37> t<IntVec_TypeBit> p<64> s<53> l<10:22> el<10:25>
+n<N> u<38> t<StringConst> p<39> l<10:27> el<10:28>
+n<> u<39> t<Primary_literal> p<40> c<38> l<10:27> el<10:28>
+n<> u<40> t<Constant_primary> p<41> c<39> l<10:27> el<10:28>
+n<> u<41> t<Constant_expression> p<47> c<40> s<46> l<10:27> el<10:28>
+n<1> u<42> t<IntConst> p<43> l<10:29> el<10:30>
+n<> u<43> t<Primary_literal> p<44> c<42> l<10:29> el<10:30>
+n<> u<44> t<Constant_primary> p<45> c<43> l<10:29> el<10:30>
+n<> u<45> t<Constant_expression> p<47> c<44> l<10:29> el<10:30>
+n<> u<46> t<BinOp_Minus> p<47> s<45> l<10:28> el<10:29>
+n<> u<47> t<Constant_expression> p<52> c<41> s<51> l<10:27> el<10:30>
+n<0> u<48> t<IntConst> p<49> l<10:31> el<10:32>
+n<> u<49> t<Primary_literal> p<50> c<48> l<10:31> el<10:32>
+n<> u<50> t<Constant_primary> p<51> c<49> l<10:31> el<10:32>
+n<> u<51> t<Constant_expression> p<52> c<50> l<10:31> el<10:32>
+n<> u<52> t<Constant_range> p<53> c<47> l<10:27> el<10:32>
+n<> u<53> t<Packed_dimension> p<64> c<52> s<63> l<10:26> el<10:33>
+n<15> u<54> t<IntConst> p<55> l<10:34> el<10:36>
+n<> u<55> t<Primary_literal> p<56> c<54> l<10:34> el<10:36>
+n<> u<56> t<Constant_primary> p<57> c<55> l<10:34> el<10:36>
+n<> u<57> t<Constant_expression> p<62> c<56> s<61> l<10:34> el<10:36>
+n<0> u<58> t<IntConst> p<59> l<10:37> el<10:38>
+n<> u<59> t<Primary_literal> p<60> c<58> l<10:37> el<10:38>
+n<> u<60> t<Constant_primary> p<61> c<59> l<10:37> el<10:38>
+n<> u<61> t<Constant_expression> p<62> c<60> l<10:37> el<10:38>
+n<> u<62> t<Constant_range> p<63> c<57> l<10:34> el<10:38>
+n<> u<63> t<Packed_dimension> p<64> c<62> l<10:33> el<10:39>
+n<> u<64> t<Data_type> p<65> c<37> l<10:22> el<10:39>
+n<> u<65> t<Function_data_type> p<66> c<64> l<10:22> el<10:39>
+n<> u<66> t<Function_data_type_or_implicit> p<408> c<65> s<67> l<10:22> el<10:39>
+n<get_sub_n_list> u<67> t<StringConst> p<408> s<73> l<10:40> el<10:54>
+n<> u<68> t<IntegerAtomType_Int> p<69> l<10:55> el<10:58>
+n<> u<69> t<Data_type> p<70> c<68> l<10:55> el<10:58>
+n<> u<70> t<Data_type_or_implicit> p<72> c<69> s<71> l<10:55> el<10:58>
+n<n> u<71> t<StringConst> p<72> l<10:59> el<10:60>
+n<> u<72> t<Tf_port_item> p<73> c<70> l<10:55> el<10:60>
+n<> u<73> t<Tf_port_list> p<408> c<72> s<107> l<10:55> el<10:60>
+n<> u<74> t<IntVec_TypeBit> p<101> s<90> l<11:5> el<11:8>
+n<N> u<75> t<StringConst> p<76> l<11:10> el<11:11>
+n<> u<76> t<Primary_literal> p<77> c<75> l<11:10> el<11:11>
+n<> u<77> t<Constant_primary> p<78> c<76> l<11:10> el<11:11>
+n<> u<78> t<Constant_expression> p<84> c<77> s<83> l<11:10> el<11:11>
+n<1> u<79> t<IntConst> p<80> l<11:12> el<11:13>
+n<> u<80> t<Primary_literal> p<81> c<79> l<11:12> el<11:13>
+n<> u<81> t<Constant_primary> p<82> c<80> l<11:12> el<11:13>
+n<> u<82> t<Constant_expression> p<84> c<81> l<11:12> el<11:13>
+n<> u<83> t<BinOp_Minus> p<84> s<82> l<11:11> el<11:12>
+n<> u<84> t<Constant_expression> p<89> c<78> s<88> l<11:10> el<11:13>
+n<0> u<85> t<IntConst> p<86> l<11:14> el<11:15>
+n<> u<86> t<Primary_literal> p<87> c<85> l<11:14> el<11:15>
+n<> u<87> t<Constant_primary> p<88> c<86> l<11:14> el<11:15>
+n<> u<88> t<Constant_expression> p<89> c<87> l<11:14> el<11:15>
+n<> u<89> t<Constant_range> p<90> c<84> l<11:10> el<11:15>
+n<> u<90> t<Packed_dimension> p<101> c<89> s<100> l<11:9> el<11:16>
+n<15> u<91> t<IntConst> p<92> l<11:17> el<11:19>
+n<> u<92> t<Primary_literal> p<93> c<91> l<11:17> el<11:19>
+n<> u<93> t<Constant_primary> p<94> c<92> l<11:17> el<11:19>
+n<> u<94> t<Constant_expression> p<99> c<93> s<98> l<11:17> el<11:19>
+n<0> u<95> t<IntConst> p<96> l<11:20> el<11:21>
+n<> u<96> t<Primary_literal> p<97> c<95> l<11:20> el<11:21>
+n<> u<97> t<Constant_primary> p<98> c<96> l<11:20> el<11:21>
+n<> u<98> t<Constant_expression> p<99> c<97> l<11:20> el<11:21>
+n<> u<99> t<Constant_range> p<100> c<94> l<11:17> el<11:21>
+n<> u<100> t<Packed_dimension> p<101> c<99> l<11:16> el<11:22>
+n<> u<101> t<Data_type> p<105> c<74> s<104> l<11:5> el<11:22>
+n<list> u<102> t<StringConst> p<103> l<11:23> el<11:27>
+n<> u<103> t<Variable_decl_assignment> p<104> c<102> l<11:23> el<11:27>
+n<> u<104> t<List_of_variable_decl_assignments> p<105> c<103> l<11:23> el<11:27>
+n<> u<105> t<Variable_declaration> p<106> c<101> l<11:5> el<11:28>
+n<> u<106> t<Data_declaration> p<107> c<105> l<11:5> el<11:28>
+n<> u<107> t<Block_item_declaration> p<408> c<106> s<115> l<11:5> el<11:28>
+n<> u<108> t<IntegerAtomType_Int> p<109> l<12:5> el<12:8>
+n<> u<109> t<Data_type> p<113> c<108> s<112> l<12:5> el<12:8>
+n<list_index> u<110> t<StringConst> p<111> l<12:23> el<12:33>
+n<> u<111> t<Variable_decl_assignment> p<112> c<110> l<12:23> el<12:33>
+n<> u<112> t<List_of_variable_decl_assignments> p<113> c<111> l<12:23> el<12:33>
+n<> u<113> t<Variable_declaration> p<114> c<109> l<12:5> el<12:34>
+n<> u<114> t<Data_declaration> p<115> c<113> l<12:5> el<12:34>
+n<> u<115> t<Block_item_declaration> p<408> c<114> s<133> l<12:5> el<12:34>
+n<> u<116> t<IntVec_TypeBit> p<127> s<126> l<13:5> el<13:8>
+n<15> u<117> t<IntConst> p<118> l<13:10> el<13:12>
+n<> u<118> t<Primary_literal> p<119> c<117> l<13:10> el<13:12>
+n<> u<119> t<Constant_primary> p<120> c<118> l<13:10> el<13:12>
+n<> u<120> t<Constant_expression> p<125> c<119> s<124> l<13:10> el<13:12>
+n<0> u<121> t<IntConst> p<122> l<13:13> el<13:14>
+n<> u<122> t<Primary_literal> p<123> c<121> l<13:13> el<13:14>
+n<> u<123> t<Constant_primary> p<124> c<122> l<13:13> el<13:14>
+n<> u<124> t<Constant_expression> p<125> c<123> l<13:13> el<13:14>
+n<> u<125> t<Constant_range> p<126> c<120> l<13:10> el<13:14>
+n<> u<126> t<Packed_dimension> p<127> c<125> l<13:9> el<13:15>
+n<> u<127> t<Data_type> p<131> c<116> s<130> l<13:5> el<13:15>
+n<current_n> u<128> t<StringConst> p<129> l<13:23> el<13:32>
+n<> u<129> t<Variable_decl_assignment> p<130> c<128> l<13:23> el<13:32>
+n<> u<130> t<List_of_variable_decl_assignments> p<131> c<129> l<13:23> el<13:32>
+n<> u<131> t<Variable_declaration> p<132> c<127> l<13:5> el<13:33>
+n<> u<132> t<Data_declaration> p<133> c<131> l<13:5> el<13:33>
+n<> u<133> t<Block_item_declaration> p<408> c<132> s<151> l<13:5> el<13:33>
+n<> u<134> t<IntVec_TypeBit> p<145> s<144> l<14:5> el<14:8>
+n<15> u<135> t<IntConst> p<136> l<14:10> el<14:12>
+n<> u<136> t<Primary_literal> p<137> c<135> l<14:10> el<14:12>
+n<> u<137> t<Constant_primary> p<138> c<136> l<14:10> el<14:12>
+n<> u<138> t<Constant_expression> p<143> c<137> s<142> l<14:10> el<14:12>
+n<0> u<139> t<IntConst> p<140> l<14:13> el<14:14>
+n<> u<140> t<Primary_literal> p<141> c<139> l<14:13> el<14:14>
+n<> u<141> t<Constant_primary> p<142> c<140> l<14:13> el<14:14>
+n<> u<142> t<Constant_expression> p<143> c<141> l<14:13> el<14:14>
+n<> u<143> t<Constant_range> p<144> c<138> l<14:10> el<14:14>
+n<> u<144> t<Packed_dimension> p<145> c<143> l<14:9> el<14:15>
+n<> u<145> t<Data_type> p<149> c<134> s<148> l<14:5> el<14:15>
+n<half_n> u<146> t<StringConst> p<147> l<14:23> el<14:29>
+n<> u<147> t<Variable_decl_assignment> p<148> c<146> l<14:23> el<14:29>
+n<> u<148> t<List_of_variable_decl_assignments> p<149> c<147> l<14:23> el<14:29>
+n<> u<149> t<Variable_declaration> p<150> c<145> l<14:5> el<14:30>
+n<> u<150> t<Data_declaration> p<151> c<149> l<14:5> el<14:30>
+n<> u<151> t<Block_item_declaration> p<408> c<150> s<166> l<14:5> el<14:30>
+n<list> u<152> t<StringConst> p<153> l<16:5> el<16:9>
+n<> u<153> t<Ps_or_hierarchical_identifier> p<156> c<152> s<155> l<16:5> el<16:9>
+n<> u<154> t<Bit_select> p<155> l<16:17> el<16:17>
+n<> u<155> t<Select> p<156> c<154> l<16:17> el<16:17>
+n<> u<156> t<Variable_lvalue> p<162> c<153> s<157> l<16:5> el<16:9>
+n<> u<157> t<AssignOp_Assign> p<162> s<161> l<16:17> el<16:18>
+n<> u<158> t<Number_Tick0> p<159> l<16:19> el<16:21>
+n<> u<159> t<Primary_literal> p<160> c<158> l<16:19> el<16:21>
+n<> u<160> t<Primary> p<161> c<159> l<16:19> el<16:21>
+n<> u<161> t<Expression> p<162> c<160> l<16:19> el<16:21>
+n<> u<162> t<Operator_assignment> p<163> c<156> l<16:5> el<16:21>
+n<> u<163> t<Blocking_assignment> p<164> c<162> l<16:5> el<16:21>
+n<> u<164> t<Statement_item> p<165> c<163> l<16:5> el<16:22>
+n<> u<165> t<Statement> p<166> c<164> l<16:5> el<16:22>
+n<> u<166> t<Function_statement_or_null> p<408> c<165> s<181> l<16:5> el<16:22>
+n<list_index> u<167> t<StringConst> p<168> l<17:5> el<17:15>
+n<> u<168> t<Ps_or_hierarchical_identifier> p<171> c<167> s<170> l<17:5> el<17:15>
+n<> u<169> t<Bit_select> p<170> l<17:17> el<17:17>
+n<> u<170> t<Select> p<171> c<169> l<17:17> el<17:17>
+n<> u<171> t<Variable_lvalue> p<177> c<168> s<172> l<17:5> el<17:15>
+n<> u<172> t<AssignOp_Assign> p<177> s<176> l<17:17> el<17:18>
+n<0> u<173> t<IntConst> p<174> l<17:19> el<17:20>
+n<> u<174> t<Primary_literal> p<175> c<173> l<17:19> el<17:20>
+n<> u<175> t<Primary> p<176> c<174> l<17:19> el<17:20>
+n<> u<176> t<Expression> p<177> c<175> l<17:19> el<17:20>
+n<> u<177> t<Operator_assignment> p<178> c<171> l<17:5> el<17:20>
+n<> u<178> t<Blocking_assignment> p<179> c<177> l<17:5> el<17:20>
+n<> u<179> t<Statement_item> p<180> c<178> l<17:5> el<17:21>
+n<> u<180> t<Statement> p<181> c<179> l<17:5> el<17:21>
+n<> u<181> t<Function_statement_or_null> p<408> c<180> s<202> l<17:5> el<17:21>
+n<current_n> u<182> t<StringConst> p<183> l<18:5> el<18:14>
+n<> u<183> t<Ps_or_hierarchical_identifier> p<186> c<182> s<185> l<18:5> el<18:14>
+n<> u<184> t<Bit_select> p<185> l<18:17> el<18:17>
+n<> u<185> t<Select> p<186> c<184> l<18:17> el<18:17>
+n<> u<186> t<Variable_lvalue> p<198> c<183> s<187> l<18:5> el<18:14>
+n<> u<187> t<AssignOp_Assign> p<198> s<197> l<18:17> el<18:18>
+n<16> u<188> t<IntConst> p<189> l<18:19> el<18:21>
+n<> u<189> t<Primary_literal> p<190> c<188> l<18:19> el<18:21>
+n<> u<190> t<Casting_type> p<195> c<189> s<194> l<18:19> el<18:21>
+n<n> u<191> t<StringConst> p<192> l<18:23> el<18:24>
+n<> u<192> t<Primary_literal> p<193> c<191> l<18:23> el<18:24>
+n<> u<193> t<Primary> p<194> c<192> l<18:23> el<18:24>
+n<> u<194> t<Expression> p<195> c<193> l<18:23> el<18:24>
+n<> u<195> t<Cast> p<196> c<190> l<18:19> el<18:25>
+n<> u<196> t<Primary> p<197> c<195> l<18:19> el<18:25>
+n<> u<197> t<Expression> p<198> c<196> l<18:19> el<18:25>
+n<> u<198> t<Operator_assignment> p<199> c<186> l<18:5> el<18:25>
+n<> u<199> t<Blocking_assignment> p<200> c<198> l<18:5> el<18:25>
+n<> u<200> t<Statement_item> p<201> c<199> l<18:5> el<18:26>
+n<> u<201> t<Statement> p<202> c<200> l<18:5> el<18:26>
+n<> u<202> t<Function_statement_or_null> p<408> c<201> s<397> l<18:5> el<18:26>
+n<current_n> u<203> t<StringConst> p<204> l<19:12> el<19:21>
+n<> u<204> t<Primary_literal> p<205> c<203> l<19:12> el<19:21>
+n<> u<205> t<Primary> p<206> c<204> l<19:12> el<19:21>
+n<> u<206> t<Expression> p<212> c<205> s<211> l<19:12> el<19:21>
+n<0> u<207> t<IntConst> p<208> l<19:24> el<19:25>
+n<> u<208> t<Primary_literal> p<209> c<207> l<19:24> el<19:25>
+n<> u<209> t<Primary> p<210> c<208> l<19:24> el<19:25>
+n<> u<210> t<Expression> p<212> c<209> l<19:24> el<19:25>
+n<> u<211> t<BinOp_Great> p<212> s<210> l<19:22> el<19:23>
+n<> u<212> t<Expression> p<394> c<206> s<392> l<19:12> el<19:25>
+n<half_n> u<213> t<StringConst> p<214> l<20:7> el<20:13>
+n<> u<214> t<Ps_or_hierarchical_identifier> p<217> c<213> s<216> l<20:7> el<20:13>
+n<> u<215> t<Bit_select> p<216> l<20:15> el<20:15>
+n<> u<216> t<Select> p<217> c<215> l<20:15> el<20:15>
+n<> u<217> t<Variable_lvalue> p<229> c<214> s<218> l<20:7> el<20:13>
+n<> u<218> t<AssignOp_Assign> p<229> s<228> l<20:15> el<20:16>
+n<current_n> u<219> t<StringConst> p<220> l<20:17> el<20:26>
+n<> u<220> t<Primary_literal> p<221> c<219> l<20:17> el<20:26>
+n<> u<221> t<Primary> p<222> c<220> l<20:17> el<20:26>
+n<> u<222> t<Expression> p<228> c<221> s<227> l<20:17> el<20:26>
+n<2> u<223> t<IntConst> p<224> l<20:29> el<20:30>
+n<> u<224> t<Primary_literal> p<225> c<223> l<20:29> el<20:30>
+n<> u<225> t<Primary> p<226> c<224> l<20:29> el<20:30>
+n<> u<226> t<Expression> p<228> c<225> l<20:29> el<20:30>
+n<> u<227> t<BinOp_Div> p<228> s<226> l<20:27> el<20:28>
+n<> u<228> t<Expression> p<229> c<222> l<20:17> el<20:30>
+n<> u<229> t<Operator_assignment> p<230> c<217> l<20:7> el<20:30>
+n<> u<230> t<Blocking_assignment> p<231> c<229> l<20:7> el<20:30>
+n<> u<231> t<Statement_item> p<232> c<230> l<20:7> el<20:31>
+n<> u<232> t<Statement> p<233> c<231> l<20:7> el<20:31>
+n<> u<233> t<Statement_or_null> p<389> c<232> s<351> l<20:7> el<20:31>
+n<current_n> u<234> t<StringConst> p<235> l<21:12> el<21:21>
+n<> u<235> t<Primary_literal> p<236> c<234> l<21:12> el<21:21>
+n<> u<236> t<Primary> p<237> c<235> l<21:12> el<21:21>
+n<> u<237> t<Expression> p<243> c<236> s<242> l<21:12> el<21:21>
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+n<> u<239> t<Primary_literal> p<240> c<238> l<21:24> el<21:25>
+n<> u<240> t<Primary> p<241> c<239> l<21:24> el<21:25>
+n<> u<241> t<Expression> p<243> c<240> l<21:24> el<21:25>
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+n<> u<243> t<Expression> p<244> c<237> l<21:12> el<21:25>
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+n<> u<246> t<Primary_literal> p<247> c<245> l<21:31> el<21:37>
+n<> u<247> t<Primary> p<248> c<246> l<21:31> el<21:37>
+n<> u<248> t<Expression> p<254> c<247> s<253> l<21:31> el<21:37>
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+n<> u<250> t<Primary_literal> p<251> c<249> l<21:41> el<21:42>
+n<> u<251> t<Primary> p<252> c<250> l<21:41> el<21:42>
+n<> u<252> t<Expression> p<254> c<251> l<21:41> el<21:42>
+n<> u<253> t<BinOp_LessEqual> p<254> s<252> l<21:38> el<21:40>
+n<> u<254> t<Expression> p<255> c<248> l<21:31> el<21:42>
+n<> u<255> t<Expression> p<257> c<254> l<21:30> el<21:43>
+n<> u<256> t<BinOp_LogicAnd> p<257> s<255> l<21:27> el<21:29>
+n<> u<257> t<Expression> p<258> c<244> l<21:11> el<21:43>
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+n<> u<259> t<Cond_predicate> p<348> c<258> s<283> l<21:11> el<21:43>
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+n<> u<261> t<Ps_or_hierarchical_identifier> p<268> c<260> s<267> l<22:9> el<22:13>
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+n<> u<263> t<Primary_literal> p<264> c<262> l<22:14> el<22:24>
+n<> u<264> t<Primary> p<265> c<263> l<22:14> el<22:24>
+n<> u<265> t<Expression> p<266> c<264> l<22:14> el<22:24>
+n<> u<266> t<Bit_select> p<267> c<265> l<22:13> el<22:25>
+n<> u<267> t<Select> p<268> c<266> l<22:13> el<22:25>
+n<> u<268> t<Variable_lvalue> p<274> c<261> s<269> l<22:9> el<22:25>
+n<> u<269> t<AssignOp_Assign> p<274> s<273> l<22:27> el<22:28>
+n<half_n> u<270> t<StringConst> p<271> l<22:29> el<22:35>
+n<> u<271> t<Primary_literal> p<272> c<270> l<22:29> el<22:35>
+n<> u<272> t<Primary> p<273> c<271> l<22:29> el<22:35>
+n<> u<273> t<Expression> p<274> c<272> l<22:29> el<22:35>
+n<> u<274> t<Operator_assignment> p<275> c<268> l<22:9> el<22:35>
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+n<> u<276> t<Statement_item> p<277> c<275> l<22:9> el<22:36>
+n<> u<277> t<Statement> p<278> c<276> l<22:9> el<22:36>
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+n<> u<280> t<Seq_block> p<281> c<278> l<21:45> el<23:10>
+n<> u<281> t<Statement_item> p<282> c<280> l<21:45> el<23:10>
+n<> u<282> t<Statement> p<283> c<281> l<21:45> el<23:10>
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+n<> u<285> t<Primary_literal> p<286> c<284> l<24:16> el<24:25>
+n<> u<286> t<Primary> p<287> c<285> l<24:16> el<24:25>
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+n<> u<289> t<Primary_literal> p<290> c<288> l<24:29> el<24:30>
+n<> u<290> t<Primary> p<291> c<289> l<24:29> el<24:30>
+n<> u<291> t<Expression> p<293> c<290> l<24:29> el<24:30>
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+n<> u<293> t<Expression> p<294> c<287> l<24:16> el<24:30>
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+n<> u<295> t<Cond_predicate> p<344> c<294> s<319> l<24:16> el<24:30>
+n<list> u<296> t<StringConst> p<297> l<25:9> el<25:13>
+n<> u<297> t<Ps_or_hierarchical_identifier> p<304> c<296> s<303> l<25:9> el<25:13>
+n<list_index> u<298> t<StringConst> p<299> l<25:14> el<25:24>
+n<> u<299> t<Primary_literal> p<300> c<298> l<25:14> el<25:24>
+n<> u<300> t<Primary> p<301> c<299> l<25:14> el<25:24>
+n<> u<301> t<Expression> p<302> c<300> l<25:14> el<25:24>
+n<> u<302> t<Bit_select> p<303> c<301> l<25:13> el<25:25>
+n<> u<303> t<Select> p<304> c<302> l<25:13> el<25:25>
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+n<> u<307> t<Primary_literal> p<308> c<306> l<25:29> el<25:30>
+n<> u<308> t<Primary> p<309> c<307> l<25:29> el<25:30>
+n<> u<309> t<Expression> p<310> c<308> l<25:29> el<25:30>
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+n<> u<312> t<Statement_item> p<313> c<311> l<25:9> el<25:31>
+n<> u<313> t<Statement> p<314> c<312> l<25:9> el<25:31>
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+n<> u<323> t<Primary_literal> p<324> c<322> l<28:14> el<28:24>
+n<> u<324> t<Primary> p<325> c<323> l<28:14> el<28:24>
+n<> u<325> t<Expression> p<326> c<324> l<28:14> el<28:24>
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+n<> u<327> t<Select> p<328> c<326> l<28:13> el<28:25>
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+n<> u<329> t<AssignOp_Assign> p<334> s<333> l<28:27> el<28:28>
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+n<> u<331> t<Primary_literal> p<332> c<330> l<28:29> el<28:38>
+n<> u<332> t<Primary> p<333> c<331> l<28:29> el<28:38>
+n<> u<333> t<Expression> p<334> c<332> l<28:29> el<28:38>
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+n<> u<366> t<Primary> p<367> c<365> l<31:22> el<31:38>
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+n<> u<419> t<Primary_literal> p<420> c<418> l<39:27> el<39:28>
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+n<> u<436> t<Constant_primary> p<437> c<435> l<39:34> el<39:36>
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+n<> u<439> t<Primary_literal> p<440> c<438> l<39:37> el<39:38>
+n<> u<440> t<Constant_primary> p<441> c<439> l<39:37> el<39:38>
+n<> u<441> t<Constant_expression> p<442> c<440> l<39:37> el<39:38>
+n<> u<442> t<Constant_range> p<443> c<437> l<39:34> el<39:38>
+n<> u<443> t<Packed_dimension> p<444> c<442> l<39:33> el<39:39>
+n<> u<444> t<Data_type> p<445> c<417> l<39:22> el<39:39>
+n<> u<445> t<Function_data_type> p<446> c<444> l<39:22> el<39:39>
+n<> u<446> t<Function_data_type_or_implicit> p<656> c<445> s<447> l<39:22> el<39:39>
+n<get_offset_list> u<447> t<StringConst> p<656> s<479> l<39:40> el<39:55>
+n<> u<448> t<IntVec_TypeBit> p<475> s<464> l<39:56> el<39:59>
+n<N> u<449> t<StringConst> p<450> l<39:61> el<39:62>
+n<> u<450> t<Primary_literal> p<451> c<449> l<39:61> el<39:62>
+n<> u<451> t<Constant_primary> p<452> c<450> l<39:61> el<39:62>
+n<> u<452> t<Constant_expression> p<458> c<451> s<457> l<39:61> el<39:62>
+n<1> u<453> t<IntConst> p<454> l<39:63> el<39:64>
+n<> u<454> t<Primary_literal> p<455> c<453> l<39:63> el<39:64>
+n<> u<455> t<Constant_primary> p<456> c<454> l<39:63> el<39:64>
+n<> u<456> t<Constant_expression> p<458> c<455> l<39:63> el<39:64>
+n<> u<457> t<BinOp_Minus> p<458> s<456> l<39:62> el<39:63>
+n<> u<458> t<Constant_expression> p<463> c<452> s<462> l<39:61> el<39:64>
+n<0> u<459> t<IntConst> p<460> l<39:65> el<39:66>
+n<> u<460> t<Primary_literal> p<461> c<459> l<39:65> el<39:66>
+n<> u<461> t<Constant_primary> p<462> c<460> l<39:65> el<39:66>
+n<> u<462> t<Constant_expression> p<463> c<461> l<39:65> el<39:66>
+n<> u<463> t<Constant_range> p<464> c<458> l<39:61> el<39:66>
+n<> u<464> t<Packed_dimension> p<475> c<463> s<474> l<39:60> el<39:67>
+n<15> u<465> t<IntConst> p<466> l<39:68> el<39:70>
+n<> u<466> t<Primary_literal> p<467> c<465> l<39:68> el<39:70>
+n<> u<467> t<Constant_primary> p<468> c<466> l<39:68> el<39:70>
+n<> u<468> t<Constant_expression> p<473> c<467> s<472> l<39:68> el<39:70>
+n<0> u<469> t<IntConst> p<470> l<39:71> el<39:72>
+n<> u<470> t<Primary_literal> p<471> c<469> l<39:71> el<39:72>
+n<> u<471> t<Constant_primary> p<472> c<470> l<39:71> el<39:72>
+n<> u<472> t<Constant_expression> p<473> c<471> l<39:71> el<39:72>
+n<> u<473> t<Constant_range> p<474> c<468> l<39:68> el<39:72>
+n<> u<474> t<Packed_dimension> p<475> c<473> l<39:67> el<39:73>
+n<> u<475> t<Data_type> p<476> c<448> l<39:56> el<39:73>
+n<> u<476> t<Data_type_or_implicit> p<478> c<475> s<477> l<39:56> el<39:73>
+n<sub_n_list> u<477> t<StringConst> p<478> l<39:74> el<39:84>
+n<> u<478> t<Tf_port_item> p<479> c<476> l<39:56> el<39:84>
+n<> u<479> t<Tf_port_list> p<656> c<478> s<513> l<39:56> el<39:84>
+n<> u<480> t<IntVec_TypeBit> p<507> s<496> l<40:5> el<40:8>
+n<N> u<481> t<StringConst> p<482> l<40:10> el<40:11>
+n<> u<482> t<Primary_literal> p<483> c<481> l<40:10> el<40:11>
+n<> u<483> t<Constant_primary> p<484> c<482> l<40:10> el<40:11>
+n<> u<484> t<Constant_expression> p<490> c<483> s<489> l<40:10> el<40:11>
+n<1> u<485> t<IntConst> p<486> l<40:12> el<40:13>
+n<> u<486> t<Primary_literal> p<487> c<485> l<40:12> el<40:13>
+n<> u<487> t<Constant_primary> p<488> c<486> l<40:12> el<40:13>
+n<> u<488> t<Constant_expression> p<490> c<487> l<40:12> el<40:13>
+n<> u<489> t<BinOp_Minus> p<490> s<488> l<40:11> el<40:12>
+n<> u<490> t<Constant_expression> p<495> c<484> s<494> l<40:10> el<40:13>
+n<0> u<491> t<IntConst> p<492> l<40:14> el<40:15>
+n<> u<492> t<Primary_literal> p<493> c<491> l<40:14> el<40:15>
+n<> u<493> t<Constant_primary> p<494> c<492> l<40:14> el<40:15>
+n<> u<494> t<Constant_expression> p<495> c<493> l<40:14> el<40:15>
+n<> u<495> t<Constant_range> p<496> c<490> l<40:10> el<40:15>
+n<> u<496> t<Packed_dimension> p<507> c<495> s<506> l<40:9> el<40:16>
+n<15> u<497> t<IntConst> p<498> l<40:17> el<40:19>
+n<> u<498> t<Primary_literal> p<499> c<497> l<40:17> el<40:19>
+n<> u<499> t<Constant_primary> p<500> c<498> l<40:17> el<40:19>
+n<> u<500> t<Constant_expression> p<505> c<499> s<504> l<40:17> el<40:19>
+n<0> u<501> t<IntConst> p<502> l<40:20> el<40:21>
+n<> u<502> t<Primary_literal> p<503> c<501> l<40:20> el<40:21>
+n<> u<503> t<Constant_primary> p<504> c<502> l<40:20> el<40:21>
+n<> u<504> t<Constant_expression> p<505> c<503> l<40:20> el<40:21>
+n<> u<505> t<Constant_range> p<506> c<500> l<40:17> el<40:21>
+n<> u<506> t<Packed_dimension> p<507> c<505> l<40:16> el<40:22>
+n<> u<507> t<Data_type> p<511> c<480> s<510> l<40:5> el<40:22>
+n<list> u<508> t<StringConst> p<509> l<40:23> el<40:27>
+n<> u<509> t<Variable_decl_assignment> p<510> c<508> l<40:23> el<40:27>
+n<> u<510> t<List_of_variable_decl_assignments> p<511> c<509> l<40:23> el<40:27>
+n<> u<511> t<Variable_declaration> p<512> c<507> l<40:5> el<40:28>
+n<> u<512> t<Data_declaration> p<513> c<511> l<40:5> el<40:28>
+n<> u<513> t<Block_item_declaration> p<656> c<512> s<645> l<40:5> el<40:28>
+n<> u<514> t<IntegerAtomType_Int> p<515> l<42:10> el<42:13>
+n<> u<515> t<Data_type> p<521> c<514> s<516> l<42:10> el<42:13>
+n<i> u<516> t<StringConst> p<521> s<520> l<42:14> el<42:15>
+n<0> u<517> t<IntConst> p<518> l<42:18> el<42:19>
+n<> u<518> t<Primary_literal> p<519> c<517> l<42:18> el<42:19>
+n<> u<519> t<Primary> p<520> c<518> l<42:18> el<42:19>
+n<> u<520> t<Expression> p<521> c<519> l<42:18> el<42:19>
+n<> u<521> t<For_variable_declaration> p<522> c<515> l<42:10> el<42:19>
+n<> u<522> t<For_initialization> p<642> c<521> s<532> l<42:10> el<42:19>
+n<i> u<523> t<StringConst> p<524> l<42:20> el<42:21>
+n<> u<524> t<Primary_literal> p<525> c<523> l<42:20> el<42:21>
+n<> u<525> t<Primary> p<526> c<524> l<42:20> el<42:21>
+n<> u<526> t<Expression> p<532> c<525> s<531> l<42:20> el<42:21>
+n<N> u<527> t<StringConst> p<528> l<42:24> el<42:25>
+n<> u<528> t<Primary_literal> p<529> c<527> l<42:24> el<42:25>
+n<> u<529> t<Primary> p<530> c<528> l<42:24> el<42:25>
+n<> u<530> t<Expression> p<532> c<529> l<42:24> el<42:25>
+n<> u<531> t<BinOp_Less> p<532> s<530> l<42:22> el<42:23>
+n<> u<532> t<Expression> p<642> c<526> s<541> l<42:20> el<42:25>
+n<> u<533> t<IncDec_PlusPlus> p<539> s<538> l<42:26> el<42:28>
+n<i> u<534> t<StringConst> p<535> l<42:28> el<42:29>
+n<> u<535> t<Ps_or_hierarchical_identifier> p<538> c<534> s<537> l<42:28> el<42:29>
+n<> u<536> t<Bit_select> p<537> l<42:29> el<42:29>
+n<> u<537> t<Select> p<538> c<536> l<42:29> el<42:29>
+n<> u<538> t<Variable_lvalue> p<539> c<535> l<42:28> el<42:29>
+n<> u<539> t<Inc_or_dec_expression> p<540> c<533> l<42:26> el<42:29>
+n<> u<540> t<For_step_assignment> p<541> c<539> l<42:26> el<42:29>
+n<> u<541> t<For_step> p<642> c<540> s<640> l<42:26> el<42:29>
+n<i> u<542> t<StringConst> p<543> l<43:11> el<43:12>
+n<> u<543> t<Primary_literal> p<544> c<542> l<43:11> el<43:12>
+n<> u<544> t<Primary> p<545> c<543> l<43:11> el<43:12>
+n<> u<545> t<Expression> p<551> c<544> s<550> l<43:11> el<43:12>
+n<0> u<546> t<IntConst> p<547> l<43:16> el<43:17>
+n<> u<547> t<Primary_literal> p<548> c<546> l<43:16> el<43:17>
+n<> u<548> t<Primary> p<549> c<547> l<43:16> el<43:17>
+n<> u<549> t<Expression> p<551> c<548> l<43:16> el<43:17>
+n<> u<550> t<BinOp_Equiv> p<551> s<549> l<43:13> el<43:15>
+n<> u<551> t<Expression> p<552> c<545> l<43:11> el<43:17>
+n<> u<552> t<Expression_or_cond_pattern> p<553> c<551> l<43:11> el<43:17>
+n<> u<553> t<Cond_predicate> p<632> c<552> s<577> l<43:11> el<43:17>
+n<list> u<554> t<StringConst> p<555> l<44:9> el<44:13>
+n<> u<555> t<Ps_or_hierarchical_identifier> p<562> c<554> s<561> l<44:9> el<44:13>
+n<i> u<556> t<StringConst> p<557> l<44:14> el<44:15>
+n<> u<557> t<Primary_literal> p<558> c<556> l<44:14> el<44:15>
+n<> u<558> t<Primary> p<559> c<557> l<44:14> el<44:15>
+n<> u<559> t<Expression> p<560> c<558> l<44:14> el<44:15>
+n<> u<560> t<Bit_select> p<561> c<559> l<44:13> el<44:16>
+n<> u<561> t<Select> p<562> c<560> l<44:13> el<44:16>
+n<> u<562> t<Variable_lvalue> p<568> c<555> s<563> l<44:9> el<44:16>
+n<> u<563> t<AssignOp_Assign> p<568> s<567> l<44:17> el<44:18>
+n<0> u<564> t<IntConst> p<565> l<44:19> el<44:20>
+n<> u<565> t<Primary_literal> p<566> c<564> l<44:19> el<44:20>
+n<> u<566> t<Primary> p<567> c<565> l<44:19> el<44:20>
+n<> u<567> t<Expression> p<568> c<566> l<44:19> el<44:20>
+n<> u<568> t<Operator_assignment> p<569> c<562> l<44:9> el<44:20>
+n<> u<569> t<Blocking_assignment> p<570> c<568> l<44:9> el<44:20>
+n<> u<570> t<Statement_item> p<571> c<569> l<44:9> el<44:21>
+n<> u<571> t<Statement> p<572> c<570> l<44:9> el<44:21>
+n<> u<572> t<Statement_or_null> p<574> c<571> s<573> l<44:9> el<44:21>
+n<> u<573> t<END> p<574> l<45:7> el<45:10>
+n<> u<574> t<Seq_block> p<575> c<572> l<43:19> el<45:10>
+n<> u<575> t<Statement_item> p<576> c<574> l<43:19> el<45:10>
+n<> u<576> t<Statement> p<577> c<575> l<43:19> el<45:10>
+n<> u<577> t<Statement_or_null> p<632> c<576> s<631> l<43:19> el<45:10>
+n<list> u<578> t<StringConst> p<579> l<47:9> el<47:13>
+n<> u<579> t<Ps_or_hierarchical_identifier> p<586> c<578> s<585> l<47:9> el<47:13>
+n<i> u<580> t<StringConst> p<581> l<47:14> el<47:15>
+n<> u<581> t<Primary_literal> p<582> c<580> l<47:14> el<47:15>
+n<> u<582> t<Primary> p<583> c<581> l<47:14> el<47:15>
+n<> u<583> t<Expression> p<584> c<582> l<47:14> el<47:15>
+n<> u<584> t<Bit_select> p<585> c<583> l<47:13> el<47:16>
+n<> u<585> t<Select> p<586> c<584> l<47:13> el<47:16>
+n<> u<586> t<Variable_lvalue> p<622> c<579> s<587> l<47:9> el<47:16>
+n<> u<587> t<AssignOp_Assign> p<622> s<621> l<47:17> el<47:18>
+n<sub_n_list> u<588> t<StringConst> p<601> s<600> l<47:19> el<47:29>
+n<i> u<589> t<StringConst> p<590> l<47:30> el<47:31>
+n<> u<590> t<Primary_literal> p<591> c<589> l<47:30> el<47:31>
+n<> u<591> t<Primary> p<592> c<590> l<47:30> el<47:31>
+n<> u<592> t<Expression> p<598> c<591> s<597> l<47:30> el<47:31>
+n<1> u<593> t<IntConst> p<594> l<47:32> el<47:33>
+n<> u<594> t<Primary_literal> p<595> c<593> l<47:32> el<47:33>
+n<> u<595> t<Primary> p<596> c<594> l<47:32> el<47:33>
+n<> u<596> t<Expression> p<598> c<595> l<47:32> el<47:33>
+n<> u<597> t<BinOp_Minus> p<598> s<596> l<47:31> el<47:32>
+n<> u<598> t<Expression> p<599> c<592> l<47:30> el<47:33>
+n<> u<599> t<Bit_select> p<600> c<598> l<47:29> el<47:34>
+n<> u<600> t<Select> p<601> c<599> l<47:29> el<47:34>
+n<> u<601> t<Complex_func_call> p<602> c<588> l<47:19> el<47:34>
+n<> u<602> t<Primary> p<603> c<601> l<47:19> el<47:34>
+n<> u<603> t<Expression> p<621> c<602> s<620> l<47:19> el<47:34>
+n<list> u<604> t<StringConst> p<617> s<616> l<47:37> el<47:41>
+n<i> u<605> t<StringConst> p<606> l<47:42> el<47:43>
+n<> u<606> t<Primary_literal> p<607> c<605> l<47:42> el<47:43>
+n<> u<607> t<Primary> p<608> c<606> l<47:42> el<47:43>
+n<> u<608> t<Expression> p<614> c<607> s<613> l<47:42> el<47:43>
+n<1> u<609> t<IntConst> p<610> l<47:44> el<47:45>
+n<> u<610> t<Primary_literal> p<611> c<609> l<47:44> el<47:45>
+n<> u<611> t<Primary> p<612> c<610> l<47:44> el<47:45>
+n<> u<612> t<Expression> p<614> c<611> l<47:44> el<47:45>
+n<> u<613> t<BinOp_Minus> p<614> s<612> l<47:43> el<47:44>
+n<> u<614> t<Expression> p<615> c<608> l<47:42> el<47:45>
+n<> u<615> t<Bit_select> p<616> c<614> l<47:41> el<47:46>
+n<> u<616> t<Select> p<617> c<615> l<47:41> el<47:46>
+n<> u<617> t<Complex_func_call> p<618> c<604> l<47:37> el<47:46>
+n<> u<618> t<Primary> p<619> c<617> l<47:37> el<47:46>
+n<> u<619> t<Expression> p<621> c<618> l<47:37> el<47:46>
+n<> u<620> t<BinOp_Plus> p<621> s<619> l<47:35> el<47:36>
+n<> u<621> t<Expression> p<622> c<603> l<47:19> el<47:46>
+n<> u<622> t<Operator_assignment> p<623> c<586> l<47:9> el<47:46>
+n<> u<623> t<Blocking_assignment> p<624> c<622> l<47:9> el<47:46>
+n<> u<624> t<Statement_item> p<625> c<623> l<47:9> el<47:47>
+n<> u<625> t<Statement> p<626> c<624> l<47:9> el<47:47>
+n<> u<626> t<Statement_or_null> p<628> c<625> s<627> l<47:9> el<47:47>
+n<> u<627> t<END> p<628> l<48:7> el<48:10>
+n<> u<628> t<Seq_block> p<629> c<626> l<46:12> el<48:10>
+n<> u<629> t<Statement_item> p<630> c<628> l<46:12> el<48:10>
+n<> u<630> t<Statement> p<631> c<629> l<46:12> el<48:10>
+n<> u<631> t<Statement_or_null> p<632> c<630> l<46:12> el<48:10>
+n<> u<632> t<Conditional_statement> p<633> c<553> l<43:7> el<48:10>
+n<> u<633> t<Statement_item> p<634> c<632> l<43:7> el<48:10>
+n<> u<634> t<Statement> p<635> c<633> l<43:7> el<48:10>
+n<> u<635> t<Statement_or_null> p<637> c<634> s<636> l<43:7> el<48:10>
+n<> u<636> t<END> p<637> l<49:5> el<49:8>
+n<> u<637> t<Seq_block> p<638> c<635> l<42:31> el<49:8>
+n<> u<638> t<Statement_item> p<639> c<637> l<42:31> el<49:8>
+n<> u<639> t<Statement> p<640> c<638> l<42:31> el<49:8>
+n<> u<640> t<Statement_or_null> p<642> c<639> l<42:31> el<49:8>
+n<> u<641> t<FOR> p<642> s<522> l<42:5> el<42:8>
+n<> u<642> t<Loop_statement> p<643> c<641> l<42:5> el<49:8>
+n<> u<643> t<Statement_item> p<644> c<642> l<42:5> el<49:8>
+n<> u<644> t<Statement> p<645> c<643> l<42:5> el<49:8>
+n<> u<645> t<Function_statement_or_null> p<656> c<644> s<654> l<42:5> el<49:8>
+n<list> u<646> t<StringConst> p<647> l<51:12> el<51:16>
+n<> u<647> t<Primary_literal> p<648> c<646> l<51:12> el<51:16>
+n<> u<648> t<Primary> p<649> c<647> l<51:12> el<51:16>
+n<> u<649> t<Expression> p<651> c<648> l<51:12> el<51:16>
+n<> u<650> t<RETURN> p<651> s<649> l<51:5> el<51:11>
+n<> u<651> t<Jump_statement> p<652> c<650> l<51:5> el<51:17>
+n<> u<652> t<Statement_item> p<653> c<651> l<51:5> el<51:17>
+n<> u<653> t<Statement> p<654> c<652> l<51:5> el<51:17>
+n<> u<654> t<Function_statement_or_null> p<656> c<653> s<655> l<51:5> el<51:17>
+n<> u<655> t<ENDFUNCTION> p<656> l<52:3> el<52:14>
+n<> u<656> t<Function_body_declaration> p<657> c<446> l<39:22> el<52:14>
+n<> u<657> t<Function_declaration> p<658> c<416> l<39:3> el<52:14>
+n<> u<658> t<Package_or_generate_item_declaration> p<659> c<657> l<39:3> el<52:14>
+n<> u<659> t<Module_or_generate_item_declaration> p<660> c<658> l<39:3> el<52:14>
+n<> u<660> t<Module_common_item> p<661> c<659> l<39:3> el<52:14>
+n<> u<661> t<Module_or_generate_item> p<662> c<660> l<39:3> el<52:14>
+n<> u<662> t<Non_port_module_item> p<663> c<661> l<39:3> el<52:14>
+n<> u<663> t<Module_item> p<990> c<662> s<819> l<39:3> el<52:14>
+n<> u<664> t<Lifetime_Automatic> p<813> s<812> l<54:12> el<54:21>
+n<> u<665> t<IntegerAtomType_Int> p<666> l<54:22> el<54:25>
+n<> u<666> t<Data_type> p<667> c<665> l<54:22> el<54:25>
+n<> u<667> t<Function_data_type> p<668> c<666> l<54:22> el<54:25>
+n<> u<668> t<Function_data_type_or_implicit> p<812> c<667> s<669> l<54:22> el<54:25>
+n<get_next_n> u<669> t<StringConst> p<812> s<701> l<54:26> el<54:36>
+n<> u<670> t<IntVec_TypeBit> p<697> s<686> l<54:37> el<54:40>
+n<N> u<671> t<StringConst> p<672> l<54:42> el<54:43>
+n<> u<672> t<Primary_literal> p<673> c<671> l<54:42> el<54:43>
+n<> u<673> t<Constant_primary> p<674> c<672> l<54:42> el<54:43>
+n<> u<674> t<Constant_expression> p<680> c<673> s<679> l<54:42> el<54:43>
+n<1> u<675> t<IntConst> p<676> l<54:44> el<54:45>
+n<> u<676> t<Primary_literal> p<677> c<675> l<54:44> el<54:45>
+n<> u<677> t<Constant_primary> p<678> c<676> l<54:44> el<54:45>
+n<> u<678> t<Constant_expression> p<680> c<677> l<54:44> el<54:45>
+n<> u<679> t<BinOp_Minus> p<680> s<678> l<54:43> el<54:44>
+n<> u<680> t<Constant_expression> p<685> c<674> s<684> l<54:42> el<54:45>
+n<0> u<681> t<IntConst> p<682> l<54:46> el<54:47>
+n<> u<682> t<Primary_literal> p<683> c<681> l<54:46> el<54:47>
+n<> u<683> t<Constant_primary> p<684> c<682> l<54:46> el<54:47>
+n<> u<684> t<Constant_expression> p<685> c<683> l<54:46> el<54:47>
+n<> u<685> t<Constant_range> p<686> c<680> l<54:42> el<54:47>
+n<> u<686> t<Packed_dimension> p<697> c<685> s<696> l<54:41> el<54:48>
+n<15> u<687> t<IntConst> p<688> l<54:49> el<54:51>
+n<> u<688> t<Primary_literal> p<689> c<687> l<54:49> el<54:51>
+n<> u<689> t<Constant_primary> p<690> c<688> l<54:49> el<54:51>
+n<> u<690> t<Constant_expression> p<695> c<689> s<694> l<54:49> el<54:51>
+n<0> u<691> t<IntConst> p<692> l<54:52> el<54:53>
+n<> u<692> t<Primary_literal> p<693> c<691> l<54:52> el<54:53>
+n<> u<693> t<Constant_primary> p<694> c<692> l<54:52> el<54:53>
+n<> u<694> t<Constant_expression> p<695> c<693> l<54:52> el<54:53>
+n<> u<695> t<Constant_range> p<696> c<690> l<54:49> el<54:53>
+n<> u<696> t<Packed_dimension> p<697> c<695> l<54:48> el<54:54>
+n<> u<697> t<Data_type> p<698> c<670> l<54:37> el<54:54>
+n<> u<698> t<Data_type_or_implicit> p<700> c<697> s<699> l<54:37> el<54:54>
+n<sub_n_list> u<699> t<StringConst> p<700> l<54:55> el<54:65>
+n<> u<700> t<Tf_port_item> p<701> c<698> l<54:37> el<54:65>
+n<> u<701> t<Tf_port_list> p<812> c<700> s<709> l<54:37> el<54:65>
+n<> u<702> t<IntegerAtomType_Int> p<703> l<55:5> el<55:8>
+n<> u<703> t<Data_type> p<707> c<702> s<706> l<55:5> el<55:8>
+n<next_n> u<704> t<StringConst> p<705> l<55:9> el<55:15>
+n<> u<705> t<Variable_decl_assignment> p<706> c<704> l<55:9> el<55:15>
+n<> u<706> t<List_of_variable_decl_assignments> p<707> c<705> l<55:9> el<55:15>
+n<> u<707> t<Variable_declaration> p<708> c<703> l<55:5> el<55:16>
+n<> u<708> t<Data_declaration> p<709> c<707> l<55:5> el<55:16>
+n<> u<709> t<Block_item_declaration> p<812> c<708> s<724> l<55:5> el<55:16>
+n<next_n> u<710> t<StringConst> p<711> l<57:5> el<57:11>
+n<> u<711> t<Ps_or_hierarchical_identifier> p<714> c<710> s<713> l<57:5> el<57:11>
+n<> u<712> t<Bit_select> p<713> l<57:13> el<57:13>
+n<> u<713> t<Select> p<714> c<712> l<57:13> el<57:13>
+n<> u<714> t<Variable_lvalue> p<720> c<711> s<715> l<57:5> el<57:11>
+n<> u<715> t<AssignOp_Assign> p<720> s<719> l<57:13> el<57:14>
+n<0> u<716> t<IntConst> p<717> l<57:15> el<57:16>
+n<> u<717> t<Primary_literal> p<718> c<716> l<57:15> el<57:16>
+n<> u<718> t<Primary> p<719> c<717> l<57:15> el<57:16>
+n<> u<719> t<Expression> p<720> c<718> l<57:15> el<57:16>
+n<> u<720> t<Operator_assignment> p<721> c<714> l<57:5> el<57:16>
+n<> u<721> t<Blocking_assignment> p<722> c<720> l<57:5> el<57:16>
+n<> u<722> t<Statement_item> p<723> c<721> l<57:5> el<57:17>
+n<> u<723> t<Statement> p<724> c<722> l<57:5> el<57:17>
+n<> u<724> t<Function_statement_or_null> p<812> c<723> s<801> l<57:5> el<57:17>
+n<> u<725> t<IntegerAtomType_Int> p<726> l<58:10> el<58:13>
+n<> u<726> t<Data_type> p<732> c<725> s<727> l<58:10> el<58:13>
+n<i> u<727> t<StringConst> p<732> s<731> l<58:14> el<58:15>
+n<0> u<728> t<IntConst> p<729> l<58:18> el<58:19>
+n<> u<729> t<Primary_literal> p<730> c<728> l<58:18> el<58:19>
+n<> u<730> t<Primary> p<731> c<729> l<58:18> el<58:19>
+n<> u<731> t<Expression> p<732> c<730> l<58:18> el<58:19>
+n<> u<732> t<For_variable_declaration> p<733> c<726> l<58:10> el<58:19>
+n<> u<733> t<For_initialization> p<798> c<732> s<743> l<58:10> el<58:19>
+n<i> u<734> t<StringConst> p<735> l<58:20> el<58:21>
+n<> u<735> t<Primary_literal> p<736> c<734> l<58:20> el<58:21>
+n<> u<736> t<Primary> p<737> c<735> l<58:20> el<58:21>
+n<> u<737> t<Expression> p<743> c<736> s<742> l<58:20> el<58:21>
+n<N> u<738> t<StringConst> p<739> l<58:24> el<58:25>
+n<> u<739> t<Primary_literal> p<740> c<738> l<58:24> el<58:25>
+n<> u<740> t<Primary> p<741> c<739> l<58:24> el<58:25>
+n<> u<741> t<Expression> p<743> c<740> l<58:24> el<58:25>
+n<> u<742> t<BinOp_Less> p<743> s<741> l<58:22> el<58:23>
+n<> u<743> t<Expression> p<798> c<737> s<752> l<58:20> el<58:25>
+n<> u<744> t<IncDec_PlusPlus> p<750> s<749> l<58:26> el<58:28>
+n<i> u<745> t<StringConst> p<746> l<58:28> el<58:29>
+n<> u<746> t<Ps_or_hierarchical_identifier> p<749> c<745> s<748> l<58:28> el<58:29>
+n<> u<747> t<Bit_select> p<748> l<58:29> el<58:29>
+n<> u<748> t<Select> p<749> c<747> l<58:29> el<58:29>
+n<> u<749> t<Variable_lvalue> p<750> c<746> l<58:28> el<58:29>
+n<> u<750> t<Inc_or_dec_expression> p<751> c<744> l<58:26> el<58:29>
+n<> u<751> t<For_step_assignment> p<752> c<750> l<58:26> el<58:29>
+n<> u<752> t<For_step> p<798> c<751> s<796> l<58:26> el<58:29>
+n<next_n> u<753> t<StringConst> p<754> l<59:7> el<59:13>
+n<> u<754> t<Ps_or_hierarchical_identifier> p<757> c<753> s<756> l<59:7> el<59:13>
+n<> u<755> t<Bit_select> p<756> l<59:15> el<59:15>
+n<> u<756> t<Select> p<757> c<755> l<59:15> el<59:15>
+n<> u<757> t<Variable_lvalue> p<787> c<754> s<758> l<59:7> el<59:13>
+n<> u<758> t<AssignOp_Add> p<787> s<786> l<59:15> el<59:17>
+n<sub_n_list> u<759> t<StringConst> p<766> s<765> l<59:20> el<59:30>
+n<i> u<760> t<StringConst> p<761> l<59:31> el<59:32>
+n<> u<761> t<Primary_literal> p<762> c<760> l<59:31> el<59:32>
+n<> u<762> t<Primary> p<763> c<761> l<59:31> el<59:32>
+n<> u<763> t<Expression> p<764> c<762> l<59:31> el<59:32>
+n<> u<764> t<Bit_select> p<765> c<763> l<59:30> el<59:33>
+n<> u<765> t<Select> p<766> c<764> l<59:30> el<59:33>
+n<> u<766> t<Complex_func_call> p<767> c<759> l<59:20> el<59:33>
+n<> u<767> t<Primary> p<768> c<766> l<59:20> el<59:33>
+n<> u<768> t<Expression> p<774> c<767> s<773> l<59:20> el<59:33>
+n<0> u<769> t<IntConst> p<770> l<59:37> el<59:38>
+n<> u<770> t<Primary_literal> p<771> c<769> l<59:37> el<59:38>
+n<> u<771> t<Primary> p<772> c<770> l<59:37> el<59:38>
+n<> u<772> t<Expression> p<774> c<771> l<59:37> el<59:38>
+n<> u<773> t<BinOp_Not> p<774> s<772> l<59:34> el<59:36>
+n<> u<774> t<Expression> p<775> c<768> l<59:20> el<59:38>
+n<> u<775> t<Expression> p<785> c<774> s<784> l<59:19> el<59:39>
+n<1> u<776> t<IntConst> p<777> l<59:42> el<59:43>
+n<> u<777> t<Primary_literal> p<778> c<776> l<59:42> el<59:43>
+n<> u<778> t<Primary> p<779> c<777> l<59:42> el<59:43>
+n<> u<779> t<Expression> p<785> c<778> s<783> l<59:42> el<59:43>
+n<0> u<780> t<IntConst> p<781> l<59:46> el<59:47>
+n<> u<781> t<Primary_literal> p<782> c<780> l<59:46> el<59:47>
+n<> u<782> t<Primary> p<783> c<781> l<59:46> el<59:47>
+n<> u<783> t<Expression> p<785> c<782> l<59:46> el<59:47>
+n<> u<784> t<QMARK> p<785> s<779> l<59:40> el<59:41>
+n<> u<785> t<Expression> p<786> c<775> l<59:19> el<59:47>
+n<> u<786> t<Expression> p<787> c<785> l<59:18> el<59:48>
+n<> u<787> t<Operator_assignment> p<788> c<757> l<59:7> el<59:48>
+n<> u<788> t<Blocking_assignment> p<789> c<787> l<59:7> el<59:48>
+n<> u<789> t<Statement_item> p<790> c<788> l<59:7> el<59:49>
+n<> u<790> t<Statement> p<791> c<789> l<59:7> el<59:49>
+n<> u<791> t<Statement_or_null> p<793> c<790> s<792> l<59:7> el<59:49>
+n<> u<792> t<END> p<793> l<60:5> el<60:8>
+n<> u<793> t<Seq_block> p<794> c<791> l<58:31> el<60:8>
+n<> u<794> t<Statement_item> p<795> c<793> l<58:31> el<60:8>
+n<> u<795> t<Statement> p<796> c<794> l<58:31> el<60:8>
+n<> u<796> t<Statement_or_null> p<798> c<795> l<58:31> el<60:8>
+n<> u<797> t<FOR> p<798> s<733> l<58:5> el<58:8>
+n<> u<798> t<Loop_statement> p<799> c<797> l<58:5> el<60:8>
+n<> u<799> t<Statement_item> p<800> c<798> l<58:5> el<60:8>
+n<> u<800> t<Statement> p<801> c<799> l<58:5> el<60:8>
+n<> u<801> t<Function_statement_or_null> p<812> c<800> s<810> l<58:5> el<60:8>
+n<next_n> u<802> t<StringConst> p<803> l<62:12> el<62:18>
+n<> u<803> t<Primary_literal> p<804> c<802> l<62:12> el<62:18>
+n<> u<804> t<Primary> p<805> c<803> l<62:12> el<62:18>
+n<> u<805> t<Expression> p<807> c<804> l<62:12> el<62:18>
+n<> u<806> t<RETURN> p<807> s<805> l<62:5> el<62:11>
+n<> u<807> t<Jump_statement> p<808> c<806> l<62:5> el<62:19>
+n<> u<808> t<Statement_item> p<809> c<807> l<62:5> el<62:19>
+n<> u<809> t<Statement> p<810> c<808> l<62:5> el<62:19>
+n<> u<810> t<Function_statement_or_null> p<812> c<809> s<811> l<62:5> el<62:19>
+n<> u<811> t<ENDFUNCTION> p<812> l<63:3> el<63:14>
+n<> u<812> t<Function_body_declaration> p<813> c<668> l<54:22> el<63:14>
+n<> u<813> t<Function_declaration> p<814> c<664> l<54:3> el<63:14>
+n<> u<814> t<Package_or_generate_item_declaration> p<815> c<813> l<54:3> el<63:14>
+n<> u<815> t<Module_or_generate_item_declaration> p<816> c<814> l<54:3> el<63:14>
+n<> u<816> t<Module_common_item> p<817> c<815> l<54:3> el<63:14>
+n<> u<817> t<Module_or_generate_item> p<818> c<816> l<54:3> el<63:14>
+n<> u<818> t<Non_port_module_item> p<819> c<817> l<54:3> el<63:14>
+n<> u<819> t<Module_item> p<990> c<818> s<869> l<54:3> el<63:14>
+n<> u<820> t<IntVec_TypeBit> p<847> s<836> l<65:15> el<65:18>
+n<N> u<821> t<StringConst> p<822> l<65:20> el<65:21>
+n<> u<822> t<Primary_literal> p<823> c<821> l<65:20> el<65:21>
+n<> u<823> t<Constant_primary> p<824> c<822> l<65:20> el<65:21>
+n<> u<824> t<Constant_expression> p<830> c<823> s<829> l<65:20> el<65:21>
+n<1> u<825> t<IntConst> p<826> l<65:22> el<65:23>
+n<> u<826> t<Primary_literal> p<827> c<825> l<65:22> el<65:23>
+n<> u<827> t<Constant_primary> p<828> c<826> l<65:22> el<65:23>
+n<> u<828> t<Constant_expression> p<830> c<827> l<65:22> el<65:23>
+n<> u<829> t<BinOp_Minus> p<830> s<828> l<65:21> el<65:22>
+n<> u<830> t<Constant_expression> p<835> c<824> s<834> l<65:20> el<65:23>
+n<0> u<831> t<IntConst> p<832> l<65:24> el<65:25>
+n<> u<832> t<Primary_literal> p<833> c<831> l<65:24> el<65:25>
+n<> u<833> t<Constant_primary> p<834> c<832> l<65:24> el<65:25>
+n<> u<834> t<Constant_expression> p<835> c<833> l<65:24> el<65:25>
+n<> u<835> t<Constant_range> p<836> c<830> l<65:20> el<65:25>
+n<> u<836> t<Packed_dimension> p<847> c<835> s<846> l<65:19> el<65:26>
+n<15> u<837> t<IntConst> p<838> l<65:27> el<65:29>
+n<> u<838> t<Primary_literal> p<839> c<837> l<65:27> el<65:29>
+n<> u<839> t<Constant_primary> p<840> c<838> l<65:27> el<65:29>
+n<> u<840> t<Constant_expression> p<845> c<839> s<844> l<65:27> el<65:29>
+n<0> u<841> t<IntConst> p<842> l<65:30> el<65:31>
+n<> u<842> t<Primary_literal> p<843> c<841> l<65:30> el<65:31>
+n<> u<843> t<Constant_primary> p<844> c<842> l<65:30> el<65:31>
+n<> u<844> t<Constant_expression> p<845> c<843> l<65:30> el<65:31>
+n<> u<845> t<Constant_range> p<846> c<840> l<65:27> el<65:31>
+n<> u<846> t<Packed_dimension> p<847> c<845> l<65:26> el<65:32>
+n<> u<847> t<Data_type> p<848> c<820> l<65:15> el<65:32>
+n<> u<848> t<Data_type_or_implicit> p<863> c<847> s<862> l<65:15> el<65:32>
+n<SUB_N_LIST_P> u<849> t<StringConst> p<861> s<860> l<65:33> el<65:45>
+n<get_sub_n_list> u<850> t<StringConst> p<856> s<855> l<65:49> el<65:63>
+n<N> u<851> t<StringConst> p<852> l<65:64> el<65:65>
+n<> u<852> t<Primary_literal> p<853> c<851> l<65:64> el<65:65>
+n<> u<853> t<Primary> p<854> c<852> l<65:64> el<65:65>
+n<> u<854> t<Expression> p<855> c<853> l<65:64> el<65:65>
+n<> u<855> t<List_of_arguments> p<856> c<854> l<65:64> el<65:65>
+n<> u<856> t<Subroutine_call> p<857> c<850> l<65:49> el<65:66>
+n<> u<857> t<Constant_primary> p<858> c<856> l<65:49> el<65:66>
+n<> u<858> t<Constant_expression> p<859> c<857> l<65:49> el<65:66>
+n<> u<859> t<Constant_mintypmax_expression> p<860> c<858> l<65:49> el<65:66>
+n<> u<860> t<Constant_param_expression> p<861> c<859> l<65:49> el<65:66>
+n<> u<861> t<Param_assignment> p<862> c<849> l<65:33> el<65:66>
+n<> u<862> t<List_of_param_assignments> p<863> c<861> l<65:33> el<65:66>
+n<> u<863> t<Local_parameter_declaration> p<864> c<848> l<65:3> el<65:66>
+n<> u<864> t<Package_or_generate_item_declaration> p<865> c<863> l<65:3> el<65:67>
+n<> u<865> t<Module_or_generate_item_declaration> p<866> c<864> l<65:3> el<65:67>
+n<> u<866> t<Module_common_item> p<867> c<865> l<65:3> el<65:67>
+n<> u<867> t<Module_or_generate_item> p<868> c<866> l<65:3> el<65:67>
+n<> u<868> t<Non_port_module_item> p<869> c<867> l<65:3> el<65:67>
+n<> u<869> t<Module_item> p<990> c<868> s<919> l<65:3> el<65:67>
+n<> u<870> t<IntVec_TypeBit> p<897> s<886> l<66:15> el<66:18>
+n<N> u<871> t<StringConst> p<872> l<66:20> el<66:21>
+n<> u<872> t<Primary_literal> p<873> c<871> l<66:20> el<66:21>
+n<> u<873> t<Constant_primary> p<874> c<872> l<66:20> el<66:21>
+n<> u<874> t<Constant_expression> p<880> c<873> s<879> l<66:20> el<66:21>
+n<1> u<875> t<IntConst> p<876> l<66:22> el<66:23>
+n<> u<876> t<Primary_literal> p<877> c<875> l<66:22> el<66:23>
+n<> u<877> t<Constant_primary> p<878> c<876> l<66:22> el<66:23>
+n<> u<878> t<Constant_expression> p<880> c<877> l<66:22> el<66:23>
+n<> u<879> t<BinOp_Minus> p<880> s<878> l<66:21> el<66:22>
+n<> u<880> t<Constant_expression> p<885> c<874> s<884> l<66:20> el<66:23>
+n<0> u<881> t<IntConst> p<882> l<66:24> el<66:25>
+n<> u<882> t<Primary_literal> p<883> c<881> l<66:24> el<66:25>
+n<> u<883> t<Constant_primary> p<884> c<882> l<66:24> el<66:25>
+n<> u<884> t<Constant_expression> p<885> c<883> l<66:24> el<66:25>
+n<> u<885> t<Constant_range> p<886> c<880> l<66:20> el<66:25>
+n<> u<886> t<Packed_dimension> p<897> c<885> s<896> l<66:19> el<66:26>
+n<15> u<887> t<IntConst> p<888> l<66:27> el<66:29>
+n<> u<888> t<Primary_literal> p<889> c<887> l<66:27> el<66:29>
+n<> u<889> t<Constant_primary> p<890> c<888> l<66:27> el<66:29>
+n<> u<890> t<Constant_expression> p<895> c<889> s<894> l<66:27> el<66:29>
+n<0> u<891> t<IntConst> p<892> l<66:30> el<66:31>
+n<> u<892> t<Primary_literal> p<893> c<891> l<66:30> el<66:31>
+n<> u<893> t<Constant_primary> p<894> c<892> l<66:30> el<66:31>
+n<> u<894> t<Constant_expression> p<895> c<893> l<66:30> el<66:31>
+n<> u<895> t<Constant_range> p<896> c<890> l<66:27> el<66:31>
+n<> u<896> t<Packed_dimension> p<897> c<895> l<66:26> el<66:32>
+n<> u<897> t<Data_type> p<898> c<870> l<66:15> el<66:32>
+n<> u<898> t<Data_type_or_implicit> p<913> c<897> s<912> l<66:15> el<66:32>
+n<OFFSET_LIST> u<899> t<StringConst> p<911> s<910> l<66:33> el<66:44>
+n<get_offset_list> u<900> t<StringConst> p<906> s<905> l<66:47> el<66:62>
+n<SUB_N_LIST_P> u<901> t<StringConst> p<902> l<66:63> el<66:75>
+n<> u<902> t<Primary_literal> p<903> c<901> l<66:63> el<66:75>
+n<> u<903> t<Primary> p<904> c<902> l<66:63> el<66:75>
+n<> u<904> t<Expression> p<905> c<903> l<66:63> el<66:75>
+n<> u<905> t<List_of_arguments> p<906> c<904> l<66:63> el<66:75>
+n<> u<906> t<Subroutine_call> p<907> c<900> l<66:47> el<66:76>
+n<> u<907> t<Constant_primary> p<908> c<906> l<66:47> el<66:76>
+n<> u<908> t<Constant_expression> p<909> c<907> l<66:47> el<66:76>
+n<> u<909> t<Constant_mintypmax_expression> p<910> c<908> l<66:47> el<66:76>
+n<> u<910> t<Constant_param_expression> p<911> c<909> l<66:47> el<66:76>
+n<> u<911> t<Param_assignment> p<912> c<899> l<66:33> el<66:76>
+n<> u<912> t<List_of_param_assignments> p<913> c<911> l<66:33> el<66:76>
+n<> u<913> t<Local_parameter_declaration> p<914> c<898> l<66:3> el<66:76>
+n<> u<914> t<Package_or_generate_item_declaration> p<915> c<913> l<66:3> el<66:77>
+n<> u<915> t<Module_or_generate_item_declaration> p<916> c<914> l<66:3> el<66:77>
+n<> u<916> t<Module_common_item> p<917> c<915> l<66:3> el<66:77>
+n<> u<917> t<Module_or_generate_item> p<918> c<916> l<66:3> el<66:77>
+n<> u<918> t<Non_port_module_item> p<919> c<917> l<66:3> el<66:77>
+n<> u<919> t<Module_item> p<990> c<918> s<943> l<66:3> el<66:77>
+n<> u<920> t<IntegerAtomType_Int> p<921> l<67:15> el<67:18>
+n<> u<921> t<Data_type> p<922> c<920> l<67:15> el<67:18>
+n<> u<922> t<Data_type_or_implicit> p<937> c<921> s<936> l<67:15> el<67:18>
+n<NEXT_N> u<923> t<StringConst> p<935> s<934> l<67:33> el<67:39>
+n<get_next_n> u<924> t<StringConst> p<930> s<929> l<67:47> el<67:57>
+n<OFFSET_LIST> u<925> t<StringConst> p<926> l<67:58> el<67:69>
+n<> u<926> t<Primary_literal> p<927> c<925> l<67:58> el<67:69>
+n<> u<927> t<Primary> p<928> c<926> l<67:58> el<67:69>
+n<> u<928> t<Expression> p<929> c<927> l<67:58> el<67:69>
+n<> u<929> t<List_of_arguments> p<930> c<928> l<67:58> el<67:69>
+n<> u<930> t<Subroutine_call> p<931> c<924> l<67:47> el<67:70>
+n<> u<931> t<Constant_primary> p<932> c<930> l<67:47> el<67:70>
+n<> u<932> t<Constant_expression> p<933> c<931> l<67:47> el<67:70>
+n<> u<933> t<Constant_mintypmax_expression> p<934> c<932> l<67:47> el<67:70>
+n<> u<934> t<Constant_param_expression> p<935> c<933> l<67:47> el<67:70>
+n<> u<935> t<Param_assignment> p<936> c<923> l<67:33> el<67:70>
+n<> u<936> t<List_of_param_assignments> p<937> c<935> l<67:33> el<67:70>
+n<> u<937> t<Local_parameter_declaration> p<938> c<922> l<67:3> el<67:70>
+n<> u<938> t<Package_or_generate_item_declaration> p<939> c<937> l<67:3> el<67:71>
+n<> u<939> t<Module_or_generate_item_declaration> p<940> c<938> l<67:3> el<67:71>
+n<> u<940> t<Module_common_item> p<941> c<939> l<67:3> el<67:71>
+n<> u<941> t<Module_or_generate_item> p<942> c<940> l<67:3> el<67:71>
+n<> u<942> t<Non_port_module_item> p<943> c<941> l<67:3> el<67:71>
+n<> u<943> t<Module_item> p<990> c<942> s<988> l<67:3> el<67:71>
+n<> u<944> t<IntVec_TypeLogic> p<977> s<960> l<69:3> el<69:8>
+n<NEXT_N> u<945> t<StringConst> p<946> l<69:10> el<69:16>
+n<> u<946> t<Primary_literal> p<947> c<945> l<69:10> el<69:16>
+n<> u<947> t<Constant_primary> p<948> c<946> l<69:10> el<69:16>
+n<> u<948> t<Constant_expression> p<954> c<947> s<953> l<69:10> el<69:16>
+n<1> u<949> t<IntConst> p<950> l<69:17> el<69:18>
+n<> u<950> t<Primary_literal> p<951> c<949> l<69:17> el<69:18>
+n<> u<951> t<Constant_primary> p<952> c<950> l<69:17> el<69:18>
+n<> u<952> t<Constant_expression> p<954> c<951> l<69:17> el<69:18>
+n<> u<953> t<BinOp_Minus> p<954> s<952> l<69:16> el<69:17>
+n<> u<954> t<Constant_expression> p<959> c<948> s<958> l<69:10> el<69:18>
+n<0> u<955> t<IntConst> p<956> l<69:19> el<69:20>
+n<> u<956> t<Primary_literal> p<957> c<955> l<69:19> el<69:20>
+n<> u<957> t<Constant_primary> p<958> c<956> l<69:19> el<69:20>
+n<> u<958> t<Constant_expression> p<959> c<957> l<69:19> el<69:20>
+n<> u<959> t<Constant_range> p<960> c<954> l<69:10> el<69:20>
+n<> u<960> t<Packed_dimension> p<977> c<959> s<976> l<69:9> el<69:21>
+n<WIDTH> u<961> t<StringConst> p<962> l<69:22> el<69:27>
+n<> u<962> t<Primary_literal> p<963> c<961> l<69:22> el<69:27>
+n<> u<963> t<Constant_primary> p<964> c<962> l<69:22> el<69:27>
+n<> u<964> t<Constant_expression> p<970> c<963> s<969> l<69:22> el<69:27>
+n<1> u<965> t<IntConst> p<966> l<69:28> el<69:29>
+n<> u<966> t<Primary_literal> p<967> c<965> l<69:28> el<69:29>
+n<> u<967> t<Constant_primary> p<968> c<966> l<69:28> el<69:29>
+n<> u<968> t<Constant_expression> p<970> c<967> l<69:28> el<69:29>
+n<> u<969> t<BinOp_Minus> p<970> s<968> l<69:27> el<69:28>
+n<> u<970> t<Constant_expression> p<975> c<964> s<974> l<69:22> el<69:29>
+n<0> u<971> t<IntConst> p<972> l<69:30> el<69:31>
+n<> u<972> t<Primary_literal> p<973> c<971> l<69:30> el<69:31>
+n<> u<973> t<Constant_primary> p<974> c<972> l<69:30> el<69:31>
+n<> u<974> t<Constant_expression> p<975> c<973> l<69:30> el<69:31>
+n<> u<975> t<Constant_range> p<976> c<970> l<69:22> el<69:31>
+n<> u<976> t<Packed_dimension> p<977> c<975> l<69:21> el<69:32>
+n<> u<977> t<Data_type> p<981> c<944> s<980> l<69:3> el<69:32>
+n<next_data> u<978> t<StringConst> p<979> l<69:33> el<69:42>
+n<> u<979> t<Variable_decl_assignment> p<980> c<978> l<69:33> el<69:42>
+n<> u<980> t<List_of_variable_decl_assignments> p<981> c<979> l<69:33> el<69:42>
+n<> u<981> t<Variable_declaration> p<982> c<977> l<69:3> el<69:43>
+n<> u<982> t<Data_declaration> p<983> c<981> l<69:3> el<69:43>
+n<> u<983> t<Package_or_generate_item_declaration> p<984> c<982> l<69:3> el<69:43>
+n<> u<984> t<Module_or_generate_item_declaration> p<985> c<983> l<69:3> el<69:43>
+n<> u<985> t<Module_common_item> p<986> c<984> l<69:3> el<69:43>
+n<> u<986> t<Module_or_generate_item> p<987> c<985> l<69:3> el<69:43>
+n<> u<987> t<Non_port_module_item> p<988> c<986> l<69:3> el<69:43>
+n<> u<988> t<Module_item> p<990> c<987> s<989> l<69:3> el<69:43>
+n<> u<989> t<ENDMODULE> p<990> l<71:1> el<71:10>
+n<> u<990> t<Module_declaration> p<991> c<35> l<2:1> el<71:10>
+n<> u<991> t<Description> p<992> c<990> l<2:1> el<71:10>
+n<> u<992> t<Source_text> p<993> c<991> l<2:1> el<71:10>
+n<> u<993> t<Top_level_rule> c<1> l<2:1> el<72:1>
+AST_DEBUG_END
+[WRN:PA0205] ${SURELOG_DIR}/tests/FuncInModule/dut.sv:2:1: No timescale set for "rggen_or_reducer".
+
+[INF:CP0300] Compilation...
+
+[INF:CP0303] ${SURELOG_DIR}/tests/FuncInModule/dut.sv:2:1: Compile module "work@rggen_or_reducer".
+
+[INF:EL0526] Design Elaboration...
+
+[NTE:EL0503] ${SURELOG_DIR}/tests/FuncInModule/dut.sv:2:1: Top level module "work@rggen_or_reducer".
+
+[NTE:EL0508] Nb Top level modules: 1.
+
+[NTE:EL0509] Max instance depth: 1.
+
+[NTE:EL0510] Nb instances: 1.
+
+[NTE:EL0511] Nb leaf instances: 1.
+
+[INF:UH0706] Creating UHDM Model...
+
+=== UHDM Object Stats Begin (Non-Elaborated Model) ===
+assign_stmt                                            8
+assignment                                            13
+begin                                                 11
+bit_select                                             9
+bit_typespec                                          12
+bit_var                                                6
+constant                                             213
+design                                                 1
+for_stmt                                               2
+func_call                                             10
+function                                               3
+if_else                                                3
+int_typespec                                          17
+int_var                                                5
+integer_typespec                                       1
+io_decl                                                3
+logic_net                                              1
+logic_typespec                                         2
+logic_var                                              1
+module_inst                                            7
+operation                                             37
+param_assign                                          42
+parameter                                             42
+range                                                 38
+ref_obj                                               62
+return_stmt                                            3
+while_stmt                                             1
+=== UHDM Object Stats End ===
+[INF:UH0707] Elaborating UHDM...
+
+=== UHDM Object Stats Begin (Elaborated Model) ===
+assign_stmt                                           10
+assignment                                            26
+begin                                                 22
+bit_select                                            18
+bit_typespec                                          12
+bit_var                                               14
+constant                                             213
+design                                                 1
+for_stmt                                               4
+func_call                                             10
+function                                               6
+if_else                                                6
+int_typespec                                          17
+int_var                                               11
+integer_typespec                                       1
+io_decl                                                6
+logic_net                                              1
+logic_typespec                                         2
+logic_var                                              1
+module_inst                                            7
+operation                                             54
+param_assign                                          42
+parameter                                             42
+range                                                 38
+ref_obj                                               97
+return_stmt                                            6
+while_stmt                                             2
+=== UHDM Object Stats End ===
+[INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/FuncInModule/slpp_all/surelog.uhdm ...
+
+[INF:UH0709] Writing UHDM Html Coverage: ${SURELOG_DIR}/build/regression/FuncInModule/slpp_all/checker/surelog.chk.html ...
+
+[INF:UH0710] Loading UHDM DB: ${SURELOG_DIR}/build/regression/FuncInModule/slpp_all/surelog.uhdm ...
+
+[INF:UH0711] Decompiling UHDM...
+
+====== UHDM =======
+design: (work@rggen_or_reducer)
+|vpiElaborated:1
+|vpiName:work@rggen_or_reducer
+|uhdmallModules:
+\_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+  |vpiParent:
+  \_design: (work@rggen_or_reducer)
+  |vpiFullName:work@rggen_or_reducer
+  |vpiParameter:
+  \_parameter: (work@rggen_or_reducer.WIDTH), line:3:17, endln:3:22
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |UINT:2
+    |vpiTypespec:
+    \_int_typespec: , line:3:13, endln:3:16
+      |vpiParent:
+      \_parameter: (work@rggen_or_reducer.WIDTH), line:3:17, endln:3:22
+      |vpiSigned:1
+    |vpiSigned:1
+    |vpiName:WIDTH
+    |vpiFullName:work@rggen_or_reducer.WIDTH
+  |vpiParameter:
+  \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |UINT:4
+    |vpiTypespec:
+    \_int_typespec: , line:4:13, endln:4:16
+      |vpiParent:
+      \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+      |vpiSigned:1
+    |vpiSigned:1
+    |vpiName:N
+    |vpiFullName:work@rggen_or_reducer.N
+  |vpiParameter:
+  \_parameter: (work@rggen_or_reducer.SUB_N_LIST_P), line:65:33, endln:65:45
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiTypespec:
+    \_bit_typespec: , line:65:15, endln:65:32
+      |vpiParent:
+      \_parameter: (work@rggen_or_reducer.SUB_N_LIST_P), line:65:33, endln:65:45
+      |vpiRange:
+      \_range: , line:65:19, endln:65:26
+        |vpiParent:
+        \_bit_typespec: , line:65:15, endln:65:32
+        |vpiLeftRange:
+        \_operation: , line:65:20, endln:65:23
+          |vpiParent:
+          \_range: , line:65:19, endln:65:26
+          |vpiOpType:11
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.SUB_N_LIST_P.N), line:65:20, endln:65:21
+            |vpiParent:
+            \_operation: , line:65:20, endln:65:23
+            |vpiName:N
+            |vpiFullName:work@rggen_or_reducer.SUB_N_LIST_P.N
+          |vpiOperand:
+          \_constant: , line:65:22, endln:65:23
+            |vpiParent:
+            \_operation: , line:65:20, endln:65:23
+            |vpiDecompile:1
+            |vpiSize:64
+            |UINT:1
+            |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:65:24, endln:65:25
+          |vpiParent:
+          \_range: , line:65:19, endln:65:26
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+      |vpiRange:
+      \_range: , line:65:26, endln:65:32
+        |vpiParent:
+        \_bit_typespec: , line:65:15, endln:65:32
+        |vpiLeftRange:
+        \_constant: , line:65:27, endln:65:29
+          |vpiParent:
+          \_range: , line:65:26, endln:65:32
+          |vpiDecompile:15
+          |vpiSize:64
+          |UINT:15
+          |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:65:30, endln:65:31
+          |vpiParent:
+          \_range: , line:65:26, endln:65:32
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiLocalParam:1
+    |vpiName:SUB_N_LIST_P
+    |vpiFullName:work@rggen_or_reducer.SUB_N_LIST_P
+  |vpiParameter:
+  \_parameter: (work@rggen_or_reducer.OFFSET_LIST), line:66:33, endln:66:44
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiTypespec:
+    \_bit_typespec: , line:66:15, endln:66:32
+      |vpiParent:
+      \_parameter: (work@rggen_or_reducer.OFFSET_LIST), line:66:33, endln:66:44
+      |vpiRange:
+      \_range: , line:66:19, endln:66:26
+        |vpiParent:
+        \_bit_typespec: , line:66:15, endln:66:32
+        |vpiLeftRange:
+        \_operation: , line:66:20, endln:66:23
+          |vpiParent:
+          \_range: , line:66:19, endln:66:26
+          |vpiOpType:11
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.OFFSET_LIST.N), line:66:20, endln:66:21
+            |vpiParent:
+            \_operation: , line:66:20, endln:66:23
+            |vpiName:N
+            |vpiFullName:work@rggen_or_reducer.OFFSET_LIST.N
+          |vpiOperand:
+          \_constant: , line:66:22, endln:66:23
+            |vpiParent:
+            \_operation: , line:66:20, endln:66:23
+            |vpiDecompile:1
+            |vpiSize:64
+            |UINT:1
+            |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:66:24, endln:66:25
+          |vpiParent:
+          \_range: , line:66:19, endln:66:26
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+      |vpiRange:
+      \_range: , line:66:26, endln:66:32
+        |vpiParent:
+        \_bit_typespec: , line:66:15, endln:66:32
+        |vpiLeftRange:
+        \_constant: , line:66:27, endln:66:29
+          |vpiParent:
+          \_range: , line:66:26, endln:66:32
+          |vpiDecompile:15
+          |vpiSize:64
+          |UINT:15
+          |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:66:30, endln:66:31
+          |vpiParent:
+          \_range: , line:66:26, endln:66:32
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiLocalParam:1
+    |vpiName:OFFSET_LIST
+    |vpiFullName:work@rggen_or_reducer.OFFSET_LIST
+  |vpiParameter:
+  \_parameter: (work@rggen_or_reducer.NEXT_N), line:67:33, endln:67:39
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiTypespec:
+    \_int_typespec: , line:67:15, endln:67:18
+      |vpiParent:
+      \_parameter: (work@rggen_or_reducer.NEXT_N), line:67:33, endln:67:39
+      |vpiSigned:1
+    |vpiSigned:1
+    |vpiLocalParam:1
+    |vpiName:NEXT_N
+    |vpiFullName:work@rggen_or_reducer.NEXT_N
+  |vpiParamAssign:
+  \_param_assign: , line:3:17, endln:3:26
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiRhs:
+    \_constant: , line:3:25, endln:3:26
+      |vpiParent:
+      \_param_assign: , line:3:17, endln:3:26
+      |vpiDecompile:2
+      |vpiSize:64
+      |UINT:2
+      |vpiTypespec:
+      \_int_typespec: , line:3:13, endln:3:16
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (work@rggen_or_reducer.WIDTH), line:3:17, endln:3:22
+  |vpiParamAssign:
+  \_param_assign: , line:4:17, endln:4:26
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiRhs:
+    \_constant: , line:4:25, endln:4:26
+      |vpiParent:
+      \_param_assign: , line:4:17, endln:4:26
+      |vpiDecompile:4
+      |vpiSize:64
+      |UINT:4
+      |vpiTypespec:
+      \_int_typespec: , line:4:13, endln:4:16
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+  |vpiParamAssign:
+  \_param_assign: , line:65:33, endln:65:66
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiRhs:
+    \_func_call: (get_sub_n_list), line:65:49, endln:65:63
+      |vpiParent:
+      \_param_assign: , line:65:33, endln:65:66
+      |vpiArgument:
+      \_ref_obj: (work@rggen_or_reducer.N), line:65:64, endln:65:65
+        |vpiParent:
+        \_func_call: (get_sub_n_list), line:65:49, endln:65:63
+        |vpiName:N
+        |vpiFullName:work@rggen_or_reducer.N
+      |vpiName:get_sub_n_list
+      |vpiFunction:
+      \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+    |vpiLhs:
+    \_parameter: (work@rggen_or_reducer.SUB_N_LIST_P), line:65:33, endln:65:45
+  |vpiParamAssign:
+  \_param_assign: , line:66:33, endln:66:76
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiRhs:
+    \_func_call: (get_offset_list), line:66:47, endln:66:62
+      |vpiParent:
+      \_param_assign: , line:66:33, endln:66:76
+      |vpiArgument:
+      \_ref_obj: (work@rggen_or_reducer.SUB_N_LIST_P), line:66:63, endln:66:75
+        |vpiParent:
+        \_func_call: (get_offset_list), line:66:47, endln:66:62
+        |vpiName:SUB_N_LIST_P
+        |vpiFullName:work@rggen_or_reducer.SUB_N_LIST_P
+      |vpiName:get_offset_list
+      |vpiFunction:
+      \_function: (work@rggen_or_reducer.get_offset_list), line:39:3, endln:52:14
+    |vpiLhs:
+    \_parameter: (work@rggen_or_reducer.OFFSET_LIST), line:66:33, endln:66:44
+  |vpiParamAssign:
+  \_param_assign: , line:67:33, endln:67:70
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiRhs:
+    \_func_call: (get_next_n), line:67:47, endln:67:57
+      |vpiParent:
+      \_param_assign: , line:67:33, endln:67:70
+      |vpiArgument:
+      \_ref_obj: (work@rggen_or_reducer.OFFSET_LIST), line:67:58, endln:67:69
+        |vpiParent:
+        \_func_call: (get_next_n), line:67:47, endln:67:57
+        |vpiName:OFFSET_LIST
+        |vpiFullName:work@rggen_or_reducer.OFFSET_LIST
+      |vpiName:get_next_n
+      |vpiFunction:
+      \_function: (work@rggen_or_reducer.get_next_n), line:54:3, endln:63:14
+    |vpiLhs:
+    \_parameter: (work@rggen_or_reducer.NEXT_N), line:67:33, endln:67:39
+  |vpiDefName:work@rggen_or_reducer
+  |vpiTaskFunc:
+  \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiName:get_sub_n_list
+    |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+    |vpiVariables:
+    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+      |vpiParent:
+      \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+      |vpiTypespec:
+      \_bit_typespec: , line:11:5, endln:11:22
+        |vpiRange:
+        \_range: , line:11:9, endln:11:16
+          |vpiParent:
+          \_bit_typespec: , line:11:5, endln:11:22
+          |vpiLeftRange:
+          \_operation: , line:11:10, endln:11:13
+            |vpiParent:
+            \_range: , line:11:9, endln:11:16
+            |vpiOpType:11
+            |vpiOperand:
+            \_ref_obj: (N), line:11:10, endln:11:11
+              |vpiParent:
+              \_operation: , line:11:10, endln:11:13
+              |vpiName:N
+              |vpiActual:
+              \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+            |vpiOperand:
+            \_constant: , line:11:12, endln:11:13
+              |vpiParent:
+              \_operation: , line:11:10, endln:11:13
+              |vpiDecompile:1
+              |vpiSize:64
+              |UINT:1
+              |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:11:14, endln:11:15
+            |vpiParent:
+            \_range: , line:11:9, endln:11:16
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+        |vpiRange:
+        \_range: , line:11:16, endln:11:22
+          |vpiParent:
+          \_bit_typespec: , line:11:5, endln:11:22
+          |vpiLeftRange:
+          \_constant: , line:11:17, endln:11:19
+            |vpiParent:
+            \_range: , line:11:16, endln:11:22
+            |vpiDecompile:15
+            |vpiSize:64
+            |UINT:15
+            |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:11:20, endln:11:21
+            |vpiParent:
+            \_range: , line:11:16, endln:11:22
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+      |vpiName:list
+      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+    |vpiVariables:
+    \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+      |vpiParent:
+      \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+      |vpiTypespec:
+      \_int_typespec: , line:12:5, endln:12:8
+        |vpiSigned:1
+      |vpiName:list_index
+      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+      |vpiSigned:1
+    |vpiVariables:
+    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+      |vpiParent:
+      \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+      |vpiTypespec:
+      \_bit_typespec: , line:13:5, endln:13:15
+        |vpiRange:
+        \_range: , line:13:9, endln:13:15
+          |vpiParent:
+          \_bit_typespec: , line:13:5, endln:13:15
+          |vpiLeftRange:
+          \_constant: , line:13:10, endln:13:12
+            |vpiParent:
+            \_range: , line:13:9, endln:13:15
+            |vpiDecompile:15
+            |vpiSize:64
+            |UINT:15
+            |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:13:13, endln:13:14
+            |vpiParent:
+            \_range: , line:13:9, endln:13:15
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+      |vpiName:current_n
+      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+    |vpiVariables:
+    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.half_n), line:14:23, endln:14:29
+      |vpiParent:
+      \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+      |vpiTypespec:
+      \_bit_typespec: , line:14:5, endln:14:15
+        |vpiRange:
+        \_range: , line:14:9, endln:14:15
+          |vpiParent:
+          \_bit_typespec: , line:14:5, endln:14:15
+          |vpiLeftRange:
+          \_constant: , line:14:10, endln:14:12
+            |vpiParent:
+            \_range: , line:14:9, endln:14:15
+            |vpiDecompile:15
+            |vpiSize:64
+            |UINT:15
+            |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:14:13, endln:14:14
+            |vpiParent:
+            \_range: , line:14:9, endln:14:15
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+      |vpiName:half_n
+      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.half_n
+    |vpiVisibility:1
+    |vpiAutomatic:1
+    |vpiReturn:
+    \_bit_var: (work@rggen_or_reducer.get_sub_n_list), line:10:22, endln:10:39
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+      |vpiTypespec:
+      \_bit_typespec: , line:10:22, endln:10:39
+        |vpiRange:
+        \_range: , line:10:26, endln:10:33
+          |vpiParent:
+          \_bit_typespec: , line:10:22, endln:10:39
+          |vpiLeftRange:
+          \_operation: , line:10:27, endln:10:30
+            |vpiParent:
+            \_range: , line:10:26, endln:10:33
+            |vpiOpType:11
+            |vpiOperand:
+            \_ref_obj: (N), line:10:27, endln:10:28
+              |vpiParent:
+              \_operation: , line:10:27, endln:10:30
+              |vpiName:N
+              |vpiActual:
+              \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+            |vpiOperand:
+            \_constant: , line:10:29, endln:10:30
+              |vpiParent:
+              \_operation: , line:10:27, endln:10:30
+              |vpiDecompile:1
+              |vpiSize:64
+              |UINT:1
+              |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:10:31, endln:10:32
+            |vpiParent:
+            \_range: , line:10:26, endln:10:33
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+        |vpiRange:
+        \_range: , line:10:33, endln:10:39
+          |vpiParent:
+          \_bit_typespec: , line:10:22, endln:10:39
+          |vpiLeftRange:
+          \_constant: , line:10:34, endln:10:36
+            |vpiParent:
+            \_range: , line:10:33, endln:10:39
+            |vpiDecompile:15
+            |vpiSize:64
+            |UINT:15
+            |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:10:37, endln:10:38
+            |vpiParent:
+            \_range: , line:10:33, endln:10:39
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+      |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+    |vpiIODecl:
+    \_io_decl: (n), line:10:59, endln:10:60
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+      |vpiDirection:1
+      |vpiName:n
+      |vpiTypedef:
+      \_int_typespec: , line:10:55, endln:10:58
+        |vpiSigned:1
+    |vpiStmt:
+    \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+      |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+      |vpiVariables:
+      \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+      |vpiVariables:
+      \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+      |vpiVariables:
+      \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+      |vpiVariables:
+      \_bit_var: (work@rggen_or_reducer.get_sub_n_list.half_n), line:14:23, endln:14:29
+      |vpiStmt:
+      \_assignment: , line:16:5, endln:16:21
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiOpType:82
+        |vpiBlocking:1
+        |vpiRhs:
+        \_constant: , line:16:19, endln:16:21
+          |vpiDecompile:0000000000000000000000000000000000000000000000000000000000000000
+          |vpiSize:64
+          |BIN:0000000000000000000000000000000000000000000000000000000000000000
+          |vpiConstType:3
+        |vpiLhs:
+        \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list), line:16:5, endln:16:9
+          |vpiParent:
+          \_assignment: , line:16:5, endln:16:21
+          |vpiName:list
+          |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+          |vpiActual:
+          \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+      |vpiStmt:
+      \_assignment: , line:17:5, endln:17:20
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiOpType:82
+        |vpiBlocking:1
+        |vpiRhs:
+        \_constant: , line:17:19, endln:17:20
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+        |vpiLhs:
+        \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:17:5, endln:17:15
+          |vpiParent:
+          \_assignment: , line:17:5, endln:17:20
+          |vpiName:list_index
+          |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+          |vpiActual:
+          \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+      |vpiStmt:
+      \_assignment: , line:18:5, endln:18:25
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiOpType:82
+        |vpiBlocking:1
+        |vpiRhs:
+        \_operation: , line:18:19, endln:18:25
+          |vpiParent:
+          \_assignment: , line:18:5, endln:18:25
+          |vpiTypespec:
+          \_integer_typespec: , line:18:19, endln:18:21
+            |INT:16
+          |vpiOpType:67
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.n), line:18:23, endln:18:24
+            |vpiParent:
+            \_operation: , line:18:19, endln:18:25
+            |vpiName:n
+            |vpiFullName:work@rggen_or_reducer.get_sub_n_list.n
+            |vpiActual:
+            \_io_decl: (n), line:10:59, endln:10:60
+        |vpiLhs:
+        \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:18:5, endln:18:14
+          |vpiParent:
+          \_assignment: , line:18:5, endln:18:25
+          |vpiName:current_n
+          |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+          |vpiActual:
+          \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+      |vpiStmt:
+      \_while_stmt: , line:19:5, endln:19:10
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiCondition:
+        \_operation: , line:19:12, endln:19:25
+          |vpiParent:
+          \_while_stmt: , line:19:5, endln:19:10
+          |vpiOpType:18
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:19:12, endln:19:21
+            |vpiParent:
+            \_operation: , line:19:12, endln:19:25
+            |vpiName:current_n
+            |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+            |vpiActual:
+            \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+          |vpiOperand:
+          \_constant: , line:19:24, endln:19:25
+            |vpiParent:
+            \_operation: , line:19:12, endln:19:25
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+        |vpiStmt:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:19:27, endln:33:8
+          |vpiParent:
+          \_while_stmt: , line:19:5, endln:19:10
+          |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+          |vpiStmt:
+          \_assignment: , line:20:7, endln:20:30
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_sub_n_list), line:19:27, endln:33:8
+            |vpiOpType:82
+            |vpiBlocking:1
+            |vpiRhs:
+            \_operation: , line:20:17, endln:20:30
+              |vpiParent:
+              \_assignment: , line:20:7, endln:20:30
+              |vpiOpType:12
+              |vpiOperand:
+              \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:20:17, endln:20:26
+                |vpiParent:
+                \_operation: , line:20:17, endln:20:30
+                |vpiName:current_n
+                |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+                |vpiActual:
+                \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+              |vpiOperand:
+              \_constant: , line:20:29, endln:20:30
+                |vpiParent:
+                \_operation: , line:20:17, endln:20:30
+                |vpiDecompile:2
+                |vpiSize:64
+                |UINT:2
+                |vpiConstType:9
+            |vpiLhs:
+            \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.half_n), line:20:7, endln:20:13
+              |vpiParent:
+              \_assignment: , line:20:7, endln:20:30
+              |vpiName:half_n
+              |vpiFullName:work@rggen_or_reducer.get_sub_n_list.half_n
+              |vpiActual:
+              \_bit_var: (work@rggen_or_reducer.get_sub_n_list.half_n), line:14:23, endln:14:29
+          |vpiStmt:
+          \_if_else: , line:21:7, endln:29:10
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_sub_n_list), line:19:27, endln:33:8
+            |vpiCondition:
+            \_operation: , line:21:11, endln:21:43
+              |vpiParent:
+              \_begin: (work@rggen_or_reducer.get_sub_n_list), line:19:27, endln:33:8
+              |vpiOpType:26
+              |vpiOperand:
+              \_operation: , line:21:12, endln:21:25
+                |vpiParent:
+                \_operation: , line:21:11, endln:21:43
+                |vpiOpType:18
+                |vpiOperand:
+                \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:21:12, endln:21:21
+                  |vpiParent:
+                  \_operation: , line:21:12, endln:21:25
+                  |vpiName:current_n
+                  |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+                |vpiOperand:
+                \_constant: , line:21:24, endln:21:25
+                  |vpiParent:
+                  \_operation: , line:21:12, endln:21:25
+                  |vpiDecompile:4
+                  |vpiSize:64
+                  |UINT:4
+                  |vpiConstType:9
+              |vpiOperand:
+              \_operation: , line:21:31, endln:21:42
+                |vpiParent:
+                \_operation: , line:21:11, endln:21:43
+                |vpiOpType:21
+                |vpiOperand:
+                \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.half_n), line:21:31, endln:21:37
+                  |vpiParent:
+                  \_operation: , line:21:31, endln:21:42
+                  |vpiName:half_n
+                  |vpiFullName:work@rggen_or_reducer.get_sub_n_list.half_n
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_sub_n_list.half_n), line:14:23, endln:14:29
+                |vpiOperand:
+                \_constant: , line:21:41, endln:21:42
+                  |vpiParent:
+                  \_operation: , line:21:31, endln:21:42
+                  |vpiDecompile:4
+                  |vpiSize:64
+                  |UINT:4
+                  |vpiConstType:9
+            |vpiStmt:
+            \_begin: (work@rggen_or_reducer.get_sub_n_list), line:21:45, endln:23:10
+              |vpiParent:
+              \_if_else: , line:21:7, endln:29:10
+              |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+              |vpiStmt:
+              \_assignment: , line:22:9, endln:22:35
+                |vpiParent:
+                \_begin: (work@rggen_or_reducer.get_sub_n_list), line:21:45, endln:23:10
+                |vpiOpType:82
+                |vpiBlocking:1
+                |vpiRhs:
+                \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.half_n), line:22:29, endln:22:35
+                  |vpiParent:
+                  \_assignment: , line:22:9, endln:22:35
+                  |vpiName:half_n
+                  |vpiFullName:work@rggen_or_reducer.get_sub_n_list.half_n
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_sub_n_list.half_n), line:14:23, endln:14:29
+                |vpiLhs:
+                \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:22:9, endln:22:25
+                  |vpiParent:
+                  \_assignment: , line:22:9, endln:22:35
+                  |vpiName:list
+                  |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+                  |vpiIndex:
+                  \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:22:14, endln:22:24
+                    |vpiParent:
+                    \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:22:9, endln:22:25
+                    |vpiName:list_index
+                    |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+                    |vpiActual:
+                    \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+            |vpiElseStmt:
+            \_if_else: , line:24:12, endln:29:10
+              |vpiParent:
+              \_if_else: , line:21:7, endln:29:10
+              |vpiCondition:
+              \_operation: , line:24:16, endln:24:30
+                |vpiParent:
+                \_if_else: , line:21:7, endln:29:10
+                |vpiOpType:19
+                |vpiOperand:
+                \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:24:16, endln:24:25
+                  |vpiParent:
+                  \_operation: , line:24:16, endln:24:30
+                  |vpiName:current_n
+                  |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+                |vpiOperand:
+                \_constant: , line:24:29, endln:24:30
+                  |vpiParent:
+                  \_operation: , line:24:16, endln:24:30
+                  |vpiDecompile:4
+                  |vpiSize:64
+                  |UINT:4
+                  |vpiConstType:9
+              |vpiStmt:
+              \_begin: (work@rggen_or_reducer.get_sub_n_list), line:24:32, endln:26:10
+                |vpiParent:
+                \_if_else: , line:24:12, endln:29:10
+                |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+                |vpiStmt:
+                \_assignment: , line:25:9, endln:25:30
+                  |vpiParent:
+                  \_begin: (work@rggen_or_reducer.get_sub_n_list), line:24:32, endln:26:10
+                  |vpiOpType:82
+                  |vpiBlocking:1
+                  |vpiRhs:
+                  \_constant: , line:25:29, endln:25:30
+                    |vpiDecompile:4
+                    |vpiSize:64
+                    |UINT:4
+                    |vpiConstType:9
+                  |vpiLhs:
+                  \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:25:9, endln:25:25
+                    |vpiParent:
+                    \_assignment: , line:25:9, endln:25:30
+                    |vpiName:list
+                    |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+                    |vpiActual:
+                    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+                    |vpiIndex:
+                    \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:25:14, endln:25:24
+                      |vpiParent:
+                      \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:25:9, endln:25:25
+                      |vpiName:list_index
+                      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+                      |vpiActual:
+                      \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+              |vpiElseStmt:
+              \_begin: (work@rggen_or_reducer.get_sub_n_list), line:27:12, endln:29:10
+                |vpiParent:
+                \_if_else: , line:24:12, endln:29:10
+                |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+                |vpiStmt:
+                \_assignment: , line:28:9, endln:28:38
+                  |vpiParent:
+                  \_begin: (work@rggen_or_reducer.get_sub_n_list), line:27:12, endln:29:10
+                  |vpiOpType:82
+                  |vpiBlocking:1
+                  |vpiRhs:
+                  \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:28:29, endln:28:38
+                    |vpiParent:
+                    \_assignment: , line:28:9, endln:28:38
+                    |vpiName:current_n
+                    |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+                    |vpiActual:
+                    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+                  |vpiLhs:
+                  \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:28:9, endln:28:25
+                    |vpiParent:
+                    \_assignment: , line:28:9, endln:28:38
+                    |vpiName:list
+                    |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+                    |vpiActual:
+                    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+                    |vpiIndex:
+                    \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:28:14, endln:28:24
+                      |vpiParent:
+                      \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:28:9, endln:28:25
+                      |vpiName:list_index
+                      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+                      |vpiActual:
+                      \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+          |vpiStmt:
+          \_assignment: , line:31:7, endln:31:38
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_sub_n_list), line:19:27, endln:33:8
+            |vpiOpType:11
+            |vpiBlocking:1
+            |vpiRhs:
+            \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:31:27, endln:31:37
+              |vpiParent:
+              \_assignment: , line:31:7, endln:31:38
+              |vpiName:list
+              |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+              |vpiActual:
+              \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+              |vpiIndex:
+              \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:31:27, endln:31:37
+                |vpiParent:
+                \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:31:27, endln:31:37
+                |vpiName:list_index
+                |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+                |vpiActual:
+                \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+            |vpiLhs:
+            \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:31:7, endln:31:16
+              |vpiParent:
+              \_assignment: , line:31:7, endln:31:38
+              |vpiName:current_n
+              |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+              |vpiActual:
+              \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+          |vpiStmt:
+          \_assignment: , line:32:7, endln:32:23
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_sub_n_list), line:19:27, endln:33:8
+            |vpiOpType:24
+            |vpiBlocking:1
+            |vpiRhs:
+            \_constant: , line:32:22, endln:32:23
+              |vpiDecompile:1
+              |vpiSize:64
+              |UINT:1
+              |vpiConstType:9
+            |vpiLhs:
+            \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:32:7, endln:32:17
+              |vpiParent:
+              \_assignment: , line:32:7, endln:32:23
+              |vpiName:list_index
+              |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+              |vpiActual:
+              \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+      |vpiStmt:
+      \_return_stmt: , line:35:5, endln:35:11
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiCondition:
+        \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list), line:35:12, endln:35:16
+          |vpiParent:
+          \_return_stmt: , line:35:5, endln:35:11
+          |vpiName:list
+          |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+          |vpiActual:
+          \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+    |vpiInstance:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+  |vpiTaskFunc:
+  \_function: (work@rggen_or_reducer.get_offset_list), line:39:3, endln:52:14
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiName:get_offset_list
+    |vpiFullName:work@rggen_or_reducer.get_offset_list
+    |vpiVariables:
+    \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+      |vpiParent:
+      \_begin: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:49:8
+      |vpiTypespec:
+      \_bit_typespec: , line:40:5, endln:40:22
+        |vpiRange:
+        \_range: , line:40:9, endln:40:16
+          |vpiParent:
+          \_bit_typespec: , line:40:5, endln:40:22
+          |vpiLeftRange:
+          \_operation: , line:40:10, endln:40:13
+            |vpiParent:
+            \_range: , line:40:9, endln:40:16
+            |vpiOpType:11
+            |vpiOperand:
+            \_ref_obj: (N), line:40:10, endln:40:11
+              |vpiParent:
+              \_operation: , line:40:10, endln:40:13
+              |vpiName:N
+              |vpiActual:
+              \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+            |vpiOperand:
+            \_constant: , line:40:12, endln:40:13
+              |vpiParent:
+              \_operation: , line:40:10, endln:40:13
+              |vpiDecompile:1
+              |vpiSize:64
+              |UINT:1
+              |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:40:14, endln:40:15
+            |vpiParent:
+            \_range: , line:40:9, endln:40:16
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+        |vpiRange:
+        \_range: , line:40:16, endln:40:22
+          |vpiParent:
+          \_bit_typespec: , line:40:5, endln:40:22
+          |vpiLeftRange:
+          \_constant: , line:40:17, endln:40:19
+            |vpiParent:
+            \_range: , line:40:16, endln:40:22
+            |vpiDecompile:15
+            |vpiSize:64
+            |UINT:15
+            |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:40:20, endln:40:21
+            |vpiParent:
+            \_range: , line:40:16, endln:40:22
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+      |vpiName:list
+      |vpiFullName:work@rggen_or_reducer.get_offset_list.list
+    |vpiVisibility:1
+    |vpiAutomatic:1
+    |vpiReturn:
+    \_bit_var: (work@rggen_or_reducer.get_offset_list), line:39:22, endln:39:39
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_offset_list), line:39:3, endln:52:14
+      |vpiTypespec:
+      \_bit_typespec: , line:39:22, endln:39:39
+        |vpiRange:
+        \_range: , line:39:26, endln:39:33
+          |vpiParent:
+          \_bit_typespec: , line:39:22, endln:39:39
+          |vpiLeftRange:
+          \_operation: , line:39:27, endln:39:30
+            |vpiParent:
+            \_range: , line:39:26, endln:39:33
+            |vpiOpType:11
+            |vpiOperand:
+            \_ref_obj: (N), line:39:27, endln:39:28
+              |vpiParent:
+              \_operation: , line:39:27, endln:39:30
+              |vpiName:N
+              |vpiActual:
+              \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+            |vpiOperand:
+            \_constant: , line:39:29, endln:39:30
+              |vpiParent:
+              \_operation: , line:39:27, endln:39:30
+              |vpiDecompile:1
+              |vpiSize:64
+              |UINT:1
+              |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:39:31, endln:39:32
+            |vpiParent:
+            \_range: , line:39:26, endln:39:33
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+        |vpiRange:
+        \_range: , line:39:33, endln:39:39
+          |vpiParent:
+          \_bit_typespec: , line:39:22, endln:39:39
+          |vpiLeftRange:
+          \_constant: , line:39:34, endln:39:36
+            |vpiParent:
+            \_range: , line:39:33, endln:39:39
+            |vpiDecompile:15
+            |vpiSize:64
+            |UINT:15
+            |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:39:37, endln:39:38
+            |vpiParent:
+            \_range: , line:39:33, endln:39:39
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+      |vpiFullName:work@rggen_or_reducer.get_offset_list
+    |vpiIODecl:
+    \_io_decl: (sub_n_list), line:39:74, endln:39:84
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_offset_list), line:39:3, endln:52:14
+      |vpiDirection:1
+      |vpiName:sub_n_list
+      |vpiTypedef:
+      \_bit_typespec: , line:39:56, endln:39:59
+        |vpiRange:
+        \_range: , line:39:60, endln:39:67
+          |vpiParent:
+          \_bit_typespec: , line:39:56, endln:39:59
+          |vpiLeftRange:
+          \_operation: , line:39:61, endln:39:64
+            |vpiParent:
+            \_range: , line:39:60, endln:39:67
+            |vpiOpType:11
+            |vpiOperand:
+            \_ref_obj: (N), line:39:61, endln:39:62
+              |vpiParent:
+              \_operation: , line:39:61, endln:39:64
+              |vpiName:N
+              |vpiActual:
+              \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+            |vpiOperand:
+            \_constant: , line:39:63, endln:39:64
+              |vpiParent:
+              \_operation: , line:39:61, endln:39:64
+              |vpiDecompile:1
+              |vpiSize:64
+              |UINT:1
+              |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:39:65, endln:39:66
+            |vpiParent:
+            \_range: , line:39:60, endln:39:67
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+        |vpiRange:
+        \_range: , line:39:67, endln:39:73
+          |vpiParent:
+          \_bit_typespec: , line:39:56, endln:39:59
+          |vpiLeftRange:
+          \_constant: , line:39:68, endln:39:70
+            |vpiParent:
+            \_range: , line:39:67, endln:39:73
+            |vpiDecompile:15
+            |vpiSize:64
+            |UINT:15
+            |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:39:71, endln:39:72
+            |vpiParent:
+            \_range: , line:39:67, endln:39:73
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+    |vpiStmt:
+    \_begin: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:49:8
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_offset_list), line:39:3, endln:52:14
+      |vpiFullName:work@rggen_or_reducer.get_offset_list
+      |vpiVariables:
+      \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+      |vpiStmt:
+      \_for_stmt: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:42:8
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:49:8
+        |vpiFullName:work@rggen_or_reducer.get_offset_list
+        |vpiForInitStmt:
+        \_assign_stmt: , line:42:10, endln:42:19
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:42:8
+          |vpiRhs:
+          \_constant: , line:42:18, endln:42:19
+            |vpiParent:
+            \_assign_stmt: , line:42:10, endln:42:19
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+          |vpiLhs:
+          \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+            |vpiParent:
+            \_assign_stmt: , line:42:10, endln:42:19
+            |vpiTypespec:
+            \_int_typespec: , line:42:10, endln:42:13
+              |vpiSigned:1
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+            |vpiSigned:1
+        |vpiForIncStmt:
+        \_operation: , line:42:26, endln:42:29
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:42:8
+          |vpiOpType:62
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_offset_list.i), line:42:28, endln:42:29
+            |vpiParent:
+            \_operation: , line:42:26, endln:42:29
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+            |vpiActual:
+            \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+        |vpiCondition:
+        \_operation: , line:42:20, endln:42:25
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:42:8
+          |vpiOpType:20
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_offset_list.i), line:42:20, endln:42:21
+            |vpiParent:
+            \_operation: , line:42:20, endln:42:25
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+            |vpiActual:
+            \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_offset_list.N), line:42:24, endln:42:25
+            |vpiParent:
+            \_operation: , line:42:20, endln:42:25
+            |vpiName:N
+            |vpiFullName:work@rggen_or_reducer.get_offset_list.N
+        |vpiStmt:
+        \_begin: (work@rggen_or_reducer.get_offset_list), line:42:31, endln:49:8
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:42:8
+          |vpiFullName:work@rggen_or_reducer.get_offset_list
+          |vpiStmt:
+          \_if_else: , line:43:7, endln:48:10
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_offset_list), line:42:31, endln:49:8
+            |vpiCondition:
+            \_operation: , line:43:11, endln:43:17
+              |vpiParent:
+              \_begin: (work@rggen_or_reducer.get_offset_list), line:42:31, endln:49:8
+              |vpiOpType:14
+              |vpiOperand:
+              \_ref_obj: (work@rggen_or_reducer.get_offset_list.i), line:43:11, endln:43:12
+                |vpiParent:
+                \_operation: , line:43:11, endln:43:17
+                |vpiName:i
+                |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+                |vpiActual:
+                \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+              |vpiOperand:
+              \_constant: , line:43:16, endln:43:17
+                |vpiParent:
+                \_operation: , line:43:11, endln:43:17
+                |vpiDecompile:0
+                |vpiSize:64
+                |UINT:0
+                |vpiConstType:9
+            |vpiStmt:
+            \_begin: (work@rggen_or_reducer.get_offset_list), line:43:19, endln:45:10
+              |vpiParent:
+              \_if_else: , line:43:7, endln:48:10
+              |vpiFullName:work@rggen_or_reducer.get_offset_list
+              |vpiStmt:
+              \_assignment: , line:44:9, endln:44:20
+                |vpiParent:
+                \_begin: (work@rggen_or_reducer.get_offset_list), line:43:19, endln:45:10
+                |vpiOpType:82
+                |vpiBlocking:1
+                |vpiRhs:
+                \_constant: , line:44:19, endln:44:20
+                  |vpiDecompile:0
+                  |vpiSize:64
+                  |UINT:0
+                  |vpiConstType:9
+                |vpiLhs:
+                \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:44:9, endln:44:16
+                  |vpiParent:
+                  \_assignment: , line:44:9, endln:44:20
+                  |vpiName:list
+                  |vpiFullName:work@rggen_or_reducer.get_offset_list.list
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+                  |vpiIndex:
+                  \_ref_obj: (work@rggen_or_reducer.get_offset_list.i), line:44:14, endln:44:15
+                    |vpiParent:
+                    \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:44:9, endln:44:16
+                    |vpiName:i
+                    |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+                    |vpiActual:
+                    \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+            |vpiElseStmt:
+            \_begin: (work@rggen_or_reducer.get_offset_list), line:46:12, endln:48:10
+              |vpiParent:
+              \_if_else: , line:43:7, endln:48:10
+              |vpiFullName:work@rggen_or_reducer.get_offset_list
+              |vpiStmt:
+              \_assignment: , line:47:9, endln:47:46
+                |vpiParent:
+                \_begin: (work@rggen_or_reducer.get_offset_list), line:46:12, endln:48:10
+                |vpiOpType:82
+                |vpiBlocking:1
+                |vpiRhs:
+                \_operation: , line:47:19, endln:47:46
+                  |vpiParent:
+                  \_assignment: , line:47:9, endln:47:46
+                  |vpiOpType:24
+                  |vpiOperand:
+                  \_bit_select: (work@rggen_or_reducer.get_offset_list.sub_n_list), line:47:30, endln:47:33
+                    |vpiParent:
+                    \_operation: , line:47:19, endln:47:46
+                    |vpiName:sub_n_list
+                    |vpiFullName:work@rggen_or_reducer.get_offset_list.sub_n_list
+                    |vpiActual:
+                    \_io_decl: (sub_n_list), line:39:74, endln:39:84
+                    |vpiIndex:
+                    \_operation: , line:47:30, endln:47:33
+                      |vpiParent:
+                      \_bit_select: (work@rggen_or_reducer.get_offset_list.sub_n_list), line:47:30, endln:47:33
+                      |vpiOpType:11
+                      |vpiOperand:
+                      \_ref_obj: (work@rggen_or_reducer.get_offset_list.sub_n_list.i), line:47:30, endln:47:31
+                        |vpiParent:
+                        \_operation: , line:47:30, endln:47:33
+                        |vpiName:i
+                        |vpiFullName:work@rggen_or_reducer.get_offset_list.sub_n_list.i
+                        |vpiActual:
+                        \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+                      |vpiOperand:
+                      \_constant: , line:47:32, endln:47:33
+                        |vpiParent:
+                        \_operation: , line:47:30, endln:47:33
+                        |vpiDecompile:1
+                        |vpiSize:64
+                        |UINT:1
+                        |vpiConstType:9
+                  |vpiOperand:
+                  \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:47:42, endln:47:45
+                    |vpiParent:
+                    \_operation: , line:47:19, endln:47:46
+                    |vpiName:list
+                    |vpiFullName:work@rggen_or_reducer.get_offset_list.list
+                    |vpiActual:
+                    \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+                    |vpiIndex:
+                    \_operation: , line:47:42, endln:47:45
+                      |vpiParent:
+                      \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:47:42, endln:47:45
+                      |vpiOpType:11
+                      |vpiOperand:
+                      \_ref_obj: (work@rggen_or_reducer.get_offset_list.list.i), line:47:42, endln:47:43
+                        |vpiParent:
+                        \_operation: , line:47:42, endln:47:45
+                        |vpiName:i
+                        |vpiFullName:work@rggen_or_reducer.get_offset_list.list.i
+                        |vpiActual:
+                        \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+                      |vpiOperand:
+                      \_constant: , line:47:44, endln:47:45
+                        |vpiParent:
+                        \_operation: , line:47:42, endln:47:45
+                        |vpiDecompile:1
+                        |vpiSize:64
+                        |UINT:1
+                        |vpiConstType:9
+                |vpiLhs:
+                \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:47:9, endln:47:16
+                  |vpiParent:
+                  \_assignment: , line:47:9, endln:47:46
+                  |vpiName:list
+                  |vpiFullName:work@rggen_or_reducer.get_offset_list.list
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+                  |vpiIndex:
+                  \_ref_obj: (work@rggen_or_reducer.get_offset_list.i), line:47:14, endln:47:15
+                    |vpiParent:
+                    \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:47:9, endln:47:16
+                    |vpiName:i
+                    |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+                    |vpiActual:
+                    \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+      |vpiStmt:
+      \_return_stmt: , line:51:5, endln:51:11
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:49:8
+        |vpiCondition:
+        \_ref_obj: (work@rggen_or_reducer.get_offset_list.list), line:51:12, endln:51:16
+          |vpiParent:
+          \_return_stmt: , line:51:5, endln:51:11
+          |vpiName:list
+          |vpiFullName:work@rggen_or_reducer.get_offset_list.list
+          |vpiActual:
+          \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+    |vpiInstance:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+  |vpiTaskFunc:
+  \_function: (work@rggen_or_reducer.get_next_n), line:54:3, endln:63:14
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiName:get_next_n
+    |vpiFullName:work@rggen_or_reducer.get_next_n
+    |vpiVariables:
+    \_int_var: (work@rggen_or_reducer.get_next_n.next_n), line:55:9, endln:55:15
+      |vpiParent:
+      \_begin: (work@rggen_or_reducer.get_next_n), line:57:5, endln:57:17
+      |vpiTypespec:
+      \_int_typespec: , line:55:5, endln:55:8
+        |vpiSigned:1
+      |vpiName:next_n
+      |vpiFullName:work@rggen_or_reducer.get_next_n.next_n
+      |vpiSigned:1
+    |vpiVisibility:1
+    |vpiAutomatic:1
+    |vpiReturn:
+    \_int_var: (work@rggen_or_reducer.get_next_n), line:54:22, endln:54:25
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_next_n), line:54:3, endln:63:14
+      |vpiTypespec:
+      \_int_typespec: , line:54:22, endln:54:25
+        |vpiSigned:1
+      |vpiFullName:work@rggen_or_reducer.get_next_n
+      |vpiSigned:1
+    |vpiIODecl:
+    \_io_decl: (sub_n_list), line:54:55, endln:54:65
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_next_n), line:54:3, endln:63:14
+      |vpiDirection:1
+      |vpiName:sub_n_list
+      |vpiTypedef:
+      \_bit_typespec: , line:54:37, endln:54:40
+        |vpiRange:
+        \_range: , line:54:41, endln:54:48
+          |vpiParent:
+          \_bit_typespec: , line:54:37, endln:54:40
+          |vpiLeftRange:
+          \_operation: , line:54:42, endln:54:45
+            |vpiParent:
+            \_range: , line:54:41, endln:54:48
+            |vpiOpType:11
+            |vpiOperand:
+            \_ref_obj: (N), line:54:42, endln:54:43
+              |vpiParent:
+              \_operation: , line:54:42, endln:54:45
+              |vpiName:N
+              |vpiActual:
+              \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+            |vpiOperand:
+            \_constant: , line:54:44, endln:54:45
+              |vpiParent:
+              \_operation: , line:54:42, endln:54:45
+              |vpiDecompile:1
+              |vpiSize:64
+              |UINT:1
+              |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:54:46, endln:54:47
+            |vpiParent:
+            \_range: , line:54:41, endln:54:48
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+        |vpiRange:
+        \_range: , line:54:48, endln:54:54
+          |vpiParent:
+          \_bit_typespec: , line:54:37, endln:54:40
+          |vpiLeftRange:
+          \_constant: , line:54:49, endln:54:51
+            |vpiParent:
+            \_range: , line:54:48, endln:54:54
+            |vpiDecompile:15
+            |vpiSize:64
+            |UINT:15
+            |vpiConstType:9
+          |vpiRightRange:
+          \_constant: , line:54:52, endln:54:53
+            |vpiParent:
+            \_range: , line:54:48, endln:54:54
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+    |vpiStmt:
+    \_begin: (work@rggen_or_reducer.get_next_n), line:57:5, endln:57:17
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_next_n), line:54:3, endln:63:14
+      |vpiFullName:work@rggen_or_reducer.get_next_n
+      |vpiVariables:
+      \_int_var: (work@rggen_or_reducer.get_next_n.next_n), line:55:9, endln:55:15
+      |vpiStmt:
+      \_assignment: , line:57:5, endln:57:16
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_next_n), line:57:5, endln:57:17
+        |vpiOpType:82
+        |vpiBlocking:1
+        |vpiRhs:
+        \_constant: , line:57:15, endln:57:16
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+        |vpiLhs:
+        \_ref_obj: (work@rggen_or_reducer.get_next_n.next_n), line:57:5, endln:57:11
+          |vpiParent:
+          \_assignment: , line:57:5, endln:57:16
+          |vpiName:next_n
+          |vpiFullName:work@rggen_or_reducer.get_next_n.next_n
+          |vpiActual:
+          \_int_var: (work@rggen_or_reducer.get_next_n.next_n), line:55:9, endln:55:15
+      |vpiStmt:
+      \_for_stmt: (work@rggen_or_reducer.get_next_n), line:58:5, endln:58:8
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_next_n), line:57:5, endln:57:17
+        |vpiFullName:work@rggen_or_reducer.get_next_n
+        |vpiForInitStmt:
+        \_assign_stmt: , line:58:10, endln:58:19
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_next_n), line:58:5, endln:58:8
+          |vpiRhs:
+          \_constant: , line:58:18, endln:58:19
+            |vpiParent:
+            \_assign_stmt: , line:58:10, endln:58:19
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+          |vpiLhs:
+          \_int_var: (work@rggen_or_reducer.get_next_n.i), line:58:14, endln:58:15
+            |vpiParent:
+            \_assign_stmt: , line:58:10, endln:58:19
+            |vpiTypespec:
+            \_int_typespec: , line:58:10, endln:58:13
+              |vpiSigned:1
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_next_n.i
+            |vpiSigned:1
+        |vpiForIncStmt:
+        \_operation: , line:58:26, endln:58:29
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_next_n), line:58:5, endln:58:8
+          |vpiOpType:62
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_next_n.i), line:58:28, endln:58:29
+            |vpiParent:
+            \_operation: , line:58:26, endln:58:29
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_next_n.i
+            |vpiActual:
+            \_int_var: (work@rggen_or_reducer.get_next_n.i), line:58:14, endln:58:15
+        |vpiCondition:
+        \_operation: , line:58:20, endln:58:25
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_next_n), line:58:5, endln:58:8
+          |vpiOpType:20
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_next_n.i), line:58:20, endln:58:21
+            |vpiParent:
+            \_operation: , line:58:20, endln:58:25
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_next_n.i
+            |vpiActual:
+            \_int_var: (work@rggen_or_reducer.get_next_n.i), line:58:14, endln:58:15
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_next_n.N), line:58:24, endln:58:25
+            |vpiParent:
+            \_operation: , line:58:20, endln:58:25
+            |vpiName:N
+            |vpiFullName:work@rggen_or_reducer.get_next_n.N
+        |vpiStmt:
+        \_begin: (work@rggen_or_reducer.get_next_n), line:58:31, endln:60:8
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_next_n), line:58:5, endln:58:8
+          |vpiFullName:work@rggen_or_reducer.get_next_n
+          |vpiStmt:
+          \_assignment: , line:59:7, endln:59:48
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_next_n), line:58:31, endln:60:8
+            |vpiOpType:24
+            |vpiBlocking:1
+            |vpiRhs:
+            \_operation: , line:59:19, endln:59:47
+              |vpiParent:
+              \_assignment: , line:59:7, endln:59:48
+              |vpiOpType:32
+              |vpiOperand:
+              \_operation: , line:59:20, endln:59:38
+                |vpiParent:
+                \_operation: , line:59:19, endln:59:47
+                |vpiOpType:15
+                |vpiOperand:
+                \_bit_select: (work@rggen_or_reducer.get_next_n.sub_n_list), line:59:31, endln:59:32
+                  |vpiParent:
+                  \_operation: , line:59:20, endln:59:38
+                  |vpiName:sub_n_list
+                  |vpiFullName:work@rggen_or_reducer.get_next_n.sub_n_list
+                  |vpiActual:
+                  \_io_decl: (sub_n_list), line:54:55, endln:54:65
+                  |vpiIndex:
+                  \_ref_obj: (work@rggen_or_reducer.get_next_n.i), line:59:31, endln:59:32
+                    |vpiParent:
+                    \_bit_select: (work@rggen_or_reducer.get_next_n.sub_n_list), line:59:31, endln:59:32
+                    |vpiName:i
+                    |vpiFullName:work@rggen_or_reducer.get_next_n.i
+                    |vpiActual:
+                    \_int_var: (work@rggen_or_reducer.get_next_n.i), line:58:14, endln:58:15
+                |vpiOperand:
+                \_constant: , line:59:37, endln:59:38
+                  |vpiParent:
+                  \_operation: , line:59:20, endln:59:38
+                  |vpiDecompile:0
+                  |vpiSize:64
+                  |UINT:0
+                  |vpiConstType:9
+              |vpiOperand:
+              \_constant: , line:59:42, endln:59:43
+                |vpiParent:
+                \_operation: , line:59:19, endln:59:47
+                |vpiDecompile:1
+                |vpiSize:64
+                |UINT:1
+                |vpiConstType:9
+              |vpiOperand:
+              \_constant: , line:59:46, endln:59:47
+                |vpiParent:
+                \_operation: , line:59:19, endln:59:47
+                |vpiDecompile:0
+                |vpiSize:64
+                |UINT:0
+                |vpiConstType:9
+            |vpiLhs:
+            \_ref_obj: (work@rggen_or_reducer.get_next_n.next_n), line:59:7, endln:59:13
+              |vpiParent:
+              \_assignment: , line:59:7, endln:59:48
+              |vpiName:next_n
+              |vpiFullName:work@rggen_or_reducer.get_next_n.next_n
+              |vpiActual:
+              \_int_var: (work@rggen_or_reducer.get_next_n.next_n), line:55:9, endln:55:15
+      |vpiStmt:
+      \_return_stmt: , line:62:5, endln:62:11
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_next_n), line:57:5, endln:57:17
+        |vpiCondition:
+        \_ref_obj: (work@rggen_or_reducer.get_next_n.next_n), line:62:12, endln:62:18
+          |vpiParent:
+          \_return_stmt: , line:62:5, endln:62:11
+          |vpiName:next_n
+          |vpiFullName:work@rggen_or_reducer.get_next_n.next_n
+          |vpiActual:
+          \_int_var: (work@rggen_or_reducer.get_next_n.next_n), line:55:9, endln:55:15
+    |vpiInstance:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+  |vpiNet:
+  \_logic_net: (work@rggen_or_reducer.next_data), line:69:33, endln:69:42
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiTypespec:
+    \_logic_typespec: , line:69:3, endln:69:21
+      |vpiRange:
+      \_range: , line:69:9, endln:69:21
+        |vpiParent:
+        \_logic_typespec: , line:69:3, endln:69:21
+        |vpiLeftRange:
+        \_operation: , line:69:10, endln:69:18
+          |vpiParent:
+          \_range: , line:69:9, endln:69:21
+          |vpiOpType:11
+          |vpiOperand:
+          \_ref_obj: (NEXT_N), line:69:10, endln:69:16
+            |vpiParent:
+            \_operation: , line:69:10, endln:69:18
+            |vpiName:NEXT_N
+          |vpiOperand:
+          \_constant: , line:69:17, endln:69:18
+            |vpiParent:
+            \_operation: , line:69:10, endln:69:18
+            |vpiDecompile:1
+            |vpiSize:64
+            |UINT:1
+            |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:69:19, endln:69:20
+          |vpiParent:
+          \_range: , line:69:9, endln:69:21
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+      |vpiRange:
+      \_range: , line:69:21, endln:69:32
+        |vpiParent:
+        \_logic_typespec: , line:69:3, endln:69:21
+        |vpiLeftRange:
+        \_operation: , line:69:22, endln:69:29
+          |vpiParent:
+          \_range: , line:69:21, endln:69:32
+          |vpiOpType:11
+          |vpiOperand:
+          \_ref_obj: (WIDTH), line:69:22, endln:69:27
+            |vpiParent:
+            \_operation: , line:69:22, endln:69:29
+            |vpiName:WIDTH
+          |vpiOperand:
+          \_constant: , line:69:28, endln:69:29
+            |vpiParent:
+            \_operation: , line:69:22, endln:69:29
+            |vpiDecompile:1
+            |vpiSize:64
+            |UINT:1
+            |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:69:30, endln:69:31
+          |vpiParent:
+          \_range: , line:69:21, endln:69:32
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiName:next_data
+    |vpiFullName:work@rggen_or_reducer.next_data
+    |vpiNetType:36
+|uhdmtopModules:
+\_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+  |vpiName:work@rggen_or_reducer
+  |vpiVariables:
+  \_logic_var: (work@rggen_or_reducer.next_data), line:69:33, endln:69:42
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiTypespec:
+    \_logic_typespec: , line:69:3, endln:69:32
+      |vpiParent:
+      \_logic_var: (work@rggen_or_reducer.next_data), line:69:33, endln:69:42
+      |vpiRange:
+      \_range: , line:69:9, endln:69:21
+        |vpiParent:
+        \_logic_typespec: , line:69:3, endln:69:32
+        |vpiLeftRange:
+        \_constant: , line:69:10, endln:69:16
+          |vpiParent:
+          \_range: , line:69:9, endln:69:21
+          |vpiDecompile:2
+          |vpiSize:64
+          |INT:2
+          |vpiConstType:7
+        |vpiRightRange:
+        \_constant: , line:69:19, endln:69:20
+          |vpiParent:
+          \_range: , line:69:9, endln:69:21
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+      |vpiRange:
+      \_range: , line:69:21, endln:69:32
+        |vpiParent:
+        \_logic_typespec: , line:69:3, endln:69:32
+        |vpiLeftRange:
+        \_constant: , line:69:22, endln:69:27
+          |vpiParent:
+          \_range: , line:69:21, endln:69:32
+          |vpiDecompile:1
+          |vpiSize:64
+          |INT:1
+          |vpiConstType:7
+        |vpiRightRange:
+        \_constant: , line:69:30, endln:69:31
+          |vpiParent:
+          \_range: , line:69:21, endln:69:32
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiName:next_data
+    |vpiFullName:work@rggen_or_reducer.next_data
+    |vpiVisibility:1
+    |vpiRange:
+    \_range: , line:69:9, endln:69:21
+      |vpiParent:
+      \_logic_var: (work@rggen_or_reducer.next_data), line:69:33, endln:69:42
+      |vpiLeftRange:
+      \_constant: , line:69:10, endln:69:16
+        |vpiParent:
+        \_range: , line:69:9, endln:69:21
+        |vpiDecompile:2
+        |vpiSize:64
+        |INT:2
+        |vpiConstType:7
+      |vpiRightRange:
+      \_constant: , line:69:19, endln:69:20
+        |vpiParent:
+        \_range: , line:69:9, endln:69:21
+        |vpiDecompile:0
+        |vpiSize:64
+        |UINT:0
+        |vpiConstType:9
+    |vpiRange:
+    \_range: , line:69:21, endln:69:32
+      |vpiParent:
+      \_logic_var: (work@rggen_or_reducer.next_data), line:69:33, endln:69:42
+      |vpiLeftRange:
+      \_constant: , line:69:22, endln:69:27
+        |vpiParent:
+        \_range: , line:69:21, endln:69:32
+        |vpiDecompile:1
+        |vpiSize:64
+        |INT:1
+        |vpiConstType:7
+      |vpiRightRange:
+      \_constant: , line:69:30, endln:69:31
+        |vpiParent:
+        \_range: , line:69:21, endln:69:32
+        |vpiDecompile:0
+        |vpiSize:64
+        |UINT:0
+        |vpiConstType:9
+  |vpiParameter:
+  \_parameter: (work@rggen_or_reducer.WIDTH), line:3:17, endln:3:22
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |UINT:2
+    |vpiTypespec:
+    \_int_typespec: , line:3:13, endln:3:16
+      |vpiParent:
+      \_parameter: (work@rggen_or_reducer.WIDTH), line:3:17, endln:3:22
+      |vpiSigned:1
+    |vpiSigned:1
+    |vpiName:WIDTH
+    |vpiFullName:work@rggen_or_reducer.WIDTH
+  |vpiParameter:
+  \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |UINT:4
+    |vpiTypespec:
+    \_int_typespec: , line:4:13, endln:4:16
+      |vpiParent:
+      \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+      |vpiSigned:1
+    |vpiSigned:1
+    |vpiName:N
+    |vpiFullName:work@rggen_or_reducer.N
+  |vpiParameter:
+  \_parameter: (work@rggen_or_reducer.SUB_N_LIST_P), line:65:33, endln:65:45
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiTypespec:
+    \_bit_typespec: , line:65:15, endln:65:32
+      |vpiParent:
+      \_parameter: (work@rggen_or_reducer.SUB_N_LIST_P), line:65:33, endln:65:45
+      |vpiRange:
+      \_range: , line:65:19, endln:65:26
+        |vpiParent:
+        \_bit_typespec: , line:65:15, endln:65:32
+        |vpiLeftRange:
+        \_operation: , line:65:20, endln:65:23
+          |vpiParent:
+          \_range: , line:65:19, endln:65:26
+          |vpiOpType:11
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.SUB_N_LIST_P.N), line:65:20, endln:65:21
+            |vpiParent:
+            \_operation: , line:65:20, endln:65:23
+            |vpiName:N
+            |vpiFullName:work@rggen_or_reducer.SUB_N_LIST_P.N
+            |vpiActual:
+            \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+          |vpiOperand:
+          \_constant: , line:65:22, endln:65:23
+            |vpiParent:
+            \_operation: , line:65:20, endln:65:23
+            |vpiDecompile:1
+            |vpiSize:64
+            |UINT:1
+            |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:65:24, endln:65:25
+          |vpiParent:
+          \_range: , line:65:19, endln:65:26
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+      |vpiRange:
+      \_range: , line:65:26, endln:65:32
+        |vpiParent:
+        \_bit_typespec: , line:65:15, endln:65:32
+        |vpiLeftRange:
+        \_constant: , line:65:27, endln:65:29
+          |vpiParent:
+          \_range: , line:65:26, endln:65:32
+          |vpiDecompile:15
+          |vpiSize:64
+          |UINT:15
+          |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:65:30, endln:65:31
+          |vpiParent:
+          \_range: , line:65:26, endln:65:32
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiLocalParam:1
+    |vpiName:SUB_N_LIST_P
+    |vpiFullName:work@rggen_or_reducer.SUB_N_LIST_P
+  |vpiParameter:
+  \_parameter: (work@rggen_or_reducer.OFFSET_LIST), line:66:33, endln:66:44
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiTypespec:
+    \_bit_typespec: , line:66:15, endln:66:32
+      |vpiParent:
+      \_parameter: (work@rggen_or_reducer.OFFSET_LIST), line:66:33, endln:66:44
+      |vpiRange:
+      \_range: , line:66:19, endln:66:26
+        |vpiParent:
+        \_bit_typespec: , line:66:15, endln:66:32
+        |vpiLeftRange:
+        \_operation: , line:66:20, endln:66:23
+          |vpiParent:
+          \_range: , line:66:19, endln:66:26
+          |vpiOpType:11
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.OFFSET_LIST.N), line:66:20, endln:66:21
+            |vpiParent:
+            \_operation: , line:66:20, endln:66:23
+            |vpiName:N
+            |vpiFullName:work@rggen_or_reducer.OFFSET_LIST.N
+            |vpiActual:
+            \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+          |vpiOperand:
+          \_constant: , line:66:22, endln:66:23
+            |vpiParent:
+            \_operation: , line:66:20, endln:66:23
+            |vpiDecompile:1
+            |vpiSize:64
+            |UINT:1
+            |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:66:24, endln:66:25
+          |vpiParent:
+          \_range: , line:66:19, endln:66:26
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+      |vpiRange:
+      \_range: , line:66:26, endln:66:32
+        |vpiParent:
+        \_bit_typespec: , line:66:15, endln:66:32
+        |vpiLeftRange:
+        \_constant: , line:66:27, endln:66:29
+          |vpiParent:
+          \_range: , line:66:26, endln:66:32
+          |vpiDecompile:15
+          |vpiSize:64
+          |UINT:15
+          |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:66:30, endln:66:31
+          |vpiParent:
+          \_range: , line:66:26, endln:66:32
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiLocalParam:1
+    |vpiName:OFFSET_LIST
+    |vpiFullName:work@rggen_or_reducer.OFFSET_LIST
+  |vpiParameter:
+  \_parameter: (work@rggen_or_reducer.NEXT_N), line:67:33, endln:67:39
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiTypespec:
+    \_int_typespec: , line:67:15, endln:67:18
+      |vpiParent:
+      \_parameter: (work@rggen_or_reducer.NEXT_N), line:67:33, endln:67:39
+      |vpiSigned:1
+    |vpiSigned:1
+    |vpiLocalParam:1
+    |vpiName:NEXT_N
+    |vpiFullName:work@rggen_or_reducer.NEXT_N
+  |vpiParamAssign:
+  \_param_assign: , line:3:17, endln:3:26
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiRhs:
+    \_constant: , line:3:25, endln:3:26
+      |vpiParent:
+      \_param_assign: , line:3:17, endln:3:26
+      |vpiDecompile:2
+      |vpiSize:32
+      |UINT:2
+      |vpiTypespec:
+      \_int_typespec: , line:3:13, endln:3:16
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (work@rggen_or_reducer.WIDTH), line:3:17, endln:3:22
+  |vpiParamAssign:
+  \_param_assign: , line:4:17, endln:4:26
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiRhs:
+    \_constant: , line:4:25, endln:4:26
+      |vpiParent:
+      \_param_assign: , line:4:17, endln:4:26
+      |vpiDecompile:4
+      |vpiSize:32
+      |UINT:4
+      |vpiTypespec:
+      \_int_typespec: , line:4:13, endln:4:16
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+  |vpiParamAssign:
+  \_param_assign: , line:65:33, endln:65:66
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiRhs:
+    \_func_call: (get_sub_n_list), line:65:49, endln:65:63
+      |vpiParent:
+      \_param_assign: , line:65:33, endln:65:66
+      |vpiArgument:
+      \_constant: , line:65:64, endln:65:65
+        |vpiParent:
+        \_param_assign: , line:4:17, endln:4:26
+        |vpiDecompile:4
+        |vpiSize:32
+        |UINT:4
+        |vpiTypespec:
+        \_int_typespec: , line:4:13, endln:4:16
+          |vpiParent:
+          \_constant: , line:65:64, endln:65:65
+          |vpiSigned:1
+        |vpiConstType:9
+      |vpiName:get_sub_n_list
+      |vpiFunction:
+      \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+    |vpiLhs:
+    \_parameter: (work@rggen_or_reducer.SUB_N_LIST_P), line:65:33, endln:65:45
+  |vpiParamAssign:
+  \_param_assign: , line:66:33, endln:66:76
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiRhs:
+    \_func_call: (get_offset_list), line:66:47, endln:66:62
+      |vpiParent:
+      \_param_assign: , line:66:33, endln:66:76
+      |vpiArgument:
+      \_ref_obj: (work@rggen_or_reducer.SUB_N_LIST_P), line:66:63, endln:66:75
+        |vpiParent:
+        \_func_call: (get_offset_list), line:66:47, endln:66:62
+        |vpiName:SUB_N_LIST_P
+        |vpiFullName:work@rggen_or_reducer.SUB_N_LIST_P
+        |vpiActual:
+        \_parameter: (work@rggen_or_reducer.SUB_N_LIST_P), line:65:33, endln:65:45
+      |vpiName:get_offset_list
+      |vpiFunction:
+      \_function: (work@rggen_or_reducer.get_offset_list), line:39:3, endln:52:14
+    |vpiLhs:
+    \_parameter: (work@rggen_or_reducer.OFFSET_LIST), line:66:33, endln:66:44
+  |vpiParamAssign:
+  \_param_assign: , line:67:33, endln:67:70
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiRhs:
+    \_constant: , line:67:47, endln:67:70
+      |vpiParent:
+      \_param_assign: , line:67:33, endln:67:70
+      |vpiDecompile:3
+      |vpiSize:32
+      |UINT:3
+      |vpiTypespec:
+      \_int_typespec: , line:67:15, endln:67:18
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (work@rggen_or_reducer.NEXT_N), line:67:33, endln:67:39
+  |vpiDefName:work@rggen_or_reducer
+  |vpiTop:1
+  |vpiTaskFunc:
+  \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiName:get_sub_n_list
+    |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+    |vpiVariables:
+    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+      |vpiTypespec:
+      \_bit_typespec: , line:11:5, endln:11:22
+      |vpiName:list
+      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+    |vpiVariables:
+    \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+      |vpiTypespec:
+      \_int_typespec: , line:12:5, endln:12:8
+      |vpiName:list_index
+      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+      |vpiSigned:1
+    |vpiVariables:
+    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+      |vpiTypespec:
+      \_bit_typespec: , line:13:5, endln:13:15
+      |vpiName:current_n
+      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+    |vpiVariables:
+    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.half_n), line:14:23, endln:14:29
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+      |vpiTypespec:
+      \_bit_typespec: , line:14:5, endln:14:15
+      |vpiName:half_n
+      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.half_n
+    |vpiVisibility:1
+    |vpiAutomatic:1
+    |vpiReturn:
+    \_bit_var: (work@rggen_or_reducer.get_sub_n_list), line:10:22, endln:10:39
+    |vpiIODecl:
+    \_io_decl: (n), line:10:59, endln:10:60
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+      |vpiDirection:1
+      |vpiName:n
+      |vpiTypedef:
+      \_int_typespec: , line:10:55, endln:10:58
+    |vpiStmt:
+    \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_sub_n_list), line:10:3, endln:36:14
+      |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+      |vpiVariables:
+      \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiTypespec:
+        \_bit_typespec: , line:11:5, endln:11:22
+        |vpiName:list
+        |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+      |vpiVariables:
+      \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiTypespec:
+        \_int_typespec: , line:12:5, endln:12:8
+        |vpiName:list_index
+        |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+        |vpiSigned:1
+      |vpiVariables:
+      \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiTypespec:
+        \_bit_typespec: , line:13:5, endln:13:15
+        |vpiName:current_n
+        |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+      |vpiVariables:
+      \_bit_var: (work@rggen_or_reducer.get_sub_n_list.half_n), line:14:23, endln:14:29
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiTypespec:
+        \_bit_typespec: , line:14:5, endln:14:15
+        |vpiName:half_n
+        |vpiFullName:work@rggen_or_reducer.get_sub_n_list.half_n
+      |vpiStmt:
+      \_assignment: , line:16:5, endln:16:21
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiOpType:82
+        |vpiBlocking:1
+        |vpiRhs:
+        \_constant: , line:16:19, endln:16:21
+        |vpiLhs:
+        \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list), line:16:5, endln:16:9
+          |vpiParent:
+          \_assignment: , line:16:5, endln:16:21
+          |vpiName:list
+          |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+          |vpiActual:
+          \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+      |vpiStmt:
+      \_assignment: , line:17:5, endln:17:20
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiOpType:82
+        |vpiBlocking:1
+        |vpiRhs:
+        \_constant: , line:17:19, endln:17:20
+        |vpiLhs:
+        \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:17:5, endln:17:15
+          |vpiParent:
+          \_assignment: , line:17:5, endln:17:20
+          |vpiName:list_index
+          |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+          |vpiActual:
+          \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+      |vpiStmt:
+      \_assignment: , line:18:5, endln:18:25
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiOpType:82
+        |vpiBlocking:1
+        |vpiRhs:
+        \_operation: , line:18:19, endln:18:25
+          |vpiParent:
+          \_assignment: , line:18:5, endln:18:25
+          |vpiTypespec:
+          \_integer_typespec: , line:18:19, endln:18:21
+          |vpiOpType:67
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.n), line:18:23, endln:18:24
+            |vpiParent:
+            \_operation: , line:18:19, endln:18:25
+            |vpiName:n
+            |vpiFullName:work@rggen_or_reducer.get_sub_n_list.n
+            |vpiActual:
+            \_io_decl: (n), line:10:59, endln:10:60
+        |vpiLhs:
+        \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:18:5, endln:18:14
+          |vpiParent:
+          \_assignment: , line:18:5, endln:18:25
+          |vpiName:current_n
+          |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+          |vpiActual:
+          \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+      |vpiStmt:
+      \_while_stmt: , line:19:5, endln:19:10
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiCondition:
+        \_operation: , line:19:12, endln:19:25
+          |vpiParent:
+          \_while_stmt: , line:19:5, endln:19:10
+          |vpiOpType:18
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:19:12, endln:19:21
+            |vpiParent:
+            \_operation: , line:19:12, endln:19:25
+            |vpiName:current_n
+            |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+            |vpiActual:
+            \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+          |vpiOperand:
+          \_constant: , line:19:24, endln:19:25
+        |vpiStmt:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:19:27, endln:33:8
+          |vpiParent:
+          \_while_stmt: , line:19:5, endln:19:10
+          |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+          |vpiStmt:
+          \_assignment: , line:20:7, endln:20:30
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_sub_n_list), line:19:27, endln:33:8
+            |vpiOpType:82
+            |vpiBlocking:1
+            |vpiRhs:
+            \_operation: , line:20:17, endln:20:30
+              |vpiParent:
+              \_assignment: , line:20:7, endln:20:30
+              |vpiOpType:12
+              |vpiOperand:
+              \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:20:17, endln:20:26
+                |vpiParent:
+                \_operation: , line:20:17, endln:20:30
+                |vpiName:current_n
+                |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+                |vpiActual:
+                \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+              |vpiOperand:
+              \_constant: , line:20:29, endln:20:30
+            |vpiLhs:
+            \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.half_n), line:20:7, endln:20:13
+              |vpiParent:
+              \_assignment: , line:20:7, endln:20:30
+              |vpiName:half_n
+              |vpiFullName:work@rggen_or_reducer.get_sub_n_list.half_n
+              |vpiActual:
+              \_bit_var: (work@rggen_or_reducer.get_sub_n_list.half_n), line:14:23, endln:14:29
+          |vpiStmt:
+          \_if_else: , line:21:7, endln:29:10
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_sub_n_list), line:19:27, endln:33:8
+            |vpiCondition:
+            \_operation: , line:21:11, endln:21:43
+              |vpiParent:
+              \_if_else: , line:21:7, endln:29:10
+              |vpiOpType:26
+              |vpiOperand:
+              \_operation: , line:21:12, endln:21:25
+                |vpiParent:
+                \_operation: , line:21:11, endln:21:43
+                |vpiOpType:18
+                |vpiOperand:
+                \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:21:12, endln:21:21
+                  |vpiParent:
+                  \_operation: , line:21:12, endln:21:25
+                  |vpiName:current_n
+                  |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+                |vpiOperand:
+                \_constant: , line:21:24, endln:21:25
+              |vpiOperand:
+              \_operation: , line:21:31, endln:21:42
+                |vpiParent:
+                \_operation: , line:21:11, endln:21:43
+                |vpiOpType:21
+                |vpiOperand:
+                \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.half_n), line:21:31, endln:21:37
+                  |vpiParent:
+                  \_operation: , line:21:31, endln:21:42
+                  |vpiName:half_n
+                  |vpiFullName:work@rggen_or_reducer.get_sub_n_list.half_n
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_sub_n_list.half_n), line:14:23, endln:14:29
+                |vpiOperand:
+                \_constant: , line:21:41, endln:21:42
+            |vpiStmt:
+            \_begin: (work@rggen_or_reducer.get_sub_n_list), line:21:45, endln:23:10
+              |vpiParent:
+              \_if_else: , line:21:7, endln:29:10
+              |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+              |vpiStmt:
+              \_assignment: , line:22:9, endln:22:35
+                |vpiParent:
+                \_begin: (work@rggen_or_reducer.get_sub_n_list), line:21:45, endln:23:10
+                |vpiOpType:82
+                |vpiBlocking:1
+                |vpiRhs:
+                \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.half_n), line:22:29, endln:22:35
+                  |vpiParent:
+                  \_assignment: , line:22:9, endln:22:35
+                  |vpiName:half_n
+                  |vpiFullName:work@rggen_or_reducer.get_sub_n_list.half_n
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_sub_n_list.half_n), line:14:23, endln:14:29
+                |vpiLhs:
+                \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:22:9, endln:22:25
+                  |vpiParent:
+                  \_assignment: , line:22:9, endln:22:35
+                  |vpiName:list
+                  |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+                  |vpiIndex:
+                  \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:22:14, endln:22:24
+                    |vpiParent:
+                    \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:22:9, endln:22:25
+                    |vpiName:list_index
+                    |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+                    |vpiActual:
+                    \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+            |vpiElseStmt:
+            \_if_else: , line:24:12, endln:29:10
+              |vpiParent:
+              \_if_else: , line:21:7, endln:29:10
+              |vpiCondition:
+              \_operation: , line:24:16, endln:24:30
+                |vpiParent:
+                \_if_else: , line:24:12, endln:29:10
+                |vpiOpType:19
+                |vpiOperand:
+                \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:24:16, endln:24:25
+                  |vpiParent:
+                  \_operation: , line:24:16, endln:24:30
+                  |vpiName:current_n
+                  |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+                |vpiOperand:
+                \_constant: , line:24:29, endln:24:30
+              |vpiStmt:
+              \_begin: (work@rggen_or_reducer.get_sub_n_list), line:24:32, endln:26:10
+                |vpiParent:
+                \_if_else: , line:24:12, endln:29:10
+                |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+                |vpiStmt:
+                \_assignment: , line:25:9, endln:25:30
+                  |vpiParent:
+                  \_begin: (work@rggen_or_reducer.get_sub_n_list), line:24:32, endln:26:10
+                  |vpiOpType:82
+                  |vpiBlocking:1
+                  |vpiRhs:
+                  \_constant: , line:25:29, endln:25:30
+                  |vpiLhs:
+                  \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:25:9, endln:25:25
+                    |vpiParent:
+                    \_assignment: , line:25:9, endln:25:30
+                    |vpiName:list
+                    |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+                    |vpiActual:
+                    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+                    |vpiIndex:
+                    \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:25:14, endln:25:24
+                      |vpiParent:
+                      \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:25:9, endln:25:25
+                      |vpiName:list_index
+                      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+                      |vpiActual:
+                      \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+              |vpiElseStmt:
+              \_begin: (work@rggen_or_reducer.get_sub_n_list), line:27:12, endln:29:10
+                |vpiParent:
+                \_if_else: , line:24:12, endln:29:10
+                |vpiFullName:work@rggen_or_reducer.get_sub_n_list
+                |vpiStmt:
+                \_assignment: , line:28:9, endln:28:38
+                  |vpiParent:
+                  \_begin: (work@rggen_or_reducer.get_sub_n_list), line:27:12, endln:29:10
+                  |vpiOpType:82
+                  |vpiBlocking:1
+                  |vpiRhs:
+                  \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:28:29, endln:28:38
+                    |vpiParent:
+                    \_assignment: , line:28:9, endln:28:38
+                    |vpiName:current_n
+                    |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+                    |vpiActual:
+                    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+                  |vpiLhs:
+                  \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:28:9, endln:28:25
+                    |vpiParent:
+                    \_assignment: , line:28:9, endln:28:38
+                    |vpiName:list
+                    |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+                    |vpiActual:
+                    \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+                    |vpiIndex:
+                    \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:28:14, endln:28:24
+                      |vpiParent:
+                      \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:28:9, endln:28:25
+                      |vpiName:list_index
+                      |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+                      |vpiActual:
+                      \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+          |vpiStmt:
+          \_assignment: , line:31:7, endln:31:38
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_sub_n_list), line:19:27, endln:33:8
+            |vpiOpType:11
+            |vpiBlocking:1
+            |vpiRhs:
+            \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:31:27, endln:31:37
+              |vpiParent:
+              \_assignment: , line:31:7, endln:31:38
+              |vpiName:list
+              |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+              |vpiActual:
+              \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+              |vpiIndex:
+              \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:31:27, endln:31:37
+                |vpiParent:
+                \_bit_select: (work@rggen_or_reducer.get_sub_n_list.list), line:31:27, endln:31:37
+                |vpiName:list_index
+                |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+                |vpiActual:
+                \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+            |vpiLhs:
+            \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.current_n), line:31:7, endln:31:16
+              |vpiParent:
+              \_assignment: , line:31:7, endln:31:38
+              |vpiName:current_n
+              |vpiFullName:work@rggen_or_reducer.get_sub_n_list.current_n
+              |vpiActual:
+              \_bit_var: (work@rggen_or_reducer.get_sub_n_list.current_n), line:13:23, endln:13:32
+          |vpiStmt:
+          \_assignment: , line:32:7, endln:32:23
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_sub_n_list), line:19:27, endln:33:8
+            |vpiOpType:24
+            |vpiBlocking:1
+            |vpiRhs:
+            \_constant: , line:32:22, endln:32:23
+            |vpiLhs:
+            \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list_index), line:32:7, endln:32:17
+              |vpiParent:
+              \_assignment: , line:32:7, endln:32:23
+              |vpiName:list_index
+              |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list_index
+              |vpiActual:
+              \_int_var: (work@rggen_or_reducer.get_sub_n_list.list_index), line:12:23, endln:12:33
+      |vpiStmt:
+      \_return_stmt: , line:35:5, endln:35:11
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_sub_n_list), line:12:5, endln:12:34
+        |vpiCondition:
+        \_ref_obj: (work@rggen_or_reducer.get_sub_n_list.list), line:35:12, endln:35:16
+          |vpiParent:
+          \_return_stmt: , line:35:5, endln:35:11
+          |vpiName:list
+          |vpiFullName:work@rggen_or_reducer.get_sub_n_list.list
+          |vpiActual:
+          \_bit_var: (work@rggen_or_reducer.get_sub_n_list.list), line:11:23, endln:11:27
+    |vpiInstance:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+  |vpiTaskFunc:
+  \_function: (work@rggen_or_reducer.get_offset_list), line:39:3, endln:52:14
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiName:get_offset_list
+    |vpiFullName:work@rggen_or_reducer.get_offset_list
+    |vpiVariables:
+    \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_offset_list), line:39:3, endln:52:14
+      |vpiTypespec:
+      \_bit_typespec: , line:40:5, endln:40:22
+      |vpiName:list
+      |vpiFullName:work@rggen_or_reducer.get_offset_list.list
+    |vpiVisibility:1
+    |vpiAutomatic:1
+    |vpiReturn:
+    \_bit_var: (work@rggen_or_reducer.get_offset_list), line:39:22, endln:39:39
+    |vpiIODecl:
+    \_io_decl: (sub_n_list), line:39:74, endln:39:84
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_offset_list), line:39:3, endln:52:14
+      |vpiDirection:1
+      |vpiName:sub_n_list
+      |vpiTypedef:
+      \_bit_typespec: , line:39:56, endln:39:59
+    |vpiStmt:
+    \_begin: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:49:8
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_offset_list), line:39:3, endln:52:14
+      |vpiFullName:work@rggen_or_reducer.get_offset_list
+      |vpiVariables:
+      \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:49:8
+        |vpiTypespec:
+        \_bit_typespec: , line:40:5, endln:40:22
+        |vpiName:list
+        |vpiFullName:work@rggen_or_reducer.get_offset_list.list
+      |vpiStmt:
+      \_for_stmt: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:42:8
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:49:8
+        |vpiFullName:work@rggen_or_reducer.get_offset_list
+        |vpiForInitStmt:
+        \_assign_stmt: , line:42:10, endln:42:19
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:42:8
+          |vpiRhs:
+          \_constant: , line:42:18, endln:42:19
+          |vpiLhs:
+          \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+            |vpiParent:
+            \_assign_stmt: , line:42:10, endln:42:19
+            |vpiTypespec:
+            \_int_typespec: , line:42:10, endln:42:13
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+            |vpiSigned:1
+        |vpiForIncStmt:
+        \_operation: , line:42:26, endln:42:29
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:42:8
+          |vpiOpType:62
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_offset_list.i), line:42:28, endln:42:29
+            |vpiParent:
+            \_operation: , line:42:26, endln:42:29
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+            |vpiActual:
+            \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+        |vpiCondition:
+        \_operation: , line:42:20, endln:42:25
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:42:8
+          |vpiOpType:20
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_offset_list.i), line:42:20, endln:42:21
+            |vpiParent:
+            \_operation: , line:42:20, endln:42:25
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+            |vpiActual:
+            \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_offset_list.N), line:42:24, endln:42:25
+            |vpiParent:
+            \_operation: , line:42:20, endln:42:25
+            |vpiName:N
+            |vpiFullName:work@rggen_or_reducer.get_offset_list.N
+            |vpiActual:
+            \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+        |vpiStmt:
+        \_begin: (work@rggen_or_reducer.get_offset_list), line:42:31, endln:49:8
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:42:8
+          |vpiFullName:work@rggen_or_reducer.get_offset_list
+          |vpiStmt:
+          \_if_else: , line:43:7, endln:48:10
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_offset_list), line:42:31, endln:49:8
+            |vpiCondition:
+            \_operation: , line:43:11, endln:43:17
+              |vpiParent:
+              \_if_else: , line:43:7, endln:48:10
+              |vpiOpType:14
+              |vpiOperand:
+              \_ref_obj: (work@rggen_or_reducer.get_offset_list.i), line:43:11, endln:43:12
+                |vpiParent:
+                \_operation: , line:43:11, endln:43:17
+                |vpiName:i
+                |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+                |vpiActual:
+                \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+              |vpiOperand:
+              \_constant: , line:43:16, endln:43:17
+            |vpiStmt:
+            \_begin: (work@rggen_or_reducer.get_offset_list), line:43:19, endln:45:10
+              |vpiParent:
+              \_if_else: , line:43:7, endln:48:10
+              |vpiFullName:work@rggen_or_reducer.get_offset_list
+              |vpiStmt:
+              \_assignment: , line:44:9, endln:44:20
+                |vpiParent:
+                \_begin: (work@rggen_or_reducer.get_offset_list), line:43:19, endln:45:10
+                |vpiOpType:82
+                |vpiBlocking:1
+                |vpiRhs:
+                \_constant: , line:44:19, endln:44:20
+                |vpiLhs:
+                \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:44:9, endln:44:16
+                  |vpiParent:
+                  \_assignment: , line:44:9, endln:44:20
+                  |vpiName:list
+                  |vpiFullName:work@rggen_or_reducer.get_offset_list.list
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+                  |vpiIndex:
+                  \_ref_obj: (work@rggen_or_reducer.get_offset_list.i), line:44:14, endln:44:15
+                    |vpiParent:
+                    \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:44:9, endln:44:16
+                    |vpiName:i
+                    |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+                    |vpiActual:
+                    \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+            |vpiElseStmt:
+            \_begin: (work@rggen_or_reducer.get_offset_list), line:46:12, endln:48:10
+              |vpiParent:
+              \_if_else: , line:43:7, endln:48:10
+              |vpiFullName:work@rggen_or_reducer.get_offset_list
+              |vpiStmt:
+              \_assignment: , line:47:9, endln:47:46
+                |vpiParent:
+                \_begin: (work@rggen_or_reducer.get_offset_list), line:46:12, endln:48:10
+                |vpiOpType:82
+                |vpiBlocking:1
+                |vpiRhs:
+                \_operation: , line:47:19, endln:47:46
+                  |vpiParent:
+                  \_assignment: , line:47:9, endln:47:46
+                  |vpiOpType:24
+                  |vpiOperand:
+                  \_bit_select: (work@rggen_or_reducer.get_offset_list.sub_n_list), line:47:30, endln:47:33
+                    |vpiParent:
+                    \_operation: , line:47:19, endln:47:46
+                    |vpiName:sub_n_list
+                    |vpiFullName:work@rggen_or_reducer.get_offset_list.sub_n_list
+                    |vpiActual:
+                    \_io_decl: (sub_n_list), line:39:74, endln:39:84
+                    |vpiIndex:
+                    \_operation: , line:47:30, endln:47:33
+                      |vpiParent:
+                      \_bit_select: (work@rggen_or_reducer.get_offset_list.sub_n_list), line:47:30, endln:47:33
+                      |vpiOpType:11
+                      |vpiOperand:
+                      \_ref_obj: (work@rggen_or_reducer.get_offset_list.sub_n_list.i), line:47:30, endln:47:31
+                        |vpiParent:
+                        \_operation: , line:47:30, endln:47:33
+                        |vpiName:i
+                        |vpiFullName:work@rggen_or_reducer.get_offset_list.sub_n_list.i
+                        |vpiActual:
+                        \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+                      |vpiOperand:
+                      \_constant: , line:47:32, endln:47:33
+                  |vpiOperand:
+                  \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:47:42, endln:47:45
+                    |vpiParent:
+                    \_operation: , line:47:19, endln:47:46
+                    |vpiName:list
+                    |vpiFullName:work@rggen_or_reducer.get_offset_list.list
+                    |vpiActual:
+                    \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+                    |vpiIndex:
+                    \_operation: , line:47:42, endln:47:45
+                      |vpiParent:
+                      \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:47:42, endln:47:45
+                      |vpiOpType:11
+                      |vpiOperand:
+                      \_ref_obj: (work@rggen_or_reducer.get_offset_list.list.i), line:47:42, endln:47:43
+                        |vpiParent:
+                        \_operation: , line:47:42, endln:47:45
+                        |vpiName:i
+                        |vpiFullName:work@rggen_or_reducer.get_offset_list.list.i
+                        |vpiActual:
+                        \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+                      |vpiOperand:
+                      \_constant: , line:47:44, endln:47:45
+                |vpiLhs:
+                \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:47:9, endln:47:16
+                  |vpiParent:
+                  \_assignment: , line:47:9, endln:47:46
+                  |vpiName:list
+                  |vpiFullName:work@rggen_or_reducer.get_offset_list.list
+                  |vpiActual:
+                  \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+                  |vpiIndex:
+                  \_ref_obj: (work@rggen_or_reducer.get_offset_list.i), line:47:14, endln:47:15
+                    |vpiParent:
+                    \_bit_select: (work@rggen_or_reducer.get_offset_list.list), line:47:9, endln:47:16
+                    |vpiName:i
+                    |vpiFullName:work@rggen_or_reducer.get_offset_list.i
+                    |vpiActual:
+                    \_int_var: (work@rggen_or_reducer.get_offset_list.i), line:42:14, endln:42:15
+      |vpiStmt:
+      \_return_stmt: , line:51:5, endln:51:11
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_offset_list), line:42:5, endln:49:8
+        |vpiCondition:
+        \_ref_obj: (work@rggen_or_reducer.get_offset_list.list), line:51:12, endln:51:16
+          |vpiParent:
+          \_return_stmt: , line:51:5, endln:51:11
+          |vpiName:list
+          |vpiFullName:work@rggen_or_reducer.get_offset_list.list
+          |vpiActual:
+          \_bit_var: (work@rggen_or_reducer.get_offset_list.list), line:40:23, endln:40:27
+    |vpiInstance:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+  |vpiTaskFunc:
+  \_function: (work@rggen_or_reducer.get_next_n), line:54:3, endln:63:14
+    |vpiParent:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+    |vpiName:get_next_n
+    |vpiFullName:work@rggen_or_reducer.get_next_n
+    |vpiVariables:
+    \_int_var: (work@rggen_or_reducer.get_next_n.next_n), line:55:9, endln:55:15
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_next_n), line:54:3, endln:63:14
+      |vpiTypespec:
+      \_int_typespec: , line:55:5, endln:55:8
+      |vpiName:next_n
+      |vpiFullName:work@rggen_or_reducer.get_next_n.next_n
+      |vpiSigned:1
+    |vpiVisibility:1
+    |vpiAutomatic:1
+    |vpiReturn:
+    \_int_var: (work@rggen_or_reducer.get_next_n), line:54:22, endln:54:25
+    |vpiIODecl:
+    \_io_decl: (sub_n_list), line:54:55, endln:54:65
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_next_n), line:54:3, endln:63:14
+      |vpiDirection:1
+      |vpiName:sub_n_list
+      |vpiTypedef:
+      \_bit_typespec: , line:54:37, endln:54:40
+    |vpiStmt:
+    \_begin: (work@rggen_or_reducer.get_next_n), line:57:5, endln:57:17
+      |vpiParent:
+      \_function: (work@rggen_or_reducer.get_next_n), line:54:3, endln:63:14
+      |vpiFullName:work@rggen_or_reducer.get_next_n
+      |vpiVariables:
+      \_int_var: (work@rggen_or_reducer.get_next_n.next_n), line:55:9, endln:55:15
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_next_n), line:57:5, endln:57:17
+        |vpiTypespec:
+        \_int_typespec: , line:55:5, endln:55:8
+        |vpiName:next_n
+        |vpiFullName:work@rggen_or_reducer.get_next_n.next_n
+        |vpiSigned:1
+      |vpiStmt:
+      \_assignment: , line:57:5, endln:57:16
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_next_n), line:57:5, endln:57:17
+        |vpiOpType:82
+        |vpiBlocking:1
+        |vpiRhs:
+        \_constant: , line:57:15, endln:57:16
+        |vpiLhs:
+        \_ref_obj: (work@rggen_or_reducer.get_next_n.next_n), line:57:5, endln:57:11
+          |vpiParent:
+          \_assignment: , line:57:5, endln:57:16
+          |vpiName:next_n
+          |vpiFullName:work@rggen_or_reducer.get_next_n.next_n
+          |vpiActual:
+          \_int_var: (work@rggen_or_reducer.get_next_n.next_n), line:55:9, endln:55:15
+      |vpiStmt:
+      \_for_stmt: (work@rggen_or_reducer.get_next_n), line:58:5, endln:58:8
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_next_n), line:57:5, endln:57:17
+        |vpiFullName:work@rggen_or_reducer.get_next_n
+        |vpiForInitStmt:
+        \_assign_stmt: , line:58:10, endln:58:19
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_next_n), line:58:5, endln:58:8
+          |vpiRhs:
+          \_constant: , line:58:18, endln:58:19
+          |vpiLhs:
+          \_int_var: (work@rggen_or_reducer.get_next_n.i), line:58:14, endln:58:15
+            |vpiParent:
+            \_assign_stmt: , line:58:10, endln:58:19
+            |vpiTypespec:
+            \_int_typespec: , line:58:10, endln:58:13
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_next_n.i
+            |vpiSigned:1
+        |vpiForIncStmt:
+        \_operation: , line:58:26, endln:58:29
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_next_n), line:58:5, endln:58:8
+          |vpiOpType:62
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_next_n.i), line:58:28, endln:58:29
+            |vpiParent:
+            \_operation: , line:58:26, endln:58:29
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_next_n.i
+            |vpiActual:
+            \_int_var: (work@rggen_or_reducer.get_next_n.i), line:58:14, endln:58:15
+        |vpiCondition:
+        \_operation: , line:58:20, endln:58:25
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_next_n), line:58:5, endln:58:8
+          |vpiOpType:20
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_next_n.i), line:58:20, endln:58:21
+            |vpiParent:
+            \_operation: , line:58:20, endln:58:25
+            |vpiName:i
+            |vpiFullName:work@rggen_or_reducer.get_next_n.i
+            |vpiActual:
+            \_int_var: (work@rggen_or_reducer.get_next_n.i), line:58:14, endln:58:15
+          |vpiOperand:
+          \_ref_obj: (work@rggen_or_reducer.get_next_n.N), line:58:24, endln:58:25
+            |vpiParent:
+            \_operation: , line:58:20, endln:58:25
+            |vpiName:N
+            |vpiFullName:work@rggen_or_reducer.get_next_n.N
+            |vpiActual:
+            \_parameter: (work@rggen_or_reducer.N), line:4:17, endln:4:18
+        |vpiStmt:
+        \_begin: (work@rggen_or_reducer.get_next_n), line:58:31, endln:60:8
+          |vpiParent:
+          \_for_stmt: (work@rggen_or_reducer.get_next_n), line:58:5, endln:58:8
+          |vpiFullName:work@rggen_or_reducer.get_next_n
+          |vpiStmt:
+          \_assignment: , line:59:7, endln:59:48
+            |vpiParent:
+            \_begin: (work@rggen_or_reducer.get_next_n), line:58:31, endln:60:8
+            |vpiOpType:24
+            |vpiBlocking:1
+            |vpiRhs:
+            \_operation: , line:59:19, endln:59:47
+              |vpiParent:
+              \_assignment: , line:59:7, endln:59:48
+              |vpiOpType:32
+              |vpiOperand:
+              \_operation: , line:59:20, endln:59:38
+                |vpiParent:
+                \_operation: , line:59:19, endln:59:47
+                |vpiOpType:15
+                |vpiOperand:
+                \_bit_select: (work@rggen_or_reducer.get_next_n.sub_n_list), line:59:31, endln:59:32
+                  |vpiParent:
+                  \_operation: , line:59:20, endln:59:38
+                  |vpiName:sub_n_list
+                  |vpiFullName:work@rggen_or_reducer.get_next_n.sub_n_list
+                  |vpiActual:
+                  \_io_decl: (sub_n_list), line:54:55, endln:54:65
+                  |vpiIndex:
+                  \_ref_obj: (work@rggen_or_reducer.get_next_n.i), line:59:31, endln:59:32
+                    |vpiParent:
+                    \_bit_select: (work@rggen_or_reducer.get_next_n.sub_n_list), line:59:31, endln:59:32
+                    |vpiName:i
+                    |vpiFullName:work@rggen_or_reducer.get_next_n.i
+                    |vpiActual:
+                    \_int_var: (work@rggen_or_reducer.get_next_n.i), line:58:14, endln:58:15
+                |vpiOperand:
+                \_constant: , line:59:37, endln:59:38
+              |vpiOperand:
+              \_constant: , line:59:42, endln:59:43
+              |vpiOperand:
+              \_constant: , line:59:46, endln:59:47
+            |vpiLhs:
+            \_ref_obj: (work@rggen_or_reducer.get_next_n.next_n), line:59:7, endln:59:13
+              |vpiParent:
+              \_assignment: , line:59:7, endln:59:48
+              |vpiName:next_n
+              |vpiFullName:work@rggen_or_reducer.get_next_n.next_n
+              |vpiActual:
+              \_int_var: (work@rggen_or_reducer.get_next_n.next_n), line:55:9, endln:55:15
+      |vpiStmt:
+      \_return_stmt: , line:62:5, endln:62:11
+        |vpiParent:
+        \_begin: (work@rggen_or_reducer.get_next_n), line:57:5, endln:57:17
+        |vpiCondition:
+        \_ref_obj: (work@rggen_or_reducer.get_next_n.next_n), line:62:12, endln:62:18
+          |vpiParent:
+          \_return_stmt: , line:62:5, endln:62:11
+          |vpiName:next_n
+          |vpiFullName:work@rggen_or_reducer.get_next_n.next_n
+          |vpiActual:
+          \_int_var: (work@rggen_or_reducer.get_next_n.next_n), line:55:9, endln:55:15
+    |vpiInstance:
+    \_module_inst: work@rggen_or_reducer (work@rggen_or_reducer), file:${SURELOG_DIR}/tests/FuncInModule/dut.sv, line:2:1, endln:71:10
+  |vpiTopModule:1
+===================
+[  FATAL] : 0
+[ SYNTAX] : 0
+[  ERROR] : 0
+[WARNING] : 1
+[   NOTE] : 5
diff --git a/tests/FuncInModule/FuncInModule.sl b/tests/FuncInModule/FuncInModule.sl
new file mode 100644
index 0000000000..b461620aca
--- /dev/null
+++ b/tests/FuncInModule/FuncInModule.sl
@@ -0,0 +1 @@
+-parse -d uhdm -d coveruhdm -elabuhdm -d ast dut.sv -nobuiltin
diff --git a/tests/FuncInModule/dut.sv b/tests/FuncInModule/dut.sv
new file mode 100644
index 0000000000..dd81f1f9cf
--- /dev/null
+++ b/tests/FuncInModule/dut.sv
@@ -0,0 +1,71 @@
+
+module rggen_or_reducer #(
+  parameter int WIDTH = 2,
+  parameter int N     = 4
+)(
+ // input   logic [N-1:0][WIDTH-1:0]  i_data,
+//  output  logic [WIDTH-1:0]         o_result
+);
+
+  function automatic bit [N-1:0][15:0] get_sub_n_list(int n);
+    bit [N-1:0][15:0] list;
+    int               list_index;
+    bit [15:0]        current_n;
+    bit [15:0]        half_n;
+
+    list        = '0;
+    list_index  = 0;
+    current_n   = 16'(n);
+    while (current_n > 0) begin
+      half_n  = current_n / 2;
+      if ((current_n > 4) && (half_n <= 4)) begin
+        list[list_index]  = half_n;
+      end
+      else if (current_n >= 4) begin
+        list[list_index]  = 4;
+      end
+      else begin
+        list[list_index]  = current_n;
+      end
+
+      current_n   -= list[list_index];
+      list_index  += 1;
+    end
+
+    return list;
+  endfunction
+
+
+  function automatic bit [N-1:0][15:0] get_offset_list(bit [N-1:0][15:0] sub_n_list);
+    bit [N-1:0][15:0] list;
+
+    for (int i = 0;i < N;++i) begin
+      if (i == 0) begin
+        list[i] = 0;
+      end
+      else begin
+        list[i] = sub_n_list[i-1] + list[i-1];
+      end
+    end
+
+    return list;
+  endfunction
+
+  function automatic int get_next_n(bit [N-1:0][15:0] sub_n_list);
+    int next_n;
+
+    next_n  = 0;
+    for (int i = 0;i < N;++i) begin
+      next_n  += ((sub_n_list[i] != 0) ? 1 : 0);
+    end
+
+    return next_n;
+  endfunction
+
+  localparam  bit [N-1:0][15:0] SUB_N_LIST_P  = get_sub_n_list(N);
+  localparam  bit [N-1:0][15:0] OFFSET_LIST = get_offset_list(SUB_N_LIST_P);
+  localparam  int               NEXT_N      = get_next_n(OFFSET_LIST);
+
+  logic [NEXT_N-1:0][WIDTH-1:0] next_data;
+
+endmodule
diff --git a/tests/LogicArrayParam/LogicArrayParam.log b/tests/LogicArrayParam/LogicArrayParam.log
new file mode 100644
index 0000000000..4ab8f0e33b
--- /dev/null
+++ b/tests/LogicArrayParam/LogicArrayParam.log
@@ -0,0 +1,2746 @@
+[INF:CM0023] Creating log file ${SURELOG_DIR}/build/regression/LogicArrayParam/slpp_all/surelog.log.
+
+AST_DEBUG_BEGIN
+LIB:  work
+FILE: ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv
+n<> u<0> t<_INVALID_> f<0> l<0:0>
+n<> u<1> t<Null_rule> p<203> s<202> l<1:1> el<1:0>
+n<> u<2> t<PACKAGE> p<51> s<3> l<1:1> el<1:8>
+n<alert_handler_reg_pkg> u<3> t<StringConst> p<51> s<18> l<1:9> el<1:30>
+n<> u<4> t<IntegerAtomType_Int> p<5> l<4:13> el<4:16>
+n<> u<5> t<Data_type> p<6> c<4> l<4:13> el<4:16>
+n<> u<6> t<Data_type_or_implicit> p<16> c<5> s<15> l<4:13> el<4:16>
+n<NAlerts> u<7> t<StringConst> p<14> s<13> l<4:17> el<4:24>
+n<20> u<8> t<IntConst> p<9> l<4:27> el<4:29>
+n<> u<9> t<Primary_literal> p<10> c<8> l<4:27> el<4:29>
+n<> u<10> t<Constant_primary> p<11> c<9> l<4:27> el<4:29>
+n<> u<11> t<Constant_expression> p<12> c<10> l<4:27> el<4:29>
+n<> u<12> t<Constant_mintypmax_expression> p<13> c<11> l<4:27> el<4:29>
+n<> u<13> t<Constant_param_expression> p<14> c<12> l<4:27> el<4:29>
+n<> u<14> t<Param_assignment> p<15> c<7> l<4:17> el<4:29>
+n<> u<15> t<List_of_param_assignments> p<16> c<14> l<4:17> el<4:29>
+n<> u<16> t<Parameter_declaration> p<17> c<6> l<4:3> el<4:29>
+n<> u<17> t<Package_or_generate_item_declaration> p<18> c<16> l<4:3> el<4:30>
+n<> u<18> t<Package_item> p<51> c<17> s<49> l<4:3> el<4:30>
+n<> u<19> t<IntVec_TypeLogic> p<36> s<35> l<5:13> el<5:18>
+n<NAlerts> u<20> t<StringConst> p<21> l<5:20> el<5:27>
+n<> u<21> t<Primary_literal> p<22> c<20> l<5:20> el<5:27>
+n<> u<22> t<Constant_primary> p<23> c<21> l<5:20> el<5:27>
+n<> u<23> t<Constant_expression> p<29> c<22> s<28> l<5:20> el<5:27>
+n<1> u<24> t<IntConst> p<25> l<5:28> el<5:29>
+n<> u<25> t<Primary_literal> p<26> c<24> l<5:28> el<5:29>
+n<> u<26> t<Constant_primary> p<27> c<25> l<5:28> el<5:29>
+n<> u<27> t<Constant_expression> p<29> c<26> l<5:28> el<5:29>
+n<> u<28> t<BinOp_Minus> p<29> s<27> l<5:27> el<5:28>
+n<> u<29> t<Constant_expression> p<34> c<23> s<33> l<5:20> el<5:29>
+n<0> u<30> t<IntConst> p<31> l<5:30> el<5:31>
+n<> u<31> t<Primary_literal> p<32> c<30> l<5:30> el<5:31>
+n<> u<32> t<Constant_primary> p<33> c<31> l<5:30> el<5:31>
+n<> u<33> t<Constant_expression> p<34> c<32> l<5:30> el<5:31>
+n<> u<34> t<Constant_range> p<35> c<29> l<5:20> el<5:31>
+n<> u<35> t<Packed_dimension> p<36> c<34> l<5:19> el<5:32>
+n<> u<36> t<Data_type> p<37> c<19> l<5:13> el<5:32>
+n<> u<37> t<Data_type_or_implicit> p<47> c<36> s<46> l<5:13> el<5:32>
+n<AsyncOn> u<38> t<StringConst> p<45> s<44> l<5:33> el<5:40>
+n<20'b01100001100000001111> u<39> t<IntConst> p<40> l<5:43> el<5:67>
+n<> u<40> t<Primary_literal> p<41> c<39> l<5:43> el<5:67>
+n<> u<41> t<Constant_primary> p<42> c<40> l<5:43> el<5:67>
+n<> u<42> t<Constant_expression> p<43> c<41> l<5:43> el<5:67>
+n<> u<43> t<Constant_mintypmax_expression> p<44> c<42> l<5:43> el<5:67>
+n<> u<44> t<Constant_param_expression> p<45> c<43> l<5:43> el<5:67>
+n<> u<45> t<Param_assignment> p<46> c<38> l<5:33> el<5:67>
+n<> u<46> t<List_of_param_assignments> p<47> c<45> l<5:33> el<5:67>
+n<> u<47> t<Parameter_declaration> p<48> c<37> l<5:3> el<5:67>
+n<> u<48> t<Package_or_generate_item_declaration> p<49> c<47> l<5:3> el<5:68>
+n<> u<49> t<Package_item> p<51> c<48> s<50> l<5:3> el<5:68>
+n<> u<50> t<ENDPACKAGE> p<51> l<6:1> el<6:11>
+n<> u<51> t<Package_declaration> p<52> c<2> l<1:1> el<6:11>
+n<> u<52> t<Description> p<202> c<51> s<110> l<1:1> el<6:11>
+n<> u<53> t<PACKAGE> p<109> s<54> l<9:1> el<9:8>
+n<alert_pkg> u<54> t<StringConst> p<109> s<73> l<9:9> el<9:18>
+n<> u<55> t<IntegerAtomType_Int> p<57> s<56> l<12:14> el<12:17>
+n<> u<56> t<Signing_Unsigned> p<57> l<12:18> el<12:26>
+n<> u<57> t<Data_type> p<58> c<55> l<12:14> el<12:26>
+n<> u<58> t<Data_type_or_implicit> p<71> c<57> s<70> l<12:14> el<12:26>
+n<NAlerts> u<59> t<StringConst> p<69> s<68> l<12:32> el<12:39>
+n<alert_handler_reg_pkg> u<60> t<StringConst> p<61> l<12:44> el<12:65>
+n<> u<61> t<Package_scope> p<65> c<60> s<62> l<12:44> el<12:67>
+n<NAlerts> u<62> t<StringConst> p<65> s<64> l<12:67> el<12:74>
+n<> u<63> t<Constant_bit_select> p<64> l<12:74> el<12:74>
+n<> u<64> t<Constant_select> p<65> c<63> l<12:74> el<12:74>
+n<> u<65> t<Constant_primary> p<66> c<61> l<12:44> el<12:74>
+n<> u<66> t<Constant_expression> p<67> c<65> l<12:44> el<12:74>
+n<> u<67> t<Constant_mintypmax_expression> p<68> c<66> l<12:44> el<12:74>
+n<> u<68> t<Constant_param_expression> p<69> c<67> l<12:44> el<12:74>
+n<> u<69> t<Param_assignment> p<70> c<59> l<12:32> el<12:74>
+n<> u<70> t<List_of_param_assignments> p<71> c<69> l<12:32> el<12:74>
+n<> u<71> t<Local_parameter_declaration> p<72> c<58> l<12:3> el<12:74>
+n<> u<72> t<Package_or_generate_item_declaration> p<73> c<71> l<12:3> el<12:75>
+n<> u<73> t<Package_item> p<109> c<72> s<107> l<12:3> el<12:75>
+n<> u<74> t<IntVec_TypeBit> p<91> s<90> l<13:14> el<13:17>
+n<NAlerts> u<75> t<StringConst> p<76> l<13:19> el<13:26>
+n<> u<76> t<Primary_literal> p<77> c<75> l<13:19> el<13:26>
+n<> u<77> t<Constant_primary> p<78> c<76> l<13:19> el<13:26>
+n<> u<78> t<Constant_expression> p<84> c<77> s<83> l<13:19> el<13:26>
+n<1> u<79> t<IntConst> p<80> l<13:27> el<13:28>
+n<> u<80> t<Primary_literal> p<81> c<79> l<13:27> el<13:28>
+n<> u<81> t<Constant_primary> p<82> c<80> l<13:27> el<13:28>
+n<> u<82> t<Constant_expression> p<84> c<81> l<13:27> el<13:28>
+n<> u<83> t<BinOp_Minus> p<84> s<82> l<13:26> el<13:27>
+n<> u<84> t<Constant_expression> p<89> c<78> s<88> l<13:19> el<13:28>
+n<0> u<85> t<IntConst> p<86> l<13:29> el<13:30>
+n<> u<86> t<Primary_literal> p<87> c<85> l<13:29> el<13:30>
+n<> u<87> t<Constant_primary> p<88> c<86> l<13:29> el<13:30>
+n<> u<88> t<Constant_expression> p<89> c<87> l<13:29> el<13:30>
+n<> u<89> t<Constant_range> p<90> c<84> l<13:19> el<13:30>
+n<> u<90> t<Packed_dimension> p<91> c<89> l<13:18> el<13:31>
+n<> u<91> t<Data_type> p<92> c<74> l<13:14> el<13:31>
+n<> u<92> t<Data_type_or_implicit> p<105> c<91> s<104> l<13:14> el<13:31>
+n<AsyncOn> u<93> t<StringConst> p<103> s<102> l<13:32> el<13:39>
+n<alert_handler_reg_pkg> u<94> t<StringConst> p<95> l<13:44> el<13:65>
+n<> u<95> t<Package_scope> p<99> c<94> s<96> l<13:44> el<13:67>
+n<AsyncOn> u<96> t<StringConst> p<99> s<98> l<13:67> el<13:74>
+n<> u<97> t<Constant_bit_select> p<98> l<13:74> el<13:74>
+n<> u<98> t<Constant_select> p<99> c<97> l<13:74> el<13:74>
+n<> u<99> t<Constant_primary> p<100> c<95> l<13:44> el<13:74>
+n<> u<100> t<Constant_expression> p<101> c<99> l<13:44> el<13:74>
+n<> u<101> t<Constant_mintypmax_expression> p<102> c<100> l<13:44> el<13:74>
+n<> u<102> t<Constant_param_expression> p<103> c<101> l<13:44> el<13:74>
+n<> u<103> t<Param_assignment> p<104> c<93> l<13:32> el<13:74>
+n<> u<104> t<List_of_param_assignments> p<105> c<103> l<13:32> el<13:74>
+n<> u<105> t<Local_parameter_declaration> p<106> c<92> l<13:3> el<13:74>
+n<> u<106> t<Package_or_generate_item_declaration> p<107> c<105> l<13:3> el<13:75>
+n<> u<107> t<Package_item> p<109> c<106> s<108> l<13:3> el<13:75>
+n<> u<108> t<ENDPACKAGE> p<109> l<15:1> el<15:11>
+n<> u<109> t<Package_declaration> p<110> c<53> l<9:1> el<15:11>
+n<> u<110> t<Description> p<202> c<109> s<118> l<9:1> el<15:11>
+n<module> u<111> t<Module_keyword> p<115> s<112> l<17:1> el<17:7>
+n<M> u<112> t<StringConst> p<115> s<114> l<17:8> el<17:9>
+n<> u<113> t<Port> p<114> l<17:10> el<17:10>
+n<> u<114> t<List_of_ports> p<115> c<113> l<17:9> el<17:11>
+n<> u<115> t<Module_nonansi_header> p<117> c<111> s<116> l<17:1> el<17:12>
+n<> u<116> t<ENDMODULE> p<117> l<18:1> el<18:10>
+n<> u<117> t<Module_declaration> p<118> c<115> l<17:1> el<18:10>
+n<> u<118> t<Description> p<202> c<117> s<201> l<17:1> el<18:10>
+n<module> u<119> t<Module_keyword> p<127> s<120> l<20:1> el<20:7>
+n<alert_handler> u<120> t<StringConst> p<127> s<123> l<20:8> el<20:21>
+n<alert_pkg> u<121> t<StringConst> p<122> l<21:10> el<21:19>
+n<> u<122> t<Package_import_item> p<123> c<121> l<21:10> el<21:22>
+n<> u<123> t<Package_import_declaration> p<127> c<122> s<124> l<21:3> el<21:23>
+n<> u<124> t<Parameter_port_list> p<127> s<126> l<22:1> el<22:4>
+n<> u<125> t<Port> p<126> l<22:6> el<22:6>
+n<> u<126> t<List_of_ports> p<127> c<125> l<22:5> el<22:7>
+n<> u<127> t<Module_nonansi_header> p<200> c<119> s<198> l<20:1> el<22:8>
+n<k> u<128> t<StringConst> p<133> s<132> l<25:15> el<25:16>
+n<0> u<129> t<IntConst> p<130> l<25:19> el<25:20>
+n<> u<130> t<Primary_literal> p<131> c<129> l<25:19> el<25:20>
+n<> u<131> t<Constant_primary> p<132> c<130> l<25:19> el<25:20>
+n<> u<132> t<Constant_expression> p<133> c<131> l<25:19> el<25:20>
+n<> u<133> t<Genvar_initialization> p<194> c<128> s<143> l<25:8> el<25:20>
+n<k> u<134> t<StringConst> p<135> l<25:23> el<25:24>
+n<> u<135> t<Primary_literal> p<136> c<134> l<25:23> el<25:24>
+n<> u<136> t<Constant_primary> p<137> c<135> l<25:23> el<25:24>
+n<> u<137> t<Constant_expression> p<143> c<136> s<142> l<25:23> el<25:24>
+n<NAlerts> u<138> t<StringConst> p<139> l<25:27> el<25:34>
+n<> u<139> t<Primary_literal> p<140> c<138> l<25:27> el<25:34>
+n<> u<140> t<Constant_primary> p<141> c<139> l<25:27> el<25:34>
+n<> u<141> t<Constant_expression> p<143> c<140> l<25:27> el<25:34>
+n<> u<142> t<BinOp_Less> p<143> s<141> l<25:25> el<25:26>
+n<> u<143> t<Constant_expression> p<194> c<137> s<146> l<25:23> el<25:34>
+n<k> u<144> t<StringConst> p<146> s<145> l<25:37> el<25:38>
+n<> u<145> t<IncDec_PlusPlus> p<146> l<25:38> el<25:40>
+n<> u<146> t<Genvar_iteration> p<194> c<144> s<193> l<25:37> el<25:40>
+n<gen_alerts> u<147> t<StringConst> p<192> s<168> l<25:50> el<25:60>
+n<> u<148> t<Data_type_or_implicit> p<163> s<162> l<26:16> el<26:16>
+n<debug> u<149> t<StringConst> p<161> s<160> l<26:16> el<26:21>
+n<AsyncOn> u<150> t<StringConst> p<157> s<156> l<26:24> el<26:31>
+n<k> u<151> t<StringConst> p<152> l<26:32> el<26:33>
+n<> u<152> t<Primary_literal> p<153> c<151> l<26:32> el<26:33>
+n<> u<153> t<Constant_primary> p<154> c<152> l<26:32> el<26:33>
+n<> u<154> t<Constant_expression> p<155> c<153> l<26:32> el<26:33>
+n<> u<155> t<Constant_bit_select> p<156> c<154> l<26:31> el<26:34>
+n<> u<156> t<Constant_select> p<157> c<155> l<26:31> el<26:34>
+n<> u<157> t<Constant_primary> p<158> c<150> l<26:24> el<26:34>
+n<> u<158> t<Constant_expression> p<159> c<157> l<26:24> el<26:34>
+n<> u<159> t<Constant_mintypmax_expression> p<160> c<158> l<26:24> el<26:34>
+n<> u<160> t<Constant_param_expression> p<161> c<159> l<26:24> el<26:34>
+n<> u<161> t<Param_assignment> p<162> c<149> l<26:16> el<26:34>
+n<> u<162> t<List_of_param_assignments> p<163> c<161> l<26:16> el<26:34>
+n<> u<163> t<Local_parameter_declaration> p<164> c<148> l<26:5> el<26:34>
+n<> u<164> t<Package_or_generate_item_declaration> p<165> c<163> l<26:5> el<26:35>
+n<> u<165> t<Module_or_generate_item_declaration> p<166> c<164> l<26:5> el<26:35>
+n<> u<166> t<Module_common_item> p<167> c<165> l<26:5> el<26:35>
+n<> u<167> t<Module_or_generate_item> p<168> c<166> l<26:5> el<26:35>
+n<> u<168> t<Generate_item> p<192> c<167> s<190> l<26:5> el<26:35>
+n<debug> u<169> t<StringConst> p<170> l<27:9> el<27:14>
+n<> u<170> t<Primary_literal> p<171> c<169> l<27:9> el<27:14>
+n<> u<171> t<Constant_primary> p<172> c<170> l<27:9> el<27:14>
+n<> u<172> t<Constant_expression> p<186> c<171> s<184> l<27:9> el<27:14>
+n<M> u<173> t<StringConst> p<179> s<178> l<28:7> el<28:8>
+n<u> u<174> t<StringConst> p<175> l<28:9> el<28:10>
+n<> u<175> t<Name_of_instance> p<178> c<174> s<177> l<28:9> el<28:10>
+n<> u<176> t<Ordered_port_connection> p<177> l<28:11> el<28:11>
+n<> u<177> t<List_of_port_connections> p<178> c<176> l<28:11> el<28:11>
+n<> u<178> t<Hierarchical_instance> p<179> c<175> l<28:9> el<28:12>
+n<> u<179> t<Module_instantiation> p<180> c<173> l<28:7> el<28:13>
+n<> u<180> t<Module_or_generate_item> p<181> c<179> l<28:7> el<28:13>
+n<> u<181> t<Generate_item> p<183> c<180> s<182> l<28:7> el<28:13>
+n<> u<182> t<END> p<183> l<29:5> el<29:8>
+n<> u<183> t<Generate_begin_end_block> p<184> c<181> l<27:16> el<29:8>
+n<> u<184> t<Generate_item> p<186> c<183> l<27:16> el<29:8>
+n<> u<185> t<IF> p<186> s<172> l<27:5> el<27:7>
+n<> u<186> t<If_generate_construct> p<187> c<185> l<27:5> el<29:8>
+n<> u<187> t<Conditional_generate_construct> p<188> c<186> l<27:5> el<29:8>
+n<> u<188> t<Module_common_item> p<189> c<187> l<27:5> el<29:8>
+n<> u<189> t<Module_or_generate_item> p<190> c<188> l<27:5> el<29:8>
+n<> u<190> t<Generate_item> p<192> c<189> s<191> l<27:5> el<29:8>
+n<> u<191> t<END> p<192> l<30:3> el<30:6>
+n<> u<192> t<Generate_begin_end_block> p<193> c<147> l<25:42> el<30:6>
+n<> u<193> t<Generate_item> p<194> c<192> l<25:42> el<30:6>
+n<> u<194> t<Loop_generate_construct> p<195> c<133> l<25:3> el<30:6>
+n<> u<195> t<Module_common_item> p<196> c<194> l<25:3> el<30:6>
+n<> u<196> t<Module_or_generate_item> p<197> c<195> l<25:3> el<30:6>
+n<> u<197> t<Non_port_module_item> p<198> c<196> l<25:3> el<30:6>
+n<> u<198> t<Module_item> p<200> c<197> s<199> l<25:3> el<30:6>
+n<> u<199> t<ENDMODULE> p<200> l<32:1> el<32:10>
+n<> u<200> t<Module_declaration> p<201> c<127> l<20:1> el<32:10>
+n<> u<201> t<Description> p<202> c<200> l<20:1> el<32:10>
+n<> u<202> t<Source_text> p<203> c<52> l<1:1> el<32:10>
+n<> u<203> t<Top_level_rule> c<1> l<1:1> el<108:3>
+AST_DEBUG_END
+[WRN:PA0205] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:1:1: No timescale set for "alert_handler_reg_pkg".
+
+[WRN:PA0205] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:9:1: No timescale set for "alert_pkg".
+
+[WRN:PA0205] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:17:1: No timescale set for "M".
+
+[WRN:PA0205] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:20:1: No timescale set for "alert_handler".
+
+[INF:CP0300] Compilation...
+
+[INF:CP0301] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:1:1: Compile package "alert_handler_reg_pkg".
+
+[INF:CP0301] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:9:1: Compile package "alert_pkg".
+
+[INF:CP0303] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:17:1: Compile module "work@M".
+
+[INF:CP0303] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:20:1: Compile module "work@alert_handler".
+
+[INF:EL0526] Design Elaboration...
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[0]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:28:7: Compile generate block "work@alert_handler.gen_alerts[0].genblk1".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[1]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:28:7: Compile generate block "work@alert_handler.gen_alerts[1].genblk1".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[2]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:28:7: Compile generate block "work@alert_handler.gen_alerts[2].genblk1".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[3]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:28:7: Compile generate block "work@alert_handler.gen_alerts[3].genblk1".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[4]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[5]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[6]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[7]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[8]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[9]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[10]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[11]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:28:7: Compile generate block "work@alert_handler.gen_alerts[11].genblk1".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[12]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:28:7: Compile generate block "work@alert_handler.gen_alerts[12].genblk1".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[13]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[14]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[15]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[16]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[17]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:28:7: Compile generate block "work@alert_handler.gen_alerts[17].genblk1".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[18]".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:28:7: Compile generate block "work@alert_handler.gen_alerts[18].genblk1".
+
+[INF:CP0335] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:25:42: Compile generate block "work@alert_handler.gen_alerts[19]".
+
+[NTE:EL0503] ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv:20:1: Top level module "work@alert_handler".
+
+[NTE:EL0508] Nb Top level modules: 1.
+
+[NTE:EL0509] Max instance depth: 4.
+
+[NTE:EL0510] Nb instances: 9.
+
+[NTE:EL0511] Nb leaf instances: 8.
+
+[INF:UH0706] Creating UHDM Model...
+
+=== UHDM Object Stats Begin (Non-Elaborated Model) ===
+assign_stmt                                            1
+begin                                                  1
+bit_select                                            41
+bit_typespec                                           8
+constant                                             329
+design                                                 1
+gen_for                                                1
+gen_if                                                 1
+gen_scope                                             56
+gen_scope_array                                       56
+import_typespec                                        1
+int_typespec                                          80
+int_var                                                2
+logic_net                                              1
+logic_typespec                                         7
+module_inst                                           56
+named_begin                                            1
+operation                                             29
+package                                                4
+param_assign                                          61
+parameter                                             83
+range                                                 55
+ref_module                                             9
+ref_obj                                               14
+ref_var                                                1
+unsupported_typespec                                   1
+=== UHDM Object Stats End ===
+[INF:UH0707] Elaborating UHDM...
+
+=== UHDM Object Stats Begin (Elaborated Model) ===
+assign_stmt                                            1
+begin                                                  1
+bit_select                                            41
+bit_typespec                                           8
+constant                                             329
+design                                                 1
+gen_for                                                1
+gen_if                                                 1
+gen_scope                                             84
+gen_scope_array                                       84
+import_typespec                                        1
+int_typespec                                          80
+int_var                                                2
+logic_net                                              1
+logic_typespec                                         7
+module_inst                                           64
+named_begin                                            1
+operation                                             29
+package                                                4
+param_assign                                          81
+parameter                                             83
+range                                                 55
+ref_module                                             9
+ref_obj                                               14
+ref_var                                                1
+unsupported_typespec                                   1
+=== UHDM Object Stats End ===
+[INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/LogicArrayParam/slpp_all/surelog.uhdm ...
+
+[INF:UH0709] Writing UHDM Html Coverage: ${SURELOG_DIR}/build/regression/LogicArrayParam/slpp_all/checker/surelog.chk.html ...
+
+[INF:UH0710] Loading UHDM DB: ${SURELOG_DIR}/build/regression/LogicArrayParam/slpp_all/surelog.uhdm ...
+
+[INF:UH0711] Decompiling UHDM...
+
+====== UHDM =======
+design: (work@alert_handler)
+|vpiElaborated:1
+|vpiName:work@alert_handler
+|uhdmallPackages:
+\_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+  |vpiParent:
+  \_design: (work@alert_handler)
+  |vpiName:alert_handler_reg_pkg
+  |vpiFullName:alert_handler_reg_pkg::
+  |vpiParameter:
+  \_parameter: (alert_handler_reg_pkg::NAlerts), line:4:17, endln:4:24
+    |vpiParent:
+    \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+    |UINT:20
+    |vpiTypespec:
+    \_int_typespec: , line:4:13, endln:4:16
+      |vpiParent:
+      \_parameter: (alert_handler_reg_pkg::NAlerts), line:4:17, endln:4:24
+      |vpiInstance:
+      \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+      |vpiSigned:1
+    |vpiSigned:1
+    |vpiName:NAlerts
+    |vpiFullName:alert_handler_reg_pkg::NAlerts
+  |vpiParameter:
+  \_parameter: (alert_handler_reg_pkg::AsyncOn), line:5:33, endln:5:40
+    |vpiParent:
+    \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+    |BIN:01100001100000001111
+    |vpiTypespec:
+    \_logic_typespec: , line:5:13, endln:5:32
+      |vpiParent:
+      \_parameter: (alert_handler_reg_pkg::AsyncOn), line:5:33, endln:5:40
+      |vpiInstance:
+      \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+      |vpiRange:
+      \_range: , line:5:19, endln:5:32
+        |vpiParent:
+        \_logic_typespec: , line:5:13, endln:5:32
+        |vpiLeftRange:
+        \_operation: , line:5:20, endln:5:29
+          |vpiParent:
+          \_range: , line:5:19, endln:5:32
+          |vpiOpType:11
+          |vpiOperand:
+          \_ref_obj: (alert_handler_reg_pkg::AsyncOn::NAlerts), line:5:20, endln:5:27
+            |vpiParent:
+            \_operation: , line:5:20, endln:5:29
+            |vpiName:NAlerts
+            |vpiFullName:alert_handler_reg_pkg::AsyncOn::NAlerts
+            |vpiActual:
+            \_parameter: (alert_handler_reg_pkg::NAlerts), line:4:17, endln:4:24
+          |vpiOperand:
+          \_constant: , line:5:28, endln:5:29
+            |vpiParent:
+            \_operation: , line:5:20, endln:5:29
+            |vpiDecompile:1
+            |vpiSize:64
+            |UINT:1
+            |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:5:30, endln:5:31
+          |vpiParent:
+          \_range: , line:5:19, endln:5:32
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiName:AsyncOn
+    |vpiFullName:alert_handler_reg_pkg::AsyncOn
+  |vpiParamAssign:
+  \_param_assign: , line:4:17, endln:4:29
+    |vpiParent:
+    \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+    |vpiRhs:
+    \_constant: , line:4:27, endln:4:29
+      |vpiParent:
+      \_param_assign: , line:4:17, endln:4:29
+      |vpiDecompile:20
+      |vpiSize:64
+      |UINT:20
+      |vpiTypespec:
+      \_int_typespec: , line:4:13, endln:4:16
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (alert_handler_reg_pkg::NAlerts), line:4:17, endln:4:24
+  |vpiParamAssign:
+  \_param_assign: , line:5:33, endln:5:67
+    |vpiParent:
+    \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+    |vpiRhs:
+    \_constant: , line:5:43, endln:5:67
+      |vpiParent:
+      \_param_assign: , line:5:33, endln:5:67
+      |vpiDecompile:20'b01100001100000001111
+      |vpiSize:20
+      |BIN:01100001100000001111
+      |vpiTypespec:
+      \_logic_typespec: , line:5:13, endln:5:32
+      |vpiConstType:3
+    |vpiLhs:
+    \_parameter: (alert_handler_reg_pkg::AsyncOn), line:5:33, endln:5:40
+  |vpiDefName:alert_handler_reg_pkg
+|uhdmallPackages:
+\_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+  |vpiParent:
+  \_design: (work@alert_handler)
+  |vpiName:alert_pkg
+  |vpiFullName:alert_pkg::
+  |vpiParameter:
+  \_parameter: (alert_pkg::NAlerts), line:12:32, endln:12:39
+    |vpiParent:
+    \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |vpiTypespec:
+    \_int_typespec: , line:12:14, endln:12:26
+      |vpiParent:
+      \_parameter: (alert_pkg::NAlerts), line:12:32, endln:12:39
+      |vpiInstance:
+      \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |vpiLocalParam:1
+    |vpiName:NAlerts
+    |vpiFullName:alert_pkg::NAlerts
+  |vpiParameter:
+  \_parameter: (alert_pkg::AsyncOn), line:13:32, endln:13:39
+    |vpiParent:
+    \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |vpiTypespec:
+    \_bit_typespec: , line:13:14, endln:13:31
+      |vpiParent:
+      \_parameter: (alert_pkg::AsyncOn), line:13:32, endln:13:39
+      |vpiInstance:
+      \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+      |vpiRange:
+      \_range: , line:13:18, endln:13:31
+        |vpiParent:
+        \_bit_typespec: , line:13:14, endln:13:31
+        |vpiLeftRange:
+        \_operation: , line:13:19, endln:13:28
+          |vpiParent:
+          \_range: , line:13:18, endln:13:31
+          |vpiOpType:11
+          |vpiOperand:
+          \_ref_obj: (alert_pkg::AsyncOn::NAlerts), line:13:19, endln:13:26
+            |vpiParent:
+            \_operation: , line:13:19, endln:13:28
+            |vpiName:NAlerts
+            |vpiFullName:alert_pkg::AsyncOn::NAlerts
+            |vpiActual:
+            \_parameter: (alert_pkg::NAlerts), line:12:32, endln:12:39
+          |vpiOperand:
+          \_constant: , line:13:27, endln:13:28
+            |vpiParent:
+            \_operation: , line:13:19, endln:13:28
+            |vpiDecompile:1
+            |vpiSize:64
+            |UINT:1
+            |vpiConstType:9
+        |vpiRightRange:
+        \_constant: , line:13:29, endln:13:30
+          |vpiParent:
+          \_range: , line:13:18, endln:13:31
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiLocalParam:1
+    |vpiName:AsyncOn
+    |vpiFullName:alert_pkg::AsyncOn
+  |vpiParamAssign:
+  \_param_assign: , line:12:32, endln:12:74
+    |vpiParent:
+    \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |vpiRhs:
+    \_ref_obj: (alert_pkg::alert_handler_reg_pkg::NAlerts), line:12:44, endln:12:74
+      |vpiParent:
+      \_param_assign: , line:12:32, endln:12:74
+      |vpiName:alert_handler_reg_pkg::NAlerts
+      |vpiFullName:alert_pkg::alert_handler_reg_pkg::NAlerts
+      |vpiActual:
+      \_parameter: (alert_handler_reg_pkg::NAlerts), line:4:17, endln:4:24
+    |vpiLhs:
+    \_parameter: (alert_pkg::NAlerts), line:12:32, endln:12:39
+  |vpiParamAssign:
+  \_param_assign: , line:13:32, endln:13:74
+    |vpiParent:
+    \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |vpiRhs:
+    \_ref_obj: (alert_pkg::alert_handler_reg_pkg::AsyncOn), line:13:44, endln:13:74
+      |vpiParent:
+      \_param_assign: , line:13:32, endln:13:74
+      |vpiName:alert_handler_reg_pkg::AsyncOn
+      |vpiFullName:alert_pkg::alert_handler_reg_pkg::AsyncOn
+      |vpiActual:
+      \_parameter: (alert_handler_reg_pkg::AsyncOn), line:5:33, endln:5:40
+    |vpiLhs:
+    \_parameter: (alert_pkg::AsyncOn), line:13:32, endln:13:39
+  |vpiDefName:alert_pkg
+|uhdmtopPackages:
+\_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+  |vpiParent:
+  \_design: (work@alert_handler)
+  |vpiName:alert_handler_reg_pkg
+  |vpiFullName:alert_handler_reg_pkg::
+  |vpiParameter:
+  \_parameter: (alert_handler_reg_pkg::NAlerts), line:4:17, endln:4:24
+    |vpiParent:
+    \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+    |UINT:20
+    |vpiTypespec:
+    \_int_typespec: , line:4:13, endln:4:16
+      |vpiParent:
+      \_parameter: (alert_handler_reg_pkg::NAlerts), line:4:17, endln:4:24
+      |vpiInstance:
+      \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+      |vpiSigned:1
+    |vpiSigned:1
+    |vpiName:NAlerts
+    |vpiFullName:alert_handler_reg_pkg::NAlerts
+  |vpiParameter:
+  \_parameter: (alert_handler_reg_pkg::AsyncOn), line:5:33, endln:5:40
+    |vpiParent:
+    \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+    |BIN:01100001100000001111
+    |vpiTypespec:
+    \_logic_typespec: , line:5:13, endln:5:32
+      |vpiParent:
+      \_parameter: (alert_handler_reg_pkg::AsyncOn), line:5:33, endln:5:40
+      |vpiInstance:
+      \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+      |vpiRange:
+      \_range: , line:5:19, endln:5:32
+        |vpiParent:
+        \_logic_typespec: , line:5:13, endln:5:32
+        |vpiLeftRange:
+        \_constant: , line:5:20, endln:5:27
+          |vpiParent:
+          \_range: , line:5:19, endln:5:32
+          |vpiDecompile:19
+          |vpiSize:64
+          |INT:19
+          |vpiConstType:7
+        |vpiRightRange:
+        \_constant: , line:5:30, endln:5:31
+          |vpiParent:
+          \_range: , line:5:19, endln:5:32
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiName:AsyncOn
+    |vpiFullName:alert_handler_reg_pkg::AsyncOn
+  |vpiParamAssign:
+  \_param_assign: , line:4:17, endln:4:29
+    |vpiParent:
+    \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+    |vpiRhs:
+    \_constant: , line:4:27, endln:4:29
+      |vpiParent:
+      \_param_assign: , line:4:17, endln:4:29
+      |vpiDecompile:20
+      |vpiSize:32
+      |UINT:20
+      |vpiTypespec:
+      \_int_typespec: , line:4:13, endln:4:16
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (alert_handler_reg_pkg::NAlerts), line:4:17, endln:4:24
+  |vpiParamAssign:
+  \_param_assign: , line:5:33, endln:5:67
+    |vpiParent:
+    \_package: alert_handler_reg_pkg (alert_handler_reg_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:1:1, endln:6:11
+    |vpiRhs:
+    \_constant: , line:5:43, endln:5:67
+      |vpiParent:
+      \_param_assign: , line:5:33, endln:5:67
+      |vpiDecompile:20'b01100001100000001111
+      |vpiSize:20
+      |BIN:01100001100000001111
+      |vpiTypespec:
+      \_logic_typespec: , line:5:13, endln:5:32
+      |vpiConstType:3
+    |vpiLhs:
+    \_parameter: (alert_handler_reg_pkg::AsyncOn), line:5:33, endln:5:40
+  |vpiDefName:alert_handler_reg_pkg
+  |vpiTop:1
+|uhdmtopPackages:
+\_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+  |vpiParent:
+  \_design: (work@alert_handler)
+  |vpiName:alert_pkg
+  |vpiFullName:alert_pkg::
+  |vpiParameter:
+  \_parameter: (alert_pkg::NAlerts), line:12:32, endln:12:39
+    |vpiParent:
+    \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |UINT:20
+    |vpiTypespec:
+    \_int_typespec: , line:12:14, endln:12:26
+      |vpiParent:
+      \_parameter: (alert_pkg::NAlerts), line:12:32, endln:12:39
+      |vpiInstance:
+      \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |vpiLocalParam:1
+    |vpiName:NAlerts
+    |vpiFullName:alert_pkg::NAlerts
+  |vpiParameter:
+  \_parameter: (alert_pkg::AsyncOn), line:13:32, endln:13:39
+    |vpiParent:
+    \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |BIN:01100001100000001111
+    |vpiTypespec:
+    \_bit_typespec: , line:13:14, endln:13:31
+      |vpiParent:
+      \_parameter: (alert_pkg::AsyncOn), line:13:32, endln:13:39
+      |vpiInstance:
+      \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+      |vpiRange:
+      \_range: , line:13:18, endln:13:31
+        |vpiParent:
+        \_bit_typespec: , line:13:14, endln:13:31
+        |vpiLeftRange:
+        \_constant: , line:13:19, endln:13:26
+          |vpiParent:
+          \_range: , line:13:18, endln:13:31
+          |vpiDecompile:19
+          |vpiSize:64
+          |INT:19
+          |vpiConstType:7
+        |vpiRightRange:
+        \_constant: , line:13:29, endln:13:30
+          |vpiParent:
+          \_range: , line:13:18, endln:13:31
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiLocalParam:1
+    |vpiName:AsyncOn
+    |vpiFullName:alert_pkg::AsyncOn
+  |vpiParamAssign:
+  \_param_assign: , line:12:32, endln:12:74
+    |vpiParent:
+    \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |vpiRhs:
+    \_constant: , line:12:44, endln:12:67
+      |vpiParent:
+      \_param_assign: , line:12:32, endln:12:74
+      |vpiDecompile:20
+      |vpiSize:32
+      |UINT:20
+      |vpiTypespec:
+      \_int_typespec: , line:12:14, endln:12:26
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (alert_pkg::NAlerts), line:12:32, endln:12:39
+  |vpiParamAssign:
+  \_param_assign: , line:13:32, endln:13:74
+    |vpiParent:
+    \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |vpiRhs:
+    \_constant: , line:13:44, endln:13:67
+      |vpiParent:
+      \_param_assign: , line:13:32, endln:13:74
+      |vpiDecompile:20'b01100001100000001111
+      |vpiSize:20
+      |BIN:01100001100000001111
+      |vpiTypespec:
+      \_bit_typespec: , line:13:14, endln:13:31
+      |vpiConstType:3
+    |vpiLhs:
+    \_parameter: (alert_pkg::AsyncOn), line:13:32, endln:13:39
+  |vpiDefName:alert_pkg
+  |vpiTop:1
+|uhdmallModules:
+\_module_inst: work@M (work@M), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:17:1, endln:18:10
+  |vpiParent:
+  \_design: (work@alert_handler)
+  |vpiFullName:work@M
+  |vpiDefName:work@M
+|uhdmallModules:
+\_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+  |vpiParent:
+  \_design: (work@alert_handler)
+  |vpiFullName:work@alert_handler
+  |vpiParameter:
+  \_parameter: (work@alert_handler.AsyncOn), line:13:32, endln:13:39
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |BIN:01100001100000001111
+    |vpiTypespec:
+    \_bit_typespec: , line:13:14, endln:13:31
+      |vpiParent:
+      \_parameter: (work@alert_handler.AsyncOn), line:13:32, endln:13:39
+      |vpiInstance:
+      \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+      |vpiRange:
+      \_range: , line:13:18, endln:13:31
+        |vpiParent:
+        \_bit_typespec: , line:13:14, endln:13:31
+        |vpiLeftRange:
+        \_constant: , line:13:19, endln:13:26
+          |vpiParent:
+          \_range: , line:13:18, endln:13:31
+          |vpiDecompile:19
+          |vpiSize:64
+          |INT:19
+          |vpiConstType:7
+        |vpiRightRange:
+        \_constant: , line:13:29, endln:13:30
+          |vpiParent:
+          \_range: , line:13:18, endln:13:31
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiLocalParam:1
+    |vpiName:AsyncOn
+    |vpiFullName:work@alert_handler.AsyncOn
+    |vpiImported:alert_pkg
+  |vpiParameter:
+  \_parameter: (work@alert_handler.NAlerts), line:12:32, endln:12:39
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |UINT:20
+    |vpiTypespec:
+    \_int_typespec: , line:12:14, endln:12:26
+      |vpiParent:
+      \_parameter: (work@alert_handler.NAlerts), line:12:32, endln:12:39
+      |vpiInstance:
+      \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |vpiLocalParam:1
+    |vpiName:NAlerts
+    |vpiFullName:work@alert_handler.NAlerts
+    |vpiImported:alert_pkg
+  |vpiParamAssign:
+  \_param_assign: , line:12:32, endln:12:74
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiRhs:
+    \_constant: , line:12:44, endln:12:67
+      |vpiParent:
+      \_param_assign: , line:12:32, endln:12:74
+      |vpiDecompile:20
+      |vpiSize:32
+      |UINT:20
+      |vpiTypespec:
+      \_int_typespec: , line:12:14, endln:12:26
+        |vpiParent:
+        \_constant: , line:12:44, endln:12:67
+        |vpiInstance:
+        \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (work@alert_handler.NAlerts), line:12:32, endln:12:39
+      |vpiParent:
+      \_param_assign: , line:12:32, endln:12:74
+      |UINT:20
+      |vpiTypespec:
+      \_int_typespec: , line:12:14, endln:12:26
+        |vpiParent:
+        \_parameter: (work@alert_handler.NAlerts), line:12:32, endln:12:39
+        |vpiInstance:
+        \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+      |vpiLocalParam:1
+      |vpiName:NAlerts
+      |vpiFullName:work@alert_handler.NAlerts
+      |vpiImported:alert_pkg
+  |vpiParamAssign:
+  \_param_assign: , line:13:32, endln:13:74
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiRhs:
+    \_constant: , line:13:44, endln:13:67
+      |vpiParent:
+      \_param_assign: , line:13:32, endln:13:74
+      |vpiDecompile:20'b01100001100000001111
+      |vpiSize:20
+      |BIN:01100001100000001111
+      |vpiTypespec:
+      \_bit_typespec: , line:13:14, endln:13:31
+        |vpiParent:
+        \_constant: , line:13:44, endln:13:67
+        |vpiInstance:
+        \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+        |vpiRange:
+        \_range: , line:13:18, endln:13:31
+          |vpiParent:
+          \_bit_typespec: , line:13:14, endln:13:31
+          |vpiLeftRange:
+          \_constant: , line:13:19, endln:13:26
+            |vpiParent:
+            \_range: , line:13:18, endln:13:31
+            |vpiDecompile:19
+            |vpiSize:64
+            |INT:19
+            |vpiConstType:7
+          |vpiRightRange:
+          \_constant: , line:13:29, endln:13:30
+            |vpiParent:
+            \_range: , line:13:18, endln:13:31
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+      |vpiConstType:3
+    |vpiLhs:
+    \_parameter: (work@alert_handler.AsyncOn), line:13:32, endln:13:39
+      |vpiParent:
+      \_param_assign: , line:13:32, endln:13:74
+      |BIN:01100001100000001111
+      |vpiTypespec:
+      \_bit_typespec: , line:13:14, endln:13:31
+        |vpiParent:
+        \_parameter: (work@alert_handler.AsyncOn), line:13:32, endln:13:39
+        |vpiInstance:
+        \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+        |vpiRange:
+        \_range: , line:13:18, endln:13:31
+          |vpiParent:
+          \_bit_typespec: , line:13:14, endln:13:31
+          |vpiLeftRange:
+          \_constant: , line:13:19, endln:13:26
+            |vpiParent:
+            \_range: , line:13:18, endln:13:31
+            |vpiDecompile:19
+            |vpiSize:64
+            |INT:19
+            |vpiConstType:7
+          |vpiRightRange:
+          \_constant: , line:13:29, endln:13:30
+            |vpiParent:
+            \_range: , line:13:18, endln:13:31
+            |vpiDecompile:0
+            |vpiSize:64
+            |UINT:0
+            |vpiConstType:9
+      |vpiLocalParam:1
+      |vpiName:AsyncOn
+      |vpiFullName:work@alert_handler.AsyncOn
+      |vpiImported:alert_pkg
+  |vpiTypedef:
+  \_import_typespec: (alert_pkg), line:21:10, endln:21:22
+  |vpiDefName:work@alert_handler
+  |vpiNet:
+  \_logic_net: (work@alert_handler.k), line:25:23, endln:25:24
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:k
+    |vpiFullName:work@alert_handler.k
+    |vpiNetType:1
+  |vpiGenStmt:
+  \_gen_for: 
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiForInitStmt:
+    \_assign_stmt: , line:25:8, endln:25:20
+      |vpiParent:
+      \_gen_for: 
+      |vpiRhs:
+      \_constant: , line:25:19, endln:25:20
+        |vpiDecompile:0
+        |vpiSize:64
+        |UINT:0
+        |vpiConstType:9
+      |vpiLhs:
+      \_int_var: (work@alert_handler.k), line:25:15, endln:25:16
+        |vpiParent:
+        \_assign_stmt: , line:25:8, endln:25:20
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiName:k
+        |vpiFullName:work@alert_handler.k
+    |vpiCondition:
+    \_operation: , line:25:23, endln:25:34
+      |vpiParent:
+      \_gen_for: 
+      |vpiOpType:20
+      |vpiOperand:
+      \_ref_obj: (work@alert_handler.k), line:25:23, endln:25:24
+        |vpiParent:
+        \_operation: , line:25:23, endln:25:34
+        |vpiName:k
+        |vpiFullName:work@alert_handler.k
+        |vpiActual:
+        \_logic_net: (work@alert_handler.k), line:25:23, endln:25:24
+      |vpiOperand:
+      \_constant: , line:25:27, endln:25:34
+        |vpiParent:
+        \_operation: , line:25:23, endln:25:34
+        |vpiDecompile:20
+        |vpiSize:32
+        |UINT:20
+        |vpiTypespec:
+        \_int_typespec: , line:12:14, endln:12:26
+          |vpiParent:
+          \_constant: , line:25:27, endln:25:34
+          |vpiInstance:
+          \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+        |vpiConstType:9
+    |vpiForIncStmt:
+    \_operation: , line:25:37, endln:25:38
+      |vpiParent:
+      \_gen_for: 
+      |vpiOpType:62
+      |vpiOperand:
+      \_ref_obj: (work@alert_handler.k)
+        |vpiParent:
+        \_gen_for: 
+        |vpiName:k
+        |vpiFullName:work@alert_handler.k
+        |vpiActual:
+        \_logic_net: (work@alert_handler.k), line:25:23, endln:25:24
+    |vpiStmt:
+    \_named_begin: (work@alert_handler.gen_alerts)
+      |vpiParent:
+      \_gen_for: 
+      |vpiName:gen_alerts
+      |vpiFullName:work@alert_handler.gen_alerts
+      |vpiStmt:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_named_begin: (work@alert_handler.gen_alerts)
+        |vpiRhs:
+        \_bit_select: (work@alert_handler.gen_alerts.AsyncOn), line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiName:AsyncOn
+          |vpiFullName:work@alert_handler.gen_alerts.AsyncOn
+          |vpiIndex:
+          \_ref_obj: (work@alert_handler.gen_alerts.k), line:26:32, endln:26:33
+            |vpiParent:
+            \_bit_select: (work@alert_handler.gen_alerts.AsyncOn), line:26:24, endln:26:34
+            |vpiName:k
+            |vpiFullName:work@alert_handler.gen_alerts.k
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts.debug), line:26:16, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiLocalParam:1
+          |vpiName:debug
+          |vpiFullName:work@alert_handler.gen_alerts.debug
+      |vpiStmt:
+      \_gen_if: , line:27:5, endln:27:7
+        |vpiParent:
+        \_named_begin: (work@alert_handler.gen_alerts)
+        |vpiCondition:
+        \_ref_obj: (work@alert_handler.gen_alerts.debug), line:27:9, endln:27:14
+          |vpiParent:
+          \_gen_if: , line:27:5, endln:27:7
+          |vpiName:debug
+          |vpiFullName:work@alert_handler.gen_alerts.debug
+        |vpiStmt:
+        \_begin: (work@alert_handler.gen_alerts)
+          |vpiParent:
+          \_gen_if: , line:27:5, endln:27:7
+          |vpiFullName:work@alert_handler.gen_alerts
+          |vpiStmt:
+          \_ref_module: work@M (u), line:28:9, endln:28:10
+            |vpiParent:
+            \_begin: (work@alert_handler.gen_alerts)
+            |vpiName:u
+            |vpiDefName:work@M
+|uhdmtopModules:
+\_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+  |vpiName:work@alert_handler
+  |vpiParameter:
+  \_parameter: (work@alert_handler.AsyncOn), line:13:32, endln:13:39
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |BIN:01100001100000001111
+    |vpiTypespec:
+    \_bit_typespec: , line:13:14, endln:13:31
+      |vpiParent:
+      \_parameter: (work@alert_handler.AsyncOn), line:13:32, endln:13:39
+      |vpiInstance:
+      \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+      |vpiRange:
+      \_range: , line:13:18, endln:13:31
+        |vpiParent:
+        \_bit_typespec: , line:13:14, endln:13:31
+        |vpiLeftRange:
+        \_constant: , line:13:19, endln:13:26
+          |vpiParent:
+          \_range: , line:13:18, endln:13:31
+          |vpiDecompile:19
+          |vpiSize:64
+          |INT:19
+          |vpiConstType:7
+        |vpiRightRange:
+        \_constant: , line:13:29, endln:13:30
+          |vpiParent:
+          \_range: , line:13:18, endln:13:31
+          |vpiDecompile:0
+          |vpiSize:64
+          |UINT:0
+          |vpiConstType:9
+    |vpiLocalParam:1
+    |vpiName:AsyncOn
+    |vpiFullName:work@alert_handler.AsyncOn
+    |vpiImported:alert_pkg
+  |vpiParameter:
+  \_parameter: (work@alert_handler.NAlerts), line:12:32, endln:12:39
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |UINT:20
+    |vpiTypespec:
+    \_int_typespec: , line:12:14, endln:12:26
+      |vpiParent:
+      \_parameter: (work@alert_handler.NAlerts), line:12:32, endln:12:39
+      |vpiInstance:
+      \_package: alert_pkg (alert_pkg::), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:9:1, endln:15:11
+    |vpiLocalParam:1
+    |vpiName:NAlerts
+    |vpiFullName:work@alert_handler.NAlerts
+    |vpiImported:alert_pkg
+  |vpiParamAssign:
+  \_param_assign: , line:12:32, endln:12:74
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiRhs:
+    \_constant: , line:12:44, endln:12:74
+      |vpiParent:
+      \_param_assign: , line:12:32, endln:12:74
+      |vpiDecompile:20
+      |vpiSize:32
+      |UINT:20
+      |vpiTypespec:
+      \_int_typespec: , line:12:14, endln:12:26
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (work@alert_handler.NAlerts), line:12:32, endln:12:39
+  |vpiParamAssign:
+  \_param_assign: , line:13:32, endln:13:74
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiRhs:
+    \_constant: , line:13:44, endln:13:74
+      |vpiParent:
+      \_param_assign: , line:13:32, endln:13:74
+      |vpiDecompile:20'b01100001100000001111
+      |vpiSize:20
+      |BIN:01100001100000001111
+      |vpiTypespec:
+      \_bit_typespec: , line:13:14, endln:13:31
+      |vpiConstType:3
+    |vpiLhs:
+    \_parameter: (work@alert_handler.AsyncOn), line:13:32, endln:13:39
+  |vpiTypedef:
+  \_import_typespec: (alert_pkg), line:21:10, endln:21:22
+  |vpiDefName:work@alert_handler
+  |vpiTop:1
+  |vpiTopModule:1
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[0]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[0]
+    |vpiFullName:work@alert_handler.gen_alerts[0]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[0]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[0]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[0]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[0].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:1
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[0].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[0].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[0].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[0]), line:25:42, endln:30:6
+        |UINT:0
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[0].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[0]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b1
+          |vpiSize:1
+          |BIN:1
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[0].debug), line:26:16, endln:26:21
+      |vpiGenScopeArray:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[0].genblk1), line:28:7, endln:28:13
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[0]), line:25:42, endln:30:6
+        |vpiName:genblk1
+        |vpiFullName:work@alert_handler.gen_alerts[0].genblk1
+        |vpiGenScope:
+        \_gen_scope: (work@alert_handler.gen_alerts[0].genblk1), line:28:7, endln:28:13
+          |vpiParent:
+          \_gen_scope_array: (work@alert_handler.gen_alerts[0].genblk1), line:28:7, endln:28:13
+          |vpiFullName:work@alert_handler.gen_alerts[0].genblk1
+          |vpiModule:
+          \_module_inst: work@M (work@alert_handler.gen_alerts[0].genblk1.u), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:28:7, endln:28:13
+            |vpiParent:
+            \_gen_scope: (work@alert_handler.gen_alerts[0].genblk1), line:28:7, endln:28:13
+            |vpiName:u
+            |vpiFullName:work@alert_handler.gen_alerts[0].genblk1.u
+            |vpiDefName:work@M
+            |vpiDefFile:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv
+            |vpiDefLineNo:17
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[1]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[1]
+    |vpiFullName:work@alert_handler.gen_alerts[1]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[1]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[1]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[1]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[1].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:1
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[1].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[1].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[1].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[1]), line:25:42, endln:30:6
+        |UINT:1
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[1].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[1]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b1
+          |vpiSize:1
+          |BIN:1
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[1].debug), line:26:16, endln:26:21
+      |vpiGenScopeArray:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[1].genblk1), line:28:7, endln:28:13
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[1]), line:25:42, endln:30:6
+        |vpiName:genblk1
+        |vpiFullName:work@alert_handler.gen_alerts[1].genblk1
+        |vpiGenScope:
+        \_gen_scope: (work@alert_handler.gen_alerts[1].genblk1), line:28:7, endln:28:13
+          |vpiParent:
+          \_gen_scope_array: (work@alert_handler.gen_alerts[1].genblk1), line:28:7, endln:28:13
+          |vpiFullName:work@alert_handler.gen_alerts[1].genblk1
+          |vpiModule:
+          \_module_inst: work@M (work@alert_handler.gen_alerts[1].genblk1.u), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:28:7, endln:28:13
+            |vpiParent:
+            \_gen_scope: (work@alert_handler.gen_alerts[1].genblk1), line:28:7, endln:28:13
+            |vpiName:u
+            |vpiFullName:work@alert_handler.gen_alerts[1].genblk1.u
+            |vpiDefName:work@M
+            |vpiDefFile:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv
+            |vpiDefLineNo:17
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[2]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[2]
+    |vpiFullName:work@alert_handler.gen_alerts[2]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[2]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[2]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[2]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[2].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:1
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[2].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[2].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[2].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[2]), line:25:42, endln:30:6
+        |UINT:2
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[2].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[2]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b1
+          |vpiSize:1
+          |BIN:1
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[2].debug), line:26:16, endln:26:21
+      |vpiGenScopeArray:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[2].genblk1), line:28:7, endln:28:13
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[2]), line:25:42, endln:30:6
+        |vpiName:genblk1
+        |vpiFullName:work@alert_handler.gen_alerts[2].genblk1
+        |vpiGenScope:
+        \_gen_scope: (work@alert_handler.gen_alerts[2].genblk1), line:28:7, endln:28:13
+          |vpiParent:
+          \_gen_scope_array: (work@alert_handler.gen_alerts[2].genblk1), line:28:7, endln:28:13
+          |vpiFullName:work@alert_handler.gen_alerts[2].genblk1
+          |vpiModule:
+          \_module_inst: work@M (work@alert_handler.gen_alerts[2].genblk1.u), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:28:7, endln:28:13
+            |vpiParent:
+            \_gen_scope: (work@alert_handler.gen_alerts[2].genblk1), line:28:7, endln:28:13
+            |vpiName:u
+            |vpiFullName:work@alert_handler.gen_alerts[2].genblk1.u
+            |vpiDefName:work@M
+            |vpiDefFile:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv
+            |vpiDefLineNo:17
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[3]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[3]
+    |vpiFullName:work@alert_handler.gen_alerts[3]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[3]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[3]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[3]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[3].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:1
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[3].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[3].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[3].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[3]), line:25:42, endln:30:6
+        |UINT:3
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[3].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[3]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b1
+          |vpiSize:1
+          |BIN:1
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[3].debug), line:26:16, endln:26:21
+      |vpiGenScopeArray:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[3].genblk1), line:28:7, endln:28:13
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[3]), line:25:42, endln:30:6
+        |vpiName:genblk1
+        |vpiFullName:work@alert_handler.gen_alerts[3].genblk1
+        |vpiGenScope:
+        \_gen_scope: (work@alert_handler.gen_alerts[3].genblk1), line:28:7, endln:28:13
+          |vpiParent:
+          \_gen_scope_array: (work@alert_handler.gen_alerts[3].genblk1), line:28:7, endln:28:13
+          |vpiFullName:work@alert_handler.gen_alerts[3].genblk1
+          |vpiModule:
+          \_module_inst: work@M (work@alert_handler.gen_alerts[3].genblk1.u), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:28:7, endln:28:13
+            |vpiParent:
+            \_gen_scope: (work@alert_handler.gen_alerts[3].genblk1), line:28:7, endln:28:13
+            |vpiName:u
+            |vpiFullName:work@alert_handler.gen_alerts[3].genblk1.u
+            |vpiDefName:work@M
+            |vpiDefFile:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv
+            |vpiDefLineNo:17
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[4]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[4]
+    |vpiFullName:work@alert_handler.gen_alerts[4]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[4]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[4]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[4]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[4].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[4].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[4].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[4].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[4]), line:25:42, endln:30:6
+        |UINT:4
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[4].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[4]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[4].debug), line:26:16, endln:26:21
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[5]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[5]
+    |vpiFullName:work@alert_handler.gen_alerts[5]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[5]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[5]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[5]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[5].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[5].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[5].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[5].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[5]), line:25:42, endln:30:6
+        |UINT:5
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[5].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[5]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[5].debug), line:26:16, endln:26:21
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[6]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[6]
+    |vpiFullName:work@alert_handler.gen_alerts[6]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[6]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[6]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[6]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[6].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[6].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[6].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[6].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[6]), line:25:42, endln:30:6
+        |UINT:6
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[6].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[6]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[6].debug), line:26:16, endln:26:21
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[7]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[7]
+    |vpiFullName:work@alert_handler.gen_alerts[7]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[7]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[7]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[7]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[7].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[7].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[7].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[7].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[7]), line:25:42, endln:30:6
+        |UINT:7
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[7].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[7]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[7].debug), line:26:16, endln:26:21
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[8]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[8]
+    |vpiFullName:work@alert_handler.gen_alerts[8]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[8]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[8]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[8]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[8].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[8].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[8].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[8].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[8]), line:25:42, endln:30:6
+        |UINT:8
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[8].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[8]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[8].debug), line:26:16, endln:26:21
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[9]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[9]
+    |vpiFullName:work@alert_handler.gen_alerts[9]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[9]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[9]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[9]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[9].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[9].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[9].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[9].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[9]), line:25:42, endln:30:6
+        |UINT:9
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[9].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[9]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[9].debug), line:26:16, endln:26:21
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[10]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[10]
+    |vpiFullName:work@alert_handler.gen_alerts[10]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[10]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[10]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[10]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[10].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[10].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[10].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[10].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[10]), line:25:42, endln:30:6
+        |UINT:10
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[10].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[10]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[10].debug), line:26:16, endln:26:21
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[11]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[11]
+    |vpiFullName:work@alert_handler.gen_alerts[11]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[11]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[11]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[11]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[11].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:1
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[11].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[11].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[11].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[11]), line:25:42, endln:30:6
+        |UINT:11
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[11].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[11]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b1
+          |vpiSize:1
+          |BIN:1
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[11].debug), line:26:16, endln:26:21
+      |vpiGenScopeArray:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[11].genblk1), line:28:7, endln:28:13
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[11]), line:25:42, endln:30:6
+        |vpiName:genblk1
+        |vpiFullName:work@alert_handler.gen_alerts[11].genblk1
+        |vpiGenScope:
+        \_gen_scope: (work@alert_handler.gen_alerts[11].genblk1), line:28:7, endln:28:13
+          |vpiParent:
+          \_gen_scope_array: (work@alert_handler.gen_alerts[11].genblk1), line:28:7, endln:28:13
+          |vpiFullName:work@alert_handler.gen_alerts[11].genblk1
+          |vpiModule:
+          \_module_inst: work@M (work@alert_handler.gen_alerts[11].genblk1.u), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:28:7, endln:28:13
+            |vpiParent:
+            \_gen_scope: (work@alert_handler.gen_alerts[11].genblk1), line:28:7, endln:28:13
+            |vpiName:u
+            |vpiFullName:work@alert_handler.gen_alerts[11].genblk1.u
+            |vpiDefName:work@M
+            |vpiDefFile:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv
+            |vpiDefLineNo:17
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[12]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[12]
+    |vpiFullName:work@alert_handler.gen_alerts[12]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[12]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[12]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[12]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[12].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:1
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[12].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[12].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[12].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[12]), line:25:42, endln:30:6
+        |UINT:12
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[12].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[12]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b1
+          |vpiSize:1
+          |BIN:1
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[12].debug), line:26:16, endln:26:21
+      |vpiGenScopeArray:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[12].genblk1), line:28:7, endln:28:13
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[12]), line:25:42, endln:30:6
+        |vpiName:genblk1
+        |vpiFullName:work@alert_handler.gen_alerts[12].genblk1
+        |vpiGenScope:
+        \_gen_scope: (work@alert_handler.gen_alerts[12].genblk1), line:28:7, endln:28:13
+          |vpiParent:
+          \_gen_scope_array: (work@alert_handler.gen_alerts[12].genblk1), line:28:7, endln:28:13
+          |vpiFullName:work@alert_handler.gen_alerts[12].genblk1
+          |vpiModule:
+          \_module_inst: work@M (work@alert_handler.gen_alerts[12].genblk1.u), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:28:7, endln:28:13
+            |vpiParent:
+            \_gen_scope: (work@alert_handler.gen_alerts[12].genblk1), line:28:7, endln:28:13
+            |vpiName:u
+            |vpiFullName:work@alert_handler.gen_alerts[12].genblk1.u
+            |vpiDefName:work@M
+            |vpiDefFile:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv
+            |vpiDefLineNo:17
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[13]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[13]
+    |vpiFullName:work@alert_handler.gen_alerts[13]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[13]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[13]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[13]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[13].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[13].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[13].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[13].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[13]), line:25:42, endln:30:6
+        |UINT:13
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[13].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[13]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[13].debug), line:26:16, endln:26:21
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[14]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[14]
+    |vpiFullName:work@alert_handler.gen_alerts[14]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[14]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[14]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[14]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[14].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[14].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[14].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[14].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[14]), line:25:42, endln:30:6
+        |UINT:14
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[14].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[14]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[14].debug), line:26:16, endln:26:21
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[15]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[15]
+    |vpiFullName:work@alert_handler.gen_alerts[15]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[15]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[15]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[15]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[15].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[15].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[15].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[15].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[15]), line:25:42, endln:30:6
+        |UINT:15
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[15].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[15]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[15].debug), line:26:16, endln:26:21
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[16]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[16]
+    |vpiFullName:work@alert_handler.gen_alerts[16]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[16]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[16]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[16]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[16].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[16].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[16].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[16].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[16]), line:25:42, endln:30:6
+        |UINT:16
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[16].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[16]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[16].debug), line:26:16, endln:26:21
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[17]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[17]
+    |vpiFullName:work@alert_handler.gen_alerts[17]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[17]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[17]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[17]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[17].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:1
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[17].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[17].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[17].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[17]), line:25:42, endln:30:6
+        |UINT:17
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[17].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[17]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b1
+          |vpiSize:1
+          |BIN:1
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[17].debug), line:26:16, endln:26:21
+      |vpiGenScopeArray:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[17].genblk1), line:28:7, endln:28:13
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[17]), line:25:42, endln:30:6
+        |vpiName:genblk1
+        |vpiFullName:work@alert_handler.gen_alerts[17].genblk1
+        |vpiGenScope:
+        \_gen_scope: (work@alert_handler.gen_alerts[17].genblk1), line:28:7, endln:28:13
+          |vpiParent:
+          \_gen_scope_array: (work@alert_handler.gen_alerts[17].genblk1), line:28:7, endln:28:13
+          |vpiFullName:work@alert_handler.gen_alerts[17].genblk1
+          |vpiModule:
+          \_module_inst: work@M (work@alert_handler.gen_alerts[17].genblk1.u), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:28:7, endln:28:13
+            |vpiParent:
+            \_gen_scope: (work@alert_handler.gen_alerts[17].genblk1), line:28:7, endln:28:13
+            |vpiName:u
+            |vpiFullName:work@alert_handler.gen_alerts[17].genblk1.u
+            |vpiDefName:work@M
+            |vpiDefFile:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv
+            |vpiDefLineNo:17
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[18]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[18]
+    |vpiFullName:work@alert_handler.gen_alerts[18]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[18]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[18]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[18]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[18].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:1
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[18].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[18].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[18].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[18]), line:25:42, endln:30:6
+        |UINT:18
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[18].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[18]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b1
+          |vpiSize:1
+          |BIN:1
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[18].debug), line:26:16, endln:26:21
+      |vpiGenScopeArray:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[18].genblk1), line:28:7, endln:28:13
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[18]), line:25:42, endln:30:6
+        |vpiName:genblk1
+        |vpiFullName:work@alert_handler.gen_alerts[18].genblk1
+        |vpiGenScope:
+        \_gen_scope: (work@alert_handler.gen_alerts[18].genblk1), line:28:7, endln:28:13
+          |vpiParent:
+          \_gen_scope_array: (work@alert_handler.gen_alerts[18].genblk1), line:28:7, endln:28:13
+          |vpiFullName:work@alert_handler.gen_alerts[18].genblk1
+          |vpiModule:
+          \_module_inst: work@M (work@alert_handler.gen_alerts[18].genblk1.u), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:28:7, endln:28:13
+            |vpiParent:
+            \_gen_scope: (work@alert_handler.gen_alerts[18].genblk1), line:28:7, endln:28:13
+            |vpiName:u
+            |vpiFullName:work@alert_handler.gen_alerts[18].genblk1.u
+            |vpiDefName:work@M
+            |vpiDefFile:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv
+            |vpiDefLineNo:17
+  |vpiGenScopeArray:
+  \_gen_scope_array: (work@alert_handler.gen_alerts[19]), line:25:42, endln:30:6
+    |vpiParent:
+    \_module_inst: work@alert_handler (work@alert_handler), file:${SURELOG_DIR}/tests/LogicArrayParam/dut.sv, line:20:1, endln:32:10
+    |vpiName:gen_alerts[19]
+    |vpiFullName:work@alert_handler.gen_alerts[19]
+    |vpiGenScope:
+    \_gen_scope: (work@alert_handler.gen_alerts[19]), line:25:42, endln:30:6
+      |vpiParent:
+      \_gen_scope_array: (work@alert_handler.gen_alerts[19]), line:25:42, endln:30:6
+      |vpiFullName:work@alert_handler.gen_alerts[19]
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[19].debug), line:26:16, endln:26:21
+        |vpiParent:
+        \_param_assign: , line:26:16, endln:26:34
+        |BIN:0
+        |vpiTypespec:
+        \_int_typespec: , line:26:5, endln:26:34
+          |vpiParent:
+          \_parameter: (work@alert_handler.gen_alerts[19].debug), line:26:16, endln:26:21
+          |vpiRange:
+          \_range: 
+            |vpiParent:
+            \_int_typespec: , line:26:5, endln:26:34
+            |vpiLeftRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+            |vpiRightRange:
+            \_constant: 
+              |vpiParent:
+              \_range: 
+              |INT:0
+        |vpiLocalParam:1
+        |vpiName:debug
+        |vpiFullName:work@alert_handler.gen_alerts[19].debug
+      |vpiParameter:
+      \_parameter: (work@alert_handler.gen_alerts[19].k), line:25:0
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[19]), line:25:42, endln:30:6
+        |UINT:19
+        |vpiTypespec:
+        \_int_typespec: 
+        |vpiLocalParam:1
+        |vpiName:k
+        |vpiFullName:work@alert_handler.gen_alerts[19].k
+      |vpiParamAssign:
+      \_param_assign: , line:26:16, endln:26:34
+        |vpiParent:
+        \_gen_scope: (work@alert_handler.gen_alerts[19]), line:25:42, endln:30:6
+        |vpiRhs:
+        \_constant: , line:26:24, endln:26:34
+          |vpiParent:
+          \_param_assign: , line:26:16, endln:26:34
+          |vpiDecompile:1'b0
+          |vpiSize:1
+          |BIN:0
+          |vpiTypespec:
+          \_int_typespec: , line:26:5, endln:26:34
+            |vpiRange:
+            \_range: 
+              |vpiParent:
+              \_int_typespec: , line:26:5, endln:26:34
+              |vpiLeftRange:
+              \_constant: 
+                |INT:0
+              |vpiRightRange:
+              \_constant: 
+                |INT:0
+          |vpiConstType:3
+        |vpiLhs:
+        \_parameter: (work@alert_handler.gen_alerts[19].debug), line:26:16, endln:26:21
+===================
+[  FATAL] : 0
+[ SYNTAX] : 0
+[  ERROR] : 0
+[WARNING] : 4
+[   NOTE] : 5
+
+
+[roundtrip]: ${SURELOG_DIR}/tests/LogicArrayParam/dut.sv | ${SURELOG_DIR}/build/regression/LogicArrayParam/roundtrip/dut_000.sv | 9 | 32 |
\ No newline at end of file
diff --git a/tests/LogicArrayParam/LogicArrayParam.sl b/tests/LogicArrayParam/LogicArrayParam.sl
new file mode 100644
index 0000000000..b461620aca
--- /dev/null
+++ b/tests/LogicArrayParam/LogicArrayParam.sl
@@ -0,0 +1 @@
+-parse -d uhdm -d coveruhdm -elabuhdm -d ast dut.sv -nobuiltin
diff --git a/tests/LogicArrayParam/dut.sv b/tests/LogicArrayParam/dut.sv
new file mode 100644
index 0000000000..a6f3769205
--- /dev/null
+++ b/tests/LogicArrayParam/dut.sv
@@ -0,0 +1,108 @@
+package alert_handler_reg_pkg;
+
+  // Param list
+  parameter int NAlerts = 20;
+  parameter logic [NAlerts-1:0] AsyncOn = 20'b01100001100000001111;
+endpackage
+
+
+package alert_pkg;
+
+  
+  localparam int unsigned      NAlerts   = alert_handler_reg_pkg::NAlerts;   // maximum 252
+  localparam bit [NAlerts-1:0] AsyncOn   = alert_handler_reg_pkg::AsyncOn;
+
+endpackage
+
+module M();
+endmodule
+
+module alert_handler
+  import alert_pkg::*;
+#() ();
+
+  // Target interrupt notification
+  for (genvar k = 0 ; k < NAlerts ; k++) begin : gen_alerts
+    localparam debug = AsyncOn[k];
+    if (debug) begin
+      M u();
+    end
+  end 
+
+endmodule
+
+
+/*
+
+
+module rggen_or_reducer #(
+  parameter int WIDTH = 2,
+  parameter int N     = 4
+)(
+ // input   logic [N-1:0][WIDTH-1:0]  i_data,
+//  output  logic [WIDTH-1:0]         o_result
+);
+
+  function automatic bit [N-1:0][15:0] get_sub_n_list(int n);
+    bit [N-1:0][15:0] list;
+    int               list_index;
+    bit [15:0]        current_n;
+    bit [15:0]        half_n;
+
+    list        = '0;
+    list_index  = 0;
+    current_n   = 16'(n);
+    while (current_n > 0) begin
+      half_n  = current_n / 2;
+      if ((current_n > 4) && (half_n <= 4)) begin
+        list[list_index]  = half_n;
+      end
+      else if (current_n >= 4) begin
+        list[list_index]  = 4;
+      end
+      else begin
+        list[list_index]  = current_n;
+      end
+
+      current_n   -= list[list_index];
+      list_index  += 1;
+    end
+
+    return list;
+  endfunction
+
+
+  function automatic bit [N-1:0][15:0] get_offset_list(bit [N-1:0][15:0] sub_n_list);
+    bit [N-1:0][15:0] list;
+
+    for (int i = 0;i < N;++i) begin
+      if (i == 0) begin
+        list[i] = 0;
+      end
+      else begin
+        list[i] = sub_n_list[i-1] + list[i-1];
+      end
+    end
+
+    return list;
+  endfunction
+
+  function automatic int get_next_n(bit [N-1:0][15:0] sub_n_list);
+    int next_n;
+
+    next_n  = 0;
+    for (int i = 0;i < N;++i) begin
+      next_n  += ((sub_n_list[i] != 0) ? 1 : 0);
+    end
+
+    return next_n;
+  endfunction
+
+  localparam  bit [N-1:0][15:0] SUB_N_LIST_P  = get_sub_n_list(N);
+  localparam  bit [N-1:0][15:0] OFFSET_LIST = get_offset_list(SUB_N_LIST_P);
+  localparam  int               NEXT_N      = get_next_n(OFFSET_LIST);
+
+  logic [NEXT_N-1:0][WIDTH-1:0] next_data;
+
+endmodule
+*/
\ No newline at end of file