diff --git a/src/Makefile b/src/Makefile
index 79e1d5134..d22e9f2c4 100644
--- a/src/Makefile
+++ b/src/Makefile
@@ -262,7 +262,7 @@ PGO_WORKLOAD=\
 	whetstone 25000
 
 LINTER_IGNORE_SOURCES=
-LINTER_IGNORE_HEADERS=
+LINTER_IGNORE_HEADERS=interpret-jump-table.h
 LINTER_SOURCES=$(filter-out $(LINTER_IGNORE_SOURCES),$(strip $(wildcard *.cpp) $(wildcard *.c)))
 LINTER_HEADERS=$(filter-out $(LINTER_IGNORE_HEADERS),$(strip $(wildcard *.hpp) $(wildcard *.h)))
 
@@ -273,7 +273,7 @@ CLANG_FORMAT=clang-format
 CLANG_FORMAT_UARCH_FILES:=$(wildcard ../uarch/*.cpp)
 CLANG_FORMAT_UARCH_FILES:=$(filter-out %uarch-printf%,$(strip $(CLANG_FORMAT_UARCH_FILES)))
 CLANG_FORMAT_FILES:=$(wildcard *.cpp) $(wildcard *.c) $(wildcard *.h) $(wildcard *.hpp) $(CLANG_FORMAT_UARCH_FILES)
-CLANG_FORMAT_IGNORE_FILES:=
+CLANG_FORMAT_IGNORE_FILES:=interpret-jump-table.h
 CLANG_FORMAT_FILES:=$(strip $(CLANG_FORMAT_FILES))
 CLANG_FORMAT_FILES:=$(filter-out $(CLANG_FORMAT_IGNORE_FILES),$(strip $(CLANG_FORMAT_FILES)))
 
@@ -543,12 +543,12 @@ jsonrpc-discover.cpp: jsonrpc-discover.json
 	echo '} // namespace cartesi' >> jsonrpc-discover.cpp
 
 %.clang-tidy: %.cpp machine-c-version.h
-	@$(CLANG_TIDY) --header-filter='$(CLANG_TIDY_HEADER_FILTER)' $(CLANG_TIDY_FLAGS) $< -- $(CXXFLAGS) $(LUA_INC) 2>/dev/null
+	@$(CLANG_TIDY) --header-filter='$(CLANG_TIDY_HEADER_FILTER)' $(CLANG_TIDY_FLAGS) $< -- $(CXXFLAGS) $(LUA_INC) -DCLANG_TIDY_LINT 2>/dev/null
 	@$(CXX) $(CXXFLAGS) $(LUA_INC) $< -MM -MT $@ -MF $@.d > /dev/null 2>&1
 	@touch $@
 
 %.clang-tidy: %.c
-	@$(CLANG_TIDY) --header-filter='$(CLANG_TIDY_HEADER_FILTER)' $(CLANG_TIDY_FLAGS) $< -- $(CFLAGS) 2>/dev/null
+	@$(CLANG_TIDY) --header-filter='$(CLANG_TIDY_HEADER_FILTER)' $(CLANG_TIDY_FLAGS) $< -- $(CFLAGS) -DCLANG_TIDY_LINT 2>/dev/null
 	@$(CC) $(CFLAGS) $< -MM -MT $@ -MF $@.d > /dev/null 2>&1
 	@touch $@
 
diff --git a/src/interpret-jump-table.h b/src/interpret-jump-table.h
index a14df704b..f6be498f2 100644
--- a/src/interpret-jump-table.h
+++ b/src/interpret-jump-table.h
@@ -169,6 +169,7 @@ enum class insn_label_id : unsigned char {
 #endif // USE_COMPUTED_GOTO
 
 static const INSN_JUMPTABLE_TYPE insn_jumptable[65536] = {
+#ifndef CLANG_TIDY_LINT // Disable clang-tidy via an ifdef because it's too slow
     INSN_LABEL(C_ADDI4SPN),      //    0 => ________________0000000000000000
     INSN_LABEL(C_Q1_SET0),       //    1 => ________________0000000000000001
     INSN_LABEL(C_SLLI),          //    2 => ________________0000000000000010
@@ -65705,6 +65706,9 @@ static const INSN_JUMPTABLE_TYPE insn_jumptable[65536] = {
     INSN_LABEL(C_BNEZ),          // 65533 => ________________1111111111111101
     INSN_LABEL(C_SDSP),          // 65534 => ________________1111111111111110
     INSN_LABEL(ILLEGAL),         // 65535 => ________________1111111111111111
+#else
+    INSN_LABEL(ILLEGAL)
+#endif
 };
 
 #pragma GCC diagnostic pop
diff --git a/src/interpret.cpp b/src/interpret.cpp
index 131f5f48c..d5dac3a74 100644
--- a/src/interpret.cpp
+++ b/src/interpret.cpp
@@ -5450,8 +5450,7 @@ static NO_INLINE execute_status interpret_loop(STATE_ACCESS &a, uint64_t mcycle_
             // Try to fetch the next instruction
             if (likely(fetch_insn(a, pc, insn, fetch_vaddr_page, fetch_vh_offset) == fetch_status::success)) {
                 // clang-format off
-
-                // NOLINTNEXTLINE(cppcoreguidelines-init-variables)
+                // NOLINTBEGIN
                 execute_status status; // explicit uninitialized as an optimization
 
                 // This header define the instruction jump table table, which is very large.
@@ -5821,6 +5820,7 @@ static NO_INLINE execute_status interpret_loop(STATE_ACCESS &a, uint64_t mcycle_
                 }
                 INSN_SWITCH_OUT();
 
+                // NOLINTEND
                 // clang-format on
 
                 // When execute status is above success, we have to deal with special loop conditions,
diff --git a/tools/gen-interpret-jump-table.lua b/tools/gen-interpret-jump-table.lua
index 5917a43e1..cf1d6db29 100644
--- a/tools/gen-interpret-jump-table.lua
+++ b/tools/gen-interpret-jump-table.lua
@@ -7,10 +7,10 @@ so we can decode most instructions with a single jump.
 -- List of RISC-V instructions taken from RISC-V spec
 local insns = {
     -- RV32I
-    { bits = "_________________________0110111", name = "LUI", rd0=true },
-    { bits = "_________________________0010111", name = "AUIPC", rd0=true },
-    { bits = "_________________________1101111", name = "JAL", rd0=true },
-    { bits = "_________________000_____1100111", name = "JALR", rd0=true },
+    { bits = "_________________________0110111", name = "LUI", rd0 = true },
+    { bits = "_________________________0010111", name = "AUIPC", rd0 = true },
+    { bits = "_________________________1101111", name = "JAL", rd0 = true },
+    { bits = "_________________000_____1100111", name = "JALR", rd0 = true },
     { bits = "_________________000_____1100011", name = "BEQ" },
     { bits = "_________________001_____1100011", name = "BNE" },
     { bits = "_________________100_____1100011", name = "BLT" },
@@ -25,25 +25,25 @@ local insns = {
     { bits = "_________________000_____0100011", name = "SB" },
     { bits = "_________________001_____0100011", name = "SH" },
     { bits = "_________________010_____0100011", name = "SW" },
-    { bits = "_________________000_____0010011", name = "ADDI", rd0=true },
-    { bits = "_________________010_____0010011", name = "SLTI", rd0=true },
-    { bits = "_________________011_____0010011", name = "SLTIU", rd0=true },
-    { bits = "_________________100_____0010011", name = "XORI", rd0=true },
-    { bits = "_________________110_____0010011", name = "ORI", rd0=true },
-    { bits = "_________________111_____0010011", name = "ANDI", rd0=true },
-    { bits = "000000___________001_____0010011", name = "SLLI", rd0=true },
-    { bits = "000000___________101_____0010011", name = "SRLI", rd0=true },
-    { bits = "010000___________101_____0010011", name = "SRAI", rd0=true },
-    { bits = "0000000__________000_____0110011", name = "ADD", rd0=true },
-    { bits = "0100000__________000_____0110011", name = "SUB", rd0=true },
-    { bits = "0000000__________001_____0110011", name = "SLL", rd0=true },
-    { bits = "0000000__________010_____0110011", name = "SLT", rd0=true },
-    { bits = "0000000__________011_____0110011", name = "SLTU", rd0=true },
-    { bits = "0000000__________100_____0110011", name = "XOR", rd0=true },
-    { bits = "0000000__________101_____0110011", name = "SRL", rd0=true },
-    { bits = "0100000__________101_____0110011", name = "SRA", rd0=true },
-    { bits = "0000000__________110_____0110011", name = "OR", rd0=true },
-    { bits = "0000000__________111_____0110011", name = "AND", rd0=true },
+    { bits = "_________________000_____0010011", name = "ADDI", rd0 = true },
+    { bits = "_________________010_____0010011", name = "SLTI", rd0 = true },
+    { bits = "_________________011_____0010011", name = "SLTIU", rd0 = true },
+    { bits = "_________________100_____0010011", name = "XORI", rd0 = true },
+    { bits = "_________________110_____0010011", name = "ORI", rd0 = true },
+    { bits = "_________________111_____0010011", name = "ANDI", rd0 = true },
+    { bits = "000000___________001_____0010011", name = "SLLI", rd0 = true },
+    { bits = "000000___________101_____0010011", name = "SRLI", rd0 = true },
+    { bits = "010000___________101_____0010011", name = "SRAI", rd0 = true },
+    { bits = "0000000__________000_____0110011", name = "ADD", rd0 = true },
+    { bits = "0100000__________000_____0110011", name = "SUB", rd0 = true },
+    { bits = "0000000__________001_____0110011", name = "SLL", rd0 = true },
+    { bits = "0000000__________010_____0110011", name = "SLT", rd0 = true },
+    { bits = "0000000__________011_____0110011", name = "SLTU", rd0 = true },
+    { bits = "0000000__________100_____0110011", name = "XOR", rd0 = true },
+    { bits = "0000000__________101_____0110011", name = "SRL", rd0 = true },
+    { bits = "0100000__________101_____0110011", name = "SRA", rd0 = true },
+    { bits = "0000000__________110_____0110011", name = "OR", rd0 = true },
+    { bits = "0000000__________111_____0110011", name = "AND", rd0 = true },
     { bits = "_________________000_____0001111", name = "FENCE" },
     { bits = "00000000000000000000000001110011", name = "ECALL" },
     { bits = "00000000000100000000000001110011", name = "EBREAK" },
@@ -52,32 +52,32 @@ local insns = {
     { bits = "_________________110_____0000011", name = "LWU" },
     { bits = "_________________011_____0000011", name = "LD" },
     { bits = "_________________011_____0100011", name = "SD" },
-    { bits = "_________________000_____0011011", name = "ADDIW", rd0=true },
-    { bits = "0000000__________001_____0011011", name = "SLLIW", rd0=true },
-    { bits = "0000000__________101_____0011011", name = "SRLIW", rd0=true },
-    { bits = "0100000__________101_____0011011", name = "SRAIW", rd0=true },
-    { bits = "0000000__________000_____0111011", name = "ADDW", rd0=true },
-    { bits = "0100000__________000_____0111011", name = "SUBW", rd0=true },
-    { bits = "0000000__________001_____0111011", name = "SLLW", rd0=true },
-    { bits = "0000000__________101_____0111011", name = "SRLW", rd0=true },
-    { bits = "0100000__________101_____0111011", name = "SRAW", rd0=true },
+    { bits = "_________________000_____0011011", name = "ADDIW", rd0 = true },
+    { bits = "0000000__________001_____0011011", name = "SLLIW", rd0 = true },
+    { bits = "0000000__________101_____0011011", name = "SRLIW", rd0 = true },
+    { bits = "0100000__________101_____0011011", name = "SRAIW", rd0 = true },
+    { bits = "0000000__________000_____0111011", name = "ADDW", rd0 = true },
+    { bits = "0100000__________000_____0111011", name = "SUBW", rd0 = true },
+    { bits = "0000000__________001_____0111011", name = "SLLW", rd0 = true },
+    { bits = "0000000__________101_____0111011", name = "SRLW", rd0 = true },
+    { bits = "0100000__________101_____0111011", name = "SRAW", rd0 = true },
 
     -- RV32M extension
-    { bits = "0000001__________000_____0110011", name = "MUL", rd0=true },
-    { bits = "0000001__________001_____0110011", name = "MULH", rd0=true },
-    { bits = "0000001__________010_____0110011", name = "MULHSU", rd0=true },
-    { bits = "0000001__________011_____0110011", name = "MULHU", rd0=true },
-    { bits = "0000001__________100_____0110011", name = "DIV", rd0=true },
-    { bits = "0000001__________101_____0110011", name = "DIVU", rd0=true },
-    { bits = "0000001__________110_____0110011", name = "REM", rd0=true },
-    { bits = "0000001__________111_____0110011", name = "REMU", rd0=true },
+    { bits = "0000001__________000_____0110011", name = "MUL", rd0 = true },
+    { bits = "0000001__________001_____0110011", name = "MULH", rd0 = true },
+    { bits = "0000001__________010_____0110011", name = "MULHSU", rd0 = true },
+    { bits = "0000001__________011_____0110011", name = "MULHU", rd0 = true },
+    { bits = "0000001__________100_____0110011", name = "DIV", rd0 = true },
+    { bits = "0000001__________101_____0110011", name = "DIVU", rd0 = true },
+    { bits = "0000001__________110_____0110011", name = "REM", rd0 = true },
+    { bits = "0000001__________111_____0110011", name = "REMU", rd0 = true },
 
     -- RV64M
-    { bits = "0000001__________000_____0111011", name = "MULW", rd0=true },
-    { bits = "0000001__________100_____0111011", name = "DIVW", rd0=true },
-    { bits = "0000001__________101_____0111011", name = "DIVUW", rd0=true },
-    { bits = "0000001__________110_____0111011", name = "REMW", rd0=true },
-    { bits = "0000001__________111_____0111011", name = "REMUW", rd0=true },
+    { bits = "0000001__________000_____0111011", name = "MULW", rd0 = true },
+    { bits = "0000001__________100_____0111011", name = "DIVW", rd0 = true },
+    { bits = "0000001__________101_____0111011", name = "DIVUW", rd0 = true },
+    { bits = "0000001__________110_____0111011", name = "REMW", rd0 = true },
+    { bits = "0000001__________111_____0111011", name = "REMUW", rd0 = true },
 
     -- RV32A
     { bits = "00010__00000_____010_____0101111", name = "LR.W" },
@@ -325,25 +325,25 @@ for i = 0, ((1 << mask_bits) - 1) do
     if not labels[name] then
         labels[name] = true
         if rd0 then
-            table.insert(labels, { name = name..'_rd0', i = firstindex * 10 + 1})
-            table.insert(labels, { name = name..'_rdN', i = firstindex * 10 + 2})
+            table.insert(labels, { name = name .. "_rd0", i = firstindex * 10 + 1 })
+            table.insert(labels, { name = name .. "_rdN", i = firstindex * 10 + 2 })
         else
             table.insert(labels, { name = name, i = firstindex * 10 })
         end
     end
     assert(#name < 18, namekey)
-    for rd=0,31 do
+    for rd = 0, 31 do
         local ename = name
         if rd0 then
             if rd == 0 then
-                ename = ename .. '_rd0'
+                ename = ename .. "_rd0"
             else
-                ename = ename .. '_rdN'
+                ename = ename .. "_rdN"
             end
         end
-        local emask = mask:sub(1, 20)..tobase2(rd,5)..mask:sub(26, 32)
-        local idx = tonumber(emask:match('[0-1]+'), 2)
-        jumptable[idx+1] = { name = ename, mask = emask }
+        local emask = mask:sub(1, 20) .. tobase2(rd, 5) .. mask:sub(26, 32)
+        local idx = tonumber(emask:match("[0-1]+"), 2)
+        jumptable[idx + 1] = { name = ename, mask = emask }
     end
 end
 
@@ -399,6 +399,7 @@ f:write([[
 ]])
 
 table.sort(labels, function(a, b) return a.i < b.i end)
+assert(#labels <= 256)
 f:write("enum class insn_label_id : unsigned char {\n")
 for _, label in ipairs(labels) do
     f:write("    " .. label.name .. ",\n")
@@ -409,14 +410,18 @@ f:write([[};
 
 ]])
 
-f:write("static const INSN_JUMPTABLE_TYPE insn_jumptable[",#jumptable,"] = {\n")
+assert(#jumptable == 65536)
+f:write("static const INSN_JUMPTABLE_TYPE insn_jumptable[", #jumptable, "] = {\n")
+f:write("#ifndef CLANG_TIDY_LINT // Disable clang-tidy via an ifdef because it's too slow\n")
 for i, entry in ipairs(jumptable) do
-    f:write()
     f:write(
         string.format("%-32s", "    INSN_LABEL(" .. entry.name .. "),"),
         " // " .. string.format("%4d", (i - 1)) .. " => " .. entry.mask .. "\n"
     )
 end
+f:write("#else\n")
+f:write("    INSN_LABEL(ILLEGAL)\n")
+f:write("#endif\n")
 f:write("};\n")
 
 f:write([[