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sun8i-h3-orangepi-lite.dts
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sun8i-h3-orangepi-lite.dts
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/dts-v1/;
/ {
interrupt-parent = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x1>;
model = "Xunlong Orange Pi Lite";
compatible = "xunlong,orangepi-lite", "allwinner,sun8i-h3";
chosen {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
stdout-path = "serial0:115200n8";
framebuffer-hdmi {
compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
allwinner,pipeline = "mixer0-lcd0-hdmi";
clocks = <0x2 0x6 0x3 0x66 0x3 0x6f>;
status = "disabled";
};
framebuffer-tve {
compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
allwinner,pipeline = "mixer1-lcd1-tve";
clocks = <0x2 0x7 0x3 0x67>;
status = "disabled";
};
};
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "allwinner,hdmi";
simple-audio-card,mclk-fs = <0x100>;
status = "disabled";
phandle = <0x32>;
simple-audio-card,codec {
sound-dai = <0x4>;
};
simple-audio-card,cpu {
sound-dai = <0x5>;
};
};
clocks {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
osc24M_clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x16e3600>;
clock-output-names = "osc24M";
phandle = <0x10>;
};
osc32k_clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x8000>;
clock-output-names = "osc32k";
phandle = <0x11>;
};
ext_osc32k_clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x8000>;
clock-output-names = "ext_osc32k";
phandle = <0x20>;
};
internal-osc-clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0xf42400>;
clock-accuracy = <0x11e1a300>;
clock-output-names = "iosc";
phandle = <0x21>;
};
osc18M_clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x1194000>;
clock-output-names = "osc18M";
phandle = <0x33>;
};
};
display-engine {
compatible = "allwinner,sun8i-h3-display-engine";
allwinner,pipelines = <0x6>;
status = "okay";
phandle = <0x34>;
};
soc {
compatible = "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
clock@1000000 {
reg = <0x1000000 0x100000>;
clocks = <0x3 0x65 0x3 0x30>;
clock-names = "mod", "bus";
resets = <0x3 0x22>;
#clock-cells = <0x1>;
#reset-cells = <0x1>;
compatible = "allwinner,sun8i-h3-de2-clk";
phandle = <0x2>;
};
mixer@1100000 {
compatible = "allwinner,sun8i-h3-de2-mixer-0";
reg = <0x1100000 0x100000>;
clocks = <0x2 0x0 0x2 0x6>;
clock-names = "bus", "mod";
resets = <0x2 0x0>;
phandle = <0x6>;
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port@1 {
reg = <0x1>;
phandle = <0x35>;
endpoint {
remote-endpoint = <0x7>;
phandle = <0x8>;
};
};
};
};
syscon@1c00000 {
compatible = "allwinner,sun8i-h3-system-controller", "syscon";
reg = <0x1c00000 0x1000>;
phandle = <0x12>;
};
dma-controller@1c02000 {
compatible = "allwinner,sun8i-h3-dma";
reg = <0x1c02000 0x1000>;
interrupts = <0x0 0x32 0x4>;
clocks = <0x3 0x15>;
resets = <0x3 0x6>;
#dma-cells = <0x1>;
phandle = <0x14>;
};
lcd-controller@1c0c000 {
compatible = "allwinner,sun8i-h3-tcon-tv", "allwinner,sun8i-a83t-tcon-tv";
reg = <0x1c0c000 0x1000>;
interrupts = <0x0 0x56 0x4>;
clocks = <0x3 0x2a 0x3 0x66>;
clock-names = "ahb", "tcon-ch1";
resets = <0x3 0x1b>;
reset-names = "lcd";
phandle = <0x36>;
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port@0 {
reg = <0x0>;
phandle = <0x37>;
endpoint {
remote-endpoint = <0x8>;
phandle = <0x7>;
};
};
port@1 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x1>;
phandle = <0x38>;
endpoint@1 {
reg = <0x1>;
remote-endpoint = <0x9>;
phandle = <0x1d>;
};
};
};
};
mmc@1c0f000 {
reg = <0x1c0f000 0x1000>;
pinctrl-names = "default";
pinctrl-0 = <0xa>;
resets = <0x3 0x7>;
reset-names = "ahb";
interrupts = <0x0 0x3c 0x4>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "allwinner,sun7i-a20-mmc";
clocks = <0x3 0x16 0x3 0x47 0x3 0x49 0x3 0x48>;
clock-names = "ahb", "mmc", "output", "sample";
vmmc-supply = <0xb>;
bus-width = <0x4>;
cd-gpios = <0xc 0x5 0x6 0x1>;
phandle = <0x39>;
};
mmc@1c10000 {
reg = <0x1c10000 0x1000>;
pinctrl-names = "default";
pinctrl-0 = <0xd>;
resets = <0x3 0x8>;
reset-names = "ahb";
interrupts = <0x0 0x3d 0x4>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "allwinner,sun7i-a20-mmc";
clocks = <0x3 0x17 0x3 0x4a 0x3 0x4c 0x3 0x4b>;
clock-names = "ahb", "mmc", "output", "sample";
vmmc-supply = <0xb>;
bus-width = <0x4>;
non-removable;
phandle = <0x3a>;
sdio_wifi@1 {
reg = <0x1>;
phandle = <0x3b>;
};
};
mmc@1c11000 {
reg = <0x1c11000 0x1000>;
resets = <0x3 0x9>;
reset-names = "ahb";
interrupts = <0x0 0x3e 0x4>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "allwinner,sun7i-a20-mmc";
clocks = <0x3 0x18 0x3 0x4d 0x3 0x4f 0x3 0x4e>;
clock-names = "ahb", "mmc", "output", "sample";
phandle = <0x3c>;
};
usb@1c19000 {
compatible = "allwinner,sun8i-h3-musb";
reg = <0x1c19000 0x400>;
clocks = <0x3 0x20>;
resets = <0x3 0x11>;
interrupts = <0x0 0x47 0x4>;
interrupt-names = "mc";
phys = <0xe 0x0>;
phy-names = "usb";
extcon = <0xe 0x0>;
status = "okay";
dr_mode = "host";
phandle = <0x3d>;
};
eeprom@01c14000 {
compatible = "allwinner,sun8i-h3-sid";
reg = <0x1c14000 0x400>;
phandle = <0x3e>;
};
phy@1c19400 {
compatible = "allwinner,sun8i-h3-usb-phy";
reg = <0x1c19400 0x2c 0x1c1a800 0x4 0x1c1b800 0x4 0x1c1c800 0x4 0x1c1d800 0x4>;
reg-names = "phy_ctrl", "pmu0", "pmu1", "pmu2", "pmu3";
clocks = <0x3 0x58 0x3 0x59 0x3 0x5a 0x3 0x5b>;
clock-names = "usb0_phy", "usb1_phy", "usb2_phy", "usb3_phy";
resets = <0x3 0x0 0x3 0x1 0x3 0x2 0x3 0x3>;
reset-names = "usb0_reset", "usb1_reset", "usb2_reset", "usb3_reset";
status = "okay";
#phy-cells = <0x1>;
usb0_id_det-gpios = <0xc 0x6 0xc 0x0>;
usb0_vbus-supply = <0xf>;
phandle = <0xe>;
};
usb@1c1a000 {
compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
reg = <0x1c1a000 0x100>;
interrupts = <0x0 0x48 0x4>;
clocks = <0x3 0x21 0x3 0x25>;
resets = <0x3 0x12 0x3 0x16>;
status = "okay";
phandle = <0x3f>;
};
usb@1c1a400 {
compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
reg = <0x1c1a400 0x100>;
interrupts = <0x0 0x49 0x4>;
clocks = <0x3 0x21 0x3 0x25 0x3 0x5c>;
resets = <0x3 0x12 0x3 0x16>;
status = "okay";
phandle = <0x40>;
};
usb@1c1b000 {
compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
reg = <0x1c1b000 0x100>;
interrupts = <0x0 0x4a 0x4>;
clocks = <0x3 0x22 0x3 0x26>;
resets = <0x3 0x13 0x3 0x17>;
phys = <0xe 0x1>;
phy-names = "usb";
status = "okay";
phandle = <0x41>;
};
usb@1c1b400 {
compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
reg = <0x1c1b400 0x100>;
interrupts = <0x0 0x4b 0x4>;
clocks = <0x3 0x22 0x3 0x26 0x3 0x5d>;
resets = <0x3 0x13 0x3 0x17>;
phys = <0xe 0x1>;
phy-names = "usb";
status = "okay";
phandle = <0x42>;
};
usb@1c1c000 {
compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
reg = <0x1c1c000 0x100>;
interrupts = <0x0 0x4c 0x4>;
clocks = <0x3 0x23 0x3 0x27>;
resets = <0x3 0x14 0x3 0x18>;
phys = <0xe 0x2>;
phy-names = "usb";
status = "okay";
phandle = <0x43>;
};
usb@1c1c400 {
compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
reg = <0x1c1c400 0x100>;
interrupts = <0x0 0x4d 0x4>;
clocks = <0x3 0x23 0x3 0x27 0x3 0x5e>;
resets = <0x3 0x14 0x3 0x18>;
phys = <0xe 0x2>;
phy-names = "usb";
status = "okay";
phandle = <0x44>;
};
usb@1c1d000 {
compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
reg = <0x1c1d000 0x100>;
interrupts = <0x0 0x4e 0x4>;
clocks = <0x3 0x24 0x3 0x28>;
resets = <0x3 0x15 0x3 0x19>;
phys = <0xe 0x3>;
phy-names = "usb";
status = "disabled";
phandle = <0x45>;
};
usb@1c1d400 {
compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
reg = <0x1c1d400 0x100>;
interrupts = <0x0 0x4f 0x4>;
clocks = <0x3 0x24 0x3 0x28 0x3 0x5f>;
resets = <0x3 0x15 0x3 0x19>;
phys = <0xe 0x3>;
phy-names = "usb";
status = "disabled";
phandle = <0x46>;
};
clock@1c20000 {
reg = <0x1c20000 0x400>;
clocks = <0x10 0x11>;
clock-names = "hosc", "losc";
#clock-cells = <0x1>;
#reset-cells = <0x1>;
compatible = "allwinner,sun8i-h3-ccu";
phandle = <0x3>;
};
pinctrl@1c20800 {
reg = <0x1c20800 0x400>;
interrupts = <0x0 0xb 0x4 0x0 0x11 0x4>;
clocks = <0x3 0x36 0x10 0x11>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <0x3>;
interrupt-controller;
#interrupt-cells = <0x3>;
compatible = "allwinner,sun8i-h3-pinctrl";
phandle = <0xc>;
csi {
pins = "PE0", "PE1", "PE2", "PE3", "PE4", "PE5", "PE6", "PE7", "PE8", "PE9", "PE10", "PE11";
function = "csi";
phandle = <0x1f>;
};
emac0 {
pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD7", "PD8", "PD9", "PD10", "PD12", "PD13", "PD15", "PD16", "PD17";
function = "emac";
drive-strength = <0x28>;
phandle = <0x47>;
};
i2c0 {
pins = "PA11", "PA12";
function = "i2c0";
phandle = <0x19>;
};
i2c1 {
pins = "PA18", "PA19";
function = "i2c1";
phandle = <0x1a>;
};
i2c2 {
pins = "PE12", "PE13";
function = "i2c2";
phandle = <0x1b>;
};
i2s0 {
pins = "PA18", "PA19", "PA20", "PA21";
function = "i2s0";
phandle = <0x48>;
};
i2s1 {
pins = "PG10", "PG11", "PG12", "PG13";
function = "i2s1";
phandle = <0x49>;
};
mmc0 {
pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
function = "mmc0";
drive-strength = <0x1e>;
bias-pull-up;
phandle = <0xa>;
};
mmc1 {
pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
function = "mmc1";
drive-strength = <0x1e>;
bias-pull-up;
phandle = <0xd>;
};
mmc2_8bit {
pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
function = "mmc2";
drive-strength = <0x1e>;
bias-pull-up;
phandle = <0x4a>;
};
spdif {
pins = "PA17";
function = "spdif";
phandle = <0x4b>;
};
spi0 {
pins = "PC0", "PC1", "PC2", "PC3";
function = "spi0";
phandle = <0x15>;
};
spi1 {
pins = "PA15", "PA16", "PA14", "PA13";
function = "spi1";
phandle = <0x16>;
};
uart0 {
pins = "PA4", "PA5";
function = "uart0";
phandle = <0x18>;
};
uart1 {
pins = "PG6", "PG7";
function = "uart1";
phandle = <0x4c>;
};
uart1_rts_cts {
pins = "PG8", "PG9";
function = "uart1";
phandle = <0x4d>;
};
uart2 {
pins = "PA0", "PA1";
function = "uart2";
phandle = <0x4e>;
};
uart3 {
pins = "PA13", "PA14";
function = "uart3";
phandle = <0x4f>;
};
uart3_rts_cts {
pins = "PA15", "PA16";
function = "uart3";
phandle = <0x50>;
};
led_pins {
pins = "PA15";
function = "gpio_out";
phandle = <0x2f>;
};
};
timer@1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x1c20c00 0xa0>;
interrupts = <0x0 0x12 0x4 0x0 0x13 0x4>;
clocks = <0x10>;
};
ethernet@1c30000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <0x12>;
reg = <0x1c30000 0x10000>;
interrupts = <0x0 0x52 0x4>;
interrupt-names = "macirq";
resets = <0x3 0xc>;
reset-names = "stmmaceth";
clocks = <0x3 0x1b>;
clock-names = "stmmaceth";
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
phandle = <0x51>;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "snps,dwmac-mdio";
phandle = <0x13>;
};
mdio-mux {
compatible = "allwinner,sun8i-h3-mdio-mux";
#address-cells = <0x1>;
#size-cells = <0x0>;
mdio-parent-bus = <0x13>;
mdio@1 {
compatible = "allwinner,sun8i-h3-mdio-internal";
reg = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
phandle = <0x52>;
ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
clocks = <0x3 0x43>;
resets = <0x3 0x27>;
phandle = <0x53>;
};
};
mdio@2 {
reg = <0x2>;
#address-cells = <0x1>;
#size-cells = <0x0>;
phandle = <0x54>;
};
};
};
spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x1c68000 0x1000>;
interrupts = <0x0 0x41 0x4>;
clocks = <0x3 0x1e 0x3 0x52>;
clock-names = "ahb", "mod";
dmas = <0x14 0x17 0x14 0x17>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <0x15>;
resets = <0x3 0xf>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
phandle = <0x55>;
};
spi@1c69000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x1c69000 0x1000>;
interrupts = <0x0 0x42 0x4>;
clocks = <0x3 0x1f 0x3 0x53>;
clock-names = "ahb", "mod";
dmas = <0x14 0x18 0x14 0x18>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <0x16>;
resets = <0x3 0x10>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
phandle = <0x56>;
};
watchdog@1c20ca0 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x1c20ca0 0x20>;
interrupts = <0x0 0x19 0x4>;
phandle = <0x57>;
};
spdif@1c21000 {
#sound-dai-cells = <0x0>;
compatible = "allwinner,sun8i-h3-spdif";
reg = <0x1c21000 0x400>;
interrupts = <0x0 0xc 0x4>;
clocks = <0x3 0x35 0x3 0x57>;
resets = <0x3 0x29>;
clock-names = "apb", "spdif";
dmas = <0x14 0x2>;
dma-names = "tx";
status = "disabled";
phandle = <0x58>;
};
pwm@1c21400 {
compatible = "allwinner,sun8i-h3-pwm";
reg = <0x1c21400 0x8>;
clocks = <0x10>;
#pwm-cells = <0x3>;
status = "disabled";
phandle = <0x59>;
};
i2s@1c22000 {
#sound-dai-cells = <0x0>;
compatible = "allwinner,sun8i-h3-i2s";
reg = <0x1c22000 0x400>;
interrupts = <0x0 0xd 0x4>;
clocks = <0x3 0x38 0x3 0x54>;
clock-names = "apb", "mod";
dmas = <0x14 0x3 0x14 0x3>;
resets = <0x3 0x2b>;
dma-names = "rx", "tx";
status = "disabled";
phandle = <0x5a>;
};
i2s@1c22400 {
#sound-dai-cells = <0x0>;
compatible = "allwinner,sun8i-h3-i2s";
reg = <0x1c22400 0x400>;
interrupts = <0x0 0xe 0x4>;
clocks = <0x3 0x39 0x3 0x55>;
clock-names = "apb", "mod";
dmas = <0x14 0x4 0x14 0x4>;
resets = <0x3 0x2c>;
dma-names = "rx", "tx";
status = "disabled";
phandle = <0x5b>;
};
i2s@1c22800 {
#sound-dai-cells = <0x0>;
compatible = "allwinner,sun8i-h3-i2s";
reg = <0x1c22800 0x400>;
interrupts = <0x0 0xf 0x4>;
clocks = <0x3 0x3a 0x3 0x56>;
clock-names = "apb", "mod";
dmas = <0x14 0x1b>;
resets = <0x3 0x2d>;
dma-names = "tx";
status = "disabled";
phandle = <0x5>;
};
codec@1c22c00 {
#sound-dai-cells = <0x0>;
compatible = "allwinner,sun8i-h3-codec";
reg = <0x1c22c00 0x400>;
interrupts = <0x0 0x1d 0x4>;
clocks = <0x3 0x34 0x3 0x6d>;
clock-names = "apb", "codec";
resets = <0x3 0x28>;
dmas = <0x14 0xf 0x14 0xf>;
dma-names = "rx", "tx";
allwinner,codec-analog-controls = <0x17>;
status = "disabled";
phandle = <0x5c>;
};
serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28000 0x400>;
interrupts = <0x0 0x0 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x3 0x3e>;
resets = <0x3 0x31>;
dmas = <0x14 0x6 0x14 0x6>;
dma-names = "rx", "tx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x18>;
phandle = <0x5d>;
};
serial@1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28400 0x400>;
interrupts = <0x0 0x1 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x3 0x3f>;
resets = <0x3 0x32>;
dmas = <0x14 0x7 0x14 0x7>;
dma-names = "rx", "tx";
status = "disabled";
phandle = <0x5e>;
};
serial@1c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28800 0x400>;
interrupts = <0x0 0x2 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x3 0x40>;
resets = <0x3 0x33>;
dmas = <0x14 0x8 0x14 0x8>;
dma-names = "rx", "tx";
status = "disabled";
phandle = <0x5f>;
};
serial@1c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28c00 0x400>;
interrupts = <0x0 0x3 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x3 0x41>;
resets = <0x3 0x34>;
dmas = <0x14 0x9 0x14 0x9>;
dma-names = "rx", "tx";
status = "disabled";
phandle = <0x60>;
};
i2c@1c2ac00 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x1c2ac00 0x400>;
interrupts = <0x0 0x6 0x4>;
clocks = <0x3 0x3b>;
resets = <0x3 0x2e>;
pinctrl-names = "default";
pinctrl-0 = <0x19>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
phandle = <0x61>;
};
i2c@1c2b000 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x1c2b000 0x400>;
interrupts = <0x0 0x7 0x4>;
clocks = <0x3 0x3c>;
resets = <0x3 0x2f>;
pinctrl-names = "default";
pinctrl-0 = <0x1a>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
phandle = <0x62>;
};
i2c@1c2b400 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x1c2b400 0x400>;
interrupts = <0x0 0x8 0x4>;
clocks = <0x3 0x3d>;
resets = <0x3 0x30>;
pinctrl-names = "default";
pinctrl-0 = <0x1b>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
phandle = <0x63>;
};
interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000 0x2000 0x1c86000 0x2000>;
interrupt-controller;
#interrupt-cells = <0x3>;
interrupts = <0x1 0x9 0xf04>;
phandle = <0x1>;
};
hdmi@1ee0000 {
#sound-dai-cells = <0x0>;
compatible = "allwinner,sun8i-h3-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi";
reg = <0x1ee0000 0x10000>;
reg-io-width = <0x1>;
interrupts = <0x0 0x58 0x4>;
clocks = <0x3 0x2f 0x3 0x70 0x3 0x6f>;
clock-names = "iahb", "isfr", "tmds";
resets = <0x3 0x21>;
reset-names = "ctrl";
phys = <0x1c>;
phy-names = "hdmi-phy";
status = "okay";
phandle = <0x4>;
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port@0 {
reg = <0x0>;
phandle = <0x64>;
endpoint {
remote-endpoint = <0x1d>;
phandle = <0x9>;
};
};
port@1 {
reg = <0x1>;
phandle = <0x65>;
endpoint {
remote-endpoint = <0x1e>;
phandle = <0x2e>;
};
};
};
};
hdmi-phy@1ef0000 {
compatible = "allwinner,sun8i-h3-hdmi-phy";
reg = <0x1ef0000 0x10000>;
clocks = <0x3 0x2f 0x3 0x70 0x3 0x6>;
clock-names = "bus", "mod", "pll-0";
resets = <0x3 0x20>;
reset-names = "phy";
#phy-cells = <0x0>;
phandle = <0x1c>;
};
camera@1cb0000 {
compatible = "allwinner,sun8i-h3-csi", "allwinner,sun6i-a31-csi";
reg = <0x1cb0000 0x1000>;
interrupts = <0x0 0x54 0x4>;
clocks = <0x3 0x2d 0x3 0x6a 0x3 0x62>;
clock-names = "bus", "mod", "ram";
resets = <0x3 0x1e>;
pinctrl-names = "default";
pinctrl-0 = <0x1f>;
status = "disabled";
phandle = <0x66>;
};
rtc@1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x1f00000 0x54>;
interrupts = <0x0 0x28 0x4 0x0 0x29 0x4>;
clock-output-names = "rtc-osc32k", "rtc-osc32k-out";
clocks = <0x20>;
#clock-cells = <0x1>;
phandle = <0x67>;
};
clock@1f01400 {
compatible = "allwinner,sun8i-h3-r-ccu";
reg = <0x1f01400 0x100>;
clocks = <0x10 0x11 0x21 0x3 0x9>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <0x1>;
#reset-cells = <0x1>;
phandle = <0x22>;
};
codec-analog@1f015c0 {
compatible = "allwinner,sun8i-h3-codec-analog";
reg = <0x1f015c0 0x4>;
phandle = <0x17>;
};
ir@1f02000 {
compatible = "allwinner,sun5i-a13-ir";
clocks = <0x22 0x4 0x22 0xb>;
clock-names = "apb", "ir";
resets = <0x22 0x0>;
interrupts = <0x0 0x25 0x4>;
reg = <0x1f02000 0x400>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x23>;
phandle = <0x68>;
};
i2c@1f02400 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x1f02400 0x400>;
interrupts = <0x0 0x2c 0x4>;
pinctrl-names = "default";
pinctrl-0 = <0x24>;
clocks = <0x22 0x9>;
resets = <0x22 0x5>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
phandle = <0x69>;
};
pinctrl@1f02c00 {
compatible = "allwinner,sun8i-h3-r-pinctrl";
reg = <0x1f02c00 0x400>;
interrupts = <0x0 0x2d 0x4>;
clocks = <0x22 0x3 0x10 0x11>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <0x3>;
interrupt-controller;
#interrupt-cells = <0x3>;
phandle = <0x2d>;
ir {
pins = "PL11";
function = "s_cir_rx";
phandle = <0x23>;
};
r-i2c {
pins = "PL0", "PL1";
function = "s_i2c";
phandle = <0x24>;
};
led_pins {
pins = "PL10";
function = "gpio_out";
phandle = <0x30>;
};
key_pins {
pins = "PL3";
function = "gpio_in";
phandle = <0x31>;
};
};
thermal-sensor@1c25000 {
compatible = "allwinner,sun8i-h3-ths";
reg = <0x1c25000 0x100>;
clocks = <0x3 0x37 0x3 0x45>;
clock-names = "bus", "mod";
resets = <0x3 0x2a>;
#thermal-sensor-cells = <0x0>;
#io-channel-cells = <0x0>;
phandle = <0x27>;
};
gpu@1c40000 {
compatible = "allwinner,sun8i-h3-mali", "arm,mali-400";
reg = <0x1c40000 0x10000>;
interrupts = <0x0 0x61 0x4 0x0 0x62 0x4 0x0 0x63 0x4 0x0 0x64 0x4 0x0 0x66 0x4 0x0 0x67 0x4 0x0 0x65 0x4>;
interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", "ppmmu1", "pmu";
clocks = <0x3 0x31 0x3 0x72>;
clock-names = "bus", "core";
resets = <0x3 0x23>;
assigned-clocks = <0x3 0x72>;
assigned-clock-rates = <0x16e36000>;
phandle = <0x6a>;
};