metadata.json

{
    "metadata": [
        {
            "title": "VLSI Education Kit",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "EdKit",
            "format": ["ppt", "doc", "zip code files"],
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "Gain an understanding of the fundamentals of Very Large-Scale Integration (VLSI), including how the theories and concepts can be applied in the design of simple logic circuits and in the physical implementation of a simplified microprocessor",
            "language": "Eng",
            "source":"",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],  
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": ""
        },
        {
            "title": "Introduction to VLSI, Module 1",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "Introduces the world of VLSI.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",   
            "link": "VLSI_Education_Kit/contents/Module01_IntroToVLSI/Lecture01_IntroToVLSI.pptx"
        },
        {
            "title": "Getting Started, Module 1, Lab 0",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lab",
            "format": "doc",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "This Getting Started Guide is intended to give an overview of the simple microprocessor that will be built, to outline the hardware and software requirements for the laboratories, and to describe how to install the files specific to these labs. The microprocessor section is of interest to both students and instructors, while the remaining sections are primarily of interest to the instructor.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module01_IntroToVLSI/Lab00_GettingStarted/Lab00_GettingStarted.docx"
        },
        {
            "title": "Circuits and Layout, Module 2",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "By the end of this lecture, you should be able to: Draw transistor-level schematics and layouts for complementary CMOS standard cells. Use time diagrams to describe the operation of D latch and D Flip-flop. Use stick diagrams to sketch and plan cell layouts.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module02_CircuitsAndLayout/Lecture02_CircuitsAndLayout.pptx"
        },
        {
            "title": "Cell Design and Verification, Module 2, Lab 1",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lab",
            "format": "doc",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "This lab introduces you to the basics of how to use Cadence to design, simulate, and verify schematics and layout of logic gates. It also serves as a stand-alone tutorial to quickly get up to speed with the Cadence tools.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module02_CircuitsAndLayout/Lab01_CellDesignAndVerification/Lab01_CellDesignAndVerification.docx"
        },
        {
            "title": "Processor Example, Module 3",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "By the end of this lecture, you should be able to: Describe and apply techniques for managing the design of complex systems. Describe the implementation of a simple processor at abstraction levels including: Architecture, Microarchitecture, Logic Design, Circuit Design, Physical Design, Verification & Test.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module03_ProcessorExample/Lecture03_ProcessorExample.pptx"
        },
        {
            "title": "Transistors, Module 4",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Use cross section diagrams to describe the characteristics of MOS transistors when operating in cut off, linear and saturation regions. Derive the relationship between current and voltage (I-V) of the MOS device at cut off, linear and saturation modes. Mathematically estimate the MOS gate capacitance. Describe the effect of diffusion capacitance on the terminals.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module04_Transistors/Lecture04_Transistors.pptx"
        },
        {
            "title": "Nonideal Transistor Theory, Module 5",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "doc",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "By the end of this lecture, you should be able to: Use suitable equations to describe the nonideal transistor characteristics due to High field effects, Channel length modulation, Threshold voltage effects and Leakage. Explain sources and impacts of process and environmental variations on the transistor operation.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module05_NonidealTransistorTheory/Lecture05_NonidealTransistorTheory.pptx"
        },
        {
            "title": "DC and Transient Response, Module 6",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "By the end of this lecture, you should be able to: Explain threshold drop in pass transistor circuits. Graphically derive the DC response of a CMOS logic gate. Estimate the delay of logic gates using RC delay models.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module06_DCandTransientResponse/Lecture06_DCandTransientResponse.pptx"
        },
        {
            "title": "Logical Effort, Module 7",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "pptx",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Use Logical Effort to estimate the delay of a logic gate and a combinational circuit path. Apply the method of Logical Effort to determine the best number of stages and best topology to minimize delay of a path.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module07_LogicalEffort/Lecture07_LogicalEffort.pptx"
        },
        {
            "title": "Datapath Design and Verification, Module 7, Lab 2",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lab",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "In this lab, you will begin designing a simplified 8-bit microprocessor. If you have not already read about the processor in Section 2 of the Getting Started Guide, do so now. You will review and simulate a Verilog model of the overall processor. You will learn about datapath design by assembling and connecting wordslices into an ALU.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module07_LogicalEffort/Lab02_DatapathDesignAndVerification"
        },
        {
            "title": "Power, Module 8",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "By the end of this course, you should be able to: Use equations to explain the sources of power dissipation in a chip. Estimate dynamic and static power consumption. Describe methods to reduce dynamic and static power losses.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module08_Power/Lecture08_Power.pptx"
        },
        {
            "title": "Scaling, Module 9",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "By the end of this lecture, you should be able to: Describe the effects of technology scaling on the number and cost of transistors power dissipation in devices.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module09_Scaling/Lecture09_Scaling.pptx"
        },
        {
            "title": "SPICE Simulation, Module 10",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Use spice to predict the behavior of integrated circuits, confirm logical effort estimates through SPICE simulation, and use SPICE to optimize circuit designs.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module10_SPICEsimulation/Lecture10_SPICEsimulation.pptx"
        },
        {
            "title": "Circuit Design, Module 11",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Explain and demonstrate how to optimize combinatorial   logic circuits critical paths using bubble pushing, compound gates, input ordering, asymmetric gates and Skewed gates. Use P/N ratio to determine the best delay/power trade-off for logic gates.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module11_CombinationalCircuitDesign/Lecture11_CircuitDesign.pptx"
        },
        {
            "title": "Controller Design, Module 11, Lab 3",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lab",
            "format": "doc",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lab, you should be able to: Design schematics and layout by hand for a small random logic. Synthesize a random logic block with Synopsys Design Compiler. Place and route the synthesized block with Cadence SOC Encounter. Verify the blocks with simulation, DRC, and LVS",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module11_CombinationalCircuitDesign/Lab03_ControllerDesign/Lab03_ControllerDesign.docx"
        },
        {
            "title": "Sequential Circuit Design, Module 12",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Describe input data timing constraint limits in relation to setup and hold time requirements in sequential circuits. Describe output data timing constraint limits in relation to propagation delay and contamination delay requirements in sequential circuits. Describe the impact of skew on timing. Explain time borrowing and describe how it can be applied using latches.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module12_SequentialCircuitDesign/Lecture12_SequentialCircuitDesign.pptx"
        },
        {
            "title": "Wires, Module 13",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Use lumped element models to estimate the resistance and capacitance of on-chip wires. Describe the issues of diffusion barrier resistance and dishing with copper wire and their effect on the overall resistance of the wire. Use equations and diagrams to describe wire resistance and capacitance. Describe crosstalk and its effects on nearby wires. Optimize wire delay, power, and crosstalk using width, spacing, shielding, and repeaters.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module13_Wires/Lecture13_Wires.pptx"
        },
        {
            "title": "Adders, Module 14",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Sketch transistor-level implementations of adder cells. Describe and explain the feature of different adder architectures including: Carry-Ripple Adder, Carry-Skip Adder, Carry-Lookahead Adder, Carry-Select Adder, Carry-Increment Adder and Tree Adder. Use parallel prefix networks to design circuits with logarithmic time complexity.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module14_Adders/Lecture14_Adders.pptx"
        },
        {
            "title": "Datapath, Module 15",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Design and describe the operation of datapath circuits such as comparators, shifters, multi-input adders and multipliers.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module15_Datapath/Lecture15_Datapath.pptx"
        },
        {
            "title": "SRAM, Module 16",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Explain the operations of 6T, 12T SRAM using transistor level or gate level diagrams. Design random access memories including: Bit cells, Row circuitry, Column circuitry Multiple ports. Design serial access memories that can perform operations such as Serial in Parallel out and Parallel in Serial out.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module16_SRAM/Lecture16_SRAM.pptx"
        },
        {
            "title": "Clocking, Module 17",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Describe the implications of clock distribution networks on skew and clock power. Design clock generators using delay and phase-locked loops.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module17_Clocking/Lecture17_Clocking.pptx"
        },
        {
            "title": "Chip Assembly, Module 17, Lab 4",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lab",
            "format": "doc",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "In this final lab, you will assemble and simulate your entire microprocessor! You will build your top-level chip cell by connecting the datapath, aludecoder, and controller to a padframe cell containing the I/O pads. Chip will have the same inputs, outputs, and function as the top-level processor8 module.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module17_Clocking/Lab04_ChipAssembly/Lab04_ChipAssembly.docx"
        },
        {
            "title": "Pitfalls, Module 18",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Describe sources and effects of on-chip variation due to process, voltage, temperature and aging. Outline the major sources of on-chip noise. Outline the differences between soft and hard errors.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module18_Pitfalls/Lecture18_Pitfalls.pptx"
        },
        {
            "title": "Test, Module 19",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to: Describe the stages of testing in chip design, debug, and manufacturing. Describe the stuck-at-fault model. Develop test vectors to find stuck-at-faults in combinational logic. Use scan chains to gain observability and controllability over a digital circuit. Design built-in self-test circuit. Describe the IEEE boundary scan methodology",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module19_Test/Lecture19_Test.pptx"
        },
        {
            "title": "Custom VLSI Design, Module 20",
            "subject": ["arm", "computer engineering", "hardware-designs", "vlsi", "electrical-engineering", "cadence-virtuoso", "microprocessor-implementation", "synopsis-design", "devices-circuits-materials"],
            "type": "Lecture",
            "format": "ppt",
            "creator": "David Money Harris",
            "publisher": "Arm Education",
            "created": "1/08/2020",
            "description": "At the end of this lecture, you should be able to describe IC packaging and its impacts, estimate the heating caused by package thermal resistance, I/O pad design, ESD protection circuits, high-speed I/O transceivers and clock recovery, power distribution networks and estimate the noise caused by supply resistance and inductance.",
            "language": "Eng",
            "source": "",
            "relation": "",
            "audience": ["Learner", "Developer", "Undergraduate", "Student", "Lecturer", "Academic", "Professor"],     
            "contributor": "",
            "date": "",
            "license": "EULA",
            "identifier": "",  
            "link": "VLSI_Education_Kit/contents/Module20_CustomVLSIDesign/Lecture20_CustomVLSIDesign.pptx"
        }
    ]
}