From b5f0695b22d87032289aabe515d84576bc40fe38 Mon Sep 17 00:00:00 2001 From: Martino Facchin Date: Mon, 9 Dec 2024 16:07:17 +0100 Subject: [PATCH 1/7] ZephyrCommon: allow boards without any ADC channel configured --- cores/arduino/zephyrCommon.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cores/arduino/zephyrCommon.cpp b/cores/arduino/zephyrCommon.cpp index a3b2ee0e..178704cd 100644 --- a/cores/arduino/zephyrCommon.cpp +++ b/cores/arduino/zephyrCommon.cpp @@ -170,7 +170,7 @@ const struct adc_dt_spec arduino_adc[] = const pin_size_t arduino_analog_pins[] = { DT_FOREACH_PROP_ELEM(DT_PATH(zephyr_user), adc_pin_gpios, ADC_PINS) }; -struct adc_channel_cfg channel_cfg[ARRAY_SIZE(arduino_analog_pins)] = +struct adc_channel_cfg channel_cfg[] = { DT_FOREACH_PROP_ELEM(DT_PATH(zephyr_user), io_channels, ADC_CH_CFG) }; size_t analog_pin_index(pin_size_t pinNumber) { From 80943e663f931f9d11c2c5efa67527996d5d5067 Mon Sep 17 00:00:00 2001 From: Martino Facchin Date: Mon, 9 Dec 2024 16:07:53 +0100 Subject: [PATCH 2/7] FIXME: provide stubs for old macros This allows at least to bypass the compilation errors on some "catchall" libraries like Adafruit's BusIO. Code using that macros won't work but we are mostly interested in Wire and SPI --- cores/arduino/Arduino.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/cores/arduino/Arduino.h b/cores/arduino/Arduino.h index bdf9c57d..acd145be 100644 --- a/cores/arduino/Arduino.h +++ b/cores/arduino/Arduino.h @@ -107,6 +107,11 @@ void noInterrupts(void); int digitalPinToInterrupt(pin_size_t pin); +#define digitalPinToPort(x) (x) +#define digitalPinToBitMask(x) (x) +#define portOutputRegister(x) (x) +#define portInputRegister(x) (x) + #include #ifdef __cplusplus #include From 68651bc635bbbec2de01c4551e32b953f72ae302 Mon Sep 17 00:00:00 2001 From: Martino Facchin Date: Mon, 9 Dec 2024 16:11:41 +0100 Subject: [PATCH 3/7] To be investigated: restore cxa_pure_virtual Looks like it's very hard to remove it for good (will be generated by a lot of patterns and the gcc flags are not enough) --- cores/arduino/abi.cpp | 24 ------------------------ cores/arduino/new.cpp | 2 ++ 2 files changed, 2 insertions(+), 24 deletions(-) delete mode 100644 cores/arduino/abi.cpp diff --git a/cores/arduino/abi.cpp b/cores/arduino/abi.cpp deleted file mode 100644 index 606882d8..00000000 --- a/cores/arduino/abi.cpp +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (c) 2024 Arduino SA - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include - -extern "C" void __cxa_pure_virtual(void) __attribute__ ((__noreturn__)); -extern "C" void __cxa_deleted_virtual(void) __attribute__ ((__noreturn__)); - -namespace std { - [[gnu::weak, noreturn]] void terminate() { - abort(); - } -} - -void __cxa_pure_virtual(void) { - std::terminate(); -} - -void __cxa_deleted_virtual(void) { - std::terminate(); -} diff --git a/cores/arduino/new.cpp b/cores/arduino/new.cpp index 0dd8406b..93ab93a5 100644 --- a/cores/arduino/new.cpp +++ b/cores/arduino/new.cpp @@ -6,6 +6,8 @@ #include "new.h" +extern "C" void __cxa_pure_virtual() {} + // The C++ spec dictates that allocation failure should cause the // (non-nothrow version of the) operator new to throw an exception. // Since we expect to have exceptions disabled, it would be more From 7e1b8509e3e45ac62d8206e5ca4389722212908d Mon Sep 17 00:00:00 2001 From: Martino Facchin Date: Mon, 9 Dec 2024 16:15:26 +0100 Subject: [PATCH 4/7] llext_exports: add missing APIs from WCharacter --- loader/llext_exports.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/loader/llext_exports.c b/loader/llext_exports.c index e51d35e7..97252bbd 100644 --- a/loader/llext_exports.c +++ b/loader/llext_exports.c @@ -35,6 +35,13 @@ EXPORT_SYMBOL(isspace); EXPORT_SYMBOL(isalnum); EXPORT_SYMBOL(tolower); EXPORT_SYMBOL(toupper); +EXPORT_SYMBOL(isalpha); +EXPORT_SYMBOL(iscntrl); +EXPORT_SYMBOL(isdigit); +EXPORT_SYMBOL(isgraph); +EXPORT_SYMBOL(isprint); +EXPORT_SYMBOL(isupper); +EXPORT_SYMBOL(isxdigit); #if defined(CONFIG_USB_DEVICE_STACK) EXPORT_SYMBOL(usb_enable); From 5eb1f50de2cc86afb15b05c1d2b41749696d0714 Mon Sep 17 00:00:00 2001 From: Martino Facchin Date: Mon, 9 Dec 2024 16:17:53 +0100 Subject: [PATCH 5/7] llext_exports: properly export kernel objects --- loader/llext_exports.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/loader/llext_exports.c b/loader/llext_exports.c index 97252bbd..16b44367 100644 --- a/loader/llext_exports.c +++ b/loader/llext_exports.c @@ -6,6 +6,7 @@ #include #include #include +#include #define FORCE_EXPORT_SYM(name) \ extern void name(void); \ @@ -103,8 +104,8 @@ FORCE_EXPORT_SYM(inet_pton); FORCE_EXPORT_SYM(cdc_acm_dte_rate_callback_set); #endif -FORCE_EXPORT_SYM(k_timer_init); -FORCE_EXPORT_SYM(k_fatal_halt); +EXPORT_SYMBOL(k_timer_init); +EXPORT_SYMBOL(k_fatal_halt); //FORCE_EXPORT_SYM(k_timer_user_data_set); //FORCE_EXPORT_SYM(k_timer_start); From c97b49f55b0fcce0ce59478b0018090b1271b132 Mon Sep 17 00:00:00 2001 From: Martino Facchin Date: Mon, 9 Dec 2024 16:18:38 +0100 Subject: [PATCH 6/7] SPI: provide a hook to set the minimum SPI frequency On Giga, the system will complain loudly if the frequency selected is too low ``` spi_ll_stm32: Unsupported frequency 400000Hz, max 120000000Hz, min 937500Hz``` Let's try to keep this at minimum or change when we'll be able to grab the same infor from a macro/API provided by zephyr --- libraries/SPI/SPI.cpp | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/libraries/SPI/SPI.cpp b/libraries/SPI/SPI.cpp index cfea9af7..f55c17c2 100644 --- a/libraries/SPI/SPI.cpp +++ b/libraries/SPI/SPI.cpp @@ -79,9 +79,13 @@ void arduino::ZephyrSPI::usingInterrupt(int interruptNumber) { void arduino::ZephyrSPI::notUsingInterrupt(int interruptNumber) { } +#ifndef SPI_MIN_CLOCK_FEQUENCY +#define SPI_MIN_CLOCK_FEQUENCY 1000000 +#endif + void arduino::ZephyrSPI::beginTransaction(SPISettings settings) { memset(&config, 0, sizeof(config)); - config.frequency = settings.getClockFreq(); + config.frequency = settings.getClockFreq() > SPI_MIN_CLOCK_FEQUENCY ? settings.getClockFreq() : SPI_MIN_CLOCK_FEQUENCY; auto mode = SPI_MODE_CPOL | SPI_MODE_CPHA; switch (settings.getDataMode()) { case SPI_MODE0: From 27fb215819b363462a62a72095657062c3033a3d Mon Sep 17 00:00:00 2001 From: Martino Facchin Date: Mon, 9 Dec 2024 16:21:22 +0100 Subject: [PATCH 7/7] TEMP: Giga: rebuild loader --- firmwares/zephyr-arduino_giga_r1_m7.bin | Bin 140160 -> 141148 bytes firmwares/zephyr-arduino_giga_r1_m7.elf | Bin 2358584 -> 2368172 bytes .../include/generated/zephyr/autoconf.h | 4 + .../generated/zephyr/devicetree_generated.h | 5318 +++++++++-------- 4 files changed, 2801 insertions(+), 2521 deletions(-) diff --git a/firmwares/zephyr-arduino_giga_r1_m7.bin b/firmwares/zephyr-arduino_giga_r1_m7.bin index 578f721123749d15ed8dcd007798dab8e6efce68..159443f54b4d9d441f84aee7483b043241b6133f 100755 GIT binary patch delta 19278 zcmZv^2Urx>7dAd;*jmKaS;z#26g(fiXe zQ4=+4Y>D7X&?thjo7hY2UD2R%u(9;-y}Lu=|NnhH&*8o2z2}}==FY9NW*?JooR&l> zJx}cCL7%aK9tXW&Ue-#QzqFD)L=VaSr>)TJFV?cb9?_|aJ#H{nr)Y)HNtNc2o(lON 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z{PXzQ5^nGJ;yDF{-^Pce6Opng07MLjz!(&zfqJ&6Y*jN&u8S1E8|wm&2JqU^pJa9Zhn=b@@VJu8u#|x{8(}M zM5b^}nlsj|Ryn_nyE8YxWO2DIFzC@VXO4R?H@|98c`9&po%=iHMWt(9ywR;vnW*x{ z$ciV@oJ@DOL>*K)zvQLz$YKLwn~HngkM|$52ww(CS1l75`9h}aHuu%a`Q_X#L@X)~ z)Mj}BvEuS{Z_74*Z{2r%PIUQtYS%WmbQLlouPeX3&21`wALj1^+uR}iUBdr6&FMJa zy&EnvD?j4)Dp$FzyQfNiW_tO`5lVTaN`BSiV_6c;iA9{YZdz4P)>FH{sGnY|s-!3D z=shvFdsPZ5v#icMwyx>xi$$0BX(z|sM?{z2d>(pvUq33kOaoTO-Je94cX|8db0gl@ z>*i5WvTUA1*hE>V1&22=;_n&MlKd^>qP*QcC*K{DmtP|?E8o4Bf790zZru<}mFt?qU5cipTC&a0>0JLK>0 z|EcKQ`?9;4zteAdF^|eQSS>%E{^h;ZoTl!!DxA`iF-kHkUNqyDe78z0zecI@ORG7P pC#89t^k3!nise@-y71qa^W$&s)L4G3{Pe=OQ$kK}a8M5K_, pinctrl-names) properties: */ #define DT_N_S_soc_S_i2c_40005400_PINCTRL_NUM 1 @@ -3456,16 +3461,16 @@ #define DT_N_S_soc_S_i2c_40005400_P_wakeup_source_EXISTS 1 #define DT_N_S_soc_S_i2c_40005400_P_zephyr_pm_device_runtime_auto 0 #define DT_N_S_soc_S_i2c_40005400_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_i2c_40005400_P_status "disabled" -#define DT_N_S_soc_S_i2c_40005400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_i2c_40005400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_i2c_40005400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_i2c_40005400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_i2c_40005400_P_status "okay" +#define DT_N_S_soc_S_i2c_40005400_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_i2c_40005400_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_i2c_40005400_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_i2c_40005400_P_status_IDX_0 "okay" #define DT_N_S_soc_S_i2c_40005400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2c_40005400_P_status_ENUM_IDX 2 -#define DT_N_S_soc_S_i2c_40005400_P_status_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_i2c_40005400_P_status_ENUM_TOKEN disabled -#define DT_N_S_soc_S_i2c_40005400_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_i2c_40005400_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_i2c_40005400_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_i2c_40005400_P_status_ENUM_UPPER_TOKEN OKAY #define DT_N_S_soc_S_i2c_40005400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005400, status, 0) #define DT_N_S_soc_S_i2c_40005400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005400, status, 0) #define DT_N_S_soc_S_i2c_40005400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, status, 0, __VA_ARGS__) @@ -3943,11 +3948,12 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005800_SUPPORTS_ORDS \ - 29, /* /smbus2 */ + 29, /* /smbus2 */ \ + 93, /* /zephyr,user */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_40005800_EXISTS 1 -#define DT_N_INST_2_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_40005800 +#define DT_N_INST_1_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_40005800 #define DT_N_NODELABEL_i2c2 DT_N_S_soc_S_i2c_40005800 /* Macros for properties that are special in the specification: */ @@ -3988,7 +3994,7 @@ #define DT_N_S_soc_S_i2c_40005800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" #define DT_N_S_soc_S_i2c_40005800_COMPAT_MODEL_IDX_0_EXISTS 1 #define DT_N_S_soc_S_i2c_40005800_COMPAT_MODEL_IDX_0 "stm32-i2c-v2" -#define DT_N_S_soc_S_i2c_40005800_STATUS_disabled 1 +#define DT_N_S_soc_S_i2c_40005800_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ #define DT_N_S_soc_S_i2c_40005800_PINCTRL_NUM 1 @@ -4005,16 +4011,16 @@ #define DT_N_S_soc_S_i2c_40005800_P_wakeup_source_EXISTS 1 #define DT_N_S_soc_S_i2c_40005800_P_zephyr_pm_device_runtime_auto 0 #define DT_N_S_soc_S_i2c_40005800_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_i2c_40005800_P_status "disabled" -#define DT_N_S_soc_S_i2c_40005800_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_i2c_40005800_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_i2c_40005800_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_i2c_40005800_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_i2c_40005800_P_status "okay" +#define DT_N_S_soc_S_i2c_40005800_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_i2c_40005800_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_i2c_40005800_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_i2c_40005800_P_status_IDX_0 "okay" #define DT_N_S_soc_S_i2c_40005800_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2c_40005800_P_status_ENUM_IDX 2 -#define DT_N_S_soc_S_i2c_40005800_P_status_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_i2c_40005800_P_status_ENUM_TOKEN disabled -#define DT_N_S_soc_S_i2c_40005800_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_i2c_40005800_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_i2c_40005800_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_i2c_40005800_P_status_ENUM_UPPER_TOKEN OKAY #define DT_N_S_soc_S_i2c_40005800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005800, status, 0) #define DT_N_S_soc_S_i2c_40005800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005800, status, 0) #define DT_N_S_soc_S_i2c_40005800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005800, status, 0, __VA_ARGS__) @@ -4807,12 +4813,12 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_58001c00_SUPPORTS_ORDS \ 35, /* /smbus4 */ \ - 87, /* /zephyr,user */ \ - 161, /* /soc/i2c@58001c00/ov7670@21 */ + 93, /* /zephyr,user */ \ + 163, /* /soc/i2c@58001c00/ov7670@21 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_58001c00_EXISTS 1 -#define DT_N_INST_0_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_58001c00 +#define DT_N_INST_2_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_58001c00 #define DT_N_NODELABEL_i2c4 DT_N_S_soc_S_i2c_58001c00 #define DT_N_NODELABEL_arduino_i2c DT_N_S_soc_S_i2c_58001c00 @@ -5402,7 +5408,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_gpio_deadbeef_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ + 93, /* /zephyr,user */ /* Existence and alternate IDs: */ #define DT_N_S_gpio_deadbeef_EXISTS 1 @@ -6727,19 +6733,19 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_adc_40022000_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ \ - 146, /* /soc/adc@40022000/channel@0 */ \ - 147, /* /soc/adc@40022000/channel@1 */ \ - 148, /* /soc/adc@40022000/channel@4 */ \ - 149, /* /soc/adc@40022000/channel@5 */ \ - 150, /* /soc/adc@40022000/channel@8 */ \ - 151, /* /soc/adc@40022000/channel@9 */ \ - 152, /* /soc/adc@40022000/channel@a */ \ - 153, /* /soc/adc@40022000/channel@c */ \ - 154, /* /soc/adc@40022000/channel@d */ \ - 155, /* /soc/adc@40022000/channel@10 */ \ - 156, /* /soc/adc@40022000/channel@12 */ \ - 157, /* /soc/adc@40022000/channel@13 */ + 93, /* /zephyr,user */ \ + 148, /* /soc/adc@40022000/channel@0 */ \ + 149, /* /soc/adc@40022000/channel@1 */ \ + 150, /* /soc/adc@40022000/channel@4 */ \ + 151, /* /soc/adc@40022000/channel@5 */ \ + 152, /* /soc/adc@40022000/channel@8 */ \ + 153, /* /soc/adc@40022000/channel@9 */ \ + 154, /* /soc/adc@40022000/channel@a */ \ + 155, /* /soc/adc@40022000/channel@c */ \ + 156, /* /soc/adc@40022000/channel@d */ \ + 157, /* /soc/adc@40022000/channel@10 */ \ + 158, /* /soc/adc@40022000/channel@12 */ \ + 159, /* /soc/adc@40022000/channel@13 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_adc_40022000_EXISTS 1 @@ -7046,202 +7052,202 @@ #define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usart1_rx_pb7 + * Devicetree node: /soc/pin-controller@58020000/usart2_rx_pd6 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_PATH "/soc/pin-controller@58020000/usart1_rx_pb7" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_PATH "/soc/pin-controller@58020000/usart2_rx_pd6" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FULL_NAME "usart1_rx_pb7" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FULL_NAME "usart2_rx_pd6" /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_CHILD_IDX 102 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_CHILD_IDX 103 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_NODELABEL(fn) fn(usart1_rx_pb7) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1_rx_pb7, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FOREACH_NODELABEL(fn) fn(usart2_rx_pd6) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart2_rx_pd6, __VA_ARGS__) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_ORD 52 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_ORD_STR_SORTABLE 00052 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_ORD 52 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_ORD_STR_SORTABLE 00052 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_REQUIRES_ORDS \ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_REQUIRES_ORDS \ 10, /* /soc/pin-controller@58020000 */ /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_SUPPORTS_ORDS \ - 55, /* /soc/serial@40011000 */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_SUPPORTS_ORDS \ + 55, /* /soc/serial@40004400 */ /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_EXISTS 1 -#define DT_N_NODELABEL_usart1_rx_pb7 DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_EXISTS 1 +#define DT_N_NODELABEL_usart2_rx_pd6 DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_output_high_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_pinmux 743 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_ENUM_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_ENUM_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_pinmux 1735 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_ENUM_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_ENUM_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6_P_slew_rate_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usart1_tx_pa9 + * Devicetree node: /soc/pin-controller@58020000/usart2_tx_pd5 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PATH "/soc/pin-controller@58020000/usart1_tx_pa9" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_PATH "/soc/pin-controller@58020000/usart2_tx_pd5" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FULL_NAME "usart1_tx_pa9" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FULL_NAME "usart2_tx_pd5" /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_IDX 106 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_CHILD_IDX 108 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_NODELABEL(fn) fn(usart1_tx_pa9) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1_tx_pa9, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FOREACH_NODELABEL(fn) fn(usart2_tx_pd5) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart2_tx_pd5, __VA_ARGS__) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_ORD 53 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_ORD_STR_SORTABLE 00053 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_ORD 53 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_ORD_STR_SORTABLE 00053 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_REQUIRES_ORDS \ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_REQUIRES_ORDS \ 10, /* /soc/pin-controller@58020000 */ /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_SUPPORTS_ORDS \ - 55, /* /soc/serial@40011000 */ - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_EXISTS 1 -#define DT_N_NODELABEL_usart1_tx_pa9 DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_up 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_high_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_pinmux 295 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_ENUM_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_ENUM_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_SUPPORTS_ORDS \ + 55, /* /soc/serial@40004400 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_EXISTS 1 +#define DT_N_NODELABEL_usart2_tx_pd5 DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_pinmux 1703 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_ENUM_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_ENUM_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5_P_slew_rate_EXISTS 1 /* * Devicetree node: /soc/rcc@58024400/reset-controller @@ -7294,32 +7300,32 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_rcc_58024400_S_reset_controller_SUPPORTS_ORDS \ - 55, /* /soc/serial@40011000 */ \ - 58, /* /soc/serial@40011400 */ \ - 79, /* /soc/timers@40010000 */ \ - 118, /* /soc/dsihost@50000000 */ \ - 127, /* /soc/sdmmc@48022400 */ \ - 128, /* /soc/sdmmc@52007000 */ \ - 129, /* /soc/serial@40004400 */ \ - 130, /* /soc/serial@40004800 */ \ - 133, /* /soc/serial@40004c00 */ \ - 134, /* /soc/serial@40005000 */ \ - 135, /* /soc/serial@40007c00 */ \ - 136, /* /soc/serial@58000c00 */ \ - 246, /* /soc/serial@40007800 */ \ - 249, /* /soc/timers@40000000 */ \ - 252, /* /soc/timers@40000400 */ \ - 255, /* /soc/timers@40000800 */ \ - 258, /* /soc/timers@40000c00 */ \ - 261, /* /soc/timers@40001000 */ \ - 263, /* /soc/timers@40001400 */ \ - 265, /* /soc/timers@40001800 */ \ - 268, /* /soc/timers@40001c00 */ \ - 271, /* /soc/timers@40002000 */ \ - 275, /* /soc/timers@40010400 */ \ - 277, /* /soc/timers@40014000 */ \ - 280, /* /soc/timers@40014400 */ \ - 283, /* /soc/timers@40014800 */ + 55, /* /soc/serial@40004400 */ \ + 58, /* /soc/serial@40004c00 */ \ + 61, /* /soc/serial@40011000 */ \ + 64, /* /soc/serial@40011400 */ \ + 85, /* /soc/timers@40010000 */ \ + 124, /* /soc/dsihost@50000000 */ \ + 133, /* /soc/sdmmc@48022400 */ \ + 134, /* /soc/sdmmc@52007000 */ \ + 135, /* /soc/serial@40004800 */ \ + 136, /* /soc/serial@40005000 */ \ + 137, /* /soc/serial@40007c00 */ \ + 138, /* /soc/serial@58000c00 */ \ + 248, /* /soc/serial@40007800 */ \ + 251, /* /soc/timers@40000000 */ \ + 254, /* /soc/timers@40000400 */ \ + 257, /* /soc/timers@40000800 */ \ + 260, /* /soc/timers@40000c00 */ \ + 263, /* /soc/timers@40001000 */ \ + 265, /* /soc/timers@40001400 */ \ + 267, /* /soc/timers@40001800 */ \ + 270, /* /soc/timers@40001c00 */ \ + 273, /* /soc/timers@40002000 */ \ + 277, /* /soc/timers@40010400 */ \ + 279, /* /soc/timers@40014000 */ \ + 282, /* /soc/timers@40014400 */ \ + 285, /* /soc/timers@40014800 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_rcc_58024400_S_reset_controller_EXISTS 1 @@ -7365,9 +7371,9 @@ #define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_set_bit_to_deassert_EXISTS 1 /* - * Devicetree node: /soc/serial@40011000 + * Devicetree node: /soc/serial@40004400 * - * Node identifier: DT_N_S_soc_S_serial_40011000 + * Node identifier: DT_N_S_soc_S_serial_40004400 * * Binding (compatible = st,stm32-usart): * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml @@ -7377,289 +7383,1132 @@ */ /* Node's full path: */ -#define DT_N_S_soc_S_serial_40011000_PATH "/soc/serial@40011000" +#define DT_N_S_soc_S_serial_40004400_PATH "/soc/serial@40004400" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_serial_40011000_FULL_NAME "serial@40011000" +#define DT_N_S_soc_S_serial_40004400_FULL_NAME "serial@40004400" /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_serial_40011000_PARENT DT_N_S_soc +#define DT_N_S_soc_S_serial_40004400_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_serial_40011000_CHILD_IDX 8 +#define DT_N_S_soc_S_serial_40004400_CHILD_IDX 9 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_serial_40011000_NODELABEL_NUM 2 -#define DT_N_S_soc_S_serial_40011000_FOREACH_NODELABEL(fn) fn(usart1) fn(arduino_serial) -#define DT_N_S_soc_S_serial_40011000_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1, __VA_ARGS__) fn(arduino_serial, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40004400_FOREACH_NODELABEL(fn) fn(usart2) +#define DT_N_S_soc_S_serial_40004400_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart2, __VA_ARGS__) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_serial_40011000_CHILD_NUM 0 -#define DT_N_S_soc_S_serial_40011000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40004400_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40004400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40011000_ORD 55 -#define DT_N_S_soc_S_serial_40011000_ORD_STR_SORTABLE 00055 +#define DT_N_S_soc_S_serial_40004400_ORD 55 +#define DT_N_S_soc_S_serial_40004400_ORD_STR_SORTABLE 00055 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_serial_40011000_REQUIRES_ORDS \ +#define DT_N_S_soc_S_serial_40004400_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 52, /* /soc/pin-controller@58020000/usart1_rx_pb7 */ \ - 53, /* /soc/pin-controller@58020000/usart1_tx_pa9 */ \ + 52, /* /soc/pin-controller@58020000/usart2_rx_pd6 */ \ + 53, /* /soc/pin-controller@58020000/usart2_tx_pd5 */ \ 54, /* /soc/rcc@58024400/reset-controller */ /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_serial_40011000_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ +#define DT_N_S_soc_S_serial_40004400_SUPPORTS_ORDS \ + 93, /* /zephyr,user */ /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_serial_40011000_EXISTS 1 -#define DT_N_INST_0_st_stm32_usart DT_N_S_soc_S_serial_40011000 -#define DT_N_INST_0_st_stm32_uart DT_N_S_soc_S_serial_40011000 -#define DT_N_NODELABEL_usart1 DT_N_S_soc_S_serial_40011000 -#define DT_N_NODELABEL_arduino_serial DT_N_S_soc_S_serial_40011000 +#define DT_N_S_soc_S_serial_40004400_EXISTS 1 +#define DT_N_INST_1_st_stm32_usart DT_N_S_soc_S_serial_40004400 +#define DT_N_INST_1_st_stm32_uart DT_N_S_soc_S_serial_40004400 +#define DT_N_NODELABEL_usart2 DT_N_S_soc_S_serial_40004400 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_serial_40011000_REG_NUM 1 -#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_VAL_ADDRESS 1073811456 /* 0x40011000 */ -#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ -#define DT_N_S_soc_S_serial_40011000_RANGES_NUM 0 -#define DT_N_S_soc_S_serial_40011000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_serial_40011000_IRQ_NUM 1 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_irq 37 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_serial_40011000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_MATCHES_st_stm32_usart 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_0 "stm32-usart" -#define DT_N_S_soc_S_serial_40011000_COMPAT_MATCHES_st_stm32_uart 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_1 "stm32-uart" -#define DT_N_S_soc_S_serial_40011000_STATUS_okay 1 +#define DT_N_S_soc_S_serial_40004400_REG_NUM 1 +#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_VAL_ADDRESS 1073759232 /* 0x40004400 */ +#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_serial_40004400_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40004400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40004400_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_irq 38 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40004400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_MATCHES_st_stm32_usart 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_0 "stm32-usart" +#define DT_N_S_soc_S_serial_40004400_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_1 "stm32-uart" +#define DT_N_S_soc_S_serial_40004400_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_serial_40011000_PINCTRL_NUM 1 -#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_TOKEN default -#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX 0 -#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 -#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7 +#define DT_N_S_soc_S_serial_40004400_PINCTRL_NUM 1 +#define DT_N_S_soc_S_serial_40004400_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_serial_40004400_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40004400_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_serial_40004400_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5 +#define DT_N_S_soc_S_serial_40004400_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6 /* Generic property macros: */ -#define DT_N_S_soc_S_serial_40011000_P_wakeup_source 0 -#define DT_N_S_soc_S_serial_40011000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_serial_40011000_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_status "okay" -#define DT_N_S_soc_S_serial_40011000_P_status_STRING_UNQUOTED okay -#define DT_N_S_soc_S_serial_40011000_P_status_STRING_TOKEN okay -#define DT_N_S_soc_S_serial_40011000_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0 "okay" -#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_status_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_40011000_P_status_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_status_ENUM_TOKEN okay -#define DT_N_S_soc_S_serial_40011000_P_status_ENUM_UPPER_TOKEN OKAY -#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, status, 0) -#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, status, 0) -#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_status_LEN 1 -#define DT_N_S_soc_S_serial_40011000_P_status_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_compatible {"st,stm32-usart", "st,stm32-uart"} -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0 "st,stm32-usart" -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1 "st,stm32-uart" -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, compatible, 0) \ - fn(DT_N_S_soc_S_serial_40011000, compatible, 1) -#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011000, compatible, 1) -#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40011000, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011000, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_compatible_LEN 2 -#define DT_N_S_soc_S_serial_40011000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_reg {1073811456 /* 0x40011000 */, 1024 /* 0x400 */} -#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_0 1073811456 -#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_interrupts {37 /* 0x25 */, 0 /* 0x0 */} -#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_0 37 -#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bus 240 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bits 16 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, clocks, 0) -#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, clocks, 0) -#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_clocks_LEN 1 -#define DT_N_S_soc_S_serial_40011000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_serial_40011000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_current_speed 115200 -#define DT_N_S_soc_S_serial_40011000_P_current_speed_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_hw_flow_control 0 -#define DT_N_S_soc_S_serial_40011000_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0) \ - fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_LEN 2 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names {"default"} -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0 "default" -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_TOKEN default -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_LEN 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_VAL_id 4868 -#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, resets, 0) -#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, resets, 0) -#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_resets_LEN 1 -#define DT_N_S_soc_S_serial_40011000_P_resets_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_tx_invert 0 -#define DT_N_S_soc_S_serial_40011000_P_tx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_rx_invert 0 -#define DT_N_S_soc_S_serial_40011000_P_rx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_single_wire 0 -#define DT_N_S_soc_S_serial_40011000_P_single_wire_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_tx_rx_swap 0 -#define DT_N_S_soc_S_serial_40011000_P_tx_rx_swap_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_de_enable 0 -#define DT_N_S_soc_S_serial_40011000_P_de_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_de_assert_time 0 -#define DT_N_S_soc_S_serial_40011000_P_de_assert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_de_deassert_time 0 -#define DT_N_S_soc_S_serial_40011000_P_de_deassert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_de_invert 0 -#define DT_N_S_soc_S_serial_40011000_P_de_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_fifo_enable 0 -#define DT_N_S_soc_S_serial_40011000_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40004400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_status "okay" +#define DT_N_S_soc_S_serial_40004400_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_serial_40004400_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_serial_40004400_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004400_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_serial_40004400_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, status, 0) +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, status, 0) +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_compatible {"st,stm32-usart", "st,stm32-uart"} +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0 "st,stm32-usart" +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, compatible, 0) \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1) +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1) +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_compatible_LEN 2 +#define DT_N_S_soc_S_serial_40004400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_reg {1073759232 /* 0x40004400 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_0 1073759232 +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_interrupts {38 /* 0x26 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_0 38 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bits 131072 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, clocks, 0) +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, clocks, 0) +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40004400_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40004400_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5 +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5 +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6 +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6 +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_serial_40004400, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004400, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40004400, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004400, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_VAL_id 4625 +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, resets, 0) +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, resets, 0) +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40004400_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40004400_P_rx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_single_wire 0 +#define DT_N_S_soc_S_serial_40004400_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40004400_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_enable 0 +#define DT_N_S_soc_S_serial_40004400_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40004400_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40004400_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_invert 0 +#define DT_N_S_soc_S_serial_40004400_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40004400_P_fifo_enable_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usart6_rx_pc7 + * Devicetree node: /soc/pin-controller@58020000/uart4_rx_pi9 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_PATH "/soc/pin-controller@58020000/usart6_rx_pc7" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PATH "/soc/pin-controller@58020000/uart4_rx_pi9" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FULL_NAME "usart6_rx_pc7" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FULL_NAME "uart4_rx_pi9" /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_CHILD_IDX 104 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_IDX 104 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_NODELABEL(fn) fn(usart6_rx_pc7) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart6_rx_pc7, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_NODELABEL(fn) fn(uart4_rx_pi9) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4_rx_pi9, __VA_ARGS__) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_ORD 56 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_ORD_STR_SORTABLE 00056 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_ORD 56 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_ORD_STR_SORTABLE 00056 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_REQUIRES_ORDS \ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_REQUIRES_ORDS \ 10, /* /soc/pin-controller@58020000 */ /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_SUPPORTS_ORDS \ - 58, /* /soc/serial@40011400 */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_SUPPORTS_ORDS \ + 58, /* /soc/serial@40004c00 */ /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_EXISTS 1 -#define DT_N_NODELABEL_usart6_rx_pc7 DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_EXISTS 1 +#define DT_N_NODELABEL_uart4_rx_pi9 DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_pinmux 4392 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_ENUM_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_ENUM_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/uart4_tx_ph13 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_PATH "/soc/pin-controller@58020000/uart4_tx_ph13" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FULL_NAME "uart4_tx_ph13" + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_CHILD_IDX 109 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_NODELABEL(fn) fn(uart4_tx_ph13) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4_tx_ph13, __VA_ARGS__) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_ORD 57 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_ORD_STR_SORTABLE 00057 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_REQUIRES_ORDS \ + 10, /* /soc/pin-controller@58020000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_SUPPORTS_ORDS \ + 58, /* /soc/serial@40004c00 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_EXISTS 1 +#define DT_N_NODELABEL_uart4_tx_ph13 DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_pinmux 4008 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_ENUM_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_ENUM_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_EXISTS 1 + +/* + * Devicetree node: /soc/serial@40004c00 + * + * Node identifier: DT_N_S_soc_S_serial_40004c00 + * + * Binding (compatible = st,stm32-uart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-uart.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_serial_40004c00_PATH "/soc/serial@40004c00" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_serial_40004c00_FULL_NAME "serial@40004c00" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40004c00_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_serial_40004c00_CHILD_IDX 11 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_serial_40004c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40004c00_FOREACH_NODELABEL(fn) fn(uart4) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4, __VA_ARGS__) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_serial_40004c00_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40004c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_serial_40004c00_ORD 58 +#define DT_N_S_soc_S_serial_40004c00_ORD_STR_SORTABLE 00058 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_serial_40004c00_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@58024400 */ \ + 54, /* /soc/rcc@58024400/reset-controller */ \ + 56, /* /soc/pin-controller@58020000/uart4_rx_pi9 */ \ + 57, /* /soc/pin-controller@58020000/uart4_tx_ph13 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_serial_40004c00_SUPPORTS_ORDS \ + 93, /* /zephyr,user */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_serial_40004c00_EXISTS 1 +#define DT_N_INST_2_st_stm32_uart DT_N_S_soc_S_serial_40004c00 +#define DT_N_NODELABEL_uart4 DT_N_S_soc_S_serial_40004c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_serial_40004c00_REG_NUM 1 +#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_VAL_ADDRESS 1073761280 /* 0x40004c00 */ +#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_serial_40004c00_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40004c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40004c00_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_irq 52 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40004c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_MODEL_IDX_0 "stm32-uart" +#define DT_N_S_soc_S_serial_40004c00_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NUM 1 +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13 +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 + +/* Generic property macros: */ +#define DT_N_S_soc_S_serial_40004c00_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40004c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_status "okay" +#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_serial_40004c00_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, status, 0) +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, status, 0) +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_compatible {"st,stm32-uart"} +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_reg {1073761280 /* 0x40004c00 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_0 1073761280 +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts {52 /* 0x34 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_0 52 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bits 524288 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40004c00_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40004c00_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_VAL_id 4627 +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, resets, 0) +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, resets, 0) +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40004c00_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40004c00_P_rx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_single_wire 0 +#define DT_N_S_soc_S_serial_40004c00_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40004c00_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_enable 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_invert 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40004c00_P_fifo_enable_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/usart1_rx_pb7 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_PATH "/soc/pin-controller@58020000/usart1_rx_pb7" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FULL_NAME "usart1_rx_pb7" + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_CHILD_IDX 102 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_NODELABEL(fn) fn(usart1_rx_pb7) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1_rx_pb7, __VA_ARGS__) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_ORD 59 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_ORD_STR_SORTABLE 00059 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_REQUIRES_ORDS \ + 10, /* /soc/pin-controller@58020000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_SUPPORTS_ORDS \ + 61, /* /soc/serial@40011000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_EXISTS 1 +#define DT_N_NODELABEL_usart1_rx_pb7 DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_pinmux 743 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_ENUM_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_ENUM_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7_P_slew_rate_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/usart1_tx_pa9 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PATH "/soc/pin-controller@58020000/usart1_tx_pa9" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FULL_NAME "usart1_tx_pa9" + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_IDX 107 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_NODELABEL(fn) fn(usart1_tx_pa9) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1_tx_pa9, __VA_ARGS__) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_ORD 60 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_ORD_STR_SORTABLE 00060 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_REQUIRES_ORDS \ + 10, /* /soc/pin-controller@58020000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_SUPPORTS_ORDS \ + 61, /* /soc/serial@40011000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_EXISTS 1 +#define DT_N_NODELABEL_usart1_tx_pa9 DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_pinmux 295 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_ENUM_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_ENUM_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_EXISTS 1 + +/* + * Devicetree node: /soc/serial@40011000 + * + * Node identifier: DT_N_S_soc_S_serial_40011000 + * + * Binding (compatible = st,stm32-usart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_serial_40011000_PATH "/soc/serial@40011000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_serial_40011000_FULL_NAME "serial@40011000" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40011000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_serial_40011000_CHILD_IDX 8 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_serial_40011000_NODELABEL_NUM 2 +#define DT_N_S_soc_S_serial_40011000_FOREACH_NODELABEL(fn) fn(usart1) fn(arduino_serial) +#define DT_N_S_soc_S_serial_40011000_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1, __VA_ARGS__) fn(arduino_serial, __VA_ARGS__) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_serial_40011000_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40011000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_serial_40011000_ORD 61 +#define DT_N_S_soc_S_serial_40011000_ORD_STR_SORTABLE 00061 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_serial_40011000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@58024400 */ \ + 54, /* /soc/rcc@58024400/reset-controller */ \ + 59, /* /soc/pin-controller@58020000/usart1_rx_pb7 */ \ + 60, /* /soc/pin-controller@58020000/usart1_tx_pa9 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_serial_40011000_SUPPORTS_ORDS \ + 93, /* /zephyr,user */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_serial_40011000_EXISTS 1 +#define DT_N_INST_0_st_stm32_usart DT_N_S_soc_S_serial_40011000 +#define DT_N_INST_0_st_stm32_uart DT_N_S_soc_S_serial_40011000 +#define DT_N_NODELABEL_usart1 DT_N_S_soc_S_serial_40011000 +#define DT_N_NODELABEL_arduino_serial DT_N_S_soc_S_serial_40011000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_serial_40011000_REG_NUM 1 +#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_VAL_ADDRESS 1073811456 /* 0x40011000 */ +#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_serial_40011000_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40011000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40011000_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_irq 37 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40011000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_MATCHES_st_stm32_usart 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_0 "stm32-usart" +#define DT_N_S_soc_S_serial_40011000_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_1 "stm32-uart" +#define DT_N_S_soc_S_serial_40011000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_serial_40011000_PINCTRL_NUM 1 +#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 +#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7 + +/* Generic property macros: */ +#define DT_N_S_soc_S_serial_40011000_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40011000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40011000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_status "okay" +#define DT_N_S_soc_S_serial_40011000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_serial_40011000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_serial_40011000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40011000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_serial_40011000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, status, 0) +#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, status, 0) +#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40011000_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_compatible {"st,stm32-usart", "st,stm32-uart"} +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0 "st,stm32-usart" +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, compatible, 0) \ + fn(DT_N_S_soc_S_serial_40011000, compatible, 1) +#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011000, compatible, 1) +#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40011000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_compatible_LEN 2 +#define DT_N_S_soc_S_serial_40011000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_reg {1073811456 /* 0x40011000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_0 1073811456 +#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_interrupts {37 /* 0x25 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_0 37 +#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bus 240 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bits 16 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, clocks, 0) +#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, clocks, 0) +#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40011000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40011000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40011000_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40011000_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_VAL_id 4868 +#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, resets, 0) +#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, resets, 0) +#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40011000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40011000_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40011000_P_rx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_single_wire 0 +#define DT_N_S_soc_S_serial_40011000_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40011000_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_de_enable 0 +#define DT_N_S_soc_S_serial_40011000_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40011000_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40011000_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_de_invert 0 +#define DT_N_S_soc_S_serial_40011000_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40011000_P_fifo_enable_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/usart6_rx_pc7 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_PATH "/soc/pin-controller@58020000/usart6_rx_pc7" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FULL_NAME "usart6_rx_pc7" + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_CHILD_IDX 105 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_NODELABEL(fn) fn(usart6_rx_pc7) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart6_rx_pc7, __VA_ARGS__) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_ORD 62 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_ORD_STR_SORTABLE 00062 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_REQUIRES_ORDS \ + 10, /* /soc/pin-controller@58020000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_SUPPORTS_ORDS \ + 64, /* /soc/serial@40011400 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_EXISTS 1 +#define DT_N_NODELABEL_usart6_rx_pc7 DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_PINCTRL_NUM 0 /* Generic property macros: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7_P_bias_disable 0 @@ -7714,7 +8563,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_CHILD_IDX 108 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_CHILD_IDX 110 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_NODELABEL_NUM 1 @@ -7734,8 +8583,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_ORD 57 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_ORD_STR_SORTABLE 00057 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_ORD 63 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_ORD_STR_SORTABLE 00063 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_REQUIRES_ORDS \ @@ -7743,7 +8592,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_SUPPORTS_ORDS \ - 58, /* /soc/serial@40011400 */ + 64, /* /soc/serial@40011400 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_EXISTS 1 @@ -7836,8 +8685,8 @@ #define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40011400_ORD 58 -#define DT_N_S_soc_S_serial_40011400_ORD_STR_SORTABLE 00058 +#define DT_N_S_soc_S_serial_40011400_ORD 64 +#define DT_N_S_soc_S_serial_40011400_ORD_STR_SORTABLE 00064 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40011400_REQUIRES_ORDS \ @@ -7845,17 +8694,17 @@ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ 54, /* /soc/rcc@58024400/reset-controller */ \ - 56, /* /soc/pin-controller@58020000/usart6_rx_pc7 */ \ - 57, /* /soc/pin-controller@58020000/usart6_tx_pg14 */ + 62, /* /soc/pin-controller@58020000/usart6_rx_pc7 */ \ + 63, /* /soc/pin-controller@58020000/usart6_tx_pg14 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_serial_40011400_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ + 93, /* /zephyr,user */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_serial_40011400_EXISTS 1 -#define DT_N_INST_1_st_stm32_usart DT_N_S_soc_S_serial_40011400 -#define DT_N_INST_1_st_stm32_uart DT_N_S_soc_S_serial_40011400 +#define DT_N_INST_2_st_stm32_usart DT_N_S_soc_S_serial_40011400 +#define DT_N_INST_3_st_stm32_uart DT_N_S_soc_S_serial_40011400 #define DT_N_NODELABEL_usart6 DT_N_S_soc_S_serial_40011400 /* Macros for properties that are special in the specification: */ @@ -8064,8 +8913,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9_ORD 59 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9_ORD_STR_SORTABLE 00059 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9_ORD 65 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9_ORD_STR_SORTABLE 00065 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9_REQUIRES_ORDS \ @@ -8073,7 +8922,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9_SUPPORTS_ORDS \ - 63, /* /soc/spi@40013000 */ + 69, /* /soc/spi@40013000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9_EXISTS 1 @@ -8163,8 +9012,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7_ORD 60 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7_ORD_STR_SORTABLE 00060 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7_ORD 66 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7_ORD_STR_SORTABLE 00066 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7_REQUIRES_ORDS \ @@ -8172,7 +9021,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7_SUPPORTS_ORDS \ - 63, /* /soc/spi@40013000 */ + 69, /* /soc/spi@40013000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7_EXISTS 1 @@ -8262,8 +9111,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4_ORD 61 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4_ORD_STR_SORTABLE 00061 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4_ORD 67 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4_ORD_STR_SORTABLE 00067 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4_REQUIRES_ORDS \ @@ -8271,7 +9120,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4_SUPPORTS_ORDS \ - 63, /* /soc/spi@40013000 */ + 69, /* /soc/spi@40013000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4_EXISTS 1 @@ -8361,8 +9210,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3_ORD 62 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3_ORD_STR_SORTABLE 00062 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3_ORD 68 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3_ORD_STR_SORTABLE 00068 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3_REQUIRES_ORDS \ @@ -8370,7 +9219,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3_SUPPORTS_ORDS \ - 63, /* /soc/spi@40013000 */ + 69, /* /soc/spi@40013000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3_EXISTS 1 @@ -8463,22 +9312,22 @@ #define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40013000_ORD 63 -#define DT_N_S_soc_S_spi_40013000_ORD_STR_SORTABLE 00063 +#define DT_N_S_soc_S_spi_40013000_ORD 69 +#define DT_N_S_soc_S_spi_40013000_ORD_STR_SORTABLE 00069 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_40013000_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 59, /* /soc/pin-controller@58020000/spi1_miso_pg9 */ \ - 60, /* /soc/pin-controller@58020000/spi1_mosi_pd7 */ \ - 61, /* /soc/pin-controller@58020000/spi1_nss_pa4 */ \ - 62, /* /soc/pin-controller@58020000/spi1_sck_pb3 */ + 65, /* /soc/pin-controller@58020000/spi1_miso_pg9 */ \ + 66, /* /soc/pin-controller@58020000/spi1_mosi_pd7 */ \ + 67, /* /soc/pin-controller@58020000/spi1_nss_pa4 */ \ + 68, /* /soc/pin-controller@58020000/spi1_sck_pb3 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_spi_40013000_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ + 93, /* /zephyr,user */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_spi_40013000_EXISTS 1 @@ -8707,8 +9556,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11_ORD 64 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11_ORD_STR_SORTABLE 00064 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11_ORD 70 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11_ORD_STR_SORTABLE 00070 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11_REQUIRES_ORDS \ @@ -8716,7 +9565,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11_SUPPORTS_ORDS \ - 68, /* /soc/spi@40015000 */ + 74, /* /soc/spi@40015000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11_EXISTS 1 @@ -8806,8 +9655,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10_ORD 65 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10_ORD_STR_SORTABLE 00065 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10_ORD 71 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10_ORD_STR_SORTABLE 00071 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10_REQUIRES_ORDS \ @@ -8815,7 +9664,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10_SUPPORTS_ORDS \ - 68, /* /soc/spi@40015000 */ + 74, /* /soc/spi@40015000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10_EXISTS 1 @@ -8905,8 +9754,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1_ORD 66 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1_ORD_STR_SORTABLE 00066 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1_ORD 72 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1_ORD_STR_SORTABLE 00072 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1_REQUIRES_ORDS \ @@ -8914,7 +9763,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1_SUPPORTS_ORDS \ - 68, /* /soc/spi@40015000 */ + 74, /* /soc/spi@40015000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1_EXISTS 1 @@ -9004,8 +9853,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6_ORD 67 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6_ORD_STR_SORTABLE 00067 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6_ORD 73 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6_ORD_STR_SORTABLE 00073 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6_REQUIRES_ORDS \ @@ -9013,7 +9862,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6_SUPPORTS_ORDS \ - 68, /* /soc/spi@40015000 */ + 74, /* /soc/spi@40015000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6_EXISTS 1 @@ -9106,22 +9955,22 @@ #define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40015000_ORD 68 -#define DT_N_S_soc_S_spi_40015000_ORD_STR_SORTABLE 00068 +#define DT_N_S_soc_S_spi_40015000_ORD 74 +#define DT_N_S_soc_S_spi_40015000_ORD_STR_SORTABLE 00074 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_40015000_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 64, /* /soc/pin-controller@58020000/spi5_miso_pj11 */ \ - 65, /* /soc/pin-controller@58020000/spi5_mosi_pj10 */ \ - 66, /* /soc/pin-controller@58020000/spi5_nss_pk1 */ \ - 67, /* /soc/pin-controller@58020000/spi5_sck_ph6 */ + 70, /* /soc/pin-controller@58020000/spi5_miso_pj11 */ \ + 71, /* /soc/pin-controller@58020000/spi5_mosi_pj10 */ \ + 72, /* /soc/pin-controller@58020000/spi5_nss_pk1 */ \ + 73, /* /soc/pin-controller@58020000/spi5_sck_ph6 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_spi_40015000_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ + 93, /* /zephyr,user */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_spi_40015000_EXISTS 1 @@ -9344,8 +10193,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_ORD 69 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_ORD_STR_SORTABLE 00069 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_ORD 75 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_ORD_STR_SORTABLE 00075 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_REQUIRES_ORDS \ @@ -9354,9 +10203,9 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ \ - 161, /* /soc/i2c@58001c00/ov7670@21 */ \ - 248, /* /soc/serial@40007800/bt_hci_uart/murata-1dx */ + 93, /* /zephyr,user */ \ + 163, /* /soc/i2c@58001c00/ov7670@21 */ \ + 250, /* /soc/serial@40007800/bt_hci_uart/murata-1dx */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_EXISTS 1 @@ -9466,8 +10315,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_ORD 70 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_ORD_STR_SORTABLE 00070 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_ORD 76 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_ORD_STR_SORTABLE 00076 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_REQUIRES_ORDS \ @@ -9476,7 +10325,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ + 93, /* /zephyr,user */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_EXISTS 1 @@ -9586,8 +10435,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_ORD 71 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_ORD_STR_SORTABLE 00071 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_ORD 77 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_ORD_STR_SORTABLE 00077 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_REQUIRES_ORDS \ @@ -9596,9 +10445,9 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ \ - 99, /* /gpio_keys */ \ - 100, /* /gpio_keys/button_0 */ + 93, /* /zephyr,user */ \ + 105, /* /gpio_keys */ \ + 106, /* /gpio_keys/button_0 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_EXISTS 1 @@ -9708,8 +10557,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_ORD 72 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_ORD_STR_SORTABLE 00072 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_ORD 78 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_ORD_STR_SORTABLE 00078 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_REQUIRES_ORDS \ @@ -9718,8 +10567,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ \ - 161, /* /soc/i2c@58001c00/ov7670@21 */ + 93, /* /zephyr,user */ \ + 163, /* /soc/i2c@58001c00/ov7670@21 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_EXISTS 1 @@ -9829,8 +10678,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_ORD 73 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_ORD_STR_SORTABLE 00073 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_ORD 79 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_ORD_STR_SORTABLE 00079 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_REQUIRES_ORDS \ @@ -9839,9 +10688,9 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ \ - 101, /* /leds */ \ - 104, /* /leds/led_2 */ + 93, /* /zephyr,user */ \ + 107, /* /leds */ \ + 110, /* /leds/led_2 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_EXISTS 1 @@ -9951,8 +10800,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD 74 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD_STR_SORTABLE 00074 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD 80 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD_STR_SORTABLE 00080 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REQUIRES_ORDS \ @@ -9961,8 +10810,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ \ - 248, /* /soc/serial@40007800/bt_hci_uart/murata-1dx */ + 93, /* /zephyr,user */ \ + 250, /* /soc/serial@40007800/bt_hci_uart/murata-1dx */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_EXISTS 1 @@ -10072,8 +10921,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD 75 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD_STR_SORTABLE 00075 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD 81 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD_STR_SORTABLE 00081 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_REQUIRES_ORDS \ @@ -10082,8 +10931,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ \ - 248, /* /soc/serial@40007800/bt_hci_uart/murata-1dx */ + 93, /* /zephyr,user */ \ + 250, /* /soc/serial@40007800/bt_hci_uart/murata-1dx */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_EXISTS 1 @@ -10193,8 +11042,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_ORD 76 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_ORD_STR_SORTABLE 00076 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_ORD 82 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_ORD_STR_SORTABLE 00082 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_REQUIRES_ORDS \ @@ -10203,9 +11052,9 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ \ - 101, /* /leds */ \ - 102, /* /leds/led_0 */ + 93, /* /zephyr,user */ \ + 107, /* /leds */ \ + 108, /* /leds/led_0 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_EXISTS 1 @@ -10315,8 +11164,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD 77 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD_STR_SORTABLE 00077 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD 83 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD_STR_SORTABLE 00083 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_REQUIRES_ORDS \ @@ -10325,9 +11174,9 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ \ - 101, /* /leds */ \ - 103, /* /leds/led_1 */ + 93, /* /zephyr,user */ \ + 107, /* /leds */ \ + 109, /* /leds/led_1 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_EXISTS 1 @@ -10437,8 +11286,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD 78 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD_STR_SORTABLE 00078 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD 84 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD_STR_SORTABLE 00084 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REQUIRES_ORDS \ @@ -10447,7 +11296,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ + 93, /* /zephyr,user */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_EXISTS 1 @@ -10557,8 +11406,8 @@ #define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010000_ORD 79 -#define DT_N_S_soc_S_timers_40010000_ORD_STR_SORTABLE 00079 +#define DT_N_S_soc_S_timers_40010000_ORD 85 +#define DT_N_S_soc_S_timers_40010000_ORD_STR_SORTABLE 00085 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40010000_REQUIRES_ORDS \ @@ -10569,7 +11418,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40010000_SUPPORTS_ORDS \ - 81, /* /soc/timers@40010000/pwm */ + 87, /* /soc/timers@40010000/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40010000_EXISTS 1 @@ -10807,8 +11656,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_ORD 80 -#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_ORD_STR_SORTABLE 00080 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_ORD 86 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_ORD_STR_SORTABLE 00086 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_REQUIRES_ORDS \ @@ -10816,7 +11665,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_SUPPORTS_ORDS \ - 81, /* /soc/timers@40010000/pwm */ + 87, /* /soc/timers@40010000/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_EXISTS 1 @@ -10909,18 +11758,18 @@ #define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD 81 -#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD_STR_SORTABLE 00081 +#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD 87 +#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD_STR_SORTABLE 00087 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40010000_S_pwm_REQUIRES_ORDS \ - 79, /* /soc/timers@40010000 */ \ - 80, /* /soc/pin-controller@58020000/tim1_ch3_pj9 */ + 85, /* /soc/timers@40010000 */ \ + 86, /* /soc/pin-controller@58020000/tim1_ch3_pj9 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40010000_S_pwm_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ \ - 274, /* /soc/timers@40010000/pwm/pwmclock */ + 93, /* /zephyr,user */ \ + 276, /* /soc/timers@40010000/pwm/pwmclock */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40010000_S_pwm_EXISTS 1 @@ -11050,8 +11899,8 @@ #define DT_N_S_otghs_fs_phy_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_otghs_fs_phy_ORD 82 -#define DT_N_S_otghs_fs_phy_ORD_STR_SORTABLE 00082 +#define DT_N_S_otghs_fs_phy_ORD 88 +#define DT_N_S_otghs_fs_phy_ORD_STR_SORTABLE 00088 /* Ordinals for what this node depends on directly: */ #define DT_N_S_otghs_fs_phy_REQUIRES_ORDS \ @@ -11059,8 +11908,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_otghs_fs_phy_SUPPORTS_ORDS \ - 85, /* /soc/usb@40080000 */ \ - 143, /* /soc/usb@40040000 */ + 91, /* /soc/usb@40080000 */ \ + 145, /* /soc/usb@40040000 */ /* Existence and alternate IDs: */ #define DT_N_S_otghs_fs_phy_EXISTS 1 @@ -11118,7 +11967,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_CHILD_IDX 110 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_CHILD_IDX 112 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_NODELABEL_NUM 1 @@ -11138,8 +11987,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_ORD 83 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_ORD_STR_SORTABLE 00083 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_ORD 89 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_ORD_STR_SORTABLE 00089 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_REQUIRES_ORDS \ @@ -11147,7 +11996,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_SUPPORTS_ORDS \ - 85, /* /soc/usb@40080000 */ + 91, /* /soc/usb@40080000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_EXISTS 1 @@ -11217,7 +12066,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_CHILD_IDX 111 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_CHILD_IDX 113 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_NODELABEL_NUM 1 @@ -11237,8 +12086,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_ORD 84 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_ORD_STR_SORTABLE 00084 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_ORD 90 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_ORD_STR_SORTABLE 00090 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_REQUIRES_ORDS \ @@ -11246,7 +12095,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_SUPPORTS_ORDS \ - 85, /* /soc/usb@40080000 */ + 91, /* /soc/usb@40080000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_EXISTS 1 @@ -11339,21 +12188,21 @@ #define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_usb_40080000_ORD 85 -#define DT_N_S_soc_S_usb_40080000_ORD_STR_SORTABLE 00085 +#define DT_N_S_soc_S_usb_40080000_ORD 91 +#define DT_N_S_soc_S_usb_40080000_ORD_STR_SORTABLE 00091 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_usb_40080000_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 82, /* /otghs_fs_phy */ \ - 83, /* /soc/pin-controller@58020000/usb_otg_fs_dm_pa11 */ \ - 84, /* /soc/pin-controller@58020000/usb_otg_fs_dp_pa12 */ + 88, /* /otghs_fs_phy */ \ + 89, /* /soc/pin-controller@58020000/usb_otg_fs_dm_pa11 */ \ + 90, /* /soc/pin-controller@58020000/usb_otg_fs_dp_pa12 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_usb_40080000_SUPPORTS_ORDS \ - 86, /* /soc/usb@40080000/cdc_acm_uart0 */ + 92, /* /soc/usb@40080000/cdc_acm_uart0 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_usb_40080000_EXISTS 1 @@ -11656,16 +12505,16 @@ #define DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0_ORD 86 -#define DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0_ORD_STR_SORTABLE 00086 +#define DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0_ORD 92 +#define DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0_ORD_STR_SORTABLE 00092 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0_REQUIRES_ORDS \ - 85, /* /soc/usb@40080000 */ + 91, /* /soc/usb@40080000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0_SUPPORTS_ORDS \ - 87, /* /zephyr,user */ + 93, /* /zephyr,user */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0_EXISTS 1 @@ -11773,32 +12622,36 @@ #define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_zephyr_user_ORD 87 -#define DT_N_S_zephyr_user_ORD_STR_SORTABLE 00087 +#define DT_N_S_zephyr_user_ORD 93 +#define DT_N_S_zephyr_user_ORD_STR_SORTABLE 00093 /* Ordinals for what this node depends on directly: */ #define DT_N_S_zephyr_user_REQUIRES_ORDS \ 0, /* / */ \ 13, /* /soc/adc@58026000 */ \ + 24, /* /soc/i2c@40005400 */ \ + 28, /* /soc/i2c@40005800 */ \ 34, /* /soc/i2c@58001c00 */ \ 38, /* /gpio@deadbeef */ \ 51, /* /soc/adc@40022000 */ \ - 55, /* /soc/serial@40011000 */ \ - 58, /* /soc/serial@40011400 */ \ - 63, /* /soc/spi@40013000 */ \ - 68, /* /soc/spi@40015000 */ \ - 69, /* /soc/pin-controller@58020000/gpio@58020000 */ \ - 70, /* /soc/pin-controller@58020000/gpio@58020400 */ \ - 71, /* /soc/pin-controller@58020000/gpio@58020800 */ \ - 72, /* /soc/pin-controller@58020000/gpio@58020C00 */ \ - 73, /* /soc/pin-controller@58020000/gpio@58021000 */ \ - 74, /* /soc/pin-controller@58020000/gpio@58021800 */ \ - 75, /* /soc/pin-controller@58020000/gpio@58021C00 */ \ - 76, /* /soc/pin-controller@58020000/gpio@58022000 */ \ - 77, /* /soc/pin-controller@58020000/gpio@58022400 */ \ - 78, /* /soc/pin-controller@58020000/gpio@58022800 */ \ - 81, /* /soc/timers@40010000/pwm */ \ - 86, /* /soc/usb@40080000/cdc_acm_uart0 */ + 55, /* /soc/serial@40004400 */ \ + 58, /* /soc/serial@40004c00 */ \ + 61, /* /soc/serial@40011000 */ \ + 64, /* /soc/serial@40011400 */ \ + 69, /* /soc/spi@40013000 */ \ + 74, /* /soc/spi@40015000 */ \ + 75, /* /soc/pin-controller@58020000/gpio@58020000 */ \ + 76, /* /soc/pin-controller@58020000/gpio@58020400 */ \ + 77, /* /soc/pin-controller@58020000/gpio@58020800 */ \ + 78, /* /soc/pin-controller@58020000/gpio@58020C00 */ \ + 79, /* /soc/pin-controller@58020000/gpio@58021000 */ \ + 80, /* /soc/pin-controller@58020000/gpio@58021800 */ \ + 81, /* /soc/pin-controller@58020000/gpio@58021C00 */ \ + 82, /* /soc/pin-controller@58020000/gpio@58022000 */ \ + 83, /* /soc/pin-controller@58020000/gpio@58022400 */ \ + 84, /* /soc/pin-controller@58020000/gpio@58022800 */ \ + 87, /* /soc/timers@40010000/pwm */ \ + 92, /* /soc/usb@40080000/cdc_acm_uart0 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_zephyr_user_SUPPORTS_ORDS /* nothing */ @@ -13062,22 +13915,36 @@ #define DT_N_S_zephyr_user_P_serials_IDX_1 DT_N_S_soc_S_serial_40011000 #define DT_N_S_zephyr_user_P_serials_IDX_1_PH DT_N_S_soc_S_serial_40011000 #define DT_N_S_zephyr_user_P_serials_IDX_1_EXISTS 1 -#define DT_N_S_zephyr_user_P_serials_IDX_2 DT_N_S_soc_S_serial_40011400 -#define DT_N_S_zephyr_user_P_serials_IDX_2_PH DT_N_S_soc_S_serial_40011400 +#define DT_N_S_zephyr_user_P_serials_IDX_2 DT_N_S_soc_S_serial_40004400 +#define DT_N_S_zephyr_user_P_serials_IDX_2_PH DT_N_S_soc_S_serial_40004400 #define DT_N_S_zephyr_user_P_serials_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_serials_IDX_3 DT_N_S_soc_S_serial_40004c00 +#define DT_N_S_zephyr_user_P_serials_IDX_3_PH DT_N_S_soc_S_serial_40004c00 +#define DT_N_S_zephyr_user_P_serials_IDX_3_EXISTS 1 +#define DT_N_S_zephyr_user_P_serials_IDX_4 DT_N_S_soc_S_serial_40011400 +#define DT_N_S_zephyr_user_P_serials_IDX_4_PH DT_N_S_soc_S_serial_40011400 +#define DT_N_S_zephyr_user_P_serials_IDX_4_EXISTS 1 #define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, serials, 0) \ fn(DT_N_S_zephyr_user, serials, 1) \ - fn(DT_N_S_zephyr_user, serials, 2) + fn(DT_N_S_zephyr_user, serials, 2) \ + fn(DT_N_S_zephyr_user, serials, 3) \ + fn(DT_N_S_zephyr_user, serials, 4) #define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, serials, 0) DT_DEBRACKET_INTERNAL sep \ fn(DT_N_S_zephyr_user, serials, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, serials, 2) + fn(DT_N_S_zephyr_user, serials, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, serials, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, serials, 4) #define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, serials, 0, __VA_ARGS__) \ fn(DT_N_S_zephyr_user, serials, 1, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, serials, 2, __VA_ARGS__) + fn(DT_N_S_zephyr_user, serials, 2, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, serials, 3, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, serials, 4, __VA_ARGS__) #define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, serials, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ fn(DT_N_S_zephyr_user, serials, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, serials, 2, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_serials_LEN 3 + fn(DT_N_S_zephyr_user, serials, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, serials, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, serials, 4, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_serials_LEN 5 #define DT_N_S_zephyr_user_P_serials_EXISTS 1 #define DT_N_S_zephyr_user_P_cdc_acm DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0 #define DT_N_S_zephyr_user_P_cdc_acm_IDX_0 DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0 @@ -13089,15 +13956,28 @@ #define DT_N_S_zephyr_user_P_cdc_acm_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, cdc_acm, 0, __VA_ARGS__) #define DT_N_S_zephyr_user_P_cdc_acm_LEN 1 #define DT_N_S_zephyr_user_P_cdc_acm_EXISTS 1 -#define DT_N_S_zephyr_user_P_i2cs DT_N_S_soc_S_i2c_58001c00 -#define DT_N_S_zephyr_user_P_i2cs_IDX_0 DT_N_S_soc_S_i2c_58001c00 -#define DT_N_S_zephyr_user_P_i2cs_IDX_0_PH DT_N_S_soc_S_i2c_58001c00 +#define DT_N_S_zephyr_user_P_i2cs_IDX_0 DT_N_S_soc_S_i2c_40005800 +#define DT_N_S_zephyr_user_P_i2cs_IDX_0_PH DT_N_S_soc_S_i2c_40005800 #define DT_N_S_zephyr_user_P_i2cs_IDX_0_EXISTS 1 -#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, i2cs, 0) -#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, i2cs, 0) -#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, i2cs, 0, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, i2cs, 0, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_i2cs_LEN 1 +#define DT_N_S_zephyr_user_P_i2cs_IDX_1 DT_N_S_soc_S_i2c_58001c00 +#define DT_N_S_zephyr_user_P_i2cs_IDX_1_PH DT_N_S_soc_S_i2c_58001c00 +#define DT_N_S_zephyr_user_P_i2cs_IDX_1_EXISTS 1 +#define DT_N_S_zephyr_user_P_i2cs_IDX_2 DT_N_S_soc_S_i2c_40005400 +#define DT_N_S_zephyr_user_P_i2cs_IDX_2_PH DT_N_S_soc_S_i2c_40005400 +#define DT_N_S_zephyr_user_P_i2cs_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, i2cs, 0) \ + fn(DT_N_S_zephyr_user, i2cs, 1) \ + fn(DT_N_S_zephyr_user, i2cs, 2) +#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, i2cs, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, i2cs, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, i2cs, 2) +#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, i2cs, 0, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, i2cs, 1, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, i2cs, 2, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, i2cs, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, i2cs, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, i2cs, 2, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_i2cs_LEN 3 #define DT_N_S_zephyr_user_P_i2cs_EXISTS 1 #define DT_N_S_zephyr_user_P_spis_IDX_0 DT_N_S_soc_S_spi_40013000 #define DT_N_S_zephyr_user_P_spis_IDX_0_PH DT_N_S_soc_S_spi_40013000 @@ -13286,8 +14166,8 @@ #define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_csi_ORD 88 -#define DT_N_S_clocks_S_clk_csi_ORD_STR_SORTABLE 00088 +#define DT_N_S_clocks_S_clk_csi_ORD 94 +#define DT_N_S_clocks_S_clk_csi_ORD_STR_SORTABLE 00094 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_clk_csi_REQUIRES_ORDS \ @@ -13359,8 +14239,8 @@ #define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_hsi_ORD 89 -#define DT_N_S_clocks_S_clk_hsi_ORD_STR_SORTABLE 00089 +#define DT_N_S_clocks_S_clk_hsi_ORD 95 +#define DT_N_S_clocks_S_clk_hsi_ORD_STR_SORTABLE 00095 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_clk_hsi_REQUIRES_ORDS \ @@ -13436,8 +14316,8 @@ #define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_hsi48_ORD 90 -#define DT_N_S_clocks_S_clk_hsi48_ORD_STR_SORTABLE 00090 +#define DT_N_S_clocks_S_clk_hsi48_ORD 96 +#define DT_N_S_clocks_S_clk_hsi48_ORD_STR_SORTABLE 00096 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_clk_hsi48_REQUIRES_ORDS \ @@ -13509,8 +14389,8 @@ #define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_lse_ORD 91 -#define DT_N_S_clocks_S_clk_lse_ORD_STR_SORTABLE 00091 +#define DT_N_S_clocks_S_clk_lse_ORD 97 +#define DT_N_S_clocks_S_clk_lse_ORD_STR_SORTABLE 00097 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_clk_lse_REQUIRES_ORDS \ @@ -13592,8 +14472,8 @@ #define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_lsi_ORD 92 -#define DT_N_S_clocks_S_clk_lsi_ORD_STR_SORTABLE 00092 +#define DT_N_S_clocks_S_clk_lsi_ORD 98 +#define DT_N_S_clocks_S_clk_lsi_ORD_STR_SORTABLE 00098 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_clk_lsi_REQUIRES_ORDS \ @@ -13665,8 +14545,8 @@ #define DT_N_S_clocks_S_perck_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_perck_ORD 93 -#define DT_N_S_clocks_S_perck_ORD_STR_SORTABLE 00093 +#define DT_N_S_clocks_S_perck_ORD 99 +#define DT_N_S_clocks_S_perck_ORD_STR_SORTABLE 00099 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_perck_REQUIRES_ORDS \ @@ -13768,8 +14648,8 @@ #define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_pll_1_ORD 94 -#define DT_N_S_clocks_S_pll_1_ORD_STR_SORTABLE 00094 +#define DT_N_S_clocks_S_pll_1_ORD 100 +#define DT_N_S_clocks_S_pll_1_ORD_STR_SORTABLE 00100 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_pll_1_REQUIRES_ORDS \ @@ -13883,8 +14763,8 @@ #define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_pll_2_ORD 95 -#define DT_N_S_clocks_S_pll_2_ORD_STR_SORTABLE 00095 +#define DT_N_S_clocks_S_pll_2_ORD 101 +#define DT_N_S_clocks_S_pll_2_ORD_STR_SORTABLE 00101 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_pll_2_REQUIRES_ORDS \ @@ -13992,8 +14872,8 @@ #define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_cpus_ORD 96 -#define DT_N_S_cpus_ORD_STR_SORTABLE 00096 +#define DT_N_S_cpus_ORD 102 +#define DT_N_S_cpus_ORD_STR_SORTABLE 00102 /* Ordinals for what this node depends on directly: */ #define DT_N_S_cpus_REQUIRES_ORDS \ @@ -14001,7 +14881,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_cpus_SUPPORTS_ORDS \ - 97, /* /cpus/cpu@0 */ + 103, /* /cpus/cpu@0 */ /* Existence and alternate IDs: */ #define DT_N_S_cpus_EXISTS 1 @@ -14061,16 +14941,16 @@ #define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_cpus_S_cpu_0_ORD 97 -#define DT_N_S_cpus_S_cpu_0_ORD_STR_SORTABLE 00097 +#define DT_N_S_cpus_S_cpu_0_ORD 103 +#define DT_N_S_cpus_S_cpu_0_ORD_STR_SORTABLE 00103 /* Ordinals for what this node depends on directly: */ #define DT_N_S_cpus_S_cpu_0_REQUIRES_ORDS \ - 96, /* /cpus */ + 102, /* /cpus */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_cpus_S_cpu_0_SUPPORTS_ORDS \ - 98, /* /cpus/cpu@0/mpu@e000ed90 */ + 104, /* /cpus/cpu@0/mpu@e000ed90 */ /* Existence and alternate IDs: */ #define DT_N_S_cpus_S_cpu_0_EXISTS 1 @@ -14161,12 +15041,12 @@ #define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD 98 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD_STR_SORTABLE 00098 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD 104 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD_STR_SORTABLE 00104 /* Ordinals for what this node depends on directly: */ #define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REQUIRES_ORDS \ - 97, /* /cpus/cpu@0 */ + 103, /* /cpus/cpu@0 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_SUPPORTS_ORDS /* nothing */ @@ -14263,17 +15143,17 @@ #define DT_N_S_gpio_keys_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_keys_S_button_0, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_gpio_keys_ORD 99 -#define DT_N_S_gpio_keys_ORD_STR_SORTABLE 00099 +#define DT_N_S_gpio_keys_ORD 105 +#define DT_N_S_gpio_keys_ORD_STR_SORTABLE 00105 /* Ordinals for what this node depends on directly: */ #define DT_N_S_gpio_keys_REQUIRES_ORDS \ 0, /* / */ \ - 71, /* /soc/pin-controller@58020000/gpio@58020800 */ + 77, /* /soc/pin-controller@58020000/gpio@58020800 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_gpio_keys_SUPPORTS_ORDS \ - 100, /* /gpio_keys/button_0 */ + 106, /* /gpio_keys/button_0 */ /* Existence and alternate IDs: */ #define DT_N_S_gpio_keys_EXISTS 1 @@ -14354,13 +15234,13 @@ #define DT_N_S_gpio_keys_S_button_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_gpio_keys_S_button_0_ORD 100 -#define DT_N_S_gpio_keys_S_button_0_ORD_STR_SORTABLE 00100 +#define DT_N_S_gpio_keys_S_button_0_ORD 106 +#define DT_N_S_gpio_keys_S_button_0_ORD_STR_SORTABLE 00106 /* Ordinals for what this node depends on directly: */ #define DT_N_S_gpio_keys_S_button_0_REQUIRES_ORDS \ - 71, /* /soc/pin-controller@58020000/gpio@58020800 */ \ - 99, /* /gpio_keys */ + 77, /* /soc/pin-controller@58020000/gpio@58020800 */ \ + 105, /* /gpio_keys */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_gpio_keys_S_button_0_SUPPORTS_ORDS /* nothing */ @@ -14439,21 +15319,21 @@ #define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_leds_ORD 101 -#define DT_N_S_leds_ORD_STR_SORTABLE 00101 +#define DT_N_S_leds_ORD 107 +#define DT_N_S_leds_ORD_STR_SORTABLE 00107 /* Ordinals for what this node depends on directly: */ #define DT_N_S_leds_REQUIRES_ORDS \ 0, /* / */ \ - 73, /* /soc/pin-controller@58020000/gpio@58021000 */ \ - 76, /* /soc/pin-controller@58020000/gpio@58022000 */ \ - 77, /* /soc/pin-controller@58020000/gpio@58022400 */ + 79, /* /soc/pin-controller@58020000/gpio@58021000 */ \ + 82, /* /soc/pin-controller@58020000/gpio@58022000 */ \ + 83, /* /soc/pin-controller@58020000/gpio@58022400 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_leds_SUPPORTS_ORDS \ - 102, /* /leds/led_0 */ \ - 103, /* /leds/led_1 */ \ - 104, /* /leds/led_2 */ + 108, /* /leds/led_0 */ \ + 109, /* /leds/led_1 */ \ + 110, /* /leds/led_2 */ /* Existence and alternate IDs: */ #define DT_N_S_leds_EXISTS 1 @@ -14524,13 +15404,13 @@ #define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_leds_S_led_0_ORD 102 -#define DT_N_S_leds_S_led_0_ORD_STR_SORTABLE 00102 +#define DT_N_S_leds_S_led_0_ORD 108 +#define DT_N_S_leds_S_led_0_ORD_STR_SORTABLE 00108 /* Ordinals for what this node depends on directly: */ #define DT_N_S_leds_S_led_0_REQUIRES_ORDS \ - 76, /* /soc/pin-controller@58020000/gpio@58022000 */ \ - 101, /* /leds */ + 82, /* /soc/pin-controller@58020000/gpio@58022000 */ \ + 107, /* /leds */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_leds_S_led_0_SUPPORTS_ORDS /* nothing */ @@ -14604,13 +15484,13 @@ #define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_leds_S_led_1_ORD 103 -#define DT_N_S_leds_S_led_1_ORD_STR_SORTABLE 00103 +#define DT_N_S_leds_S_led_1_ORD 109 +#define DT_N_S_leds_S_led_1_ORD_STR_SORTABLE 00109 /* Ordinals for what this node depends on directly: */ #define DT_N_S_leds_S_led_1_REQUIRES_ORDS \ - 77, /* /soc/pin-controller@58020000/gpio@58022400 */ \ - 101, /* /leds */ + 83, /* /soc/pin-controller@58020000/gpio@58022400 */ \ + 107, /* /leds */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_leds_S_led_1_SUPPORTS_ORDS /* nothing */ @@ -14684,13 +15564,13 @@ #define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_leds_S_led_2_ORD 104 -#define DT_N_S_leds_S_led_2_ORD_STR_SORTABLE 00104 +#define DT_N_S_leds_S_led_2_ORD 110 +#define DT_N_S_leds_S_led_2_ORD_STR_SORTABLE 00110 /* Ordinals for what this node depends on directly: */ #define DT_N_S_leds_S_led_2_REQUIRES_ORDS \ - 73, /* /soc/pin-controller@58020000/gpio@58021000 */ \ - 101, /* /leds */ + 79, /* /soc/pin-controller@58020000/gpio@58021000 */ \ + 107, /* /leds */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_leds_S_led_2_SUPPORTS_ORDS /* nothing */ @@ -14766,8 +15646,8 @@ #define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022100_ORD 105 -#define DT_N_S_soc_S_adc_40022100_ORD_STR_SORTABLE 00105 +#define DT_N_S_soc_S_adc_40022100_ORD 111 +#define DT_N_S_soc_S_adc_40022100_ORD_STR_SORTABLE 00111 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022100_REQUIRES_ORDS \ @@ -15001,8 +15881,8 @@ #define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022300_ORD 106 -#define DT_N_S_soc_S_adc_40022300_ORD_STR_SORTABLE 00106 +#define DT_N_S_soc_S_adc_40022300_ORD 112 +#define DT_N_S_soc_S_adc_40022300_ORD_STR_SORTABLE 00112 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022300_REQUIRES_ORDS \ @@ -15236,8 +16116,8 @@ #define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_bdma_58025400_ORD 107 -#define DT_N_S_soc_S_bdma_58025400_ORD_STR_SORTABLE 00107 +#define DT_N_S_soc_S_bdma_58025400_ORD 113 +#define DT_N_S_soc_S_bdma_58025400_ORD_STR_SORTABLE 00113 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_bdma_58025400_REQUIRES_ORDS \ @@ -15464,8 +16344,8 @@ #define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_can_4000a000_ORD 108 -#define DT_N_S_soc_S_can_4000a000_ORD_STR_SORTABLE 00108 +#define DT_N_S_soc_S_can_4000a000_ORD 114 +#define DT_N_S_soc_S_can_4000a000_ORD_STR_SORTABLE 00114 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_can_4000a000_REQUIRES_ORDS \ @@ -15758,8 +16638,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_ORD 109 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_ORD_STR_SORTABLE 00109 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_ORD 115 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_ORD_STR_SORTABLE 00115 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_REQUIRES_ORDS \ @@ -15767,7 +16647,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_SUPPORTS_ORDS \ - 111, /* /soc/can@4000a400 */ + 117, /* /soc/can@4000a400 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_EXISTS 1 @@ -15857,8 +16737,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_ORD 110 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_ORD_STR_SORTABLE 00110 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_ORD 116 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_ORD_STR_SORTABLE 00116 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_REQUIRES_ORDS \ @@ -15866,7 +16746,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_SUPPORTS_ORDS \ - 111, /* /soc/can@4000a400 */ + 117, /* /soc/can@4000a400 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_EXISTS 1 @@ -15959,16 +16839,16 @@ #define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_can_4000a400_ORD 111 -#define DT_N_S_soc_S_can_4000a400_ORD_STR_SORTABLE 00111 +#define DT_N_S_soc_S_can_4000a400_ORD 117 +#define DT_N_S_soc_S_can_4000a400_ORD_STR_SORTABLE 00117 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_can_4000a400_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 109, /* /soc/pin-controller@58020000/fdcan2_rx_pb5 */ \ - 110, /* /soc/pin-controller@58020000/fdcan2_tx_pb13 */ + 115, /* /soc/pin-controller@58020000/fdcan2_rx_pb5 */ \ + 116, /* /soc/pin-controller@58020000/fdcan2_tx_pb13 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_can_4000a400_SUPPORTS_ORDS /* nothing */ @@ -16300,8 +17180,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4_ORD 112 -#define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4_ORD_STR_SORTABLE 00112 +#define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4_ORD 118 +#define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4_ORD_STR_SORTABLE 00118 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4_REQUIRES_ORDS \ @@ -16309,7 +17189,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4_SUPPORTS_ORDS \ - 114, /* /soc/dac@40007400 */ + 120, /* /soc/dac@40007400 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4_EXISTS 1 @@ -16399,8 +17279,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5_ORD 113 -#define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5_ORD_STR_SORTABLE 00113 +#define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5_ORD 119 +#define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5_ORD_STR_SORTABLE 00119 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5_REQUIRES_ORDS \ @@ -16408,7 +17288,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5_SUPPORTS_ORDS \ - 114, /* /soc/dac@40007400 */ + 120, /* /soc/dac@40007400 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5_EXISTS 1 @@ -16501,15 +17381,15 @@ #define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dac_40007400_ORD 114 -#define DT_N_S_soc_S_dac_40007400_ORD_STR_SORTABLE 00114 +#define DT_N_S_soc_S_dac_40007400_ORD 120 +#define DT_N_S_soc_S_dac_40007400_ORD_STR_SORTABLE 00120 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dac_40007400_REQUIRES_ORDS \ 4, /* /soc */ \ 9, /* /soc/rcc@58024400 */ \ - 112, /* /soc/pin-controller@58020000/dac1_out1_pa4 */ \ - 113, /* /soc/pin-controller@58020000/dac1_out2_pa5 */ + 118, /* /soc/pin-controller@58020000/dac1_out1_pa4 */ \ + 119, /* /soc/pin-controller@58020000/dac1_out2_pa5 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dac_40007400_SUPPORTS_ORDS /* nothing */ @@ -16669,8 +17549,8 @@ #define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_display_controller_50001000_ORD 115 -#define DT_N_S_soc_S_display_controller_50001000_ORD_STR_SORTABLE 00115 +#define DT_N_S_soc_S_display_controller_50001000_ORD 121 +#define DT_N_S_soc_S_display_controller_50001000_ORD_STR_SORTABLE 00121 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_display_controller_50001000_REQUIRES_ORDS \ @@ -16856,8 +17736,8 @@ #define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dma_40020400_ORD 116 -#define DT_N_S_soc_S_dma_40020400_ORD_STR_SORTABLE 00116 +#define DT_N_S_soc_S_dma_40020400_ORD 122 +#define DT_N_S_soc_S_dma_40020400_ORD_STR_SORTABLE 00122 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dma_40020400_REQUIRES_ORDS \ @@ -17084,8 +17964,8 @@ #define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dmamux_58025800_ORD 117 -#define DT_N_S_soc_S_dmamux_58025800_ORD_STR_SORTABLE 00117 +#define DT_N_S_soc_S_dmamux_58025800_ORD 123 +#define DT_N_S_soc_S_dmamux_58025800_ORD_STR_SORTABLE 00123 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dmamux_58025800_REQUIRES_ORDS \ @@ -17235,8 +18115,8 @@ #define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dsihost_50000000_ORD 118 -#define DT_N_S_soc_S_dsihost_50000000_ORD_STR_SORTABLE 00118 +#define DT_N_S_soc_S_dsihost_50000000_ORD 124 +#define DT_N_S_soc_S_dsihost_50000000_ORD_STR_SORTABLE 00124 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dsihost_50000000_REQUIRES_ORDS \ @@ -17460,8 +18340,8 @@ #define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dmamux_40020800_ORD 119 -#define DT_N_S_soc_S_dmamux_40020800_ORD_STR_SORTABLE 00119 +#define DT_N_S_soc_S_dmamux_40020800_ORD 125 +#define DT_N_S_soc_S_dmamux_40020800_ORD_STR_SORTABLE 00125 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dmamux_40020800_REQUIRES_ORDS \ @@ -17471,9 +18351,9 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dmamux_40020800_SUPPORTS_ORDS \ - 120, /* /soc/i2s@40003800 */ \ - 121, /* /soc/i2s@40003c00 */ \ - 122, /* /soc/i2s@40013000 */ + 126, /* /soc/i2s@40003800 */ \ + 127, /* /soc/i2s@40003c00 */ \ + 128, /* /soc/i2s@40013000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_dmamux_40020800_EXISTS 1 @@ -17614,15 +18494,15 @@ #define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2s_40003800_ORD 120 -#define DT_N_S_soc_S_i2s_40003800_ORD_STR_SORTABLE 00120 +#define DT_N_S_soc_S_i2s_40003800_ORD 126 +#define DT_N_S_soc_S_i2s_40003800_ORD_STR_SORTABLE 00126 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2s_40003800_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 119, /* /soc/dmamux@40020800 */ + 125, /* /soc/dmamux@40020800 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2s_40003800_SUPPORTS_ORDS /* nothing */ @@ -17852,15 +18732,15 @@ #define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2s_40003c00_ORD 121 -#define DT_N_S_soc_S_i2s_40003c00_ORD_STR_SORTABLE 00121 +#define DT_N_S_soc_S_i2s_40003c00_ORD 127 +#define DT_N_S_soc_S_i2s_40003c00_ORD_STR_SORTABLE 00127 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2s_40003c00_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 119, /* /soc/dmamux@40020800 */ + 125, /* /soc/dmamux@40020800 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2s_40003c00_SUPPORTS_ORDS /* nothing */ @@ -18090,15 +18970,15 @@ #define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2s_40013000_ORD 122 -#define DT_N_S_soc_S_i2s_40013000_ORD_STR_SORTABLE 00122 +#define DT_N_S_soc_S_i2s_40013000_ORD 128 +#define DT_N_S_soc_S_i2s_40013000_ORD_STR_SORTABLE 00128 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2s_40013000_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 119, /* /soc/dmamux@40020800 */ + 125, /* /soc/dmamux@40020800 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2s_40013000_SUPPORTS_ORDS /* nothing */ @@ -18328,8 +19208,8 @@ #define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_ORD 123 -#define DT_N_S_soc_S_interrupt_controller_58000000_ORD_STR_SORTABLE 00123 +#define DT_N_S_soc_S_interrupt_controller_58000000_ORD 129 +#define DT_N_S_soc_S_interrupt_controller_58000000_ORD_STR_SORTABLE 00129 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_interrupt_controller_58000000_REQUIRES_ORDS \ @@ -18702,8 +19582,8 @@ #define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_mailbox_58026400_ORD 124 -#define DT_N_S_soc_S_mailbox_58026400_ORD_STR_SORTABLE 00124 +#define DT_N_S_soc_S_mailbox_58026400_ORD 130 +#define DT_N_S_soc_S_mailbox_58026400_ORD_STR_SORTABLE 00130 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_mailbox_58026400_REQUIRES_ORDS \ @@ -18862,8 +19742,8 @@ #define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_38800000_ORD 125 -#define DT_N_S_soc_S_memory_38800000_ORD_STR_SORTABLE 00125 +#define DT_N_S_soc_S_memory_38800000_ORD 131 +#define DT_N_S_soc_S_memory_38800000_ORD_STR_SORTABLE 00131 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_memory_38800000_REQUIRES_ORDS \ @@ -19020,8 +19900,8 @@ #define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_rng_48021800_ORD 126 -#define DT_N_S_soc_S_rng_48021800_ORD_STR_SORTABLE 00126 +#define DT_N_S_soc_S_rng_48021800_ORD 132 +#define DT_N_S_soc_S_rng_48021800_ORD_STR_SORTABLE 00132 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_rng_48021800_REQUIRES_ORDS \ @@ -19165,8 +20045,8 @@ #define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_sdmmc_48022400_ORD 127 -#define DT_N_S_soc_S_sdmmc_48022400_ORD_STR_SORTABLE 00127 +#define DT_N_S_soc_S_sdmmc_48022400_ORD 133 +#define DT_N_S_soc_S_sdmmc_48022400_ORD_STR_SORTABLE 00133 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_sdmmc_48022400_REQUIRES_ORDS \ @@ -19339,328 +20219,137 @@ #define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_sdmmc_52007000_ORD 128 -#define DT_N_S_soc_S_sdmmc_52007000_ORD_STR_SORTABLE 00128 +#define DT_N_S_soc_S_sdmmc_52007000_ORD 134 +#define DT_N_S_soc_S_sdmmc_52007000_ORD_STR_SORTABLE 00134 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_sdmmc_52007000_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 54, /* /soc/rcc@58024400/reset-controller */ - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_sdmmc_52007000_SUPPORTS_ORDS /* nothing */ - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_sdmmc_52007000_EXISTS 1 -#define DT_N_INST_0_st_stm32_sdmmc DT_N_S_soc_S_sdmmc_52007000 -#define DT_N_NODELABEL_sdmmc1 DT_N_S_soc_S_sdmmc_52007000 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_sdmmc_52007000_REG_NUM 1 -#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_VAL_ADDRESS 1375760384 /* 0x52007000 */ -#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ -#define DT_N_S_soc_S_sdmmc_52007000_RANGES_NUM 0 -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_NUM 1 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_irq 49 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MATCHES_st_stm32_sdmmc 1 -#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MODEL_IDX_0 "stm32-sdmmc" -#define DT_N_S_soc_S_sdmmc_52007000_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_sdmmc_52007000_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_sdmmc_52007000_P_wakeup_source 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_status "disabled" -#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_status_ENUM_IDX 2 -#define DT_N_S_soc_S_sdmmc_52007000_P_status_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_status_ENUM_TOKEN disabled -#define DT_N_S_soc_S_sdmmc_52007000_P_status_ENUM_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_status_LEN 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_status_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible {"st,stm32-sdmmc"} -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0 "st,stm32-sdmmc" -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-sdmmc -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_TOKEN st_stm32_sdmmc -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SDMMC -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_LEN 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_reg {1375760384 /* 0x52007000 */, 1024 /* 0x400 */} -#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_0 1375760384 -#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts {49 /* 0x31 */, 0 /* 0x0 */} -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_0 49 -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bus 212 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bits 65536 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bus 9 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bits 12364 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0) \ - fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1) -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1) -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_LEN 2 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_VAL_id 3984 -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_LEN 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_ENUM_IDX 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clk_div 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_clk_div_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_idma 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_idma_EXISTS 1 - -/* - * Devicetree node: /soc/serial@40004400 - * - * Node identifier: DT_N_S_soc_S_serial_40004400 - * - * Binding (compatible = st,stm32-usart): - * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_serial_40004400_PATH "/soc/serial@40004400" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_serial_40004400_FULL_NAME "serial@40004400" - -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_serial_40004400_PARENT DT_N_S_soc - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_serial_40004400_CHILD_IDX 9 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_serial_40004400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_serial_40004400_FOREACH_NODELABEL(fn) fn(usart2) -#define DT_N_S_soc_S_serial_40004400_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart2, __VA_ARGS__) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_serial_40004400_CHILD_NUM 0 -#define DT_N_S_soc_S_serial_40004400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40004400_ORD 129 -#define DT_N_S_soc_S_serial_40004400_ORD_STR_SORTABLE 00129 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_serial_40004400_REQUIRES_ORDS \ - 4, /* /soc */ \ - 5, /* /soc/interrupt-controller@e000e100 */ \ - 9, /* /soc/rcc@58024400 */ \ - 54, /* /soc/rcc@58024400/reset-controller */ - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_serial_40004400_SUPPORTS_ORDS /* nothing */ - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_serial_40004400_EXISTS 1 -#define DT_N_INST_2_st_stm32_usart DT_N_S_soc_S_serial_40004400 -#define DT_N_INST_3_st_stm32_uart DT_N_S_soc_S_serial_40004400 -#define DT_N_NODELABEL_usart2 DT_N_S_soc_S_serial_40004400 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_serial_40004400_REG_NUM 1 -#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_VAL_ADDRESS 1073759232 /* 0x40004400 */ -#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ -#define DT_N_S_soc_S_serial_40004400_RANGES_NUM 0 -#define DT_N_S_soc_S_serial_40004400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_serial_40004400_IRQ_NUM 1 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_irq 38 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_serial_40004400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_MATCHES_st_stm32_usart 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_0 "stm32-usart" -#define DT_N_S_soc_S_serial_40004400_COMPAT_MATCHES_st_stm32_uart 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_1 "stm32-uart" -#define DT_N_S_soc_S_serial_40004400_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_serial_40004400_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_serial_40004400_P_wakeup_source 0 -#define DT_N_S_soc_S_serial_40004400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_serial_40004400_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_status "disabled" -#define DT_N_S_soc_S_serial_40004400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_serial_40004400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_serial_40004400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_status_ENUM_IDX 2 -#define DT_N_S_soc_S_serial_40004400_P_status_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_status_ENUM_TOKEN disabled -#define DT_N_S_soc_S_serial_40004400_P_status_ENUM_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, status, 0) -#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, status, 0) -#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_status_LEN 1 -#define DT_N_S_soc_S_serial_40004400_P_status_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_compatible {"st,stm32-usart", "st,stm32-uart"} -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0 "st,stm32-usart" -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1 "st,stm32-uart" -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, compatible, 0) \ - fn(DT_N_S_soc_S_serial_40004400, compatible, 1) -#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40004400, compatible, 1) -#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40004400, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40004400, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_compatible_LEN 2 -#define DT_N_S_soc_S_serial_40004400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_reg {1073759232 /* 0x40004400 */, 1024 /* 0x400 */} -#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_0 1073759232 -#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_interrupts {38 /* 0x26 */, 0 /* 0x0 */} -#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_0 38 -#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bits 131072 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, clocks, 0) -#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, clocks, 0) -#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_clocks_LEN 1 -#define DT_N_S_soc_S_serial_40004400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_serial_40004400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_hw_flow_control 0 -#define DT_N_S_soc_S_serial_40004400_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_VAL_id 4625 -#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, resets, 0) -#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, resets, 0) -#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_resets_LEN 1 -#define DT_N_S_soc_S_serial_40004400_P_resets_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_tx_invert 0 -#define DT_N_S_soc_S_serial_40004400_P_tx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_rx_invert 0 -#define DT_N_S_soc_S_serial_40004400_P_rx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_single_wire 0 -#define DT_N_S_soc_S_serial_40004400_P_single_wire_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_tx_rx_swap 0 -#define DT_N_S_soc_S_serial_40004400_P_tx_rx_swap_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_de_enable 0 -#define DT_N_S_soc_S_serial_40004400_P_de_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_de_assert_time 0 -#define DT_N_S_soc_S_serial_40004400_P_de_assert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_de_deassert_time 0 -#define DT_N_S_soc_S_serial_40004400_P_de_deassert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_de_invert 0 -#define DT_N_S_soc_S_serial_40004400_P_de_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_fifo_enable 0 -#define DT_N_S_soc_S_serial_40004400_P_fifo_enable_EXISTS 1 + 54, /* /soc/rcc@58024400/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_sdmmc_52007000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_sdmmc_52007000_EXISTS 1 +#define DT_N_INST_0_st_stm32_sdmmc DT_N_S_soc_S_sdmmc_52007000 +#define DT_N_NODELABEL_sdmmc1 DT_N_S_soc_S_sdmmc_52007000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_sdmmc_52007000_REG_NUM 1 +#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_VAL_ADDRESS 1375760384 /* 0x52007000 */ +#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_sdmmc_52007000_RANGES_NUM 0 +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_NUM 1 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_irq 49 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MATCHES_st_stm32_sdmmc 1 +#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MODEL_IDX_0 "stm32-sdmmc" +#define DT_N_S_soc_S_sdmmc_52007000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_sdmmc_52007000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_sdmmc_52007000_P_wakeup_source 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_status "disabled" +#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_sdmmc_52007000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_sdmmc_52007000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_status_LEN 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_status_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible {"st,stm32-sdmmc"} +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0 "st,stm32-sdmmc" +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-sdmmc +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_TOKEN st_stm32_sdmmc +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SDMMC +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_LEN 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_reg {1375760384 /* 0x52007000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_0 1375760384 +#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts {49 /* 0x31 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_0 49 +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bus 212 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bits 65536 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bits 12364 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0) \ + fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1) +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1) +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_LEN 2 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_VAL_id 3984 +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_LEN 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_ENUM_IDX 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clk_div 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_clk_div_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_idma 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_idma_EXISTS 1 /* * Devicetree node: /soc/serial@40004800 @@ -19704,8 +20393,8 @@ #define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40004800_ORD 130 -#define DT_N_S_soc_S_serial_40004800_ORD_STR_SORTABLE 00130 +#define DT_N_S_soc_S_serial_40004800_ORD 135 +#define DT_N_S_soc_S_serial_40004800_ORD_STR_SORTABLE 00135 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40004800_REQUIRES_ORDS \ @@ -19720,7 +20409,7 @@ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_serial_40004800_EXISTS 1 #define DT_N_INST_3_st_stm32_usart DT_N_S_soc_S_serial_40004800 -#define DT_N_INST_4_st_stm32_uart DT_N_S_soc_S_serial_40004800 +#define DT_N_INST_5_st_stm32_uart DT_N_S_soc_S_serial_40004800 #define DT_N_NODELABEL_usart3 DT_N_S_soc_S_serial_40004800 /* Macros for properties that are special in the specification: */ @@ -19853,419 +20542,6 @@ #define DT_N_S_soc_S_serial_40004800_P_fifo_enable 0 #define DT_N_S_soc_S_serial_40004800_P_fifo_enable_EXISTS 1 -/* - * Devicetree node: /soc/pin-controller@58020000/uart4_rx_pi9 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PATH "/soc/pin-controller@58020000/uart4_rx_pi9" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FULL_NAME "uart4_rx_pi9" - -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PARENT DT_N_S_soc_S_pin_controller_58020000 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_IDX 103 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_NODELABEL(fn) fn(uart4_rx_pi9) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4_rx_pi9, __VA_ARGS__) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_ORD 131 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_ORD_STR_SORTABLE 00131 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_REQUIRES_ORDS \ - 10, /* /soc/pin-controller@58020000 */ - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_SUPPORTS_ORDS \ - 133, /* /soc/serial@40004c00 */ - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_EXISTS 1 -#define DT_N_NODELABEL_uart4_rx_pi9 DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_high_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_pinmux 4392 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_ENUM_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_ENUM_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_EXISTS 1 - -/* - * Devicetree node: /soc/pin-controller@58020000/uart4_tx_ph13 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13 - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_PATH "/soc/pin-controller@58020000/uart4_tx_ph13" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FULL_NAME "uart4_tx_ph13" - -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_PARENT DT_N_S_soc_S_pin_controller_58020000 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_CHILD_IDX 107 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_NODELABEL(fn) fn(uart4_tx_ph13) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4_tx_ph13, __VA_ARGS__) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_ORD 132 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_ORD_STR_SORTABLE 00132 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_REQUIRES_ORDS \ - 10, /* /soc/pin-controller@58020000 */ - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_SUPPORTS_ORDS \ - 133, /* /soc/serial@40004c00 */ - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_EXISTS 1 -#define DT_N_NODELABEL_uart4_tx_ph13 DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_pull_up 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_output_high_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_pinmux 4008 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_ENUM_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_ENUM_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13_P_slew_rate_EXISTS 1 - -/* - * Devicetree node: /soc/serial@40004c00 - * - * Node identifier: DT_N_S_soc_S_serial_40004c00 - * - * Binding (compatible = st,stm32-uart): - * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-uart.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_serial_40004c00_PATH "/soc/serial@40004c00" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_serial_40004c00_FULL_NAME "serial@40004c00" - -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_serial_40004c00_PARENT DT_N_S_soc - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_serial_40004c00_CHILD_IDX 11 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_serial_40004c00_NODELABEL_NUM 1 -#define DT_N_S_soc_S_serial_40004c00_FOREACH_NODELABEL(fn) fn(uart4) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4, __VA_ARGS__) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_serial_40004c00_CHILD_NUM 0 -#define DT_N_S_soc_S_serial_40004c00_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40004c00_ORD 133 -#define DT_N_S_soc_S_serial_40004c00_ORD_STR_SORTABLE 00133 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_serial_40004c00_REQUIRES_ORDS \ - 4, /* /soc */ \ - 5, /* /soc/interrupt-controller@e000e100 */ \ - 9, /* /soc/rcc@58024400 */ \ - 54, /* /soc/rcc@58024400/reset-controller */ \ - 131, /* /soc/pin-controller@58020000/uart4_rx_pi9 */ \ - 132, /* /soc/pin-controller@58020000/uart4_tx_ph13 */ - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_serial_40004c00_SUPPORTS_ORDS /* nothing */ - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_serial_40004c00_EXISTS 1 -#define DT_N_INST_5_st_stm32_uart DT_N_S_soc_S_serial_40004c00 -#define DT_N_NODELABEL_uart4 DT_N_S_soc_S_serial_40004c00 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_serial_40004c00_REG_NUM 1 -#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_VAL_ADDRESS 1073761280 /* 0x40004c00 */ -#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ -#define DT_N_S_soc_S_serial_40004c00_RANGES_NUM 0 -#define DT_N_S_soc_S_serial_40004c00_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_serial_40004c00_IRQ_NUM 1 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_irq 52 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_serial_40004c00_IRQ_LEVEL 1 -#define DT_N_S_soc_S_serial_40004c00_COMPAT_MATCHES_st_stm32_uart 1 -#define DT_N_S_soc_S_serial_40004c00_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40004c00_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_COMPAT_MODEL_IDX_0 "stm32-uart" -#define DT_N_S_soc_S_serial_40004c00_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NUM 1 -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_TOKEN default -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX 0 -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13 -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 - -/* Generic property macros: */ -#define DT_N_S_soc_S_serial_40004c00_P_wakeup_source 0 -#define DT_N_S_soc_S_serial_40004c00_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_serial_40004c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_status "disabled" -#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_status_ENUM_IDX 2 -#define DT_N_S_soc_S_serial_40004c00_P_status_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_status_ENUM_TOKEN disabled -#define DT_N_S_soc_S_serial_40004c00_P_status_ENUM_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, status, 0) -#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, status, 0) -#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_status_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_status_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_compatible {"st,stm32-uart"} -#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0 "st,stm32-uart" -#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-uart -#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_uart -#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_UART -#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0) -#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0) -#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_compatible_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_reg {1073761280 /* 0x40004c00 */, 1024 /* 0x400 */} -#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_0 1073761280 -#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_reg_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_interrupts {52 /* 0x34 */, 0 /* 0x0 */} -#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_0 52 -#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bits 524288 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0) -#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0) -#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_clocks_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_serial_40004c00_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_current_speed 115200 -#define DT_N_S_soc_S_serial_40004c00_P_current_speed_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_hw_flow_control 0 -#define DT_N_S_soc_S_serial_40004c00_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0) \ - fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_LEN 2 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names {"default"} -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0 "default" -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_UNQUOTED default -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_TOKEN default -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_VAL_id 4627 -#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, resets, 0) -#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, resets, 0) -#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_resets_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_resets_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_tx_invert 0 -#define DT_N_S_soc_S_serial_40004c00_P_tx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_rx_invert 0 -#define DT_N_S_soc_S_serial_40004c00_P_rx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_single_wire 0 -#define DT_N_S_soc_S_serial_40004c00_P_single_wire_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_tx_rx_swap 0 -#define DT_N_S_soc_S_serial_40004c00_P_tx_rx_swap_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_de_enable 0 -#define DT_N_S_soc_S_serial_40004c00_P_de_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_de_assert_time 0 -#define DT_N_S_soc_S_serial_40004c00_P_de_assert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_de_deassert_time 0 -#define DT_N_S_soc_S_serial_40004c00_P_de_deassert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_de_invert 0 -#define DT_N_S_soc_S_serial_40004c00_P_de_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_fifo_enable 0 -#define DT_N_S_soc_S_serial_40004c00_P_fifo_enable_EXISTS 1 - /* * Devicetree node: /soc/serial@40005000 * @@ -20308,8 +20584,8 @@ #define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40005000_ORD 134 -#define DT_N_S_soc_S_serial_40005000_ORD_STR_SORTABLE 00134 +#define DT_N_S_soc_S_serial_40005000_ORD 136 +#define DT_N_S_soc_S_serial_40005000_ORD_STR_SORTABLE 00136 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40005000_REQUIRES_ORDS \ @@ -20484,8 +20760,8 @@ #define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40007c00_ORD 135 -#define DT_N_S_soc_S_serial_40007c00_ORD_STR_SORTABLE 00135 +#define DT_N_S_soc_S_serial_40007c00_ORD 137 +#define DT_N_S_soc_S_serial_40007c00_ORD_STR_SORTABLE 00137 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40007c00_REQUIRES_ORDS \ @@ -20660,8 +20936,8 @@ #define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_58000c00_ORD 136 -#define DT_N_S_soc_S_serial_58000c00_ORD_STR_SORTABLE 00136 +#define DT_N_S_soc_S_serial_58000c00_ORD 138 +#define DT_N_S_soc_S_serial_58000c00_ORD_STR_SORTABLE 00138 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_58000c00_REQUIRES_ORDS \ @@ -20851,8 +21127,8 @@ #define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40003800_ORD 137 -#define DT_N_S_soc_S_spi_40003800_ORD_STR_SORTABLE 00137 +#define DT_N_S_soc_S_spi_40003800_ORD 139 +#define DT_N_S_soc_S_spi_40003800_ORD_STR_SORTABLE 00139 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_40003800_REQUIRES_ORDS \ @@ -21042,8 +21318,8 @@ #define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40003c00_ORD 138 -#define DT_N_S_soc_S_spi_40003c00_ORD_STR_SORTABLE 00138 +#define DT_N_S_soc_S_spi_40003c00_ORD 140 +#define DT_N_S_soc_S_spi_40003c00_ORD_STR_SORTABLE 00140 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_40003c00_REQUIRES_ORDS \ @@ -21233,8 +21509,8 @@ #define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40013400_ORD 139 -#define DT_N_S_soc_S_spi_40013400_ORD_STR_SORTABLE 00139 +#define DT_N_S_soc_S_spi_40013400_ORD 141 +#define DT_N_S_soc_S_spi_40013400_ORD_STR_SORTABLE 00141 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_40013400_REQUIRES_ORDS \ @@ -21414,8 +21690,8 @@ #define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_58001400_ORD 140 -#define DT_N_S_soc_S_spi_58001400_ORD_STR_SORTABLE 00140 +#define DT_N_S_soc_S_spi_58001400_ORD 142 +#define DT_N_S_soc_S_spi_58001400_ORD_STR_SORTABLE 00142 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_58001400_REQUIRES_ORDS \ @@ -21595,8 +21871,8 @@ #define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timer_e000e010_ORD 141 -#define DT_N_S_soc_S_timer_e000e010_ORD_STR_SORTABLE 00141 +#define DT_N_S_soc_S_timer_e000e010_ORD 143 +#define DT_N_S_soc_S_timer_e000e010_ORD_STR_SORTABLE 00143 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timer_e000e010_REQUIRES_ORDS \ @@ -21697,8 +21973,8 @@ #define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40002400_ORD 142 -#define DT_N_S_soc_S_timers_40002400_ORD_STR_SORTABLE 00142 +#define DT_N_S_soc_S_timers_40002400_ORD 144 +#define DT_N_S_soc_S_timers_40002400_ORD_STR_SORTABLE 00144 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40002400_REQUIRES_ORDS \ @@ -21863,15 +22139,15 @@ #define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_usb_40040000_ORD 143 -#define DT_N_S_soc_S_usb_40040000_ORD_STR_SORTABLE 00143 +#define DT_N_S_soc_S_usb_40040000_ORD 145 +#define DT_N_S_soc_S_usb_40040000_ORD_STR_SORTABLE 00145 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_usb_40040000_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 82, /* /otghs_fs_phy */ + 88, /* /otghs_fs_phy */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_usb_40040000_SUPPORTS_ORDS /* nothing */ @@ -22141,8 +22417,8 @@ #define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_watchdog_50003000_ORD 144 -#define DT_N_S_soc_S_watchdog_50003000_ORD_STR_SORTABLE 00144 +#define DT_N_S_soc_S_watchdog_50003000_ORD 146 +#define DT_N_S_soc_S_watchdog_50003000_ORD_STR_SORTABLE 00146 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_watchdog_50003000_REQUIRES_ORDS \ @@ -22287,8 +22563,8 @@ #define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_watchdog_58004800_ORD 145 -#define DT_N_S_soc_S_watchdog_58004800_ORD_STR_SORTABLE 00145 +#define DT_N_S_soc_S_watchdog_58004800_ORD 147 +#define DT_N_S_soc_S_watchdog_58004800_ORD_STR_SORTABLE 00147 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_watchdog_58004800_REQUIRES_ORDS \ @@ -22403,8 +22679,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_0_ORD 146 -#define DT_N_S_soc_S_adc_40022000_S_channel_0_ORD_STR_SORTABLE 00146 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_ORD 148 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_ORD_STR_SORTABLE 00148 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_0_REQUIRES_ORDS \ @@ -22512,8 +22788,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_1_ORD 147 -#define DT_N_S_soc_S_adc_40022000_S_channel_1_ORD_STR_SORTABLE 00147 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_ORD 149 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_ORD_STR_SORTABLE 00149 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_1_REQUIRES_ORDS \ @@ -22621,8 +22897,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_4_ORD 148 -#define DT_N_S_soc_S_adc_40022000_S_channel_4_ORD_STR_SORTABLE 00148 +#define DT_N_S_soc_S_adc_40022000_S_channel_4_ORD 150 +#define DT_N_S_soc_S_adc_40022000_S_channel_4_ORD_STR_SORTABLE 00150 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_4_REQUIRES_ORDS \ @@ -22730,8 +23006,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_5_ORD 149 -#define DT_N_S_soc_S_adc_40022000_S_channel_5_ORD_STR_SORTABLE 00149 +#define DT_N_S_soc_S_adc_40022000_S_channel_5_ORD 151 +#define DT_N_S_soc_S_adc_40022000_S_channel_5_ORD_STR_SORTABLE 00151 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_5_REQUIRES_ORDS \ @@ -22839,8 +23115,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_8_ORD 150 -#define DT_N_S_soc_S_adc_40022000_S_channel_8_ORD_STR_SORTABLE 00150 +#define DT_N_S_soc_S_adc_40022000_S_channel_8_ORD 152 +#define DT_N_S_soc_S_adc_40022000_S_channel_8_ORD_STR_SORTABLE 00152 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_8_REQUIRES_ORDS \ @@ -22948,8 +23224,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_9_ORD 151 -#define DT_N_S_soc_S_adc_40022000_S_channel_9_ORD_STR_SORTABLE 00151 +#define DT_N_S_soc_S_adc_40022000_S_channel_9_ORD 153 +#define DT_N_S_soc_S_adc_40022000_S_channel_9_ORD_STR_SORTABLE 00153 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_9_REQUIRES_ORDS \ @@ -23057,8 +23333,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_a_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_a_ORD 152 -#define DT_N_S_soc_S_adc_40022000_S_channel_a_ORD_STR_SORTABLE 00152 +#define DT_N_S_soc_S_adc_40022000_S_channel_a_ORD 154 +#define DT_N_S_soc_S_adc_40022000_S_channel_a_ORD_STR_SORTABLE 00154 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_a_REQUIRES_ORDS \ @@ -23166,8 +23442,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_c_ORD 153 -#define DT_N_S_soc_S_adc_40022000_S_channel_c_ORD_STR_SORTABLE 00153 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_ORD 155 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_ORD_STR_SORTABLE 00155 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_c_REQUIRES_ORDS \ @@ -23275,8 +23551,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_d_ORD 154 -#define DT_N_S_soc_S_adc_40022000_S_channel_d_ORD_STR_SORTABLE 00154 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_ORD 156 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_ORD_STR_SORTABLE 00156 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_d_REQUIRES_ORDS \ @@ -23384,8 +23660,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_10_ORD 155 -#define DT_N_S_soc_S_adc_40022000_S_channel_10_ORD_STR_SORTABLE 00155 +#define DT_N_S_soc_S_adc_40022000_S_channel_10_ORD 157 +#define DT_N_S_soc_S_adc_40022000_S_channel_10_ORD_STR_SORTABLE 00157 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_10_REQUIRES_ORDS \ @@ -23493,8 +23769,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_12_ORD 156 -#define DT_N_S_soc_S_adc_40022000_S_channel_12_ORD_STR_SORTABLE 00156 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_ORD 158 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_ORD_STR_SORTABLE 00158 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_12_REQUIRES_ORDS \ @@ -23602,8 +23878,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_13_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_13_ORD 157 -#define DT_N_S_soc_S_adc_40022000_S_channel_13_ORD_STR_SORTABLE 00157 +#define DT_N_S_soc_S_adc_40022000_S_channel_13_ORD 159 +#define DT_N_S_soc_S_adc_40022000_S_channel_13_ORD_STR_SORTABLE 00159 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_13_REQUIRES_ORDS \ @@ -23711,8 +23987,8 @@ #define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_58026000_S_channel_0_ORD 158 -#define DT_N_S_soc_S_adc_58026000_S_channel_0_ORD_STR_SORTABLE 00158 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_ORD 160 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_ORD_STR_SORTABLE 00160 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_58026000_S_channel_0_REQUIRES_ORDS \ @@ -23820,8 +24096,8 @@ #define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_58026000_S_channel_1_ORD 159 -#define DT_N_S_soc_S_adc_58026000_S_channel_1_ORD_STR_SORTABLE 00159 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_ORD 161 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_ORD_STR_SORTABLE 00161 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_58026000_S_channel_1_REQUIRES_ORDS \ @@ -23932,8 +24208,8 @@ #define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dma_40020000_ORD 160 -#define DT_N_S_soc_S_dma_40020000_ORD_STR_SORTABLE 00160 +#define DT_N_S_soc_S_dma_40020000_ORD 162 +#define DT_N_S_soc_S_dma_40020000_ORD_STR_SORTABLE 00162 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dma_40020000_REQUIRES_ORDS \ @@ -23943,7 +24219,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dma_40020000_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_dma_40020000_EXISTS 1 @@ -24161,19 +24437,19 @@ #define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_ORD 161 -#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_ORD_STR_SORTABLE 00161 +#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_ORD 163 +#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_ORD_STR_SORTABLE 00163 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_REQUIRES_ORDS \ 34, /* /soc/i2c@58001c00 */ \ - 69, /* /soc/pin-controller@58020000/gpio@58020000 */ \ - 72, /* /soc/pin-controller@58020000/gpio@58020C00 */ + 75, /* /soc/pin-controller@58020000/gpio@58020000 */ \ + 78, /* /soc/pin-controller@58020000/gpio@58020C00 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ \ - 184, /* /soc/i2c@58001c00/ov7670@21/port */ + 175, /* /soc/dcmi@48020000 */ \ + 186, /* /soc/i2c@58001c00/ov7670@21/port */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_EXISTS 1 @@ -24289,8 +24565,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_ORD 162 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_ORD_STR_SORTABLE 00162 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_ORD 164 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_ORD_STR_SORTABLE 00164 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_REQUIRES_ORDS \ @@ -24298,7 +24574,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_EXISTS 1 @@ -24388,8 +24664,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_ORD 163 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_ORD_STR_SORTABLE 00163 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_ORD 165 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_ORD_STR_SORTABLE 00165 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_REQUIRES_ORDS \ @@ -24397,7 +24673,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_EXISTS 1 @@ -24487,8 +24763,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_ORD 164 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_ORD_STR_SORTABLE 00164 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_ORD 166 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_ORD_STR_SORTABLE 00166 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_REQUIRES_ORDS \ @@ -24496,7 +24772,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_EXISTS 1 @@ -24586,8 +24862,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_ORD 165 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_ORD_STR_SORTABLE 00165 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_ORD 167 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_ORD_STR_SORTABLE 00167 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_REQUIRES_ORDS \ @@ -24595,7 +24871,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_EXISTS 1 @@ -24685,8 +24961,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_ORD 166 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_ORD_STR_SORTABLE 00166 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_ORD 168 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_ORD_STR_SORTABLE 00168 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_REQUIRES_ORDS \ @@ -24694,7 +24970,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_EXISTS 1 @@ -24784,8 +25060,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_ORD 167 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_ORD_STR_SORTABLE 00167 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_ORD 169 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_ORD_STR_SORTABLE 00169 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_REQUIRES_ORDS \ @@ -24793,7 +25069,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_EXISTS 1 @@ -24883,8 +25159,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_ORD 168 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_ORD_STR_SORTABLE 00168 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_ORD 170 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_ORD_STR_SORTABLE 00170 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_REQUIRES_ORDS \ @@ -24892,7 +25168,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_EXISTS 1 @@ -24982,8 +25258,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_ORD 169 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_ORD_STR_SORTABLE 00169 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_ORD 171 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_ORD_STR_SORTABLE 00171 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_REQUIRES_ORDS \ @@ -24991,7 +25267,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_EXISTS 1 @@ -25081,8 +25357,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_ORD 170 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_ORD_STR_SORTABLE 00170 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_ORD 172 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_ORD_STR_SORTABLE 00172 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_REQUIRES_ORDS \ @@ -25090,7 +25366,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_EXISTS 1 @@ -25180,8 +25456,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_ORD 171 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_ORD_STR_SORTABLE 00171 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_ORD 173 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_ORD_STR_SORTABLE 00173 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_REQUIRES_ORDS \ @@ -25189,7 +25465,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_EXISTS 1 @@ -25279,8 +25555,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_ORD 172 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_ORD_STR_SORTABLE 00172 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_ORD 174 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_ORD_STR_SORTABLE 00174 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_REQUIRES_ORDS \ @@ -25288,7 +25564,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_SUPPORTS_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_EXISTS 1 @@ -25381,31 +25657,31 @@ #define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000_S_port, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dcmi_48020000_ORD 173 -#define DT_N_S_soc_S_dcmi_48020000_ORD_STR_SORTABLE 00173 +#define DT_N_S_soc_S_dcmi_48020000_ORD 175 +#define DT_N_S_soc_S_dcmi_48020000_ORD_STR_SORTABLE 00175 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dcmi_48020000_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 160, /* /soc/dma@40020000 */ \ - 161, /* /soc/i2c@58001c00/ov7670@21 */ \ - 162, /* /soc/pin-controller@58020000/dcmi_d0_ph9 */ \ - 163, /* /soc/pin-controller@58020000/dcmi_d1_ph10 */ \ - 164, /* /soc/pin-controller@58020000/dcmi_d2_ph11 */ \ - 165, /* /soc/pin-controller@58020000/dcmi_d3_pg11 */ \ - 166, /* /soc/pin-controller@58020000/dcmi_d4_ph14 */ \ - 167, /* /soc/pin-controller@58020000/dcmi_d5_pi4 */ \ - 168, /* /soc/pin-controller@58020000/dcmi_d6_pi6 */ \ - 169, /* /soc/pin-controller@58020000/dcmi_d7_pi7 */ \ - 170, /* /soc/pin-controller@58020000/dcmi_hsync_ph8 */ \ - 171, /* /soc/pin-controller@58020000/dcmi_pixclk_pa6 */ \ - 172, /* /soc/pin-controller@58020000/dcmi_vsync_pi5 */ + 162, /* /soc/dma@40020000 */ \ + 163, /* /soc/i2c@58001c00/ov7670@21 */ \ + 164, /* /soc/pin-controller@58020000/dcmi_d0_ph9 */ \ + 165, /* /soc/pin-controller@58020000/dcmi_d1_ph10 */ \ + 166, /* /soc/pin-controller@58020000/dcmi_d2_ph11 */ \ + 167, /* /soc/pin-controller@58020000/dcmi_d3_pg11 */ \ + 168, /* /soc/pin-controller@58020000/dcmi_d4_ph14 */ \ + 169, /* /soc/pin-controller@58020000/dcmi_d5_pi4 */ \ + 170, /* /soc/pin-controller@58020000/dcmi_d6_pi6 */ \ + 171, /* /soc/pin-controller@58020000/dcmi_d7_pi7 */ \ + 172, /* /soc/pin-controller@58020000/dcmi_hsync_ph8 */ \ + 173, /* /soc/pin-controller@58020000/dcmi_pixclk_pa6 */ \ + 174, /* /soc/pin-controller@58020000/dcmi_vsync_pi5 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dcmi_48020000_SUPPORTS_ORDS \ - 174, /* /soc/dcmi@48020000/port */ + 176, /* /soc/dcmi@48020000/port */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_dcmi_48020000_EXISTS 1 @@ -25704,16 +25980,16 @@ #define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dcmi_48020000_S_port_ORD 174 -#define DT_N_S_soc_S_dcmi_48020000_S_port_ORD_STR_SORTABLE 00174 +#define DT_N_S_soc_S_dcmi_48020000_S_port_ORD 176 +#define DT_N_S_soc_S_dcmi_48020000_S_port_ORD_STR_SORTABLE 00176 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dcmi_48020000_S_port_REQUIRES_ORDS \ - 173, /* /soc/dcmi@48020000 */ + 175, /* /soc/dcmi@48020000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dcmi_48020000_S_port_SUPPORTS_ORDS \ - 175, /* /soc/dcmi@48020000/port/endpoint */ + 177, /* /soc/dcmi@48020000/port/endpoint */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_dcmi_48020000_S_port_EXISTS 1 @@ -25767,12 +26043,12 @@ #define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_ORD 175 -#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_ORD_STR_SORTABLE 00175 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_ORD 177 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_ORD_STR_SORTABLE 00177 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_REQUIRES_ORDS \ - 174, /* /soc/dcmi@48020000/port */ + 176, /* /soc/dcmi@48020000/port */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_SUPPORTS_ORDS /* nothing */ @@ -25836,8 +26112,8 @@ #define DT_N_S_soc_S_ethernet_40028000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_ethernet_40028000_ORD 176 -#define DT_N_S_soc_S_ethernet_40028000_ORD_STR_SORTABLE 00176 +#define DT_N_S_soc_S_ethernet_40028000_ORD 178 +#define DT_N_S_soc_S_ethernet_40028000_ORD_STR_SORTABLE 00178 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_ethernet_40028000_REQUIRES_ORDS \ @@ -25847,7 +26123,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_ethernet_40028000_SUPPORTS_ORDS \ - 177, /* /soc/ethernet@40028000/mdio */ + 179, /* /soc/ethernet@40028000/mdio */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_ethernet_40028000_EXISTS 1 @@ -26055,12 +26331,12 @@ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD 177 -#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD_STR_SORTABLE 00177 +#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD 179 +#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD_STR_SORTABLE 00179 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_REQUIRES_ORDS \ - 176, /* /soc/ethernet@40028000 */ + 178, /* /soc/ethernet@40028000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_SUPPORTS_ORDS /* nothing */ @@ -26168,8 +26444,8 @@ #define DT_N_S_soc_S_flash_controller_52002000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_ORD 178 -#define DT_N_S_soc_S_flash_controller_52002000_ORD_STR_SORTABLE 00178 +#define DT_N_S_soc_S_flash_controller_52002000_ORD 180 +#define DT_N_S_soc_S_flash_controller_52002000_ORD_STR_SORTABLE 00180 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_REQUIRES_ORDS \ @@ -26179,7 +26455,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_SUPPORTS_ORDS \ - 179, /* /soc/flash-controller@52002000/flash@8000000 */ + 181, /* /soc/flash-controller@52002000/flash@8000000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_flash_controller_52002000_EXISTS 1 @@ -26315,16 +26591,16 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD 179 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD_STR_SORTABLE 00179 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD 181 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD_STR_SORTABLE 00181 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_REQUIRES_ORDS \ - 178, /* /soc/flash-controller@52002000 */ + 180, /* /soc/flash-controller@52002000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_SUPPORTS_ORDS \ - 180, /* /soc/flash-controller@52002000/flash@8000000/partitions */ + 182, /* /soc/flash-controller@52002000/flash@8000000/partitions */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_EXISTS 1 @@ -26451,18 +26727,18 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD 180 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD_STR_SORTABLE 00180 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD 182 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD_STR_SORTABLE 00182 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_REQUIRES_ORDS \ - 179, /* /soc/flash-controller@52002000/flash@8000000 */ + 181, /* /soc/flash-controller@52002000/flash@8000000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_SUPPORTS_ORDS \ - 181, /* /soc/flash-controller@52002000/flash@8000000/partitions/partition@0 */ \ - 182, /* /soc/flash-controller@52002000/flash@8000000/partitions/partition@40000 */ \ - 183, /* /soc/flash-controller@52002000/flash@8000000/partitions/partition@e0000 */ + 183, /* /soc/flash-controller@52002000/flash@8000000/partitions/partition@0 */ \ + 184, /* /soc/flash-controller@52002000/flash@8000000/partitions/partition@40000 */ \ + 185, /* /soc/flash-controller@52002000/flash@8000000/partitions/partition@e0000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_EXISTS 1 @@ -26521,12 +26797,12 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD 181 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00181 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD 183 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00183 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_REQUIRES_ORDS \ - 180, /* /soc/flash-controller@52002000/flash@8000000/partitions */ + 182, /* /soc/flash-controller@52002000/flash@8000000/partitions */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_SUPPORTS_ORDS /* nothing */ @@ -26613,12 +26889,12 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD 182 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD_STR_SORTABLE 00182 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD 184 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD_STR_SORTABLE 00184 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_REQUIRES_ORDS \ - 180, /* /soc/flash-controller@52002000/flash@8000000/partitions */ + 182, /* /soc/flash-controller@52002000/flash@8000000/partitions */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_SUPPORTS_ORDS /* nothing */ @@ -26705,12 +26981,12 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD 183 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD_STR_SORTABLE 00183 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD 185 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD_STR_SORTABLE 00185 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_REQUIRES_ORDS \ - 180, /* /soc/flash-controller@52002000/flash@8000000/partitions */ + 182, /* /soc/flash-controller@52002000/flash@8000000/partitions */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_SUPPORTS_ORDS /* nothing */ @@ -26782,16 +27058,16 @@ #define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_ORD 184 -#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_ORD_STR_SORTABLE 00184 +#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_ORD 186 +#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_ORD_STR_SORTABLE 00186 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_REQUIRES_ORDS \ - 161, /* /soc/i2c@58001c00/ov7670@21 */ + 163, /* /soc/i2c@58001c00/ov7670@21 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_SUPPORTS_ORDS \ - 185, /* /soc/i2c@58001c00/ov7670@21/port/endpoint */ + 187, /* /soc/i2c@58001c00/ov7670@21/port/endpoint */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_EXISTS 1 @@ -26849,12 +27125,12 @@ #define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint_ORD 185 -#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint_ORD_STR_SORTABLE 00185 +#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint_ORD 187 +#define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint_ORD_STR_SORTABLE 00187 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint_REQUIRES_ORDS \ - 184, /* /soc/i2c@58001c00/ov7670@21/port */ + 186, /* /soc/i2c@58001c00/ov7670@21/port */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint_SUPPORTS_ORDS /* nothing */ @@ -26919,8 +27195,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD 186 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD_STR_SORTABLE 00186 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD 188 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD_STR_SORTABLE 00188 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_REQUIRES_ORDS \ @@ -26928,7 +27204,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_EXISTS 1 @@ -27018,8 +27294,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD 187 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD_STR_SORTABLE 00187 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD 189 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD_STR_SORTABLE 00189 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_REQUIRES_ORDS \ @@ -27027,7 +27303,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_EXISTS 1 @@ -27117,8 +27393,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD 188 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD_STR_SORTABLE 00188 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD 190 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD_STR_SORTABLE 00190 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_REQUIRES_ORDS \ @@ -27126,7 +27402,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_EXISTS 1 @@ -27216,8 +27492,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD 189 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD_STR_SORTABLE 00189 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD 191 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD_STR_SORTABLE 00191 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_REQUIRES_ORDS \ @@ -27225,7 +27501,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_EXISTS 1 @@ -27315,8 +27591,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD 190 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD_STR_SORTABLE 00190 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD 192 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD_STR_SORTABLE 00192 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_REQUIRES_ORDS \ @@ -27324,7 +27600,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_EXISTS 1 @@ -27414,8 +27690,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD 191 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD_STR_SORTABLE 00191 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD 193 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD_STR_SORTABLE 00193 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_REQUIRES_ORDS \ @@ -27423,7 +27699,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_EXISTS 1 @@ -27513,8 +27789,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD 192 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD_STR_SORTABLE 00192 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD 194 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD_STR_SORTABLE 00194 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_REQUIRES_ORDS \ @@ -27522,7 +27798,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_EXISTS 1 @@ -27612,8 +27888,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD 193 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD_STR_SORTABLE 00193 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD 195 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD_STR_SORTABLE 00195 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_REQUIRES_ORDS \ @@ -27621,7 +27897,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_EXISTS 1 @@ -27711,8 +27987,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD 194 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD_STR_SORTABLE 00194 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD 196 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD_STR_SORTABLE 00196 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_REQUIRES_ORDS \ @@ -27720,7 +27996,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_EXISTS 1 @@ -27810,8 +28086,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD 195 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD_STR_SORTABLE 00195 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD 197 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD_STR_SORTABLE 00197 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_REQUIRES_ORDS \ @@ -27819,7 +28095,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_EXISTS 1 @@ -27909,8 +28185,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD 196 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD_STR_SORTABLE 00196 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD 198 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD_STR_SORTABLE 00198 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_REQUIRES_ORDS \ @@ -27918,7 +28194,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_EXISTS 1 @@ -28008,8 +28284,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD 197 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD_STR_SORTABLE 00197 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD 199 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD_STR_SORTABLE 00199 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_REQUIRES_ORDS \ @@ -28017,7 +28293,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_EXISTS 1 @@ -28107,8 +28383,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD 198 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD_STR_SORTABLE 00198 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD 200 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD_STR_SORTABLE 00200 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_REQUIRES_ORDS \ @@ -28116,7 +28392,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_EXISTS 1 @@ -28206,8 +28482,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD 199 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD_STR_SORTABLE 00199 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD 201 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD_STR_SORTABLE 00201 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_REQUIRES_ORDS \ @@ -28215,7 +28491,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_EXISTS 1 @@ -28305,8 +28581,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD 200 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD_STR_SORTABLE 00200 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD 202 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD_STR_SORTABLE 00202 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_REQUIRES_ORDS \ @@ -28314,7 +28590,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_EXISTS 1 @@ -28404,8 +28680,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD 201 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD_STR_SORTABLE 00201 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD 203 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD_STR_SORTABLE 00203 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_REQUIRES_ORDS \ @@ -28413,7 +28689,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_EXISTS 1 @@ -28503,8 +28779,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD 202 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD_STR_SORTABLE 00202 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD 204 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD_STR_SORTABLE 00204 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_REQUIRES_ORDS \ @@ -28512,7 +28788,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_EXISTS 1 @@ -28602,8 +28878,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD 203 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD_STR_SORTABLE 00203 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD 205 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD_STR_SORTABLE 00205 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_REQUIRES_ORDS \ @@ -28611,7 +28887,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_EXISTS 1 @@ -28701,8 +28977,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD 204 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD_STR_SORTABLE 00204 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD 206 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD_STR_SORTABLE 00206 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_REQUIRES_ORDS \ @@ -28710,7 +28986,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_EXISTS 1 @@ -28800,8 +29076,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD 205 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD_STR_SORTABLE 00205 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD 207 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD_STR_SORTABLE 00207 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_REQUIRES_ORDS \ @@ -28809,7 +29085,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_EXISTS 1 @@ -28899,8 +29175,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD 206 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD_STR_SORTABLE 00206 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD 208 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD_STR_SORTABLE 00208 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_REQUIRES_ORDS \ @@ -28908,7 +29184,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_EXISTS 1 @@ -28998,8 +29274,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD 207 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD_STR_SORTABLE 00207 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD 209 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD_STR_SORTABLE 00209 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_REQUIRES_ORDS \ @@ -29007,7 +29283,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_EXISTS 1 @@ -29097,8 +29373,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD 208 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD_STR_SORTABLE 00208 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD 210 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD_STR_SORTABLE 00210 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_REQUIRES_ORDS \ @@ -29106,7 +29382,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_EXISTS 1 @@ -29196,8 +29472,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD 209 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD_STR_SORTABLE 00209 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD 211 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD_STR_SORTABLE 00211 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_REQUIRES_ORDS \ @@ -29205,7 +29481,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_EXISTS 1 @@ -29295,8 +29571,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD 210 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD_STR_SORTABLE 00210 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD 212 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD_STR_SORTABLE 00212 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_REQUIRES_ORDS \ @@ -29304,7 +29580,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_EXISTS 1 @@ -29394,8 +29670,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD 211 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD_STR_SORTABLE 00211 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD 213 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD_STR_SORTABLE 00213 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_REQUIRES_ORDS \ @@ -29403,7 +29679,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_EXISTS 1 @@ -29493,8 +29769,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD 212 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD_STR_SORTABLE 00212 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD 214 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD_STR_SORTABLE 00214 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_REQUIRES_ORDS \ @@ -29502,7 +29778,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_EXISTS 1 @@ -29592,8 +29868,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD 213 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD_STR_SORTABLE 00213 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD 215 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD_STR_SORTABLE 00215 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_REQUIRES_ORDS \ @@ -29601,7 +29877,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_EXISTS 1 @@ -29691,8 +29967,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD 214 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD_STR_SORTABLE 00214 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD 216 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD_STR_SORTABLE 00216 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_REQUIRES_ORDS \ @@ -29700,7 +29976,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_EXISTS 1 @@ -29790,8 +30066,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD 215 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD_STR_SORTABLE 00215 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD 217 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD_STR_SORTABLE 00217 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_REQUIRES_ORDS \ @@ -29799,7 +30075,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_EXISTS 1 @@ -29889,8 +30165,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD 216 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD_STR_SORTABLE 00216 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD 218 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD_STR_SORTABLE 00218 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_REQUIRES_ORDS \ @@ -29898,7 +30174,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_EXISTS 1 @@ -29988,8 +30264,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD 217 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD_STR_SORTABLE 00217 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD 219 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD_STR_SORTABLE 00219 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_REQUIRES_ORDS \ @@ -29997,7 +30273,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_EXISTS 1 @@ -30087,8 +30363,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD 218 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD_STR_SORTABLE 00218 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD 220 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD_STR_SORTABLE 00220 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_REQUIRES_ORDS \ @@ -30096,7 +30372,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_EXISTS 1 @@ -30186,8 +30462,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD 219 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD_STR_SORTABLE 00219 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD 221 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD_STR_SORTABLE 00221 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_REQUIRES_ORDS \ @@ -30195,7 +30471,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_EXISTS 1 @@ -30285,8 +30561,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD 220 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD_STR_SORTABLE 00220 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD 222 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD_STR_SORTABLE 00222 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_REQUIRES_ORDS \ @@ -30294,7 +30570,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_EXISTS 1 @@ -30384,8 +30660,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD 221 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD_STR_SORTABLE 00221 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD 223 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD_STR_SORTABLE 00223 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_REQUIRES_ORDS \ @@ -30393,7 +30669,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_EXISTS 1 @@ -30483,8 +30759,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD 222 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD_STR_SORTABLE 00222 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD_STR_SORTABLE 00224 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_REQUIRES_ORDS \ @@ -30492,7 +30768,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_EXISTS 1 @@ -30582,8 +30858,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD 223 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD_STR_SORTABLE 00223 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD 225 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD_STR_SORTABLE 00225 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_REQUIRES_ORDS \ @@ -30591,7 +30867,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_EXISTS 1 @@ -30681,8 +30957,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD_STR_SORTABLE 00224 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD 226 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD_STR_SORTABLE 00226 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_REQUIRES_ORDS \ @@ -30690,7 +30966,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_SUPPORTS_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_EXISTS 1 @@ -30783,56 +31059,56 @@ #define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_controller_52004000_ORD 225 -#define DT_N_S_soc_S_memory_controller_52004000_ORD_STR_SORTABLE 00225 +#define DT_N_S_soc_S_memory_controller_52004000_ORD 227 +#define DT_N_S_soc_S_memory_controller_52004000_ORD_STR_SORTABLE 00227 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_memory_controller_52004000_REQUIRES_ORDS \ 4, /* /soc */ \ 9, /* /soc/rcc@58024400 */ \ - 186, /* /soc/pin-controller@58020000/fmc_a0_pf0 */ \ - 187, /* /soc/pin-controller@58020000/fmc_a10_pg0 */ \ - 188, /* /soc/pin-controller@58020000/fmc_a11_pg1 */ \ - 189, /* /soc/pin-controller@58020000/fmc_a12_pg2 */ \ - 190, /* /soc/pin-controller@58020000/fmc_a14_pg4 */ \ - 191, /* /soc/pin-controller@58020000/fmc_a15_pg5 */ \ - 192, /* /soc/pin-controller@58020000/fmc_a1_pf1 */ \ - 193, /* /soc/pin-controller@58020000/fmc_a2_pf2 */ \ - 194, /* /soc/pin-controller@58020000/fmc_a3_pf3 */ \ - 195, /* /soc/pin-controller@58020000/fmc_a4_pf4 */ \ - 196, /* /soc/pin-controller@58020000/fmc_a5_pf5 */ \ - 197, /* /soc/pin-controller@58020000/fmc_a6_pf12 */ \ - 198, /* /soc/pin-controller@58020000/fmc_a7_pf13 */ \ - 199, /* /soc/pin-controller@58020000/fmc_a8_pf14 */ \ - 200, /* /soc/pin-controller@58020000/fmc_a9_pf15 */ \ - 201, /* /soc/pin-controller@58020000/fmc_d0_pd14 */ \ - 202, /* /soc/pin-controller@58020000/fmc_d10_pe13 */ \ - 203, /* /soc/pin-controller@58020000/fmc_d11_pe14 */ \ - 204, /* /soc/pin-controller@58020000/fmc_d12_pe15 */ \ - 205, /* /soc/pin-controller@58020000/fmc_d13_pd8 */ \ - 206, /* /soc/pin-controller@58020000/fmc_d14_pd9 */ \ - 207, /* /soc/pin-controller@58020000/fmc_d15_pd10 */ \ - 208, /* /soc/pin-controller@58020000/fmc_d1_pd15 */ \ - 209, /* /soc/pin-controller@58020000/fmc_d2_pd0 */ \ - 210, /* /soc/pin-controller@58020000/fmc_d3_pd1 */ \ - 211, /* /soc/pin-controller@58020000/fmc_d4_pe7 */ \ - 212, /* /soc/pin-controller@58020000/fmc_d5_pe8 */ \ - 213, /* /soc/pin-controller@58020000/fmc_d6_pe9 */ \ - 214, /* /soc/pin-controller@58020000/fmc_d7_pe10 */ \ - 215, /* /soc/pin-controller@58020000/fmc_d8_pe11 */ \ - 216, /* /soc/pin-controller@58020000/fmc_d9_pe12 */ \ - 217, /* /soc/pin-controller@58020000/fmc_nbl0_pe0 */ \ - 218, /* /soc/pin-controller@58020000/fmc_nbl1_pe1 */ \ - 219, /* /soc/pin-controller@58020000/fmc_sdcke0_ph2 */ \ - 220, /* /soc/pin-controller@58020000/fmc_sdclk_pg8 */ \ - 221, /* /soc/pin-controller@58020000/fmc_sdncas_pg15 */ \ - 222, /* /soc/pin-controller@58020000/fmc_sdne0_ph3 */ \ - 223, /* /soc/pin-controller@58020000/fmc_sdnras_pf11 */ \ - 224, /* /soc/pin-controller@58020000/fmc_sdnwe_ph5 */ + 188, /* /soc/pin-controller@58020000/fmc_a0_pf0 */ \ + 189, /* /soc/pin-controller@58020000/fmc_a10_pg0 */ \ + 190, /* /soc/pin-controller@58020000/fmc_a11_pg1 */ \ + 191, /* /soc/pin-controller@58020000/fmc_a12_pg2 */ \ + 192, /* /soc/pin-controller@58020000/fmc_a14_pg4 */ \ + 193, /* /soc/pin-controller@58020000/fmc_a15_pg5 */ \ + 194, /* /soc/pin-controller@58020000/fmc_a1_pf1 */ \ + 195, /* /soc/pin-controller@58020000/fmc_a2_pf2 */ \ + 196, /* /soc/pin-controller@58020000/fmc_a3_pf3 */ \ + 197, /* /soc/pin-controller@58020000/fmc_a4_pf4 */ \ + 198, /* /soc/pin-controller@58020000/fmc_a5_pf5 */ \ + 199, /* /soc/pin-controller@58020000/fmc_a6_pf12 */ \ + 200, /* /soc/pin-controller@58020000/fmc_a7_pf13 */ \ + 201, /* /soc/pin-controller@58020000/fmc_a8_pf14 */ \ + 202, /* /soc/pin-controller@58020000/fmc_a9_pf15 */ \ + 203, /* /soc/pin-controller@58020000/fmc_d0_pd14 */ \ + 204, /* /soc/pin-controller@58020000/fmc_d10_pe13 */ \ + 205, /* /soc/pin-controller@58020000/fmc_d11_pe14 */ \ + 206, /* /soc/pin-controller@58020000/fmc_d12_pe15 */ \ + 207, /* /soc/pin-controller@58020000/fmc_d13_pd8 */ \ + 208, /* /soc/pin-controller@58020000/fmc_d14_pd9 */ \ + 209, /* /soc/pin-controller@58020000/fmc_d15_pd10 */ \ + 210, /* /soc/pin-controller@58020000/fmc_d1_pd15 */ \ + 211, /* /soc/pin-controller@58020000/fmc_d2_pd0 */ \ + 212, /* /soc/pin-controller@58020000/fmc_d3_pd1 */ \ + 213, /* /soc/pin-controller@58020000/fmc_d4_pe7 */ \ + 214, /* /soc/pin-controller@58020000/fmc_d5_pe8 */ \ + 215, /* /soc/pin-controller@58020000/fmc_d6_pe9 */ \ + 216, /* /soc/pin-controller@58020000/fmc_d7_pe10 */ \ + 217, /* /soc/pin-controller@58020000/fmc_d8_pe11 */ \ + 218, /* /soc/pin-controller@58020000/fmc_d9_pe12 */ \ + 219, /* /soc/pin-controller@58020000/fmc_nbl0_pe0 */ \ + 220, /* /soc/pin-controller@58020000/fmc_nbl1_pe1 */ \ + 221, /* /soc/pin-controller@58020000/fmc_sdcke0_ph2 */ \ + 222, /* /soc/pin-controller@58020000/fmc_sdclk_pg8 */ \ + 223, /* /soc/pin-controller@58020000/fmc_sdncas_pg15 */ \ + 224, /* /soc/pin-controller@58020000/fmc_sdne0_ph3 */ \ + 225, /* /soc/pin-controller@58020000/fmc_sdnras_pf11 */ \ + 226, /* /soc/pin-controller@58020000/fmc_sdnwe_ph5 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_memory_controller_52004000_SUPPORTS_ORDS \ - 226, /* /soc/memory-controller@52004000/sdram */ + 228, /* /soc/memory-controller@52004000/sdram */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_memory_controller_52004000_EXISTS 1 @@ -31301,16 +31577,16 @@ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD 226 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD_STR_SORTABLE 00226 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD 228 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD_STR_SORTABLE 00228 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_REQUIRES_ORDS \ - 225, /* /soc/memory-controller@52004000 */ + 227, /* /soc/memory-controller@52004000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_SUPPORTS_ORDS \ - 227, /* /soc/memory-controller@52004000/sdram/bank@0 */ + 229, /* /soc/memory-controller@52004000/sdram/bank@0 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_EXISTS 1 @@ -31416,12 +31692,12 @@ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD 227 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD_STR_SORTABLE 00227 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD 229 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD_STR_SORTABLE 00229 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_REQUIRES_ORDS \ - 226, /* /soc/memory-controller@52004000/sdram */ + 228, /* /soc/memory-controller@52004000/sdram */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_SUPPORTS_ORDS /* nothing */ @@ -31584,8 +31860,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD 228 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD_STR_SORTABLE 00228 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD 230 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD_STR_SORTABLE 00230 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REQUIRES_ORDS \ @@ -31700,8 +31976,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_ORD 229 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_ORD_STR_SORTABLE 00229 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_ORD 231 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_ORD_STR_SORTABLE 00231 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_REQUIRES_ORDS \ @@ -31709,7 +31985,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_SUPPORTS_ORDS \ - 235, /* /soc/quadspi@52005000 */ + 237, /* /soc/quadspi@52005000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_EXISTS 1 @@ -31799,8 +32075,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_ORD 230 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_ORD_STR_SORTABLE 00230 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_ORD 232 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_ORD_STR_SORTABLE 00232 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_REQUIRES_ORDS \ @@ -31808,7 +32084,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_SUPPORTS_ORDS \ - 235, /* /soc/quadspi@52005000 */ + 237, /* /soc/quadspi@52005000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_EXISTS 1 @@ -31898,8 +32174,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2_ORD 231 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2_ORD_STR_SORTABLE 00231 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2_ORD 233 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2_ORD_STR_SORTABLE 00233 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2_REQUIRES_ORDS \ @@ -31907,7 +32183,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2_SUPPORTS_ORDS \ - 235, /* /soc/quadspi@52005000 */ + 237, /* /soc/quadspi@52005000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2_EXISTS 1 @@ -31997,8 +32273,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6_ORD 232 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6_ORD_STR_SORTABLE 00232 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6_ORD 234 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6_ORD_STR_SORTABLE 00234 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6_REQUIRES_ORDS \ @@ -32006,7 +32282,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6_SUPPORTS_ORDS \ - 235, /* /soc/quadspi@52005000 */ + 237, /* /soc/quadspi@52005000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6_EXISTS 1 @@ -32096,8 +32372,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_ORD 233 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_ORD_STR_SORTABLE 00233 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_ORD 235 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_ORD_STR_SORTABLE 00235 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_REQUIRES_ORDS \ @@ -32105,7 +32381,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_SUPPORTS_ORDS \ - 235, /* /soc/quadspi@52005000 */ + 237, /* /soc/quadspi@52005000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_EXISTS 1 @@ -32195,8 +32471,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_ORD 234 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_ORD_STR_SORTABLE 00234 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_ORD 236 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_ORD_STR_SORTABLE 00236 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_REQUIRES_ORDS \ @@ -32204,7 +32480,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_SUPPORTS_ORDS \ - 235, /* /soc/quadspi@52005000 */ + 237, /* /soc/quadspi@52005000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_EXISTS 1 @@ -32297,24 +32573,24 @@ #define DT_N_S_soc_S_quadspi_52005000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_quadspi_52005000_ORD 235 -#define DT_N_S_soc_S_quadspi_52005000_ORD_STR_SORTABLE 00235 +#define DT_N_S_soc_S_quadspi_52005000_ORD 237 +#define DT_N_S_soc_S_quadspi_52005000_ORD_STR_SORTABLE 00237 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_quadspi_52005000_REQUIRES_ORDS \ 4, /* /soc */ \ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ - 229, /* /soc/pin-controller@58020000/quadspi_bk1_io0_pd11 */ \ - 230, /* /soc/pin-controller@58020000/quadspi_bk1_io1_pd12 */ \ - 231, /* /soc/pin-controller@58020000/quadspi_bk1_io2_pe2 */ \ - 232, /* /soc/pin-controller@58020000/quadspi_bk1_io3_pf6 */ \ - 233, /* /soc/pin-controller@58020000/quadspi_bk1_ncs_pg6 */ \ - 234, /* /soc/pin-controller@58020000/quadspi_clk_pf10 */ + 231, /* /soc/pin-controller@58020000/quadspi_bk1_io0_pd11 */ \ + 232, /* /soc/pin-controller@58020000/quadspi_bk1_io1_pd12 */ \ + 233, /* /soc/pin-controller@58020000/quadspi_bk1_io2_pe2 */ \ + 234, /* /soc/pin-controller@58020000/quadspi_bk1_io3_pf6 */ \ + 235, /* /soc/pin-controller@58020000/quadspi_bk1_ncs_pg6 */ \ + 236, /* /soc/pin-controller@58020000/quadspi_clk_pf10 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_quadspi_52005000_SUPPORTS_ORDS \ - 236, /* /soc/quadspi@52005000/qspi-nor-flash@90000000 */ + 238, /* /soc/quadspi@52005000/qspi-nor-flash@90000000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_quadspi_52005000_EXISTS 1 @@ -32518,16 +32794,16 @@ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_ORD 236 -#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_ORD_STR_SORTABLE 00236 +#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_ORD 238 +#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_ORD_STR_SORTABLE 00238 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_REQUIRES_ORDS \ - 235, /* /soc/quadspi@52005000 */ + 237, /* /soc/quadspi@52005000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_SUPPORTS_ORDS \ - 237, /* /soc/quadspi@52005000/qspi-nor-flash@90000000/partitions */ + 239, /* /soc/quadspi@52005000/qspi-nor-flash@90000000/partitions */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_EXISTS 1 @@ -32648,17 +32924,17 @@ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_ORD 237 -#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_ORD_STR_SORTABLE 00237 +#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_ORD 239 +#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_ORD_STR_SORTABLE 00239 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_REQUIRES_ORDS \ - 236, /* /soc/quadspi@52005000/qspi-nor-flash@90000000 */ + 238, /* /soc/quadspi@52005000/qspi-nor-flash@90000000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_SUPPORTS_ORDS \ - 238, /* /soc/quadspi@52005000/qspi-nor-flash@90000000/partitions/partition@0 */ \ - 239, /* /soc/quadspi@52005000/qspi-nor-flash@90000000/partitions/partition@100000 */ + 240, /* /soc/quadspi@52005000/qspi-nor-flash@90000000/partitions/partition@0 */ \ + 241, /* /soc/quadspi@52005000/qspi-nor-flash@90000000/partitions/partition@100000 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_EXISTS 1 @@ -32717,12 +32993,12 @@ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_ORD 238 -#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00238 +#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_ORD 240 +#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00240 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_REQUIRES_ORDS \ - 237, /* /soc/quadspi@52005000/qspi-nor-flash@90000000/partitions */ + 239, /* /soc/quadspi@52005000/qspi-nor-flash@90000000/partitions */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_SUPPORTS_ORDS /* nothing */ @@ -32809,12 +33085,12 @@ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000_ORD 239 -#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000_ORD_STR_SORTABLE 00239 +#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000_ORD 241 +#define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000_ORD_STR_SORTABLE 00241 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000_REQUIRES_ORDS \ - 237, /* /soc/quadspi@52005000/qspi-nor-flash@90000000/partitions */ + 239, /* /soc/quadspi@52005000/qspi-nor-flash@90000000/partitions */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000_SUPPORTS_ORDS /* nothing */ @@ -32904,8 +33180,8 @@ #define DT_N_S_soc_S_rtc_58004000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_rtc_58004000_ORD 240 -#define DT_N_S_soc_S_rtc_58004000_ORD_STR_SORTABLE 00240 +#define DT_N_S_soc_S_rtc_58004000_ORD 242 +#define DT_N_S_soc_S_rtc_58004000_ORD_STR_SORTABLE 00242 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_rtc_58004000_REQUIRES_ORDS \ @@ -32915,7 +33191,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_rtc_58004000_SUPPORTS_ORDS \ - 241, /* /soc/rtc@58004000/backup_regs */ + 243, /* /soc/rtc@58004000/backup_regs */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_rtc_58004000_EXISTS 1 @@ -33056,12 +33332,12 @@ #define DT_N_S_soc_S_rtc_58004000_S_backup_regs_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_rtc_58004000_S_backup_regs_ORD 241 -#define DT_N_S_soc_S_rtc_58004000_S_backup_regs_ORD_STR_SORTABLE 00241 +#define DT_N_S_soc_S_rtc_58004000_S_backup_regs_ORD 243 +#define DT_N_S_soc_S_rtc_58004000_S_backup_regs_ORD_STR_SORTABLE 00243 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_rtc_58004000_S_backup_regs_REQUIRES_ORDS \ - 240, /* /soc/rtc@58004000 */ + 242, /* /soc/rtc@58004000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_rtc_58004000_S_backup_regs_SUPPORTS_ORDS /* nothing */ @@ -33164,8 +33440,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_ORD 242 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_ORD_STR_SORTABLE 00242 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_ORD 244 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_ORD_STR_SORTABLE 00244 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_REQUIRES_ORDS \ @@ -33173,7 +33449,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_SUPPORTS_ORDS \ - 246, /* /soc/serial@40007800 */ + 248, /* /soc/serial@40007800 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_EXISTS 1 @@ -33263,8 +33539,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_ORD 243 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_ORD_STR_SORTABLE 00243 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_ORD 245 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_ORD_STR_SORTABLE 00245 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_REQUIRES_ORDS \ @@ -33272,7 +33548,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_SUPPORTS_ORDS \ - 246, /* /soc/serial@40007800 */ + 248, /* /soc/serial@40007800 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_EXISTS 1 @@ -33342,7 +33618,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_CHILD_IDX 105 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_CHILD_IDX 106 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_NODELABEL_NUM 1 @@ -33362,8 +33638,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_ORD 244 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_ORD_STR_SORTABLE 00244 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_ORD 246 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_ORD_STR_SORTABLE 00246 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_REQUIRES_ORDS \ @@ -33371,7 +33647,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_SUPPORTS_ORDS \ - 246, /* /soc/serial@40007800 */ + 248, /* /soc/serial@40007800 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8_EXISTS 1 @@ -33441,7 +33717,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_CHILD_IDX 109 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_CHILD_IDX 111 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_NODELABEL_NUM 1 @@ -33461,8 +33737,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_ORD 245 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_ORD_STR_SORTABLE 00245 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_ORD 247 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_ORD_STR_SORTABLE 00247 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_REQUIRES_ORDS \ @@ -33470,7 +33746,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_SUPPORTS_ORDS \ - 246, /* /soc/serial@40007800 */ + 248, /* /soc/serial@40007800 */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7_EXISTS 1 @@ -33563,8 +33839,8 @@ #define DT_N_S_soc_S_serial_40007800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40007800_ORD 246 -#define DT_N_S_soc_S_serial_40007800_ORD_STR_SORTABLE 00246 +#define DT_N_S_soc_S_serial_40007800_ORD 248 +#define DT_N_S_soc_S_serial_40007800_ORD_STR_SORTABLE 00248 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40007800_REQUIRES_ORDS \ @@ -33572,18 +33848,18 @@ 5, /* /soc/interrupt-controller@e000e100 */ \ 9, /* /soc/rcc@58024400 */ \ 54, /* /soc/rcc@58024400/reset-controller */ \ - 242, /* /soc/pin-controller@58020000/uart7_cts_pf9 */ \ - 243, /* /soc/pin-controller@58020000/uart7_rts_pf8 */ \ - 244, /* /soc/pin-controller@58020000/uart7_rx_pa8 */ \ - 245, /* /soc/pin-controller@58020000/uart7_tx_pf7 */ + 244, /* /soc/pin-controller@58020000/uart7_cts_pf9 */ \ + 245, /* /soc/pin-controller@58020000/uart7_rts_pf8 */ \ + 246, /* /soc/pin-controller@58020000/uart7_rx_pa8 */ \ + 247, /* /soc/pin-controller@58020000/uart7_tx_pf7 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_serial_40007800_SUPPORTS_ORDS \ - 247, /* /soc/serial@40007800/bt_hci_uart */ + 249, /* /soc/serial@40007800/bt_hci_uart */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_serial_40007800_EXISTS 1 -#define DT_N_INST_2_st_stm32_uart DT_N_S_soc_S_serial_40007800 +#define DT_N_INST_4_st_stm32_uart DT_N_S_soc_S_serial_40007800 #define DT_N_NODELABEL_uart7 DT_N_S_soc_S_serial_40007800 /* Macros for properties that are special in the specification: */ @@ -33797,16 +34073,16 @@ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx, __VA_ARGS__) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_ORD 247 -#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_ORD_STR_SORTABLE 00247 +#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_ORD 249 +#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_ORD_STR_SORTABLE 00249 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_REQUIRES_ORDS \ - 246, /* /soc/serial@40007800 */ + 248, /* /soc/serial@40007800 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_SUPPORTS_ORDS \ - 248, /* /soc/serial@40007800/bt_hci_uart/murata-1dx */ + 250, /* /soc/serial@40007800/bt_hci_uart/murata-1dx */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_EXISTS 1 @@ -33941,15 +34217,15 @@ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_ORD 248 -#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_ORD_STR_SORTABLE 00248 +#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_ORD 250 +#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_ORD_STR_SORTABLE 00250 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_REQUIRES_ORDS \ - 69, /* /soc/pin-controller@58020000/gpio@58020000 */ \ - 74, /* /soc/pin-controller@58020000/gpio@58021800 */ \ - 75, /* /soc/pin-controller@58020000/gpio@58021C00 */ \ - 247, /* /soc/serial@40007800/bt_hci_uart */ + 75, /* /soc/pin-controller@58020000/gpio@58020000 */ \ + 80, /* /soc/pin-controller@58020000/gpio@58021800 */ \ + 81, /* /soc/pin-controller@58020000/gpio@58021C00 */ \ + 249, /* /soc/serial@40007800/bt_hci_uart */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_SUPPORTS_ORDS /* nothing */ @@ -34078,8 +34354,8 @@ #define DT_N_S_soc_S_timers_40000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000000_ORD 249 -#define DT_N_S_soc_S_timers_40000000_ORD_STR_SORTABLE 00249 +#define DT_N_S_soc_S_timers_40000000_ORD 251 +#define DT_N_S_soc_S_timers_40000000_ORD_STR_SORTABLE 00251 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000000_REQUIRES_ORDS \ @@ -34090,8 +34366,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000000_SUPPORTS_ORDS \ - 250, /* /soc/timers@40000000/counter */ \ - 251, /* /soc/timers@40000000/pwm */ + 252, /* /soc/timers@40000000/counter */ \ + 253, /* /soc/timers@40000000/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000000_EXISTS 1 @@ -34257,12 +34533,12 @@ #define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000000_S_counter_ORD 250 -#define DT_N_S_soc_S_timers_40000000_S_counter_ORD_STR_SORTABLE 00250 +#define DT_N_S_soc_S_timers_40000000_S_counter_ORD 252 +#define DT_N_S_soc_S_timers_40000000_S_counter_ORD_STR_SORTABLE 00252 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000000_S_counter_REQUIRES_ORDS \ - 249, /* /soc/timers@40000000 */ + 251, /* /soc/timers@40000000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000000_S_counter_SUPPORTS_ORDS /* nothing */ @@ -34365,12 +34641,12 @@ #define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD 251 -#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD_STR_SORTABLE 00251 +#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD 253 +#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD_STR_SORTABLE 00253 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000000_S_pwm_REQUIRES_ORDS \ - 249, /* /soc/timers@40000000 */ + 251, /* /soc/timers@40000000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000000_S_pwm_SUPPORTS_ORDS /* nothing */ @@ -34475,8 +34751,8 @@ #define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000400_ORD 252 -#define DT_N_S_soc_S_timers_40000400_ORD_STR_SORTABLE 00252 +#define DT_N_S_soc_S_timers_40000400_ORD 254 +#define DT_N_S_soc_S_timers_40000400_ORD_STR_SORTABLE 00254 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000400_REQUIRES_ORDS \ @@ -34487,8 +34763,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000400_SUPPORTS_ORDS \ - 253, /* /soc/timers@40000400/counter */ \ - 254, /* /soc/timers@40000400/pwm */ + 255, /* /soc/timers@40000400/counter */ \ + 256, /* /soc/timers@40000400/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000400_EXISTS 1 @@ -34654,12 +34930,12 @@ #define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000400_S_counter_ORD 253 -#define DT_N_S_soc_S_timers_40000400_S_counter_ORD_STR_SORTABLE 00253 +#define DT_N_S_soc_S_timers_40000400_S_counter_ORD 255 +#define DT_N_S_soc_S_timers_40000400_S_counter_ORD_STR_SORTABLE 00255 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000400_S_counter_REQUIRES_ORDS \ - 252, /* /soc/timers@40000400 */ + 254, /* /soc/timers@40000400 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000400_S_counter_SUPPORTS_ORDS /* nothing */ @@ -34762,12 +35038,12 @@ #define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD 254 -#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD_STR_SORTABLE 00254 +#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD 256 +#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD_STR_SORTABLE 00256 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000400_S_pwm_REQUIRES_ORDS \ - 252, /* /soc/timers@40000400 */ + 254, /* /soc/timers@40000400 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000400_S_pwm_SUPPORTS_ORDS /* nothing */ @@ -34872,8 +35148,8 @@ #define DT_N_S_soc_S_timers_40000800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000800_ORD 255 -#define DT_N_S_soc_S_timers_40000800_ORD_STR_SORTABLE 00255 +#define DT_N_S_soc_S_timers_40000800_ORD 257 +#define DT_N_S_soc_S_timers_40000800_ORD_STR_SORTABLE 00257 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000800_REQUIRES_ORDS \ @@ -34884,8 +35160,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000800_SUPPORTS_ORDS \ - 256, /* /soc/timers@40000800/counter */ \ - 257, /* /soc/timers@40000800/pwm */ + 258, /* /soc/timers@40000800/counter */ \ + 259, /* /soc/timers@40000800/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000800_EXISTS 1 @@ -35051,12 +35327,12 @@ #define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000800_S_counter_ORD 256 -#define DT_N_S_soc_S_timers_40000800_S_counter_ORD_STR_SORTABLE 00256 +#define DT_N_S_soc_S_timers_40000800_S_counter_ORD 258 +#define DT_N_S_soc_S_timers_40000800_S_counter_ORD_STR_SORTABLE 00258 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000800_S_counter_REQUIRES_ORDS \ - 255, /* /soc/timers@40000800 */ + 257, /* /soc/timers@40000800 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000800_S_counter_SUPPORTS_ORDS /* nothing */ @@ -35159,12 +35435,12 @@ #define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD 257 -#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD_STR_SORTABLE 00257 +#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD 259 +#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD_STR_SORTABLE 00259 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000800_S_pwm_REQUIRES_ORDS \ - 255, /* /soc/timers@40000800 */ + 257, /* /soc/timers@40000800 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000800_S_pwm_SUPPORTS_ORDS /* nothing */ @@ -35269,8 +35545,8 @@ #define DT_N_S_soc_S_timers_40000c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000c00_ORD 258 -#define DT_N_S_soc_S_timers_40000c00_ORD_STR_SORTABLE 00258 +#define DT_N_S_soc_S_timers_40000c00_ORD 260 +#define DT_N_S_soc_S_timers_40000c00_ORD_STR_SORTABLE 00260 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000c00_REQUIRES_ORDS \ @@ -35281,8 +35557,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000c00_SUPPORTS_ORDS \ - 259, /* /soc/timers@40000c00/counter */ \ - 260, /* /soc/timers@40000c00/pwm */ + 261, /* /soc/timers@40000c00/counter */ \ + 262, /* /soc/timers@40000c00/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000c00_EXISTS 1 @@ -35448,12 +35724,12 @@ #define DT_N_S_soc_S_timers_40000c00_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000c00_S_counter_ORD 259 -#define DT_N_S_soc_S_timers_40000c00_S_counter_ORD_STR_SORTABLE 00259 +#define DT_N_S_soc_S_timers_40000c00_S_counter_ORD 261 +#define DT_N_S_soc_S_timers_40000c00_S_counter_ORD_STR_SORTABLE 00261 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000c00_S_counter_REQUIRES_ORDS \ - 258, /* /soc/timers@40000c00 */ + 260, /* /soc/timers@40000c00 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000c00_S_counter_SUPPORTS_ORDS /* nothing */ @@ -35556,12 +35832,12 @@ #define DT_N_S_soc_S_timers_40000c00_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000c00_S_pwm_ORD 260 -#define DT_N_S_soc_S_timers_40000c00_S_pwm_ORD_STR_SORTABLE 00260 +#define DT_N_S_soc_S_timers_40000c00_S_pwm_ORD 262 +#define DT_N_S_soc_S_timers_40000c00_S_pwm_ORD_STR_SORTABLE 00262 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000c00_S_pwm_REQUIRES_ORDS \ - 258, /* /soc/timers@40000c00 */ + 260, /* /soc/timers@40000c00 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000c00_S_pwm_SUPPORTS_ORDS /* nothing */ @@ -35666,8 +35942,8 @@ #define DT_N_S_soc_S_timers_40001000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001000_ORD 261 -#define DT_N_S_soc_S_timers_40001000_ORD_STR_SORTABLE 00261 +#define DT_N_S_soc_S_timers_40001000_ORD 263 +#define DT_N_S_soc_S_timers_40001000_ORD_STR_SORTABLE 00263 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001000_REQUIRES_ORDS \ @@ -35678,7 +35954,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001000_SUPPORTS_ORDS \ - 262, /* /soc/timers@40001000/counter */ + 264, /* /soc/timers@40001000/counter */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40001000_EXISTS 1 @@ -35844,12 +36120,12 @@ #define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001000_S_counter_ORD 262 -#define DT_N_S_soc_S_timers_40001000_S_counter_ORD_STR_SORTABLE 00262 +#define DT_N_S_soc_S_timers_40001000_S_counter_ORD 264 +#define DT_N_S_soc_S_timers_40001000_S_counter_ORD_STR_SORTABLE 00264 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001000_S_counter_REQUIRES_ORDS \ - 261, /* /soc/timers@40001000 */ + 263, /* /soc/timers@40001000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001000_S_counter_SUPPORTS_ORDS /* nothing */ @@ -35952,8 +36228,8 @@ #define DT_N_S_soc_S_timers_40001400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001400_ORD 263 -#define DT_N_S_soc_S_timers_40001400_ORD_STR_SORTABLE 00263 +#define DT_N_S_soc_S_timers_40001400_ORD 265 +#define DT_N_S_soc_S_timers_40001400_ORD_STR_SORTABLE 00265 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001400_REQUIRES_ORDS \ @@ -35964,7 +36240,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001400_SUPPORTS_ORDS \ - 264, /* /soc/timers@40001400/counter */ + 266, /* /soc/timers@40001400/counter */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40001400_EXISTS 1 @@ -36130,12 +36406,12 @@ #define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001400_S_counter_ORD 264 -#define DT_N_S_soc_S_timers_40001400_S_counter_ORD_STR_SORTABLE 00264 +#define DT_N_S_soc_S_timers_40001400_S_counter_ORD 266 +#define DT_N_S_soc_S_timers_40001400_S_counter_ORD_STR_SORTABLE 00266 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001400_S_counter_REQUIRES_ORDS \ - 263, /* /soc/timers@40001400 */ + 265, /* /soc/timers@40001400 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001400_S_counter_SUPPORTS_ORDS /* nothing */ @@ -36238,8 +36514,8 @@ #define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001800_ORD 265 -#define DT_N_S_soc_S_timers_40001800_ORD_STR_SORTABLE 00265 +#define DT_N_S_soc_S_timers_40001800_ORD 267 +#define DT_N_S_soc_S_timers_40001800_ORD_STR_SORTABLE 00267 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001800_REQUIRES_ORDS \ @@ -36250,8 +36526,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001800_SUPPORTS_ORDS \ - 266, /* /soc/timers@40001800/counter */ \ - 267, /* /soc/timers@40001800/pwm */ + 268, /* /soc/timers@40001800/counter */ \ + 269, /* /soc/timers@40001800/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40001800_EXISTS 1 @@ -36417,12 +36693,12 @@ #define DT_N_S_soc_S_timers_40001800_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001800_S_counter_ORD 266 -#define DT_N_S_soc_S_timers_40001800_S_counter_ORD_STR_SORTABLE 00266 +#define DT_N_S_soc_S_timers_40001800_S_counter_ORD 268 +#define DT_N_S_soc_S_timers_40001800_S_counter_ORD_STR_SORTABLE 00268 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001800_S_counter_REQUIRES_ORDS \ - 265, /* /soc/timers@40001800 */ + 267, /* /soc/timers@40001800 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001800_S_counter_SUPPORTS_ORDS /* nothing */ @@ -36525,12 +36801,12 @@ #define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_ORD 267 -#define DT_N_S_soc_S_timers_40001800_S_pwm_ORD_STR_SORTABLE 00267 +#define DT_N_S_soc_S_timers_40001800_S_pwm_ORD 269 +#define DT_N_S_soc_S_timers_40001800_S_pwm_ORD_STR_SORTABLE 00269 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001800_S_pwm_REQUIRES_ORDS \ - 265, /* /soc/timers@40001800 */ + 267, /* /soc/timers@40001800 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001800_S_pwm_SUPPORTS_ORDS /* nothing */ @@ -36635,8 +36911,8 @@ #define DT_N_S_soc_S_timers_40001c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001c00_ORD 268 -#define DT_N_S_soc_S_timers_40001c00_ORD_STR_SORTABLE 00268 +#define DT_N_S_soc_S_timers_40001c00_ORD 270 +#define DT_N_S_soc_S_timers_40001c00_ORD_STR_SORTABLE 00270 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001c00_REQUIRES_ORDS \ @@ -36647,8 +36923,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001c00_SUPPORTS_ORDS \ - 269, /* /soc/timers@40001c00/counter */ \ - 270, /* /soc/timers@40001c00/pwm */ + 271, /* /soc/timers@40001c00/counter */ \ + 272, /* /soc/timers@40001c00/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40001c00_EXISTS 1 @@ -36814,12 +37090,12 @@ #define DT_N_S_soc_S_timers_40001c00_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001c00_S_counter_ORD 269 -#define DT_N_S_soc_S_timers_40001c00_S_counter_ORD_STR_SORTABLE 00269 +#define DT_N_S_soc_S_timers_40001c00_S_counter_ORD 271 +#define DT_N_S_soc_S_timers_40001c00_S_counter_ORD_STR_SORTABLE 00271 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001c00_S_counter_REQUIRES_ORDS \ - 268, /* /soc/timers@40001c00 */ + 270, /* /soc/timers@40001c00 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001c00_S_counter_SUPPORTS_ORDS /* nothing */ @@ -36922,12 +37198,12 @@ #define DT_N_S_soc_S_timers_40001c00_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001c00_S_pwm_ORD 270 -#define DT_N_S_soc_S_timers_40001c00_S_pwm_ORD_STR_SORTABLE 00270 +#define DT_N_S_soc_S_timers_40001c00_S_pwm_ORD 272 +#define DT_N_S_soc_S_timers_40001c00_S_pwm_ORD_STR_SORTABLE 00272 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001c00_S_pwm_REQUIRES_ORDS \ - 268, /* /soc/timers@40001c00 */ + 270, /* /soc/timers@40001c00 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001c00_S_pwm_SUPPORTS_ORDS /* nothing */ @@ -37032,8 +37308,8 @@ #define DT_N_S_soc_S_timers_40002000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40002000_ORD 271 -#define DT_N_S_soc_S_timers_40002000_ORD_STR_SORTABLE 00271 +#define DT_N_S_soc_S_timers_40002000_ORD 273 +#define DT_N_S_soc_S_timers_40002000_ORD_STR_SORTABLE 00273 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40002000_REQUIRES_ORDS \ @@ -37044,8 +37320,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40002000_SUPPORTS_ORDS \ - 272, /* /soc/timers@40002000/counter */ \ - 273, /* /soc/timers@40002000/pwm */ + 274, /* /soc/timers@40002000/counter */ \ + 275, /* /soc/timers@40002000/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40002000_EXISTS 1 @@ -37211,12 +37487,12 @@ #define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_ORD 272 -#define DT_N_S_soc_S_timers_40002000_S_counter_ORD_STR_SORTABLE 00272 +#define DT_N_S_soc_S_timers_40002000_S_counter_ORD 274 +#define DT_N_S_soc_S_timers_40002000_S_counter_ORD_STR_SORTABLE 00274 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40002000_S_counter_REQUIRES_ORDS \ - 271, /* /soc/timers@40002000 */ + 273, /* /soc/timers@40002000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40002000_S_counter_SUPPORTS_ORDS /* nothing */ @@ -37319,12 +37595,12 @@ #define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_ORD 273 -#define DT_N_S_soc_S_timers_40002000_S_pwm_ORD_STR_SORTABLE 00273 +#define DT_N_S_soc_S_timers_40002000_S_pwm_ORD 275 +#define DT_N_S_soc_S_timers_40002000_S_pwm_ORD_STR_SORTABLE 00275 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40002000_S_pwm_REQUIRES_ORDS \ - 271, /* /soc/timers@40002000 */ + 273, /* /soc/timers@40002000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40002000_S_pwm_SUPPORTS_ORDS /* nothing */ @@ -37429,12 +37705,12 @@ #define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_ORD 274 -#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_ORD_STR_SORTABLE 00274 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_ORD 276 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_ORD_STR_SORTABLE 00276 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_REQUIRES_ORDS \ - 81, /* /soc/timers@40010000/pwm */ + 87, /* /soc/timers@40010000/pwm */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_SUPPORTS_ORDS /* nothing */ @@ -37552,8 +37828,8 @@ #define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010400_ORD 275 -#define DT_N_S_soc_S_timers_40010400_ORD_STR_SORTABLE 00275 +#define DT_N_S_soc_S_timers_40010400_ORD 277 +#define DT_N_S_soc_S_timers_40010400_ORD_STR_SORTABLE 00277 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40010400_REQUIRES_ORDS \ @@ -37564,7 +37840,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40010400_SUPPORTS_ORDS \ - 276, /* /soc/timers@40010400/pwm */ + 278, /* /soc/timers@40010400/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40010400_EXISTS 1 @@ -37805,12 +38081,12 @@ #define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD 276 -#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD_STR_SORTABLE 00276 +#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD 278 +#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD_STR_SORTABLE 00278 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40010400_S_pwm_REQUIRES_ORDS \ - 275, /* /soc/timers@40010400 */ + 277, /* /soc/timers@40010400 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40010400_S_pwm_SUPPORTS_ORDS /* nothing */ @@ -37915,8 +38191,8 @@ #define DT_N_S_soc_S_timers_40014000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014000_ORD 277 -#define DT_N_S_soc_S_timers_40014000_ORD_STR_SORTABLE 00277 +#define DT_N_S_soc_S_timers_40014000_ORD 279 +#define DT_N_S_soc_S_timers_40014000_ORD_STR_SORTABLE 00279 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014000_REQUIRES_ORDS \ @@ -37927,8 +38203,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014000_SUPPORTS_ORDS \ - 278, /* /soc/timers@40014000/counter */ \ - 279, /* /soc/timers@40014000/pwm */ + 280, /* /soc/timers@40014000/counter */ \ + 281, /* /soc/timers@40014000/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40014000_EXISTS 1 @@ -38094,12 +38370,12 @@ #define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014000_S_counter_ORD 278 -#define DT_N_S_soc_S_timers_40014000_S_counter_ORD_STR_SORTABLE 00278 +#define DT_N_S_soc_S_timers_40014000_S_counter_ORD 280 +#define DT_N_S_soc_S_timers_40014000_S_counter_ORD_STR_SORTABLE 00280 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014000_S_counter_REQUIRES_ORDS \ - 277, /* /soc/timers@40014000 */ + 279, /* /soc/timers@40014000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014000_S_counter_SUPPORTS_ORDS /* nothing */ @@ -38202,12 +38478,12 @@ #define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014000_S_pwm_ORD 279 -#define DT_N_S_soc_S_timers_40014000_S_pwm_ORD_STR_SORTABLE 00279 +#define DT_N_S_soc_S_timers_40014000_S_pwm_ORD 281 +#define DT_N_S_soc_S_timers_40014000_S_pwm_ORD_STR_SORTABLE 00281 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014000_S_pwm_REQUIRES_ORDS \ - 277, /* /soc/timers@40014000 */ + 279, /* /soc/timers@40014000 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014000_S_pwm_SUPPORTS_ORDS /* nothing */ @@ -38312,8 +38588,8 @@ #define DT_N_S_soc_S_timers_40014400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014400_ORD 280 -#define DT_N_S_soc_S_timers_40014400_ORD_STR_SORTABLE 00280 +#define DT_N_S_soc_S_timers_40014400_ORD 282 +#define DT_N_S_soc_S_timers_40014400_ORD_STR_SORTABLE 00282 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014400_REQUIRES_ORDS \ @@ -38324,8 +38600,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014400_SUPPORTS_ORDS \ - 281, /* /soc/timers@40014400/counter */ \ - 282, /* /soc/timers@40014400/pwm */ + 283, /* /soc/timers@40014400/counter */ \ + 284, /* /soc/timers@40014400/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40014400_EXISTS 1 @@ -38491,12 +38767,12 @@ #define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014400_S_counter_ORD 281 -#define DT_N_S_soc_S_timers_40014400_S_counter_ORD_STR_SORTABLE 00281 +#define DT_N_S_soc_S_timers_40014400_S_counter_ORD 283 +#define DT_N_S_soc_S_timers_40014400_S_counter_ORD_STR_SORTABLE 00283 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014400_S_counter_REQUIRES_ORDS \ - 280, /* /soc/timers@40014400 */ + 282, /* /soc/timers@40014400 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014400_S_counter_SUPPORTS_ORDS /* nothing */ @@ -38599,12 +38875,12 @@ #define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014400_S_pwm_ORD 282 -#define DT_N_S_soc_S_timers_40014400_S_pwm_ORD_STR_SORTABLE 00282 +#define DT_N_S_soc_S_timers_40014400_S_pwm_ORD 284 +#define DT_N_S_soc_S_timers_40014400_S_pwm_ORD_STR_SORTABLE 00284 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014400_S_pwm_REQUIRES_ORDS \ - 280, /* /soc/timers@40014400 */ + 282, /* /soc/timers@40014400 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014400_S_pwm_SUPPORTS_ORDS /* nothing */ @@ -38709,8 +38985,8 @@ #define DT_N_S_soc_S_timers_40014800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014800_ORD 283 -#define DT_N_S_soc_S_timers_40014800_ORD_STR_SORTABLE 00283 +#define DT_N_S_soc_S_timers_40014800_ORD 285 +#define DT_N_S_soc_S_timers_40014800_ORD_STR_SORTABLE 00285 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014800_REQUIRES_ORDS \ @@ -38721,8 +38997,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014800_SUPPORTS_ORDS \ - 284, /* /soc/timers@40014800/counter */ \ - 285, /* /soc/timers@40014800/pwm */ + 286, /* /soc/timers@40014800/counter */ \ + 287, /* /soc/timers@40014800/pwm */ /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40014800_EXISTS 1 @@ -38888,12 +39164,12 @@ #define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014800_S_counter_ORD 284 -#define DT_N_S_soc_S_timers_40014800_S_counter_ORD_STR_SORTABLE 00284 +#define DT_N_S_soc_S_timers_40014800_S_counter_ORD 286 +#define DT_N_S_soc_S_timers_40014800_S_counter_ORD_STR_SORTABLE 00286 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014800_S_counter_REQUIRES_ORDS \ - 283, /* /soc/timers@40014800 */ + 285, /* /soc/timers@40014800 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014800_S_counter_SUPPORTS_ORDS /* nothing */ @@ -38996,12 +39272,12 @@ #define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014800_S_pwm_ORD 285 -#define DT_N_S_soc_S_timers_40014800_S_pwm_ORD_STR_SORTABLE 00285 +#define DT_N_S_soc_S_timers_40014800_S_pwm_ORD 287 +#define DT_N_S_soc_S_timers_40014800_S_pwm_ORD_STR_SORTABLE 00287 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014800_S_pwm_REQUIRES_ORDS \ - 283, /* /soc/timers@40014800 */ + 285, /* /soc/timers@40014800 */ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014800_S_pwm_SUPPORTS_ORDS /* nothing */ @@ -39091,10 +39367,10 @@ #define DT_CHOSEN_zephyr_camera_EXISTS 1 /* Macros for iterating over all nodes and enabled nodes */ -#define DT_FOREACH_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_52002000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller) fn(DT_N_S_soc_S_interrupt_controller_58000000) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp16_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp19_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp9_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp5_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp10_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp4_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp8_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_scl_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb9) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_sda_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12) fn(DT_N_S_soc_S_watchdog_58004800) fn(DT_N_S_soc_S_watchdog_50003000) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004400) fn(DT_N_S_soc_S_serial_40004800) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40005000) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx) fn(DT_N_S_soc_S_serial_40007c00) fn(DT_N_S_soc_S_serial_58000c00) fn(DT_N_S_soc_S_rtc_58004000) fn(DT_N_S_soc_S_rtc_58004000_S_backup_regs) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005800) fn(DT_N_S_soc_S_i2c_40005c00) fn(DT_N_S_soc_S_i2c_58001c00) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_spi_40003c00) fn(DT_N_S_soc_S_spi_40013400) fn(DT_N_S_soc_S_spi_40015000) fn(DT_N_S_soc_S_spi_58001400) fn(DT_N_S_soc_S_i2s_40013000) fn(DT_N_S_soc_S_i2s_40003800) fn(DT_N_S_soc_S_i2s_40003c00) fn(DT_N_S_soc_S_can_4000a000) fn(DT_N_S_soc_S_can_4000a400) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc_S_timers_40010000_S_pwm) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc_S_timers_40000000_S_pwm) fn(DT_N_S_soc_S_timers_40000000_S_counter) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc_S_timers_40000400_S_pwm) fn(DT_N_S_soc_S_timers_40000400_S_counter) fn(DT_N_S_soc_S_timers_40000800) fn(DT_N_S_soc_S_timers_40000800_S_pwm) fn(DT_N_S_soc_S_timers_40000800_S_counter) fn(DT_N_S_soc_S_timers_40000c00) fn(DT_N_S_soc_S_timers_40000c00_S_pwm) fn(DT_N_S_soc_S_timers_40000c00_S_counter) fn(DT_N_S_soc_S_timers_40001000) fn(DT_N_S_soc_S_timers_40001000_S_counter) fn(DT_N_S_soc_S_timers_40001400) fn(DT_N_S_soc_S_timers_40001400_S_counter) fn(DT_N_S_soc_S_timers_40010400) fn(DT_N_S_soc_S_timers_40010400_S_pwm) fn(DT_N_S_soc_S_timers_40001800) fn(DT_N_S_soc_S_timers_40001800_S_pwm) fn(DT_N_S_soc_S_timers_40001800_S_counter) fn(DT_N_S_soc_S_timers_40001c00) fn(DT_N_S_soc_S_timers_40001c00_S_pwm) fn(DT_N_S_soc_S_timers_40001c00_S_counter) fn(DT_N_S_soc_S_timers_40002000) fn(DT_N_S_soc_S_timers_40002000_S_pwm) fn(DT_N_S_soc_S_timers_40002000_S_counter) fn(DT_N_S_soc_S_timers_40014000) fn(DT_N_S_soc_S_timers_40014000_S_pwm) fn(DT_N_S_soc_S_timers_40014000_S_counter) fn(DT_N_S_soc_S_timers_40014400) fn(DT_N_S_soc_S_timers_40014400_S_pwm) fn(DT_N_S_soc_S_timers_40014400_S_counter) fn(DT_N_S_soc_S_timers_40014800) fn(DT_N_S_soc_S_timers_40014800_S_pwm) fn(DT_N_S_soc_S_timers_40014800_S_counter) fn(DT_N_S_soc_S_timers_40002400) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc_S_adc_40022000_S_channel_4) fn(DT_N_S_soc_S_adc_40022000_S_channel_8) fn(DT_N_S_soc_S_adc_40022000_S_channel_9) fn(DT_N_S_soc_S_adc_40022000_S_channel_5) fn(DT_N_S_soc_S_adc_40022000_S_channel_d) fn(DT_N_S_soc_S_adc_40022000_S_channel_c) fn(DT_N_S_soc_S_adc_40022000_S_channel_a) fn(DT_N_S_soc_S_adc_40022000_S_channel_10) fn(DT_N_S_soc_S_adc_40022000_S_channel_12) fn(DT_N_S_soc_S_adc_40022000_S_channel_13) fn(DT_N_S_soc_S_adc_40022000_S_channel_0) fn(DT_N_S_soc_S_adc_40022000_S_channel_1) fn(DT_N_S_soc_S_adc_40022100) fn(DT_N_S_soc_S_adc_40022300) fn(DT_N_S_soc_S_adc_58026000) fn(DT_N_S_soc_S_adc_58026000_S_channel_0) fn(DT_N_S_soc_S_adc_58026000_S_channel_1) fn(DT_N_S_soc_S_dac_40007400) fn(DT_N_S_soc_S_dma_40020000) fn(DT_N_S_soc_S_dma_40020400) fn(DT_N_S_soc_S_bdma_58025400) fn(DT_N_S_soc_S_dmamux_40020800) fn(DT_N_S_soc_S_dmamux_58025800) fn(DT_N_S_soc_S_rng_48021800) fn(DT_N_S_soc_S_sdmmc_52007000) fn(DT_N_S_soc_S_sdmmc_48022400) fn(DT_N_S_soc_S_ethernet_40028000) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) fn(DT_N_S_soc_S_memory_38800000) fn(DT_N_S_soc_S_quadspi_52005000) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000) fn(DT_N_S_soc_S_dcmi_48020000) fn(DT_N_S_soc_S_dcmi_48020000_S_port) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint) fn(DT_N_S_soc_S_mailbox_58026400) fn(DT_N_S_soc_S_display_controller_50001000) fn(DT_N_S_soc_S_usb_40040000) fn(DT_N_S_soc_S_usb_40080000) fn(DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0) fn(DT_N_S_soc_S_dsihost_50000000) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_csi) fn(DT_N_S_clocks_S_clk_lse) fn(DT_N_S_clocks_S_clk_lsi) fn(DT_N_S_clocks_S_pll_0) fn(DT_N_S_clocks_S_pll_1) fn(DT_N_S_clocks_S_pll_2) fn(DT_N_S_clocks_S_perck) fn(DT_N_S_dietemp) fn(DT_N_S_vbat) fn(DT_N_S_vref) fn(DT_N_S_smbus1) fn(DT_N_S_smbus2) fn(DT_N_S_smbus3) fn(DT_N_S_smbus4) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_connector) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_gpio_keys) fn(DT_N_S_gpio_keys_S_button_0) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_gpio_deadbeef) fn(DT_N_S_zephyr_user) -#define DT_FOREACH_OKAY_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_52002000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller) fn(DT_N_S_soc_S_interrupt_controller_58000000) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp16_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp19_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp9_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp5_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp10_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp4_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp8_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_scl_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb9) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_sda_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx) fn(DT_N_S_soc_S_i2c_58001c00) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40015000) fn(DT_N_S_soc_S_can_4000a400) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc_S_timers_40010000_S_pwm) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc_S_adc_40022000_S_channel_4) fn(DT_N_S_soc_S_adc_40022000_S_channel_8) fn(DT_N_S_soc_S_adc_40022000_S_channel_9) fn(DT_N_S_soc_S_adc_40022000_S_channel_5) fn(DT_N_S_soc_S_adc_40022000_S_channel_d) fn(DT_N_S_soc_S_adc_40022000_S_channel_c) fn(DT_N_S_soc_S_adc_40022000_S_channel_a) fn(DT_N_S_soc_S_adc_40022000_S_channel_10) fn(DT_N_S_soc_S_adc_40022000_S_channel_12) fn(DT_N_S_soc_S_adc_40022000_S_channel_13) fn(DT_N_S_soc_S_adc_40022000_S_channel_0) fn(DT_N_S_soc_S_adc_40022000_S_channel_1) fn(DT_N_S_soc_S_adc_58026000) fn(DT_N_S_soc_S_adc_58026000_S_channel_0) fn(DT_N_S_soc_S_adc_58026000_S_channel_1) fn(DT_N_S_soc_S_dac_40007400) fn(DT_N_S_soc_S_dma_40020000) fn(DT_N_S_soc_S_dmamux_40020800) fn(DT_N_S_soc_S_rng_48021800) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) fn(DT_N_S_soc_S_quadspi_52005000) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000) fn(DT_N_S_soc_S_dcmi_48020000) fn(DT_N_S_soc_S_dcmi_48020000_S_port) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint) fn(DT_N_S_soc_S_mailbox_58026400) fn(DT_N_S_soc_S_usb_40080000) fn(DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_lse) fn(DT_N_S_clocks_S_pll_0) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_connector) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_gpio_keys) fn(DT_N_S_gpio_keys_S_button_0) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_gpio_deadbeef) fn(DT_N_S_zephyr_user) -#define DT_FOREACH_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp16_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp19_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp9_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp5_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp10_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp4_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp8_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_scl_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_sda_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_58004800, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40005000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_58000c00, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000_S_backup_regs, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005800, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013400, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_58001400, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a000, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002400, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_4, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_8, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_9, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_5, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_a, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_10, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_13, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022100, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022300, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_dac_40007400, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020400, __VA_ARGS__) fn(DT_N_S_soc_S_bdma_58025400, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_58025800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) fn(DT_N_S_soc_S_sdmmc_52007000, __VA_ARGS__) fn(DT_N_S_soc_S_sdmmc_48022400, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) fn(DT_N_S_soc_S_memory_38800000, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) fn(DT_N_S_soc_S_display_controller_50001000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40080000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0, __VA_ARGS__) fn(DT_N_S_soc_S_dsihost_50000000, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_csi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_0, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_1, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_2, __VA_ARGS__) fn(DT_N_S_clocks_S_perck, __VA_ARGS__) fn(DT_N_S_dietemp, __VA_ARGS__) fn(DT_N_S_vbat, __VA_ARGS__) fn(DT_N_S_vref, __VA_ARGS__) fn(DT_N_S_smbus1, __VA_ARGS__) fn(DT_N_S_smbus2, __VA_ARGS__) fn(DT_N_S_smbus3, __VA_ARGS__) fn(DT_N_S_smbus4, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_gpio_keys, __VA_ARGS__) fn(DT_N_S_gpio_keys_S_button_0, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_gpio_deadbeef, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) -#define DT_FOREACH_OKAY_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp16_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp19_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp9_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp5_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp10_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp4_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp8_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_scl_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_sda_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_4, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_8, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_9, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_5, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_a, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_10, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_13, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_dac_40007400, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40080000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_0, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_gpio_keys, __VA_ARGS__) fn(DT_N_S_gpio_keys_S_button_0, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_gpio_deadbeef, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) +#define DT_FOREACH_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_52002000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller) fn(DT_N_S_soc_S_interrupt_controller_58000000) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp16_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp19_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp9_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp5_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp10_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp4_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp8_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_scl_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb9) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_sda_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12) fn(DT_N_S_soc_S_watchdog_58004800) fn(DT_N_S_soc_S_watchdog_50003000) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004400) fn(DT_N_S_soc_S_serial_40004800) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40005000) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx) fn(DT_N_S_soc_S_serial_40007c00) fn(DT_N_S_soc_S_serial_58000c00) fn(DT_N_S_soc_S_rtc_58004000) fn(DT_N_S_soc_S_rtc_58004000_S_backup_regs) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005800) fn(DT_N_S_soc_S_i2c_40005c00) fn(DT_N_S_soc_S_i2c_58001c00) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_spi_40003c00) fn(DT_N_S_soc_S_spi_40013400) fn(DT_N_S_soc_S_spi_40015000) fn(DT_N_S_soc_S_spi_58001400) fn(DT_N_S_soc_S_i2s_40013000) fn(DT_N_S_soc_S_i2s_40003800) fn(DT_N_S_soc_S_i2s_40003c00) fn(DT_N_S_soc_S_can_4000a000) fn(DT_N_S_soc_S_can_4000a400) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc_S_timers_40010000_S_pwm) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc_S_timers_40000000_S_pwm) fn(DT_N_S_soc_S_timers_40000000_S_counter) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc_S_timers_40000400_S_pwm) fn(DT_N_S_soc_S_timers_40000400_S_counter) fn(DT_N_S_soc_S_timers_40000800) fn(DT_N_S_soc_S_timers_40000800_S_pwm) fn(DT_N_S_soc_S_timers_40000800_S_counter) fn(DT_N_S_soc_S_timers_40000c00) fn(DT_N_S_soc_S_timers_40000c00_S_pwm) fn(DT_N_S_soc_S_timers_40000c00_S_counter) fn(DT_N_S_soc_S_timers_40001000) fn(DT_N_S_soc_S_timers_40001000_S_counter) fn(DT_N_S_soc_S_timers_40001400) fn(DT_N_S_soc_S_timers_40001400_S_counter) fn(DT_N_S_soc_S_timers_40010400) fn(DT_N_S_soc_S_timers_40010400_S_pwm) fn(DT_N_S_soc_S_timers_40001800) fn(DT_N_S_soc_S_timers_40001800_S_pwm) fn(DT_N_S_soc_S_timers_40001800_S_counter) fn(DT_N_S_soc_S_timers_40001c00) fn(DT_N_S_soc_S_timers_40001c00_S_pwm) fn(DT_N_S_soc_S_timers_40001c00_S_counter) fn(DT_N_S_soc_S_timers_40002000) fn(DT_N_S_soc_S_timers_40002000_S_pwm) fn(DT_N_S_soc_S_timers_40002000_S_counter) fn(DT_N_S_soc_S_timers_40014000) fn(DT_N_S_soc_S_timers_40014000_S_pwm) fn(DT_N_S_soc_S_timers_40014000_S_counter) fn(DT_N_S_soc_S_timers_40014400) fn(DT_N_S_soc_S_timers_40014400_S_pwm) fn(DT_N_S_soc_S_timers_40014400_S_counter) fn(DT_N_S_soc_S_timers_40014800) fn(DT_N_S_soc_S_timers_40014800_S_pwm) fn(DT_N_S_soc_S_timers_40014800_S_counter) fn(DT_N_S_soc_S_timers_40002400) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc_S_adc_40022000_S_channel_4) fn(DT_N_S_soc_S_adc_40022000_S_channel_8) fn(DT_N_S_soc_S_adc_40022000_S_channel_9) fn(DT_N_S_soc_S_adc_40022000_S_channel_5) fn(DT_N_S_soc_S_adc_40022000_S_channel_d) fn(DT_N_S_soc_S_adc_40022000_S_channel_c) fn(DT_N_S_soc_S_adc_40022000_S_channel_a) fn(DT_N_S_soc_S_adc_40022000_S_channel_10) fn(DT_N_S_soc_S_adc_40022000_S_channel_12) fn(DT_N_S_soc_S_adc_40022000_S_channel_13) fn(DT_N_S_soc_S_adc_40022000_S_channel_0) fn(DT_N_S_soc_S_adc_40022000_S_channel_1) fn(DT_N_S_soc_S_adc_40022100) fn(DT_N_S_soc_S_adc_40022300) fn(DT_N_S_soc_S_adc_58026000) fn(DT_N_S_soc_S_adc_58026000_S_channel_0) fn(DT_N_S_soc_S_adc_58026000_S_channel_1) fn(DT_N_S_soc_S_dac_40007400) fn(DT_N_S_soc_S_dma_40020000) fn(DT_N_S_soc_S_dma_40020400) fn(DT_N_S_soc_S_bdma_58025400) fn(DT_N_S_soc_S_dmamux_40020800) fn(DT_N_S_soc_S_dmamux_58025800) fn(DT_N_S_soc_S_rng_48021800) fn(DT_N_S_soc_S_sdmmc_52007000) fn(DT_N_S_soc_S_sdmmc_48022400) fn(DT_N_S_soc_S_ethernet_40028000) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) fn(DT_N_S_soc_S_memory_38800000) fn(DT_N_S_soc_S_quadspi_52005000) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000) fn(DT_N_S_soc_S_dcmi_48020000) fn(DT_N_S_soc_S_dcmi_48020000_S_port) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint) fn(DT_N_S_soc_S_mailbox_58026400) fn(DT_N_S_soc_S_display_controller_50001000) fn(DT_N_S_soc_S_usb_40040000) fn(DT_N_S_soc_S_usb_40080000) fn(DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0) fn(DT_N_S_soc_S_dsihost_50000000) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_csi) fn(DT_N_S_clocks_S_clk_lse) fn(DT_N_S_clocks_S_clk_lsi) fn(DT_N_S_clocks_S_pll_0) fn(DT_N_S_clocks_S_pll_1) fn(DT_N_S_clocks_S_pll_2) fn(DT_N_S_clocks_S_perck) fn(DT_N_S_dietemp) fn(DT_N_S_vbat) fn(DT_N_S_vref) fn(DT_N_S_smbus1) fn(DT_N_S_smbus2) fn(DT_N_S_smbus3) fn(DT_N_S_smbus4) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_connector) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_gpio_keys) fn(DT_N_S_gpio_keys_S_button_0) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_gpio_deadbeef) fn(DT_N_S_zephyr_user) +#define DT_FOREACH_OKAY_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_52002000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller) fn(DT_N_S_soc_S_interrupt_controller_58000000) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp16_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp19_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp9_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp5_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp10_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp4_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp8_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_scl_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb9) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_sda_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004400) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005800) fn(DT_N_S_soc_S_i2c_58001c00) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40015000) fn(DT_N_S_soc_S_can_4000a400) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc_S_timers_40010000_S_pwm) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc_S_adc_40022000_S_channel_4) fn(DT_N_S_soc_S_adc_40022000_S_channel_8) fn(DT_N_S_soc_S_adc_40022000_S_channel_9) fn(DT_N_S_soc_S_adc_40022000_S_channel_5) fn(DT_N_S_soc_S_adc_40022000_S_channel_d) fn(DT_N_S_soc_S_adc_40022000_S_channel_c) fn(DT_N_S_soc_S_adc_40022000_S_channel_a) fn(DT_N_S_soc_S_adc_40022000_S_channel_10) fn(DT_N_S_soc_S_adc_40022000_S_channel_12) fn(DT_N_S_soc_S_adc_40022000_S_channel_13) fn(DT_N_S_soc_S_adc_40022000_S_channel_0) fn(DT_N_S_soc_S_adc_40022000_S_channel_1) fn(DT_N_S_soc_S_adc_58026000) fn(DT_N_S_soc_S_adc_58026000_S_channel_0) fn(DT_N_S_soc_S_adc_58026000_S_channel_1) fn(DT_N_S_soc_S_dac_40007400) fn(DT_N_S_soc_S_dma_40020000) fn(DT_N_S_soc_S_dmamux_40020800) fn(DT_N_S_soc_S_rng_48021800) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) fn(DT_N_S_soc_S_quadspi_52005000) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000) fn(DT_N_S_soc_S_dcmi_48020000) fn(DT_N_S_soc_S_dcmi_48020000_S_port) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint) fn(DT_N_S_soc_S_mailbox_58026400) fn(DT_N_S_soc_S_usb_40080000) fn(DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_lse) fn(DT_N_S_clocks_S_pll_0) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_connector) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_gpio_keys) fn(DT_N_S_gpio_keys_S_button_0) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_gpio_deadbeef) fn(DT_N_S_zephyr_user) +#define DT_FOREACH_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp16_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp19_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp9_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp5_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp10_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp4_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp8_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_scl_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_sda_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_58004800, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40005000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_58000c00, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000_S_backup_regs, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005800, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013400, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_58001400, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a000, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002400, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_4, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_8, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_9, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_5, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_a, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_10, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_13, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022100, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022300, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_dac_40007400, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020400, __VA_ARGS__) fn(DT_N_S_soc_S_bdma_58025400, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_58025800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) fn(DT_N_S_soc_S_sdmmc_52007000, __VA_ARGS__) fn(DT_N_S_soc_S_sdmmc_48022400, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) fn(DT_N_S_soc_S_memory_38800000, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) fn(DT_N_S_soc_S_display_controller_50001000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40080000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0, __VA_ARGS__) fn(DT_N_S_soc_S_dsihost_50000000, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_csi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_0, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_1, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_2, __VA_ARGS__) fn(DT_N_S_clocks_S_perck, __VA_ARGS__) fn(DT_N_S_dietemp, __VA_ARGS__) fn(DT_N_S_vbat, __VA_ARGS__) fn(DT_N_S_vref, __VA_ARGS__) fn(DT_N_S_smbus1, __VA_ARGS__) fn(DT_N_S_smbus2, __VA_ARGS__) fn(DT_N_S_smbus3, __VA_ARGS__) fn(DT_N_S_smbus4, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_gpio_keys, __VA_ARGS__) fn(DT_N_S_gpio_keys_S_button_0, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_gpio_deadbeef, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) +#define DT_FOREACH_OKAY_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp16_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp19_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp9_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp5_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp10_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp4_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp8_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out1_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dac1_out2_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_scl_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c2_sda_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pe2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_miso_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_miso_pj11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_mosi_pd7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_mosi_pj10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_nss_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_nss_pk1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi1_sck_pb3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi5_sck_ph6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_rx_pd6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pc7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pa8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart2_tx_pd5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005800, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_4, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_8, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_9, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_5, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_a, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_10, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_13, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_dac_40007400, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_quadspi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_100000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40080000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40080000_S_cdc_acm_uart0, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_0, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_gpio_keys, __VA_ARGS__) fn(DT_N_S_gpio_keys_S_button_0, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_gpio_deadbeef, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) #define DT_COMPAT_fixed_partitions_LABEL_bootloader DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0 #define DT_COMPAT_fixed_partitions_LABEL_bootloader_EXISTS 1 #define DT_COMPAT_fixed_partitions_LABEL_image_0 DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000 @@ -39183,11 +39459,11 @@ #define DT_N_INST_st_stm32_exti_NUM_OKAY 1 #define DT_N_INST_st_stm32_pinctrl_NUM_OKAY 1 #define DT_N_INST_st_stm32_gpio_NUM_OKAY 11 -#define DT_N_INST_st_stm32_usart_NUM_OKAY 2 -#define DT_N_INST_st_stm32_uart_NUM_OKAY 3 +#define DT_N_INST_st_stm32_usart_NUM_OKAY 3 +#define DT_N_INST_st_stm32_uart_NUM_OKAY 5 #define DT_N_INST_zephyr_bt_hci_uart_NUM_OKAY 1 #define DT_N_INST_infineon_cyw43xxx_bt_hci_NUM_OKAY 1 -#define DT_N_INST_st_stm32_i2c_v2_NUM_OKAY 1 +#define DT_N_INST_st_stm32_i2c_v2_NUM_OKAY 3 #define DT_N_INST_ovti_ov7670_NUM_OKAY 1 #define DT_N_INST_st_stm32h7_spi_NUM_OKAY 2 #define DT_N_INST_st_stm32_spi_fifo_NUM_OKAY 2 @@ -39287,14 +39563,14 @@ #define DT_FOREACH_OKAY_VARGS_st_stm32_gpio(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_st_stm32_gpio(fn) fn(0) fn(1) fn(2) fn(3) fn(4) fn(5) fn(6) fn(7) fn(8) fn(9) fn(10) #define DT_FOREACH_OKAY_INST_VARGS_st_stm32_gpio(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) fn(3, __VA_ARGS__) fn(4, __VA_ARGS__) fn(5, __VA_ARGS__) fn(6, __VA_ARGS__) fn(7, __VA_ARGS__) fn(8, __VA_ARGS__) fn(9, __VA_ARGS__) fn(10, __VA_ARGS__) -#define DT_FOREACH_OKAY_st_stm32_usart(fn) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40011400) -#define DT_FOREACH_OKAY_VARGS_st_stm32_usart(fn, ...) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) -#define DT_FOREACH_OKAY_INST_st_stm32_usart(fn) fn(0) fn(1) -#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_usart(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) -#define DT_FOREACH_OKAY_st_stm32_uart(fn) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) -#define DT_FOREACH_OKAY_VARGS_st_stm32_uart(fn, ...) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) -#define DT_FOREACH_OKAY_INST_st_stm32_uart(fn) fn(0) fn(1) fn(2) -#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_uart(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_usart(fn) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004400) fn(DT_N_S_soc_S_serial_40011400) +#define DT_FOREACH_OKAY_VARGS_st_stm32_usart(fn, ...) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_usart(fn) fn(0) fn(1) fn(2) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_usart(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_uart(fn) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004400) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) +#define DT_FOREACH_OKAY_VARGS_st_stm32_uart(fn, ...) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_uart(fn) fn(0) fn(1) fn(2) fn(3) fn(4) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_uart(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) fn(3, __VA_ARGS__) fn(4, __VA_ARGS__) #define DT_FOREACH_OKAY_zephyr_bt_hci_uart(fn) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart) #define DT_FOREACH_OKAY_VARGS_zephyr_bt_hci_uart(fn, ...) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_zephyr_bt_hci_uart(fn) fn(0) @@ -39303,10 +39579,10 @@ #define DT_FOREACH_OKAY_VARGS_infineon_cyw43xxx_bt_hci(fn, ...) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_infineon_cyw43xxx_bt_hci(fn) fn(0) #define DT_FOREACH_OKAY_INST_VARGS_infineon_cyw43xxx_bt_hci(fn, ...) fn(0, __VA_ARGS__) -#define DT_FOREACH_OKAY_st_stm32_i2c_v2(fn) fn(DT_N_S_soc_S_i2c_58001c00) -#define DT_FOREACH_OKAY_VARGS_st_stm32_i2c_v2(fn, ...) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) -#define DT_FOREACH_OKAY_INST_st_stm32_i2c_v2(fn) fn(0) -#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_i2c_v2(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_i2c_v2(fn) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005800) fn(DT_N_S_soc_S_i2c_58001c00) +#define DT_FOREACH_OKAY_VARGS_st_stm32_i2c_v2(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005800, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_i2c_v2(fn) fn(0) fn(1) fn(2) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_i2c_v2(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) #define DT_FOREACH_OKAY_ovti_ov7670(fn) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21) #define DT_FOREACH_OKAY_VARGS_ovti_ov7670(fn, ...) fn(DT_N_S_soc_S_i2c_58001c00_S_ov7670_21, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_ovti_ov7670(fn) fn(0)

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