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PCI-Target

PCI Target in verilog A verilog software project to create a synthesizable PCI Target Device which was able to read or write data from memory according to the given signal from the master. With different scenarios and constraints using test bench that acts as a Master Device to test these scenarios.

For more information refer to PDF

Block Diagram

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Samples of Outputs

Memory Write

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Memory Read

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RTL Design

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Contributers

ahmed mohamed
ahmed mohamed
Sarah-56
Sarah-56
Basmala
Basmala
Bassant-Yasser
Bassant-Yasser
ayasameh11998
ayasameh11998