diff --git a/bsp/bsp_gpio.h b/bsp/bsp_gpio.h
index 984b897..30b7837 100644
--- a/bsp/bsp_gpio.h
+++ b/bsp/bsp_gpio.h
@@ -43,6 +43,10 @@ inline void gpio_outclr_bulk(int port, uint32_t mask) {
 	PORT->Group[port].OUTCLR.reg = mask;
 }
 
+inline void gpio_toggle_bulk(int port, uint32_t mask) {
+	PORT->Group[port].OUTTGL.reg = mask;
+}
+
 void gpio_pullenset_bulk(uint32_t mask, uint8_t port = 0);
 
 void gpio_pullenclr_bulk(uint32_t mask, uint8_t port = 0);
diff --git a/source/Delegate.cpp b/source/Delegate.cpp
index 86b39ce..7f6c720 100644
--- a/source/Delegate.cpp
+++ b/source/Delegate.cpp
@@ -502,6 +502,24 @@ QState Delegate::Started(Delegate * const me, QEvt const * const e) {
 								
 								break;
 							}
+							case SEESAW_GPIO_BULK_TOGGLE: {
+								uint8_t pins[4];
+								fifo->Read(pins, 4);
+								len-=4;
+
+								uint32_t combined = ((uint32_t)pins[0] << 24) | ((uint32_t)pins[1] << 16) | ((uint32_t)pins[2] << 8) | (uint32_t)pins[3];
+								gpio_toggle_bulk(PORTA, combined & CONFIG_GPIO_A_MASK);
+#ifdef HAS_PORTB
+                                if(len > 0){
+                                    fifo->Read(pins, 4);
+                                    len-=4;
+
+                                    uint32_t combined = ((uint32_t)pins[0] << 24) | ((uint32_t)pins[1] << 16) | ((uint32_t)pins[2] << 8) | (uint32_t)pins[3];
+                                    gpio_toggle_bulk(PORTB, combined & CONFIG_GPIO_B_MASK);
+                                }
+#endif
+								break;
+							}
 							case SEESAW_GPIO_INTENSET: {
 								uint8_t pins[4];
 								fifo->Read(pins, 4);