From 41aaaa153e1921c867a3e82d0f2f71d81c7f0804 Mon Sep 17 00:00:00 2001 From: George Rennie Date: Wed, 12 Jun 2024 14:38:12 +0100 Subject: [PATCH] peepopt shiftadd: Only match for sufficiently small constant widths This addresses issue #4445 --- passes/pmgen/peepopt_shiftadd.pmg | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/passes/pmgen/peepopt_shiftadd.pmg b/passes/pmgen/peepopt_shiftadd.pmg index e690ff65113..47a5ed18f1f 100644 --- a/passes/pmgen/peepopt_shiftadd.pmg +++ b/passes/pmgen/peepopt_shiftadd.pmg @@ -53,6 +53,11 @@ match add select port(add, constport).is_fully_const() define varport (constport == \A ? \B : \A) + // only optimize for constants up to a fixed width. this prevents cases + // with a blowup in internal term size and prevents larger constants being + // casted to int incorrectly + select (GetSize(port(add, constport)) <= 24) + // if a value of var is able to wrap the output, the transformation might give wrong results // an addition/substraction can at most flip one more bit than the largest operand (the carry bit) // as long as the output can show this bit, no wrap should occur (assuming all signed-ness make sense)