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Just launched a Verilog Package Manager!
The package manager autogenerates
.vh
headers, handles synthesis collateral, etc., so including modules is basically reduced to a singlepip install
.Now, you don't need to go through the code, find sumbmodules, etc., which could be scattered across different repos, and handle synthesis collateral!
Link: https://github.com/getinstachip/vpm
It was made 2 days ago and already has interest from people at Neuralink and SambaNova.
Please contribute, suggest features, and report bugs (and star the repo...)!!!
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