Layout of 4bit Ripple Carry Adder (RCA) formed using CMOS logic in gpdk180nm technology node done in Cadence Virtuoso with no DRC and LVS errors.
A 4-bit Ripple Carry Adder (RCA) is formed using four 1-bit Full Adders cascaded in a series connection with the Carry out of one stage acting as Carry in to another stage. A 4-bit Ripple Carry Adder (RCA) is used to calculate the binary addition of two 4bit binary numbers.
Since it is made using four 1-bit Full Adders, a 4-bit RCA has 8 inputs namely (A0 B0,………A3B3) and 4 Sum outputs namely (S0,…..S3) and a single Carry in as (Cin) to the
adder at first stage and a single Carry out as (Cout) from the final stage in the adder chain
Fig 1: Adding two 4bit numbers.
Since we know that, to form a 4bit RCA we require four 1bit Full Adders. To make Full Adders we require Half Adders. Furthermore Half Adders can be made with simple Logic Gates. In this section, I will be showing how to make these components leading upto a 4bit RCA in gpdk 180nm technology node using CMOS logic.
A half adder is a simple digital circuit used to add two binary numbers. It contains two outputs, namely Carry (C) and Sum (S), and two inputs, as A and B, denoting the two bits to be added.
XOR and AND gates are two common logic gates that can be used to create the half adder.
Fig 2: Boolean Expression for Sum and Carry output of a Half Adder.
Fig 3: Truth Table of a Half Adder.
Fig 4: Schematic of a Half Adder.
A 1-bit Full Adder is formed using two Half Adders cascaded in series with each other and an OR gate. It takes in three 1-bit inputs namely A, B, Cin and performs the binary addition to
give Sum and Carry output (Cout) from these three bits.
Fig 5: Boolean Expression for Sum output of a 1bit Full Adder.
Fig 6: Boolean Expression for Carry output of a 1bit Full Adder.
Fig 7: Truth Table of a 1bit Full Adder.
Fig 8: Schematic of a 1bit Full Adder.
Fig 9: Schematic of a 4bit Ripple Carry Adder.
Fig 10: Waveform of a 4bit Ripple Carry Adder.
In this section, I will demonstrate how to construct the layout for a 4-bit Ripple Carry Adder (RCA). The process begins with creating the layouts for the individual components that make up the 4-bit RCA, specifically the Half Adders and Full Adders. Additionally, designing the layouts for the Half Adders and Full Adders necessitates constructing the layouts for the various logic gates involved in making of these adders. A maximum of two metal layers (metal 1 and metal 2) are used to form the connections (routes) for our design.
Fig 11: Layout of an Inverter.
Fig 12: Layout of an AND Gate.
Fig 13: Layout of a XOR Gate.
Fig 14: Layout of a OR Gate.
Since we know, to form a half adder requires a XOR and an AND gate. Similarly, we can can instantiate the layouts of these individual components to form the layout for a half adder.
Fig 15: Layout of a Half Adder.
A 1bit full adder requires 2 half adders and an OR gate. We'll instantiate these already formed components to form a 1bit full Adder. Remember additional routing is to be done to connect these components of the FA :)
Fig 15: Layout of a 1bit Full Adder.
A 4bit RCA requires four 1bit Full adders connnected in series (cascade fashion). We will instantiate them and connect the carry outs to carry in of the successive 1bit FA to form a 4bit RCA.
Fig 15: Layout of a 4bit RCA.
Our 4bit RCA layout is meets all the design rules specified for gpdk 180nm technology node and also meets the LVS requirements.
Fig 16: DRC for 4bit RCA.
Fig 17: LVS check (1/2) for 4bit RCA.
Fig 17: LVS check (2/2) for 4bit RCA.
Note: All of these design or layout are performed in Cadence Virtuoso design tool. Cadence Assura tool is used for DRC and LVS checks for layout in gpdk 180nm library. Widths of PMOS's are kept 2x the width of NMOS's.