From f56fdf7cbe32f3f9747aae44d28d910acdff6c34 Mon Sep 17 00:00:00 2001
From: htfab <mpw@htamas.net>
Date: Tue, 28 May 2024 21:20:46 +0200
Subject: [PATCH] feat(test-precheck): support compound ports

---
 precheck/test_precheck.py | 68 +++++++++++++++++++++++++++++----------
 1 file changed, 51 insertions(+), 17 deletions(-)

diff --git a/precheck/test_precheck.py b/precheck/test_precheck.py
index 70eaf86..74f8e61 100644
--- a/precheck/test_precheck.py
+++ b/precheck/test_precheck.py
@@ -113,9 +113,9 @@ def generate_analog_example(
     lef_file: str,
     toplevel: str,
     vpwr_layer: str,
-    vpwr_box: str,
+    vpwr_boxes: str,
     vgnd_layer: str,
-    vgnd_box: str,
+    vgnd_boxes: str,
 ):
     with open(tcl_file, "w") as f:
         f.write(
@@ -125,26 +125,30 @@ def read ../def/analog/tt_block_1x2_pg_ana.def
                 cellname rename tt_um_template {toplevel}
 
                 # VPWR
-                box {vpwr_box}
-                paint {vpwr_layer}
-                label VPWR FreeSans {vpwr_layer}
-                port VPWR make n
+                foreach vpwr_box {{ {vpwr_boxes} }} {{
+                    box {{*}}$vpwr_box
+                    paint {vpwr_layer}
+                    label VPWR FreeSans {vpwr_layer}
+                }}
+                port VPWR makeall n
                 port VPWR use power
                 port VPWR class bidirectional
                 port conn n s e w
 
                 # VGND
-                box {vgnd_box}
-                paint {vgnd_layer}
-                label VGND FreeSans {vgnd_layer}
-                port VGND make n
+                foreach vgnd_box {{ {vgnd_boxes} }} {{
+                    box {{*}}$vgnd_box
+                    paint {vgnd_layer}
+                    label VGND FreeSans {vgnd_layer}
+                }}
+                port VGND makeall n
                 port VGND use ground
                 port VGND class bidirectional
                 port conn n s e w
 
                 # Export
                 gds write {gds_file}
-                lef write {lef_file} -pinonly
+                lef write {lef_file}
                 """
             )
         )
@@ -176,9 +180,9 @@ def gds_lef_analog_example(tmp_path_factory: pytest.TempPathFactory):
         str(lef_file),
         "TEST_analog_example",
         "met4",
-        "100 500 250 22076",
+        "{100 500 250 22076}",
         "met4",
-        "4900 500 5050 22076",
+        "{4900 500 5050 22076}",
     )
     return str(gds_file), str(lef_file)
 
@@ -196,9 +200,9 @@ def gds_lef_analog_wrong_vgnd(tmp_path_factory: pytest.TempPathFactory):
         str(lef_file),
         "TEST_analog_wrong_vgnd",
         "met4",
-        "100 500 250 22076",
+        "{100 500 250 22076}",
         "met3",
-        "4900 500 5250 12076",
+        "{4900 500 5250 12076}",
     )
     return str(gds_file), str(lef_file)
 
@@ -216,9 +220,29 @@ def gds_lef_analog_overlapping_vgnd(tmp_path_factory: pytest.TempPathFactory):
         str(lef_file),
         "TEST_analog_overlapping_vgnd",
         "met4",
-        "100 500 250 22076",
+        "{100 500 250 22076}",
         "met4",
-        "349 20 549 22504",
+        "{349 20 549 22504}",
+    )
+    return str(gds_file), str(lef_file)
+
+
+@pytest.fixture(scope="session")
+def gds_lef_analog_compound_vgnd(tmp_path_factory: pytest.TempPathFactory):
+    """Creates a GDS and LEF using the 1x2 analog template, with VGND consisting of two rectangles."""
+    tcl_file = tmp_path_factory.mktemp("tcl") / "TEST_analog_example.tcl"
+    gds_file = tmp_path_factory.mktemp("gds") / "TEST_analog_example.gds"
+    lef_file = tmp_path_factory.mktemp("lef") / "TEST_analog_example.lef"
+
+    generate_analog_example(
+        str(tcl_file),
+        str(gds_file),
+        str(lef_file),
+        "TEST_analog_compound_vgnd",
+        "met4",
+        "{100 500 250 22076}",
+        "met4",
+        "{4900 500 5050 12076} {4900 12000 5050 22076}",
     )
     return str(gds_file), str(lef_file)
 
@@ -322,3 +346,13 @@ def test_pin_analog_overlapping_vgnd(gds_lef_analog_overlapping_vgnd: tuple[str,
             "../def/analog/tt_block_1x2_pg_ana.def",
             "TEST_analog_overlapping_vgnd",
         )
+
+
+def test_pin_analog_compound_vgnd(gds_lef_analog_compound_vgnd: tuple[str, str]):
+    gds_file, lef_file = gds_lef_analog_compound_vgnd
+    precheck.pin_check(
+        gds_file,
+        lef_file,
+        "../def/analog/tt_block_1x2_pg_ana.def",
+        "TEST_analog_compound_vgnd",
+    )