feat: update project tt_um_petersn_micro1 from petersn/tt06-submission

Commit: cc90c612d334d0ee6b9ec8524439db7ac435a0bd Workflow: https://github.com/petersn/tt06-submission/actions/runs/8758277739
TinyTapeout · Apr 19, 2024 · aa835b7 · aa835b7
1 parent e9059b8
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diff --git a/projects/tt_um_petersn_micro1/commit_id.json b/projects/tt_um_petersn_micro1/commit_id.json
@@ -1,8 +1,8 @@
 {
   "app": "Tiny Tapeout tt06 7f56a586",
   "repo": "https://github.com/petersn/tt06-submission",
-  "commit": "ea482afd04b97f92b3ad11bed69534565140e62f",
-  "workflow_url": "https://github.com/petersn/tt06-submission/actions/runs/8757795115",
+  "commit": "cc90c612d334d0ee6b9ec8524439db7ac435a0bd",
+  "workflow_url": "https://github.com/petersn/tt06-submission/actions/runs/8758277739",
   "sort_id": 1713552037123,
   "openlane_version": "OpenLane eaba5192c45aa333ab45216ce1773d75d539e9b3",
   "pdk_version": "open_pdks cd1748bb197f9b7af62a54507de6624e30363943"

diff --git a/projects/tt_um_petersn_micro1/stats/metrics.csv b/projects/tt_um_petersn_micro1/stats/metrics.csv
@@ -1,2 +1,2 @@
 design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY
-/work/src,tt_um_petersn_micro1,wokwi,flow completed,0h22m38s0ms,0h17m10s0ms,99327.16912127253,0.31113340159999997,49663.58456063626,47.9,53.7575,1156.72,13460,0,0,0,0,0,0,0,30,23,0,-1,-1,522716,107008,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,370846574.0,0.0,55.47,40.27,27.02,4.79,-1,12879,15702,255,2918,0,0,0,14909,131,6,213,1442,3915,1142,292,2412,2228,2221,35,13240,4399,164,6796,15452,40051,302420.04480000003,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,153.18,153.6,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0
+/work/src,tt_um_petersn_micro1,wokwi,flow completed,0h22m35s0ms,0h17m15s0ms,98170.1091651614,0.31113340159999997,49085.0545825807,47.36,53.325100000000006,1150.54,13275,0,0,0,0,0,0,0,35,24,0,-1,-1,536664,107469,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,386614893.0,0.0,57.51,38.45,30.59,4.47,-1,12874,15697,256,2919,0,0,0,14903,121,6,222,1423,3912,1164,253,2413,2228,2221,36,13189,4399,202,6793,15272,39855,302420.04480000003,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,153.18,153.6,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0
diff --git a/projects/tt_um_petersn_micro1/stats/synthesis-stats.txt b/projects/tt_um_petersn_micro1/stats/synthesis-stats.txt
@@ -3,88 +3,86 @@
 
 === tt_um_petersn_micro1 ===
 
-   Number of wires:              13444
-   Number of wire bits:          13479
+   Number of wires:              13259
+   Number of wire bits:          13294
    Number of public wires:        2209
    Number of public wire bits:    2244
    Number of memories:               0
    Number of memory bits:            0
    Number of processes:              0
-   Number of cells:              13460
-     sky130_fd_sc_hd__a2111o_2       3
-     sky130_fd_sc_hd__a2111oi_2      1
-     sky130_fd_sc_hd__a211o_2      139
-     sky130_fd_sc_hd__a211oi_2      11
-     sky130_fd_sc_hd__a21bo_2       47
-     sky130_fd_sc_hd__a21boi_2      13
-     sky130_fd_sc_hd__a21o_2       211
-     sky130_fd_sc_hd__a21oi_2      166
-     sky130_fd_sc_hd__a221o_2      138
+   Number of cells:              13275
+     sky130_fd_sc_hd__a2111o_2       5
+     sky130_fd_sc_hd__a2111oi_2      3
+     sky130_fd_sc_hd__a211o_2      144
+     sky130_fd_sc_hd__a211oi_2      19
+     sky130_fd_sc_hd__a21bo_2       41
+     sky130_fd_sc_hd__a21boi_2      21
+     sky130_fd_sc_hd__a21o_2       189
+     sky130_fd_sc_hd__a21oi_2      172
+     sky130_fd_sc_hd__a221o_2      151
      sky130_fd_sc_hd__a221oi_2       4
-     sky130_fd_sc_hd__a22o_2       210
-     sky130_fd_sc_hd__a22oi_2        7
-     sky130_fd_sc_hd__a2bb2o_2      51
-     sky130_fd_sc_hd__a2bb2oi_2      3
-     sky130_fd_sc_hd__a311o_2       21
-     sky130_fd_sc_hd__a31o_2       132
-     sky130_fd_sc_hd__a31oi_2        9
-     sky130_fd_sc_hd__a32o_2        48
-     sky130_fd_sc_hd__a32oi_2        3
-     sky130_fd_sc_hd__a41o_2         6
-     sky130_fd_sc_hd__and2_2       217
-     sky130_fd_sc_hd__and2b_2       84
-     sky130_fd_sc_hd__and3_2       208
-     sky130_fd_sc_hd__and3b_2       36
+     sky130_fd_sc_hd__a22o_2       171
+     sky130_fd_sc_hd__a22oi_2       13
+     sky130_fd_sc_hd__a2bb2o_2      54
+     sky130_fd_sc_hd__a2bb2oi_2      1
+     sky130_fd_sc_hd__a311o_2       24
+     sky130_fd_sc_hd__a31o_2       108
+     sky130_fd_sc_hd__a31oi_2        5
+     sky130_fd_sc_hd__a32o_2        47
+     sky130_fd_sc_hd__a41o_2         5
+     sky130_fd_sc_hd__and2_2       202
+     sky130_fd_sc_hd__and2b_2       63
+     sky130_fd_sc_hd__and3_2       194
+     sky130_fd_sc_hd__and3b_2       24
      sky130_fd_sc_hd__and4_2        20
-     sky130_fd_sc_hd__and4b_2       13
-     sky130_fd_sc_hd__and4bb_2       9
-     sky130_fd_sc_hd__buf_1       2955
+     sky130_fd_sc_hd__and4b_2        6
+     sky130_fd_sc_hd__and4bb_2       5
+     sky130_fd_sc_hd__buf_1       2916
      sky130_fd_sc_hd__buf_2          6
      sky130_fd_sc_hd__conb_1         2
      sky130_fd_sc_hd__dfxtp_2     2217
-     sky130_fd_sc_hd__inv_2        261
-     sky130_fd_sc_hd__mux2_2      2613
-     sky130_fd_sc_hd__mux4_2       203
-     sky130_fd_sc_hd__nand2_2      508
-     sky130_fd_sc_hd__nand2b_2       4
-     sky130_fd_sc_hd__nand3_2       50
-     sky130_fd_sc_hd__nand3b_2       5
-     sky130_fd_sc_hd__nand4_2       10
+     sky130_fd_sc_hd__inv_2        251
+     sky130_fd_sc_hd__mux2_2      2457
+     sky130_fd_sc_hd__mux4_2       236
+     sky130_fd_sc_hd__nand2_2      494
+     sky130_fd_sc_hd__nand2b_2       3
+     sky130_fd_sc_hd__nand3_2       41
+     sky130_fd_sc_hd__nand3b_2       6
+     sky130_fd_sc_hd__nand4_2        7
      sky130_fd_sc_hd__nand4b_2       2
-     sky130_fd_sc_hd__nor2_2       444
-     sky130_fd_sc_hd__nor2b_2        3
-     sky130_fd_sc_hd__nor3_2        18
-     sky130_fd_sc_hd__nor3b_2       11
-     sky130_fd_sc_hd__nor4_2        13
-     sky130_fd_sc_hd__o2111a_2       3
-     sky130_fd_sc_hd__o211a_2       87
-     sky130_fd_sc_hd__o211ai_2      17
-     sky130_fd_sc_hd__o21a_2       166
+     sky130_fd_sc_hd__nor2_2       474
+     sky130_fd_sc_hd__nor2b_2        4
+     sky130_fd_sc_hd__nor3_2        31
+     sky130_fd_sc_hd__nor3b_2        4
+     sky130_fd_sc_hd__nor4_2         8
+     sky130_fd_sc_hd__nor4b_2        1
+     sky130_fd_sc_hd__o2111a_2       2
+     sky130_fd_sc_hd__o211a_2      120
+     sky130_fd_sc_hd__o211ai_2      11
+     sky130_fd_sc_hd__o21a_2       159
      sky130_fd_sc_hd__o21ai_2      142
-     sky130_fd_sc_hd__o21ba_2       35
-     sky130_fd_sc_hd__o21bai_2      10
-     sky130_fd_sc_hd__o221a_2      142
-     sky130_fd_sc_hd__o221ai_2       4
-     sky130_fd_sc_hd__o22a_2       116
-     sky130_fd_sc_hd__o22ai_2       11
-     sky130_fd_sc_hd__o2bb2a_2      54
+     sky130_fd_sc_hd__o21ba_2       37
+     sky130_fd_sc_hd__o21bai_2      14
+     sky130_fd_sc_hd__o221a_2      146
+     sky130_fd_sc_hd__o221ai_2       9
+     sky130_fd_sc_hd__o22a_2       125
+     sky130_fd_sc_hd__o22ai_2       12
+     sky130_fd_sc_hd__o2bb2a_2      42
      sky130_fd_sc_hd__o2bb2ai_2      4
-     sky130_fd_sc_hd__o311a_2       11
-     sky130_fd_sc_hd__o31a_2        45
-     sky130_fd_sc_hd__o31ai_2        5
-     sky130_fd_sc_hd__o32a_2        10
-     sky130_fd_sc_hd__o32ai_2        2
-     sky130_fd_sc_hd__o41a_2         3
+     sky130_fd_sc_hd__o311a_2       22
+     sky130_fd_sc_hd__o31a_2        35
+     sky130_fd_sc_hd__o31ai_2        8
+     sky130_fd_sc_hd__o32a_2        14
      sky130_fd_sc_hd__o41ai_2        1
-     sky130_fd_sc_hd__or2_2        442
-     sky130_fd_sc_hd__or2b_2        49
-     sky130_fd_sc_hd__or3_2        140
-     sky130_fd_sc_hd__or3b_2        47
-     sky130_fd_sc_hd__or4_2        162
-     sky130_fd_sc_hd__or4b_2        30
+     sky130_fd_sc_hd__or2_2        491
+     sky130_fd_sc_hd__or2b_2        56
+     sky130_fd_sc_hd__or3_2        158
+     sky130_fd_sc_hd__or3b_2        43
+     sky130_fd_sc_hd__or4_2        180
+     sky130_fd_sc_hd__or4b_2        26
      sky130_fd_sc_hd__or4bb_2        8
-     sky130_fd_sc_hd__xnor2_2      361
-     sky130_fd_sc_hd__xor2_2       218
+     sky130_fd_sc_hd__xnor2_2      352
+     sky130_fd_sc_hd__xor2_2       207
 
-   Chip area for module '\tt_um_petersn_micro1': 141939.881600
+   Chip area for module '\tt_um_petersn_micro1': 140333.340800
 
diff --git a/projects/tt_um_petersn_micro1/tt_um_petersn_micro1.gds b/projects/tt_um_petersn_micro1/tt_um_petersn_micro1.gds
diff --git a/projects/tt_um_petersn_micro1/tt_um_petersn_micro1.lef b/projects/tt_um_petersn_micro1/tt_um_petersn_micro1.lef
@@ -91,7 +91,6 @@ MACRO tt_um_petersn_micro1
     DIRECTION INPUT ;
     USE SIGNAL ;
     ANTENNAGATEAREA 0.852000 ;
-    ANTENNADIFFAREA 0.434700 ;
     PORT
       LAYER met4 ;
         RECT 154.870 224.760 155.170 225.760 ;
@@ -100,7 +99,7 @@ MACRO tt_um_petersn_micro1
   PIN ena
     DIRECTION INPUT ;
     USE SIGNAL ;
-    ANTENNAGATEAREA 0.852000 ;
+    ANTENNAGATEAREA 0.990000 ;
     PORT
       LAYER met4 ;
         RECT 158.550 224.760 158.850 225.760 ;
@@ -109,7 +108,7 @@ MACRO tt_um_petersn_micro1
   PIN rst_n
     DIRECTION INPUT ;
     USE SIGNAL ;
-    ANTENNAGATEAREA 0.247500 ;
+    ANTENNAGATEAREA 0.852000 ;
     PORT
       LAYER met4 ;
         RECT 151.190 224.760 151.490 225.760 ;
@@ -118,7 +117,7 @@ MACRO tt_um_petersn_micro1
   PIN ui_in[0]
     DIRECTION INPUT ;
     USE SIGNAL ;
-    ANTENNAGATEAREA 0.742500 ;
+    ANTENNAGATEAREA 0.495000 ;
     PORT
       LAYER met4 ;
         RECT 147.510 224.760 147.810 225.760 ;
@@ -275,7 +274,7 @@ MACRO tt_um_petersn_micro1
   PIN uio_oe[2]
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
-    ANTENNAGATEAREA 0.285000 ;
+    ANTENNAGATEAREA 0.252000 ;
     ANTENNADIFFAREA 0.891000 ;
     PORT
       LAYER met4 ;
@@ -285,7 +284,7 @@ MACRO tt_um_petersn_micro1
   PIN uio_oe[3]
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
-    ANTENNAGATEAREA 0.285000 ;
+    ANTENNAGATEAREA 0.252000 ;
     ANTENNADIFFAREA 0.891000 ;
     PORT
       LAYER met4 ;
@@ -295,7 +294,7 @@ MACRO tt_um_petersn_micro1
   PIN uio_oe[4]
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
-    ANTENNAGATEAREA 0.285000 ;
+    ANTENNAGATEAREA 0.252000 ;
     ANTENNADIFFAREA 0.891000 ;
     PORT
       LAYER met4 ;
@@ -305,8 +304,8 @@ MACRO tt_um_petersn_micro1
   PIN uio_oe[5]
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
-    ANTENNAGATEAREA 0.285000 ;
-    ANTENNADIFFAREA 0.891000 ;
+    ANTENNAGATEAREA 0.373500 ;
+    ANTENNADIFFAREA 1.325700 ;
     PORT
       LAYER met4 ;
         RECT 11.350 224.760 11.650 225.760 ;
@@ -315,7 +314,7 @@ MACRO tt_um_petersn_micro1
   PIN uio_oe[6]
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
-    ANTENNAGATEAREA 0.285000 ;
+    ANTENNAGATEAREA 0.252000 ;
     ANTENNADIFFAREA 0.891000 ;
     PORT
       LAYER met4 ;
@@ -325,7 +324,7 @@ MACRO tt_um_petersn_micro1
   PIN uio_oe[7]
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
-    ANTENNAGATEAREA 0.285000 ;
+    ANTENNAGATEAREA 0.373500 ;
     ANTENNADIFFAREA 0.891000 ;
     PORT
       LAYER met4 ;
@@ -336,7 +335,7 @@ MACRO tt_um_petersn_micro1
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
     ANTENNAGATEAREA 0.126000 ;
-    ANTENNADIFFAREA 0.891000 ;
+    ANTENNADIFFAREA 0.445500 ;
     PORT
       LAYER met4 ;
         RECT 59.190 224.760 59.490 225.760 ;
@@ -366,7 +365,7 @@ MACRO tt_um_petersn_micro1
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
     ANTENNAGATEAREA 0.126000 ;
-    ANTENNADIFFAREA 0.445500 ;
+    ANTENNADIFFAREA 0.891000 ;
     PORT
       LAYER met4 ;
         RECT 48.150 224.760 48.450 225.760 ;
@@ -376,7 +375,7 @@ MACRO tt_um_petersn_micro1
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
     ANTENNAGATEAREA 0.126000 ;
-    ANTENNADIFFAREA 0.891000 ;
+    ANTENNADIFFAREA 0.445500 ;
     PORT
       LAYER met4 ;
         RECT 44.470 224.760 44.770 225.760 ;
@@ -385,7 +384,7 @@ MACRO tt_um_petersn_micro1
   PIN uio_out[5]
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
-    ANTENNAGATEAREA 0.126000 ;
+    ANTENNAGATEAREA 0.247500 ;
     ANTENNADIFFAREA 0.891000 ;
     PORT
       LAYER met4 ;
@@ -405,7 +404,7 @@ MACRO tt_um_petersn_micro1
   PIN uio_out[7]
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
-    ANTENNAGATEAREA 0.126000 ;
+    ANTENNAGATEAREA 0.247500 ;
     ANTENNADIFFAREA 0.891000 ;
     PORT
       LAYER met4 ;
@@ -415,7 +414,7 @@ MACRO tt_um_petersn_micro1
   PIN uo_out[0]
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
-    ANTENNADIFFAREA 2.673000 ;
+    ANTENNADIFFAREA 1.782000 ;
     PORT
       LAYER met4 ;
         RECT 88.630 224.760 88.930 225.760 ;
@@ -440,7 +439,7 @@ MACRO tt_um_petersn_micro1
   PIN uo_out[3]
     DIRECTION OUTPUT TRISTATE ;
     USE SIGNAL ;
-    ANTENNADIFFAREA 2.673000 ;
+    ANTENNADIFFAREA 0.795200 ;
     PORT
       LAYER met4 ;
         RECT 77.590 224.760 77.890 225.760 ;
@@ -528,11 +527,11 @@ MACRO tt_um_petersn_micro1
       LAYER li1 ;
         RECT 2.760 2.635 1375.400 223.125 ;
       LAYER met1 ;
-        RECT 2.760 2.480 1375.400 223.680 ;
+        RECT 2.760 0.380 1375.400 224.020 ;
       LAYER met2 ;
-        RECT 6.080 2.535 1365.180 224.925 ;
+        RECT 5.160 0.350 1325.450 224.925 ;
       LAYER met3 ;
-        RECT 3.950 2.555 1362.455 224.905 ;
+        RECT 3.950 2.555 1325.470 224.905 ;
       LAYER met4 ;
         RECT 4.690 224.360 7.270 224.905 ;
         RECT 8.370 224.360 10.950 224.905 ;
@@ -576,27 +575,25 @@ MACRO tt_um_petersn_micro1
         RECT 148.210 224.360 150.790 224.905 ;
         RECT 151.890 224.360 154.470 224.905 ;
         RECT 155.570 224.360 158.150 224.905 ;
-        RECT 159.250 224.360 1359.465 224.905 ;
-        RECT 3.975 223.680 1359.465 224.360 ;
-        RECT 3.975 19.895 17.880 223.680 ;
-        RECT 20.280 19.895 94.680 223.680 ;
-        RECT 97.080 19.895 171.480 223.680 ;
-        RECT 173.880 19.895 248.280 223.680 ;
-        RECT 250.680 19.895 325.080 223.680 ;
-        RECT 327.480 19.895 401.880 223.680 ;
-        RECT 404.280 19.895 478.680 223.680 ;
-        RECT 481.080 19.895 555.480 223.680 ;
-        RECT 557.880 19.895 632.280 223.680 ;
-        RECT 634.680 19.895 709.080 223.680 ;
-        RECT 711.480 19.895 785.880 223.680 ;
-        RECT 788.280 19.895 862.680 223.680 ;
-        RECT 865.080 19.895 939.480 223.680 ;
-        RECT 941.880 19.895 1016.280 223.680 ;
-        RECT 1018.680 19.895 1093.080 223.680 ;
-        RECT 1095.480 19.895 1169.880 223.680 ;
-        RECT 1172.280 19.895 1246.680 223.680 ;
-        RECT 1249.080 19.895 1323.480 223.680 ;
-        RECT 1325.880 19.895 1359.465 223.680 ;
+        RECT 159.250 224.360 1215.025 224.905 ;
+        RECT 3.975 223.680 1215.025 224.360 ;
+        RECT 3.975 3.575 17.880 223.680 ;
+        RECT 20.280 3.575 94.680 223.680 ;
+        RECT 97.080 3.575 171.480 223.680 ;
+        RECT 173.880 3.575 248.280 223.680 ;
+        RECT 250.680 3.575 325.080 223.680 ;
+        RECT 327.480 3.575 401.880 223.680 ;
+        RECT 404.280 3.575 478.680 223.680 ;
+        RECT 481.080 3.575 555.480 223.680 ;
+        RECT 557.880 3.575 632.280 223.680 ;
+        RECT 634.680 3.575 709.080 223.680 ;
+        RECT 711.480 3.575 785.880 223.680 ;
+        RECT 788.280 3.575 862.680 223.680 ;
+        RECT 865.080 3.575 939.480 223.680 ;
+        RECT 941.880 3.575 1016.280 223.680 ;
+        RECT 1018.680 3.575 1093.080 223.680 ;
+        RECT 1095.480 3.575 1169.880 223.680 ;
+        RECT 1172.280 3.575 1215.025 223.680 ;
   END
 END tt_um_petersn_micro1
 END LIBRARY