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docs(tt_um_gray_sobel): update docs (#537)
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DianaNatali authored Oct 17, 2024
1 parent 346ba7b commit 2b5406c
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4 changes: 2 additions & 2 deletions projects/tt_um_gray_sobel/info.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@ project:
title: "Gray scale and Sobel filter" # Project title
author: "Diana Natali Maldonado Ramirez" # Your name
discord: "diana_06297" # Your discord username, for communication and automatically assigning you a Tapeout role (optional)
description: "It takes an image, converts it to grayscale, and then applies an edge detection algorithm." # One line description of what your project does
description: "This project performs grayscale conversion and Sobel filtering with the aim of detecting edges in an image." # One line description of what your project does
language: "Verilog" # other examples include SystemVerilog, Amaranth, VHDL, etc
clock_hz: 10000000 # Clock frequency in Hz (or 0 if not applicable)

Expand Down Expand Up @@ -59,4 +59,4 @@ pinout:
uio[7]: ""

# Do not change!
yaml_version: 6
yaml_version: 6

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