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tb.v
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tb.v
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`default_nettype none
`timescale 1ns / 1ps
/* This testbench just instantiates the module and makes some convenient wires
that can be driven / tested by the cocotb test.py.
*/
module tb ();
// Dump the signals to a VCD file. You can view it with gtkwave.
initial begin
$dumpfile("tb.vcd");
$dumpvars(0, tb);
#1;
end
// Wire up the inputs and outputs:
reg clk;
reg rst_n;
reg [7:0] ui_in;
wire [7:0] uo_out;
// Replace tt_um_micro_test with your module name:
tt_um_micro_whackamole_sda user_project (
// Include power ports for the Gate Level test:
`ifdef GL_TEST
.VPWR(1'b1),
.VGND(1'b0),
`endif
.ui_in (ui_in), // Dedicated inputs
.uo_out (uo_out), // Dedicated outputs
.clk (clk), // clock
.rst_n (rst_n) // not reset
);
endmodule