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test-i386.c
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test-i386.c
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/*
* x86 CPU test
*
* Copyright (c) 2003 Fabrice Bellard
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#define _GNU_SOURCE
#include "compiler.h"
#include <assert.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <inttypes.h>
#include <math.h>
#include <signal.h>
#include <setjmp.h>
#include <errno.h>
#include <sys/ucontext.h>
#include <sys/mman.h>
#include <sys/user.h>
#if !defined(__x86_64__)
#define TEST_VM86
#define TEST_SEGS
#endif
//#define LINUX_VM86_IOPL_FIX
//#define TEST_P4_FLAGS
//#ifdef __SSE__
#if 1
#define TEST_SSE
#define TEST_CMOV 1
#define TEST_FCOMI 1
#else
#undef TEST_SSE
#define TEST_CMOV 1
#define TEST_FCOMI 1
#endif
#if defined(__x86_64__)
#define FMT64X "%016lx"
#define FMTLX "%016lx"
#define X86_64_ONLY(x) x
#else
#define FMT64X "%016" PRIx64
#define FMTLX "%08lx"
#define X86_64_ONLY(x)
#endif
#ifdef TEST_VM86
#include <asm/vm86.h>
#endif
#define xglue(x, y) x ## y
#define glue(x, y) xglue(x, y)
#define stringify(s) tostring(s)
#define tostring(s) #s
#define UNUSED(s) (void)(s)
#define CC_C 0x0001
#define CC_P 0x0004
#define CC_A 0x0010
#define CC_Z 0x0040
#define CC_S 0x0080
#define CC_O 0x0800
#define __init_call __attribute__ ((unused,__section__ ("initcall")))
#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
#if defined(__x86_64__)
static inline long i2l(long v)
{
return v | ((v ^ 0xabcd) << 32);
}
#else
static inline long i2l(long v)
{
return v;
}
#endif
#define OP add
#include "test-i386.h"
#define OP sub
#include "test-i386.h"
#define OP xor
#include "test-i386.h"
#define OP and
#include "test-i386.h"
#define OP or
#include "test-i386.h"
#define OP cmp
#include "test-i386.h"
#define OP adc
#define OP_CC
#include "test-i386.h"
#define OP sbb
#define OP_CC
#include "test-i386.h"
#define OP inc
#define OP_CC
#define OP1
#include "test-i386.h"
#define OP dec
#define OP_CC
#define OP1
#include "test-i386.h"
#define OP neg
#define OP_CC
#define OP1
#include "test-i386.h"
#define OP not
#define OP_CC
#define OP1
#include "test-i386.h"
#undef CC_MASK
#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
#define OP shl
#include "test-i386-shift.h"
#define OP shr
#include "test-i386-shift.h"
#define OP sar
#include "test-i386-shift.h"
#define OP rol
#include "test-i386-shift.h"
#define OP ror
#include "test-i386-shift.h"
#define OP rcr
#define OP_CC
#include "test-i386-shift.h"
#define OP rcl
#define OP_CC
#include "test-i386-shift.h"
#define OP shld
#define OP_SHIFTD
#define OP_NOBYTE
#include "test-i386-shift.h"
#define OP shrd
#define OP_SHIFTD
#define OP_NOBYTE
#include "test-i386-shift.h"
/* XXX: should be more precise ? */
#undef CC_MASK
#define CC_MASK (CC_C)
#define OP bt
#define OP_NOBYTE
#include "test-i386-shift.h"
#define OP bts
#define OP_NOBYTE
#include "test-i386-shift.h"
#define OP btr
#define OP_NOBYTE
#include "test-i386-shift.h"
#define OP btc
#define OP_NOBYTE
#include "test-i386-shift.h"
/* lea test (modrm support) */
#define TEST_LEAQ(STR)\
{\
asm("lea " STR ", %0"\
: "=r" (res)\
: "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
printf("lea %s = " FMTLX "\n", STR, res);\
}
#define TEST_LEA(STR)\
{\
asm("lea " STR ", %0"\
: "=r" (res)\
: "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
printf("lea %s = " FMTLX "\n", STR, res);\
}
#define TEST_LEA16(STR)\
{\
asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
: "=r" (res)\
: "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
printf("lea %s = %08lx\n", STR, res);\
}
void test_lea(void)
{
long eax, ebx, ecx, edx, esi, edi, res;
eax = i2l(0x0001);
ebx = i2l(0x0002);
ecx = i2l(0x0004);
edx = i2l(0x0008);
esi = i2l(0x0010);
edi = i2l(0x0020);
TEST_LEA("0x4000");
TEST_LEA("(%%eax)");
TEST_LEA("(%%ebx)");
TEST_LEA("(%%ecx)");
TEST_LEA("(%%edx)");
TEST_LEA("(%%esi)");
TEST_LEA("(%%edi)");
TEST_LEA("0x40(%%eax)");
TEST_LEA("0x40(%%ebx)");
TEST_LEA("0x40(%%ecx)");
TEST_LEA("0x40(%%edx)");
TEST_LEA("0x40(%%esi)");
TEST_LEA("0x40(%%edi)");
TEST_LEA("0x4000(%%eax)");
TEST_LEA("0x4000(%%ebx)");
TEST_LEA("0x4000(%%ecx)");
TEST_LEA("0x4000(%%edx)");
TEST_LEA("0x4000(%%esi)");
TEST_LEA("0x4000(%%edi)");
TEST_LEA("(%%eax, %%ecx)");
TEST_LEA("(%%ebx, %%edx)");
TEST_LEA("(%%ecx, %%ecx)");
TEST_LEA("(%%edx, %%ecx)");
TEST_LEA("(%%esi, %%ecx)");
TEST_LEA("(%%edi, %%ecx)");
TEST_LEA("0x40(%%eax, %%ecx)");
TEST_LEA("0x4000(%%ebx, %%edx)");
TEST_LEA("(%%ecx, %%ecx, 2)");
TEST_LEA("(%%edx, %%ecx, 4)");
TEST_LEA("(%%esi, %%ecx, 8)");
TEST_LEA("(,%%eax, 2)");
TEST_LEA("(,%%ebx, 4)");
TEST_LEA("(,%%ecx, 8)");
TEST_LEA("0x40(,%%eax, 2)");
TEST_LEA("0x40(,%%ebx, 4)");
TEST_LEA("0x40(,%%ecx, 8)");
TEST_LEA("-10(%%ecx, %%ecx, 2)");
TEST_LEA("-10(%%edx, %%ecx, 4)");
TEST_LEA("-10(%%esi, %%ecx, 8)");
TEST_LEA("0x4000(%%ecx, %%ecx, 2)");
TEST_LEA("0x4000(%%edx, %%ecx, 4)");
TEST_LEA("0x4000(%%esi, %%ecx, 8)");
#if defined(__x86_64__)
TEST_LEAQ("0x4000");
TEST_LEAQ("0x4000(%%rip)");
TEST_LEAQ("(%%rax)");
TEST_LEAQ("(%%rbx)");
TEST_LEAQ("(%%rcx)");
TEST_LEAQ("(%%rdx)");
TEST_LEAQ("(%%rsi)");
TEST_LEAQ("(%%rdi)");
TEST_LEAQ("0x40(%%rax)");
TEST_LEAQ("0x40(%%rbx)");
TEST_LEAQ("0x40(%%rcx)");
TEST_LEAQ("0x40(%%rdx)");
TEST_LEAQ("0x40(%%rsi)");
TEST_LEAQ("0x40(%%rdi)");
TEST_LEAQ("0x4000(%%rax)");
TEST_LEAQ("0x4000(%%rbx)");
TEST_LEAQ("0x4000(%%rcx)");
TEST_LEAQ("0x4000(%%rdx)");
TEST_LEAQ("0x4000(%%rsi)");
TEST_LEAQ("0x4000(%%rdi)");
TEST_LEAQ("(%%rax, %%rcx)");
TEST_LEAQ("(%%rbx, %%rdx)");
TEST_LEAQ("(%%rcx, %%rcx)");
TEST_LEAQ("(%%rdx, %%rcx)");
TEST_LEAQ("(%%rsi, %%rcx)");
TEST_LEAQ("(%%rdi, %%rcx)");
TEST_LEAQ("0x40(%%rax, %%rcx)");
TEST_LEAQ("0x4000(%%rbx, %%rdx)");
TEST_LEAQ("(%%rcx, %%rcx, 2)");
TEST_LEAQ("(%%rdx, %%rcx, 4)");
TEST_LEAQ("(%%rsi, %%rcx, 8)");
TEST_LEAQ("(,%%rax, 2)");
TEST_LEAQ("(,%%rbx, 4)");
TEST_LEAQ("(,%%rcx, 8)");
TEST_LEAQ("0x40(,%%rax, 2)");
TEST_LEAQ("0x40(,%%rbx, 4)");
TEST_LEAQ("0x40(,%%rcx, 8)");
TEST_LEAQ("-10(%%rcx, %%rcx, 2)");
TEST_LEAQ("-10(%%rdx, %%rcx, 4)");
TEST_LEAQ("-10(%%rsi, %%rcx, 8)");
TEST_LEAQ("0x4000(%%rcx, %%rcx, 2)");
TEST_LEAQ("0x4000(%%rdx, %%rcx, 4)");
TEST_LEAQ("0x4000(%%rsi, %%rcx, 8)");
#else
/* limited 16 bit addressing test */
TEST_LEA16("0x4000");
TEST_LEA16("(%%bx)");
TEST_LEA16("(%%si)");
TEST_LEA16("(%%di)");
TEST_LEA16("0x40(%%bx)");
TEST_LEA16("0x40(%%si)");
TEST_LEA16("0x40(%%di)");
TEST_LEA16("0x4000(%%bx)");
TEST_LEA16("0x4000(%%si)");
TEST_LEA16("(%%bx,%%si)");
TEST_LEA16("(%%bx,%%di)");
TEST_LEA16("0x40(%%bx,%%si)");
TEST_LEA16("0x40(%%bx,%%di)");
TEST_LEA16("0x4000(%%bx,%%si)");
TEST_LEA16("0x4000(%%bx,%%di)");
#endif
}
#define TEST_JCC(JCC, v1, v2)\
{\
int res;\
asm("movl $1, %0\n\t"\
"cmpl %2, %1\n\t"\
"j" JCC " 1f\n\t"\
"movl $0, %0\n\t"\
"1:\n\t"\
: "=r" (res)\
: "r" (v1), "r" (v2));\
printf("%-10s %d\n", "j" JCC, res);\
\
asm("movl $0, %0\n\t"\
"cmpl %2, %1\n\t"\
"set" JCC " %b0\n\t"\
: "=r" (res)\
: "r" (v1), "r" (v2));\
printf("%-10s %d\n", "set" JCC, res);\
if (TEST_CMOV) {\
long val = i2l(1);\
long res = i2l(0x12345678);\
X86_64_ONLY(\
asm("cmpl %2, %1\n\t"\
"cmov" JCC "q %3, %0\n\t"\
: "=r" (res)\
: "r" (v1), "r" (v2), "m" (val), "0" (res));\
printf("%-10s R=" FMTLX "\n", "cmov" JCC "q", res);)\
asm("cmpl %2, %1\n\t"\
"cmov" JCC "l %k3, %k0\n\t"\
: "=r" (res)\
: "r" (v1), "r" (v2), "m" (val), "0" (res));\
printf("%-10s R=" FMTLX "\n", "cmov" JCC "l", res);\
asm("cmpl %2, %1\n\t"\
"cmov" JCC "w %w3, %w0\n\t"\
: "=r" (res)\
: "r" (v1), "r" (v2), "r" (1), "0" (res));\
printf("%-10s R=" FMTLX "\n", "cmov" JCC "w", res);\
} \
}
/* various jump tests */
void test_jcc(void)
{
TEST_JCC("ne", 1, 1);
TEST_JCC("ne", 1, 0);
TEST_JCC("e", 1, 1);
TEST_JCC("e", 1, 0);
TEST_JCC("l", 1, 1);
TEST_JCC("l", 1, 0);
TEST_JCC("l", 1, -1);
TEST_JCC("le", 1, 1);
TEST_JCC("le", 1, 0);
TEST_JCC("le", 1, -1);
TEST_JCC("ge", 1, 1);
TEST_JCC("ge", 1, 0);
TEST_JCC("ge", -1, 1);
TEST_JCC("g", 1, 1);
TEST_JCC("g", 1, 0);
TEST_JCC("g", 1, -1);
TEST_JCC("b", 1, 1);
TEST_JCC("b", 1, 0);
TEST_JCC("b", 1, -1);
TEST_JCC("be", 1, 1);
TEST_JCC("be", 1, 0);
TEST_JCC("be", 1, -1);
TEST_JCC("ae", 1, 1);
TEST_JCC("ae", 1, 0);
TEST_JCC("ae", 1, -1);
TEST_JCC("a", 1, 1);
TEST_JCC("a", 1, 0);
TEST_JCC("a", 1, -1);
TEST_JCC("p", 1, 1);
TEST_JCC("p", 1, 0);
TEST_JCC("np", 1, 1);
TEST_JCC("np", 1, 0);
TEST_JCC("o", 0x7fffffff, 0);
TEST_JCC("o", 0x7fffffff, -1);
TEST_JCC("no", 0x7fffffff, 0);
TEST_JCC("no", 0x7fffffff, -1);
TEST_JCC("s", 0, 1);
TEST_JCC("s", 0, -1);
TEST_JCC("s", 0, 0);
TEST_JCC("ns", 0, 1);
TEST_JCC("ns", 0, -1);
TEST_JCC("ns", 0, 0);
}
#define TEST_LOOP(insn) \
{\
for(i = 0; i < sizeof(ecx_vals) / sizeof(long); i++) {\
ecx = ecx_vals[i];\
for(zf = 0; zf < 2; zf++) {\
asm("test %2, %2\n\t"\
"movl $1, %0\n\t"\
insn " 1f\n\t" \
"movl $0, %0\n\t"\
"1:\n\t"\
: "=a" (res)\
: "c" (ecx), "b" (!zf)); \
printf("%-10s ECX=" FMTLX " ZF=%ld r=%d\n", insn, ecx, zf, res); \
}\
}\
}
void test_loop(void)
{
long ecx, zf;
const long ecx_vals[] = {
0,
1,
0x10000,
0x10001,
#if defined(__x86_64__)
0x100000000L,
0x100000001L,
#endif
};
int i, res;
#if !defined(__x86_64__)
TEST_LOOP("jcxz");
TEST_LOOP("loopw");
TEST_LOOP("loopzw");
TEST_LOOP("loopnzw");
#endif
TEST_LOOP("jecxz");
TEST_LOOP("loopl");
TEST_LOOP("loopzl");
TEST_LOOP("loopnzl");
}
#undef CC_MASK
#ifdef TEST_P4_FLAGS
#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
#else
#define CC_MASK (CC_O | CC_C)
#endif
#define OP mul
#include "test-i386-muldiv.h"
#define OP imul
#include "test-i386-muldiv.h"
void test_imulw2(long op0, long op1)
{
long res, s1, s0, flags;
s0 = op0;
s1 = op1;
res = s0;
flags = 0;
asm volatile ("push %4\n\t"
"popf\n\t"
"imulw %w2, %w0\n\t"
"pushf\n\t"
"pop %1\n\t"
: "=q" (res), "=g" (flags)
: "q" (s1), "0" (res), "1" (flags));
printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
"imulw", s0, s1, res, flags & CC_MASK);
}
void test_imull2(long op0, long op1)
{
long res, s1, s0, flags;
s0 = op0;
s1 = op1;
res = s0;
flags = 0;
asm volatile ("push %4\n\t"
"popf\n\t"
"imull %k2, %k0\n\t"
"pushf\n\t"
"pop %1\n\t"
: "=q" (res), "=g" (flags)
: "q" (s1), "0" (res), "1" (flags));
printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
"imull", s0, s1, res, flags & CC_MASK);
}
#if defined(__x86_64__)
void test_imulq2(long op0, long op1)
{
long res, s1, s0, flags;
s0 = op0;
s1 = op1;
res = s0;
flags = 0;
asm volatile ("push %4\n\t"
"popf\n\t"
"imulq %2, %0\n\t"
"pushf\n\t"
"pop %1\n\t"
: "=q" (res), "=g" (flags)
: "q" (s1), "0" (res), "1" (flags));
printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
"imulq", s0, s1, res, flags & CC_MASK);
}
#endif
#define TEST_IMUL_IM(size, rsize, op0, op1)\
{\
long res, flags, s1;\
flags = 0;\
res = 0;\
s1 = op1;\
asm volatile ("push %3\n\t"\
"popf\n\t"\
"imul" size " $" #op0 ", %" rsize "2, %" rsize "0\n\t" \
"pushf\n\t"\
"pop %1\n\t"\
: "=r" (res), "=g" (flags)\
: "r" (s1), "1" (flags), "0" (res));\
printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",\
"imul" size " im", (long)op0, (long)op1, res, flags & CC_MASK);\
}
#undef CC_MASK
#define CC_MASK (0)
#define OP div
#include "test-i386-muldiv.h"
#define OP idiv
#include "test-i386-muldiv.h"
void test_mul(void)
{
test_imulb(0x1234561d, 4);
test_imulb(3, -4);
test_imulb(0x80, 0x80);
test_imulb(0x10, 0x10);
test_imulw(0, 0x1234001d, 45);
test_imulw(0, 23, -45);
test_imulw(0, 0x8000, 0x8000);
test_imulw(0, 0x100, 0x100);
test_imull(0, 0x1234001d, 45);
test_imull(0, 23, -45);
test_imull(0, 0x80000000, 0x80000000);
test_imull(0, 0x10000, 0x10000);
test_mulb(0x1234561d, 4);
test_mulb(3, -4);
test_mulb(0x80, 0x80);
test_mulb(0x10, 0x10);
test_mulw(0, 0x1234001d, 45);
test_mulw(0, 23, -45);
test_mulw(0, 0x8000, 0x8000);
test_mulw(0, 0x100, 0x100);
test_mull(0, 0x1234001d, 45);
test_mull(0, 23, -45);
test_mull(0, 0x80000000, 0x80000000);
test_mull(0, 0x10000, 0x10000);
test_mull(0, 0xffffffff, 0xffffffff);
test_mull(0, 0xfffffffe, 0xffffffff);
test_mull(0, 0xffffffff, 0xfffffffe);
test_mull(0, 0xffffffff, 0);
test_mull(0, 0xffffffff, 1);
test_mull(0, 0xffffffff, 2);
test_mull(0, 0xffffffff, 3);
test_mull(0, 0, 0xffffffff);
test_mull(0, 1, 0xffffffff);
test_mull(0, 2, 0xffffffff);
test_mull(0, 3, 0xffffffff);
test_imulw2(0x1234001d, 45);
test_imulw2(23, -45);
test_imulw2(0x8000, 0x8000);
test_imulw2(0x100, 0x100);
test_imull2(0x1234001d, 45);
test_imull2(23, -45);
test_imull2(0x80000000, 0x80000000);
test_imull2(0x10000, 0x10000);
TEST_IMUL_IM("w", "w", 45, 0x1234);
TEST_IMUL_IM("w", "w", -45, 23);
TEST_IMUL_IM("w", "w", 0x8000, 0x80000000);
TEST_IMUL_IM("w", "w", 0x7fff, 0x1000);
TEST_IMUL_IM("l", "k", 45, 0x1234);
TEST_IMUL_IM("l", "k", -45, 23);
TEST_IMUL_IM("l", "k", 0x8000, 0x80000000);
TEST_IMUL_IM("l", "k", 0x7fff, 0x1000);
test_idivb(0x12341678, 0x127e);
test_idivb(0x43210123, -5);
test_idivb(0x12340004, -1);
test_idivb(-20, 3);
test_idivb(20, -3);
test_idivb(-20, -3);
test_idivw(0, 0x12345678, 12347);
test_idivw(0, -23223, -45);
test_idivw(0, 0x12348000, -1);
test_idivw(0x12343, 0x12345678, 0x81238567);
test_idivw(-20, 0, 300);
test_idivw(20, 0, -300);
test_idivw(-20, 0, -300);
test_idivl(0, 0x12345678, 12347);
test_idivl(0, -233223, -45);
test_idivl(0, 0x80000000, -1);
test_idivl(0x12343, 0x12345678, 0x81234567);
test_divb(0x12341678, 0x127e);
test_divb(0x43210123, -5);
test_divb(0x12340004, -1);
test_divw(0, 0x12345678, 12347);
test_divw(0, -23223, -45);
test_divw(0, 0x12348000, -1);
test_divw(0x12343, 0x12345678, 0x81238567);
test_divl(0, 0x12345678, 12347);
test_divl(0, -233223, -45);
test_divl(0, 0x80000000, -1);
test_divl(0x12343, 0x12345678, 0x81234567);
test_divl(0xfffffffe, 0xffffffff, 0xffffffff);
test_divl(0xffffffe, 0xffffffff, 0xfffffff);
test_divl(0xfffffe, 0xffffffff, 0xffffff);
test_divl(0xffffe, 0xffffffff, 0xfffff);
test_divl(0xfffe, 0xffffffff, 0xffff);
test_divl(0xffe, 0xffffffff, 0xfff);
test_divl(0xfe, 0xffffffff, 0xff);
test_divl(0xe, 0xffffffff, 0xf);
test_divl(0x7ffffffe, 0xffffffff, 0x7fffffff);
test_divl(0x7fffffe, 0xffffffff, 0x7ffffff);
test_divl(0x7ffffe, 0xffffffff, 0x7fffff);
test_divl(0x7fffe, 0xffffffff, 0x7ffff);
test_divl(0x7ffe, 0xffffffff, 0x7fff);
test_divl(0x7fe, 0xffffffff, 0x7ff);
test_divl(0x7e, 0xffffffff, 0x7f);
test_divl(0x3ffffffe, 0xffffffff, 0x3fffffff);
test_divl(0x3fffffe, 0xffffffff, 0x3ffffff);
test_divl(0x3ffffe, 0xffffffff, 0x3fffff);
test_divl(0x3fffe, 0xffffffff, 0x3ffff);
test_divl(0x3ffe, 0xffffffff, 0x3fff);
test_divl(0x3fe, 0xffffffff, 0x3ff);
test_divl(0x3e, 0xffffffff, 0x3f);
test_divl(0x1ffffffe, 0xffffffff, 0x1fffffff);
test_divl(0x1fffffe, 0xffffffff, 0x1ffffff);
test_divl(0x1ffffe, 0xffffffff, 0x1fffff);
test_divl(0x1fffe, 0xffffffff, 0x1ffff);
test_divl(0x1ffe, 0xffffffff, 0x1fff);
test_divl(0x1fe, 0xffffffff, 0x1ff);
test_divl(0x1e, 0xffffffff, 0x1f);
int i;
for(i = 0; i < 16; i++)
{
test_divl(0, 0xfffffffe, i + 1);
test_divl(0, 0xffffffff, i + 1);
test_divl(1, 0xfffffffe, i + 2);
test_divl(1, 0xffffffff, i + 2);
test_divl(2, 0xfffffffe, i + 3);
test_divl(2, 0xffffffff, i + 3);
test_divl(3, 0xfffffffe, i + 4);
test_divl(3, 0xffffffff, i + 4);
test_divl(4, 0xfffffffe, i + 5);
test_divl(4, 0xffffffff, i + 5);
test_divl(0xfffffffd, 0x00000000 + i, 0xfffffffe);
test_divl(0xfffffffd, 0xfffffff0 + i, 0xfffffffe);
test_divl(0xfffffffe, 0x00000000 + i, 0xffffffff);
test_divl(0xfffffffe, 0xfffffff0 + i, 0xffffffff);
test_divl(0, i, 0xfffffffa);
test_divl(0, i, 0xfffffffb);
test_divl(0, i, 0xfffffffc);
test_divl(0, i, 0xfffffffd);
test_divl(0, i, 0xfffffffe);
test_divl(0, i, 0xffffffff);
test_idivl(0, 1, i + 1);
test_idivl(-1, -1, i + 1);
test_idivl(0, 1, -(i + 1));
test_idivl(-1, -1, -(i + 1));
test_idivl(0, 0x7fffffff, i + 1);
test_idivl(-1, 0x80000001, i + 1);
test_idivl(0, 0x7fffffff, -(i + 1));
test_idivl(-1, 0x80000001, -(i + 1));
}
#if defined(__x86_64__)
test_imulq(0, 0x1234001d1234001d, 45);
test_imulq(0, 23, -45);
test_imulq(0, 0x8000000000000000, 0x8000000000000000);
test_imulq(0, 0x100000000, 0x100000000);
test_mulq(0, 0x1234001d1234001d, 45);
test_mulq(0, 23, -45);
test_mulq(0, 0x8000000000000000, 0x8000000000000000);
test_mulq(0, 0x100000000, 0x100000000);
test_imulq2(0x1234001d1234001d, 45);
test_imulq2(23, -45);
test_imulq2(0x8000000000000000, 0x8000000000000000);
test_imulq2(0x100000000, 0x100000000);
TEST_IMUL_IM("q", "", 45, 0x12341234);
TEST_IMUL_IM("q", "", -45, 23);
TEST_IMUL_IM("q", "", 0x8000, 0x8000000000000000);
TEST_IMUL_IM("q", "", 0x7fff, 0x10000000);
test_idivq(0, 0x12345678abcdef, 12347);
test_idivq(0, -233223, -45);
test_idivq(0, 0x8000000000000000, -1);
test_idivq(0x12343, 0x12345678, 0x81234567);
test_divq(0, 0x12345678abcdef, 12347);
test_divq(0, -233223, -45);
test_divq(0, 0x8000000000000000, -1);
test_divq(0x12343, 0x12345678, 0x81234567);
#endif
}
#define TEST_BSX(op, size, op0)\
{\
long res, val, resz;\
val = op0;\
asm("xor %1, %1\n"\
"mov $0x12345678, %0\n"\
#op " %" size "2, %" size "0 ; setz %b1" \
: "=&r" (res), "=&q" (resz)\
: "r" (val));\
printf("%-10s A=" FMTLX " R=" FMTLX " %ld\n", #op, val, res, resz);\
}
void test_bsx(void)
{
TEST_BSX(bsrw, "w", 0);
TEST_BSX(bsrw, "w", 0x12340128);
TEST_BSX(bsrw, "w", 0xffffffff);
TEST_BSX(bsrw, "w", 0xffff7fff);
TEST_BSX(bsfw, "w", 0);
TEST_BSX(bsfw, "w", 0x12340128);
TEST_BSX(bsfw, "w", 0xffffffff);
TEST_BSX(bsfw, "w", 0xfffffff7);
TEST_BSX(bsrl, "k", 0);
TEST_BSX(bsrl, "k", 0x00340128);
TEST_BSX(bsrl, "k", 0xffffffff);
TEST_BSX(bsrl, "k", 0x7fffffff);
TEST_BSX(bsfl, "k", 0);
TEST_BSX(bsfl, "k", 0x00340128);
TEST_BSX(bsfl, "k", 0xffffffff);
TEST_BSX(bsfl, "k", 0xfffffff7);
#if defined(__x86_64__)
TEST_BSX(bsrq, "", 0);
TEST_BSX(bsrq, "", 0x003401281234);
TEST_BSX(bsfq, "", 0);
TEST_BSX(bsfq, "", 0x003401281234);
#endif
}
#define TEST_POPCNT(size, op0)\
{\
long res, val, resz;\
val = op0;\
asm("xor %1, %1\n"\
"mov $0x12345678, %0\n"\
"popcnt %" size "2, %" size "0 ; pushf; pop %1;" \
: "=&r" (res), "=&q" (resz)\
: "r" (val));\
printf("popcnt A=" FMTLX " R=" FMTLX " flags=%lx\n", val, res, resz);\
}
void test_popcnt(void)
{
TEST_POPCNT("w", 0);
}
/**********************************************/
union float64u {
double d;
uint64_t l;
};
union float64u q_nan = { .l = 0xFFF8000000000000LL };
union float64u s_nan = { .l = 0xFFF0000000000000LL };
void test_fops(double a, double b)
{
int ib = (int)b;
int dest = 0;
printf("a=%f b=%f a+b=%f\n", a, b, a + b);
printf("a=%f b=%f a-b=%f\n", a, b, a - b);
printf("a=%f b=%f a*b=%f\n", a, b, a * b);
printf("a=%f b=%f a/b=%f\n", a, b, a / b);
printf("a=%f b=%f =%f\n", a, b, a + a + a + 3 * b / a * (a * a * a / b / b / (a + 1.0) - 3.5 + a * b / (3.7 * a / (a - b * b) + 6.5 * a / (b * b * a / -b - a * b) + 5.5 * (b - a))));
//printf("a=%f b=%f fmod(a, b)=%f\n", a, b, fmod(a, b)); // difference in sign bit on zero and nan
printf("a=%f fma(a,b,a)=%f\n", a, fma(a, b, a));
printf("a=%f fdim(a,b)=%f\n", a, fdim(a, b));
printf("a=%f copysign(a,b)=%f\n", a, copysign(a, b));
printf("a=%f sqrt(a)=%f\n", a, sqrt(a));
printf("a=%f sin(a)=%f\n", a, sin(a));
printf("a=%f cos(a)=%f\n", a, cos(a));
printf("a=%f tan(a)=%f\n", a, tan(a));
if(a >= 0)
{
printf("a=%f log(a)=%f\n", a, log(a));
printf("a=%f log10(a)=%f\n", a, log10(a));
printf("a=%f log1p(a)=%f\n", a, log1p(a));
printf("a=%f log2(a)=%f\n", a, log2(a));
}
printf("a=%f logb(a)=%f\n", a, logb(a));
printf("a=%f ilogb(a)=%d\n", a, ilogb(a));
printf("a=%f exp(a)=%f\n", a, exp(a));
printf("a=%f exp2(a)=%f\n", a, exp2(a));
printf("a=%f frexp(a)=%f, %d\n", a, frexp(a, &dest), dest);
printf("a=%f ldexp(a,b)=%f\n", a, ldexp(a, ib));
printf("a=%f scalbn(a,b)=%f\n", a, scalbn(a, ib));
printf("a=%f sinh(a)=%f\n", a, sinh(a));
printf("a=%f cosh(a)=%f\n", a, cosh(a));
printf("a=%f tanh(a)=%f\n", a, tanh(a));
printf("a=%f fabs(a)=%f\n", a, fabs(a));
printf("a=%f pow(a,b)=%f\n", a, pow(a,b));
printf("a=%f b=%f atan2(a, b)=%f\n", a, b, atan2(a, b));
/* just to test some op combining */
printf("a=%f asin(sin(a))=%f\n", a, asin(sin(a)));
printf("a=%f acos(cos(a))=%f\n", a, acos(cos(a)));
printf("a=%f atan(tan(a))=%f\n", a, atan(tan(a)));
}
void fpu_clear_exceptions(void)
{
struct QEMU_PACKED {
uint16_t fpuc;
uint16_t dummy1;
uint16_t fpus;
uint16_t dummy2;
uint16_t fptag;
uint16_t dummy3;
uint32_t ignored[4];
long double fpregs[8];
} float_env32;
asm volatile ("fnstenv %0\n" : "=m" (float_env32));
float_env32.fpus &= ~0x7f;
asm volatile ("fldenv %0\n" : : "m" (float_env32));
}
/* XXX: display exception bits when supported */
#define FPUS_EMASK 0x007f
void test_fcmp(double a, double b)
{
long eflags, fpus;
fpu_clear_exceptions();
asm("fcom %2\n"
"fstsw %%ax\n"
: "=a" (fpus)
: "t" (a), "u" (b));
printf("fcom(%f %f)=%04lx\n",
a, b, fpus & (0x4500 | FPUS_EMASK & ~1));
fpu_clear_exceptions();
asm("fucom %2\n"
"fstsw %%ax\n"
: "=a" (fpus)
: "t" (a), "u" (b));
printf("fucom(%f %f)=%04lx\n",
a, b, fpus & (0x4500 | FPUS_EMASK));
if (TEST_FCOMI) {
/* test f(u)comi instruction */
fpu_clear_exceptions();
asm("fcomi %3, %2\n"
"fstsw %%ax\n"
"pushf\n"
"pop %0\n"
: "=r" (eflags), "=a" (fpus)
: "t" (a), "u" (b));
printf("fcomi(%f %f)=%04lx %02lx\n",
a, b, fpus & FPUS_EMASK & ~1, eflags & (CC_Z | CC_P | CC_C));
fpu_clear_exceptions();
asm("fucomi %3, %2\n"
"fstsw %%ax\n"
"pushf\n"
"pop %0\n"
: "=r" (eflags), "=a" (fpus)
: "t" (a), "u" (b));
printf("fucomi(%f %f)=%04lx %02lx\n",
a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
}
fpu_clear_exceptions();
asm volatile("fxam\n"
"fstsw %%ax\n"
: "=a" (fpus)
: "t" (a));
printf("fxam(%f)=%04lx\n", a, fpus & 0x4700);
fpu_clear_exceptions();
}
void test_fcvt(double a)
{
float fa;
long double la;
int16_t fpuc;
int i;
int64_t lla;