From 77cafed7d90865d4b4988b37c4c942d4bf8ba10f Mon Sep 17 00:00:00 2001 From: Hamish Willee Date: Fri, 7 Jun 2019 13:47:33 +1000 Subject: [PATCH] Improve table describing FMU differences --- README.md | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/README.md b/README.md index 30c8879..9b52912 100644 --- a/README.md +++ b/README.md @@ -48,16 +48,18 @@ The Pixhawk project has evolved the FMU design through a number of verisons. These are named using the designation: FMUvX (e.g.: FMUv1, FMUv2, FMUv3, FMUv4, etc.). Higher FMU numbers indicate that the board is more recent, but may not indicate increased capability (versions can be almost identical - differing only in connector wiring). -The designs listed below (with a high level overview of the main differences). +The versions are listed below (with a high level overview of the main differences). + +Version | Year | Lead Product | CPU | Other +--- | --- | --- | --- | --- +[FMUv1](FMUv1/README.md) & [IOv1](IOv1) | 2012 | None | 168 MHz M4 | (Discontinued) Original Flight Management Unit and Separate I/O board. +[FMUv2](FMUv2/README.md) | 2013 | Pixhawk 1 | 168 MHz M4 | Single board with STM32427VI processor. +[FMUv3](FMUv3_REV_D/README.md) | 2015 | Pixhawk 2 | 168 MHz M4 | Redundant sensors. Identical to FMUv2, but usable flash doubled to 2MB. +[FMUv4](FMUv4/README.md) | 2015 | Pixracer | 168 MHz M4 | Increased RAM. Faster CPU. More serial ports. No IO processor. +FMUv4X | 2017 | Pixhawk 3 Pro | 168 MHz M4 | Slightly increased RAM. More serial ports. IO processor. Redundant sensors. +[FMUv5](FMUv5/README.md) | 2018 | 200 MHz M7 | Pixhawk 4 | New processor (F7). Much faster. More RAM. More CAN busses. Much more configurable.
> **Note** Minimum specification provided (pinout info, but no schematics). +[FMUv5X](FMUv5/README.md) | 2019 | Pixhawk 5X | 200 MHz M7 | Temp-calibrated, redundant sensors. -Version | Description ---- | --- -[FMUv1](FMUv1/README.md) & [IOv1](IOv1) | (Discontinued) Original Flight Management Unit and Separate I/O board. -[FMUv2](FMUv2/README.md) | Single board with STM32427VI processor. -[FMUv3](FMUv3_REV_D/README.md)| Identical to FMUv2, but usable flash doubled to 2MB. -[FMUv4](FMUv4/README.md) | Increased RAM. Faster CPU. More serial ports. No IO processor -FMUv4-PRO | Slightly increased RAM. More serial ports. IO processor. -[FMUv5](FMUv5/README.md) | New processor (F7). Much faster. More RAM. More CAN busses. Much more configurable.
> **Note** Minimum specification provided (pinout info, but no schematics). > **Note** Products based on Pixhawk designs are listed here: [PX4 User Guide > Pixhawk Series]( https://docs.px4.io/master/en/flight_controller/pixhawk_series.html#pixhawk-series). @@ -87,9 +89,7 @@ Relevant products are listed below: Pixhawk standards are developed in a weekly public developer call. -The call is shown in the [Dronecode calendar](https://www.dronecode.org/calendar/) as: *Pixhawk Hardware Standards Weekly Call* - -> **Tip** Details for joining the call are provided in the dronecode calendar entry. +The call is shown in the [Dronecode calendar](https://www.dronecode.org/calendar/) as: *Pixhawk Hardware Standards Weekly Call* (all call details are in the entry).