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Since en_v2t is on the JTAG test clock, we need to make sure that it is synchronized in ADC slice 0.
en_v2t
The text was updated successfully, but these errors were encountered:
Merge pull request #18 from StanfordVLSI/pip_hotfix
e006799
lock pip versions of emulation tools
sjkim85
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Since
en_v2t
is on the JTAG test clock, we need to make sure that it is synchronized in ADC slice 0.The text was updated successfully, but these errors were encountered: