Error when Generating VHDL with no /rtl folder

[sanfans]

Hello, i have been doing some of the exercises of this workshop and they are great. I noticed, however, a behaviour that i would not expect. If, for some reason, the rtl directory is deleted (where all the generated VHDL files go), running the command (just an example)

runMain workshop.counter.CounterMain

In sbt gives me the following error:

[info] [Progress] at 0.096 : Elaborate components
[info] [Progress] at 0.098 : Checks and transforms
[info] [Progress] at 0.101 : Generate VHDL
[error] Exception in thread "main" java.io.FileNotFoundException: rtl/Counter.vhd (No such file or directory)
[error] 	at java.base/java.io.FileOutputStream.open0(Native Method)
[error] 	at java.base/java.io.FileOutputStream.open(FileOutputStream.java:292)
[error] 	at java.base/java.io.FileOutputStream.<init>(FileOutputStream.java:235)
[error] 	at java.base/java.io.FileOutputStream.<init>(FileOutputStream.java:124)
[error] 	at java.base/java.io.FileWriter.<init>(FileWriter.java:66)
[error] 	at spinal.core.internals.PhaseVhdl.impl(PhaseVhdl.scala:40)
[error] 	at spinal.core.internals.PhaseContext.doPhase(Phase.scala:195)
[error] 	at spinal.core.internals.SpinalVhdlBoot$$anonfun$singleShot$7.apply(Phase.scala:2027)
[error] 	at spinal.core.internals.SpinalVhdlBoot$$anonfun$singleShot$7.apply(Phase.scala:2025)
[error] 	at scala.collection.mutable.ResizableArray$class.foreach(ResizableArray.scala:59)
[error] 	at scala.collection.mutable.ArrayBuffer.foreach(ArrayBuffer.scala:48)
[error] 	at spinal.core.internals.SpinalVhdlBoot$.singleShot(Phase.scala:2025)
[error] 	at spinal.core.internals.SpinalVhdlBoot$.apply(Phase.scala:1960)
[error] 	at spinal.core.Spinal$.apply(Spinal.scala:310)
[error] 	at spinal.core.SpinalConfig.generateVhdl(Spinal.scala:141)
[error] 	at workshop.counter.CounterMain$.main(CounterMain.scala:8)
[error] 	at workshop.counter.CounterMain.main(CounterMain.scala)
[error] Nonzero exit code returned from runner: 1
[error] (Compile / runMain) Nonzero exit code returned from runner: 1
[error] Total time: 1 s, completed Sep 6, 2019, 4:11:12 PM

Which is a little bit unespected since i would have thought that Spinal is able to recognize that there is no folder and create it by himself. If i add the rtl folder back with mkdir rtl, then everything works again.

This does not happen when simulating. If you delete the folder /waves, it will be created automatically created back every time you run a new simulation.

Why is this happening? It would be great than also the generation of VHDL code would be able to automatically create the rtl directory.