diff --git a/source/SpinalHDL/Libraries/Bus/avalon/avalonmm.rst b/source/SpinalHDL/Libraries/Bus/avalon/avalonmm.rst
index ef58b4d904f..cf164e37801 100644
--- a/source/SpinalHDL/Libraries/Bus/avalon/avalonmm.rst
+++ b/source/SpinalHDL/Libraries/Bus/avalon/avalonmm.rst
@@ -11,7 +11,7 @@ The AvalonMM bus fit very well in FPGA. It is very flexible :
 Configuration and instanciation
 -------------------------------
 
-The ``AvalonMM`` Bundle has a construction argument ``AvalonMMConfig``. Because of the flexible nature of the Avalon bus, the ``AvalonMMConfig`` as many configuration elements. For more information the Avalon spec could be find here : https://www.intel.com/content/www/us/en/docs/programmable/683091/22-3/introduction-to-the-interface-specifications.html.
+The ``AvalonMM`` Bundle has a construction argument ``AvalonMMConfig``. Because of the flexible nature of the Avalon bus, the ``AvalonMMConfig`` as many configuration elements. For more information the Avalon spec could be find on the intel website.
 
 .. code-block:: scala