diff --git a/drivers/clock_control/clock_control_silabs_siwx917.c b/drivers/clock_control/clock_control_silabs_siwx917.c index 08577d1..9208856 100644 --- a/drivers/clock_control/clock_control_silabs_siwx917.c +++ b/drivers/clock_control/clock_control_silabs_siwx917.c @@ -162,10 +162,6 @@ static int siwx917_clock_init(const struct device *dev) siwx917_clock_on(dev, (clock_control_subsys_t)SIWX917_CLK_ULP_I2C); #endif -#if DT_NODE_HAS_STATUS(DT_NODELABEL(ulpdma), okay) - siwx917_clock_on(dev, (clock_control_subsys_t)SIWX917_CLK_ULP_DMA); -#endif - #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart1), okay) siwx917_clock_on(dev, (clock_control_subsys_t)SIWX917_CLK_UART1); #endif @@ -182,10 +178,6 @@ static int siwx917_clock_init(const struct device *dev) siwx917_clock_on(dev, (clock_control_subsys_t)SIWX917_CLK_I2C1); #endif -#if DT_NODE_HAS_STATUS(DT_NODELABEL(udma0), okay) - siwx917_clock_on(dev, (clock_control_subsys_t)SIWX917_CLK_DMA0); -#endif - return 0; } diff --git a/drivers/dma/dma_silabs_siwx917.c b/drivers/dma/dma_silabs_siwx917.c index 245c3c6..775d2c2 100644 --- a/drivers/dma/dma_silabs_siwx917.c +++ b/drivers/dma/dma_silabs_siwx917.c @@ -29,6 +29,8 @@ struct dma_siwx917_config { uint8_t channels; /* UDMA channel count */ uint8_t irq_number; /* IRQ number */ RSI_UDMA_DESC_T *sram_desc_addr; /* SRAM Address for UDMA Descriptor Storage */ + const struct device *clock_dev; + clock_control_subsys_t clock_subsys; void (*irq_configure)(void); /* IRQ configure function */ }; @@ -326,6 +328,11 @@ static int dma_siwx917_init(const struct device *dev) .udma_irq_num = cfg->irq_number, .desc = cfg->sram_desc_addr, }; + int ret; + + ret = clock_control_on(cfg->clock_dev, cfg->clock_sys); + if (ret) + return ret; udma_handle = UDMAx_Initialize(&udma_resources, udma_resources.desc, NULL, (uint32_t *)&data->dma_rom_buff); @@ -406,6 +413,8 @@ static const struct dma_driver_api siwx917_dma_driver_api = { irq_enable(DT_INST_IRQ(inst, irq)); \ } \ static const struct dma_siwx917_config dma##inst##_cfg = { \ + .clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \ + .clock_subsys = (clock_control_subsys_t)DT_INST_PHA(inst, clocks, clkid), \ .reg = (UDMA0_Type *)DT_INST_REG_ADDR(inst), \ .channels = DT_INST_PROP(inst, dma_channels), \ .irq_number = DT_INST_PROP_BY_IDX(inst, interrupts, 0), \