From 48b325f02b7954b0bdbd38b7eda2ce68f96e6eec Mon Sep 17 00:00:00 2001 From: Arun Padakanti Date: Tue, 15 Oct 2024 21:48:40 +0530 Subject: [PATCH] Updated changes in autogen and config folders --- .../autogen/sl_si91x_button_instances.c | 2 - .../autogen/sl_si91x_button_instances.h | 2 + .../siwx917/BRD4338A/config/RTE_Device_917.h | 467 ++++------------- ...g.h => sl_si91x_button_init_btn0_config.h} | 26 +- ...g.h => sl_si91x_button_init_btn1_config.h} | 27 +- .../config/sl_si91x_button_pin_config.h | 5 + .../BRD4338A/config/sl_si91x_led_config.h | 14 +- .../config/sl_si91x_led_init_led0_config.h | 28 ++ .../config/sl_si91x_led_init_led1_config.h | 28 ++ .../autogen/sl_si91x_button_instances.c | 3 - .../autogen/sl_si91x_button_instances.h | 3 + .../siwx917/BRD4342A/config/RTE_Device_917.h | 469 ++++-------------- ...g.h => sl_si91x_button_init_btn0_config.h} | 26 +- ...g.h => sl_si91x_button_init_btn1_config.h} | 27 +- .../config/sl_si91x_button_pin_config.h | 5 + .../BRD4342A/config/sl_si91x_led_config.h | 14 +- .../config/sl_si91x_led_init_led0_config.h | 28 ++ .../config/sl_si91x_led_init_led1_config.h | 28 ++ 18 files changed, 428 insertions(+), 774 deletions(-) rename matter/si91x/siwx917/BRD4338A/config/{sl_si91x_button_btn0_config.h => sl_si91x_button_init_btn0_config.h} (61%) rename matter/si91x/siwx917/BRD4338A/config/{sl_si91x_button_btn1_config.h => sl_si91x_button_init_btn1_config.h} (60%) create mode 100644 matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_init_led0_config.h create mode 100644 matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_init_led1_config.h rename matter/si91x/siwx917/BRD4342A/config/{sl_si91x_button_btn0_config.h => sl_si91x_button_init_btn0_config.h} (61%) rename matter/si91x/siwx917/BRD4342A/config/{sl_si91x_button_btn1_config.h => sl_si91x_button_init_btn1_config.h} (60%) create mode 100644 matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_init_led0_config.h create mode 100644 matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_init_led1_config.h diff --git a/matter/si91x/siwx917/BRD4338A/autogen/sl_si91x_button_instances.c b/matter/si91x/siwx917/BRD4338A/autogen/sl_si91x_button_instances.c index d8966e5438..99c7014855 100644 --- a/matter/si91x/siwx917/BRD4338A/autogen/sl_si91x_button_instances.c +++ b/matter/si91x/siwx917/BRD4338A/autogen/sl_si91x_button_instances.c @@ -30,8 +30,6 @@ #include "sl_si91x_button_pin_config.h" #include "sl_si91x_button_instances.h" -#include "sl_si91x_button_btn0_config.h" -#include "sl_si91x_button_btn1_config.h" sl_button_t const button_btn0 = { .port = SL_BUTTON_BTN0_PORT, diff --git a/matter/si91x/siwx917/BRD4338A/autogen/sl_si91x_button_instances.h b/matter/si91x/siwx917/BRD4338A/autogen/sl_si91x_button_instances.h index f612ed01bc..7a7aa92365 100644 --- a/matter/si91x/siwx917/BRD4338A/autogen/sl_si91x_button_instances.h +++ b/matter/si91x/siwx917/BRD4338A/autogen/sl_si91x_button_instances.h @@ -32,6 +32,8 @@ #define SL_SI91X_BUTTON_INSTANCES_H #include "sl_si91x_button.h" +#include "sl_si91x_button_init_btn0_config.h" +#include "sl_si91x_button_init_btn1_config.h" extern const sl_button_t button_btn0; extern const sl_button_t button_btn1; diff --git a/matter/si91x/siwx917/BRD4338A/config/RTE_Device_917.h b/matter/si91x/siwx917/BRD4338A/config/RTE_Device_917.h index 64cb5a5637..a23d43e670 100644 --- a/matter/si91x/siwx917/BRD4338A/config/RTE_Device_917.h +++ b/matter/si91x/siwx917/BRD4338A/config/RTE_Device_917.h @@ -110,7 +110,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -168,7 +168,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -236,7 +236,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -295,7 +295,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -344,7 +344,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -396,7 +396,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -448,7 +448,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -492,7 +492,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -531,7 +531,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -550,7 +550,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -567,7 +567,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -639,7 +639,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -703,7 +703,7 @@ #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -767,7 +767,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -840,7 +840,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -915,7 +915,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -942,7 +942,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -965,7 +965,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -982,7 +982,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1025,7 +1025,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1068,7 +1068,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1111,7 +1111,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1159,7 +1159,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1184,7 +1184,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1212,7 +1212,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1234,7 +1234,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1296,7 +1296,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1354,7 +1354,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1408,7 +1408,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1462,7 +1462,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1506,7 +1506,7 @@ #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1524,14 +1524,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1549,14 +1549,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1580,14 +1580,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1605,30 +1605,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1719,7 +1719,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1767,7 +1767,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1815,7 +1815,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1863,7 +1863,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1915,7 +1915,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1963,7 +1963,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2059,7 +2059,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2081,7 +2081,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2103,7 +2103,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2129,7 +2129,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2223,7 +2223,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2276,7 +2276,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2358,7 +2358,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2449,7 +2449,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2527,7 +2527,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2565,8 +2565,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2627,7 +2627,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2682,7 +2682,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2736,7 +2736,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2790,7 +2790,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2843,7 +2843,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2898,7 +2898,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2963,7 +2963,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2999,7 +2999,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3046,7 +3046,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3088,7 +3088,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3115,7 +3115,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3141,7 +3141,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3155,42 +3155,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3534,7 +3534,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3566,7 +3566,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3601,7 +3601,7 @@ #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3637,7 +3637,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3669,7 +3669,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3696,7 +3696,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3732,7 +3732,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3762,7 +3762,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3795,7 +3795,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3833,7 +3833,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3858,7 +3858,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3894,7 +3894,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3942,7 +3942,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3968,7 +3968,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3988,7 +3988,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4154,270 +4154,13 @@ #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4426,7 +4169,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4435,7 +4178,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4444,7 +4187,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4453,7 +4196,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4462,7 +4205,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4471,7 +4214,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4481,7 +4224,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 diff --git a/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_btn0_config.h b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_init_btn0_config.h similarity index 61% rename from matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_btn0_config.h rename to matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_init_btn0_config.h index dac1086d80..e08670e8f1 100644 --- a/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_btn0_config.h +++ b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_init_btn0_config.h @@ -1,15 +1,13 @@ /***************************************************************************/ /** - * @file sl_si91x_button_config.h + * @file sl_si91x_button_init_btn0_config.h * @brief Button Driver Configuration ******************************************************************************* * # License * Copyright 2023 Silicon Laboratories Inc. www.silabs.com *******************************************************************************/ -#ifndef SL_SI91X_BUTTON_BTN0_CONFIG_H -#define SL_SI91X_BUTTON_BTN0_CONFIG_H - -#include "sl_si91x_button.h" +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H // <<< Use Configuration Wizard in Context Menu >>> @@ -25,4 +23,20 @@ // <<< end of configuration section >>> -#endif // SL_SI91X_BUTTON_BTN0_CONFIG_H +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_btn1_config.h b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_init_btn1_config.h similarity index 60% rename from matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_btn1_config.h rename to matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_init_btn1_config.h index 5f1a9a9a3e..f422b07001 100644 --- a/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_btn1_config.h +++ b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_init_btn1_config.h @@ -1,15 +1,13 @@ /***************************************************************************/ /** - * @file sl_si91x_button_config.h + * @file sl_si91x_button_init_btn1_config.h * @brief Button Driver Configuration ******************************************************************************* * # License * Copyright 2023 Silicon Laboratories Inc. www.silabs.com *******************************************************************************/ -#ifndef SL_SI91X_BUTTON_BTN1_CONFIG_H -#define SL_SI91X_BUTTON_BTN1_CONFIG_H - -#include "sl_si91x_button.h" +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H // <<< Use Configuration Wizard in Context Menu >>> @@ -25,4 +23,21 @@ // <<< end of configuration section >>> -#endif // SL_SI91X_BUTTON_BTN1_CONFIG_H +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_pin_config.h b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_pin_config.h index b0121118bb..adda54dcbc 100644 --- a/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_pin_config.h +++ b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_button_pin_config.h @@ -10,16 +10,21 @@ #define SL_SI91X_BUTTON_PIN_CONFIG_H #include "RTE_Device_917.h" +#include "sl_si91x_button_instances.h" #define SL_SI91x_BUTTON_COUNT (2) +#ifndef SL_SI91X_BUTTON_0_PORT #define SL_BUTTON_BTN0_PIN RTE_BUTTON0_PIN #define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT #define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER +#endif +#ifndef SL_SI91X_BUTTON_1_PORT #define SL_BUTTON_BTN1_PIN RTE_BUTTON1_PIN #define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT #define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER #define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD +#endif #endif // SL_SI91X_BUTTON_PIN_CONFIG_H diff --git a/matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_config.h b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_config.h index 3e553cbd07..acc70d318d 100644 --- a/matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_config.h +++ b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_config.h @@ -10,27 +10,21 @@ #define SL_SI91X_LED_CONFIG_H #include "RTE_Device_917.h" +#include "sl_si91x_led_instances.h" #define SL_SI91x_LED_COUNT 2 -#ifndef SI917_DEVKIT - +#ifndef SL_SI91X_LED_0_PORT #define SL_LED_LED0_PIN RTE_LED0_PIN #define SL_LED_LED0_PORT RTE_LED0_PORT #define SL_LED_LED0_NUMBER RTE_LED0_NUMBER +#endif +#ifndef SL_SI91X_LED_1_PORT #define SL_LED_LED1_PIN RTE_LED1_PIN #define SL_LED_LED1_PORT RTE_LED1_PORT #define SL_LED_LED1_NUMBER RTE_LED1_NUMBER #define SL_LED_LED1_PAD RTE_LED1_PAD - -#else - -#define SL_LED_LEDB_PIN RTE_LEDB_PIN -#define SL_LED_LEDB_PORT RTE_LEDB_PORT -#define SL_LED_LEDB_NUMBER RTE_LEDB_NUMBER -#define SL_LED_LEDB_PAD RTE_LEDB_PAD - #endif #endif // SL_SI91X_LED_CONFIG_H diff --git a/matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_init_led0_config.h b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_init_led0_config.h new file mode 100644 index 0000000000..2a41e676d8 --- /dev/null +++ b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_init_led0_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 2 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_init_led1_config.h b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_init_led1_config.h new file mode 100644 index 0000000000..14093b027a --- /dev/null +++ b/matter/si91x/siwx917/BRD4338A/config/sl_si91x_led_init_led1_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H diff --git a/matter/si91x/siwx917/BRD4342A/autogen/sl_si91x_button_instances.c b/matter/si91x/siwx917/BRD4342A/autogen/sl_si91x_button_instances.c index 846b7370f9..eecc20e113 100644 --- a/matter/si91x/siwx917/BRD4342A/autogen/sl_si91x_button_instances.c +++ b/matter/si91x/siwx917/BRD4342A/autogen/sl_si91x_button_instances.c @@ -30,9 +30,6 @@ #include "sl_si91x_button_pin_config.h" #include "sl_si91x_button_instances.h" -#include "sl_si91x_button_btn0_config.h" -#include "sl_si91x_button_btn1_config.h" - sl_button_t const button_btn0 = { .port = SL_BUTTON_BTN0_PORT, .pin = SL_BUTTON_BTN0_PIN, diff --git a/matter/si91x/siwx917/BRD4342A/autogen/sl_si91x_button_instances.h b/matter/si91x/siwx917/BRD4342A/autogen/sl_si91x_button_instances.h index f612ed01bc..d57ac474a5 100644 --- a/matter/si91x/siwx917/BRD4342A/autogen/sl_si91x_button_instances.h +++ b/matter/si91x/siwx917/BRD4342A/autogen/sl_si91x_button_instances.h @@ -32,6 +32,9 @@ #define SL_SI91X_BUTTON_INSTANCES_H #include "sl_si91x_button.h" +#include "sl_si91x_button_init_btn0_config.h" +#include "sl_si91x_button_init_btn1_config.h" + extern const sl_button_t button_btn0; extern const sl_button_t button_btn1; diff --git a/matter/si91x/siwx917/BRD4342A/config/RTE_Device_917.h b/matter/si91x/siwx917/BRD4342A/config/RTE_Device_917.h index a0dfaad55d..7d2e521c44 100644 --- a/matter/si91x/siwx917/BRD4342A/config/RTE_Device_917.h +++ b/matter/si91x/siwx917/BRD4342A/config/RTE_Device_917.h @@ -110,7 +110,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -168,7 +168,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -236,7 +236,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -295,7 +295,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -344,7 +344,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -396,7 +396,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -448,7 +448,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -492,7 +492,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -531,7 +531,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -550,7 +550,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -567,7 +567,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -639,7 +639,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -703,7 +703,7 @@ #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -767,7 +767,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -840,7 +840,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -915,7 +915,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -942,7 +942,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -965,7 +965,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -982,7 +982,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1025,7 +1025,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1068,7 +1068,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1111,7 +1111,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1159,7 +1159,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1184,7 +1184,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1212,7 +1212,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1234,7 +1234,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1296,7 +1296,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1354,7 +1354,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1408,7 +1408,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1462,7 +1462,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1506,7 +1506,7 @@ #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1524,14 +1524,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1549,14 +1549,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1580,14 +1580,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1605,30 +1605,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT -#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 +#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SSI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1719,7 +1719,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1767,7 +1767,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1815,7 +1815,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1863,7 +1863,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1915,7 +1915,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1963,7 +1963,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2059,7 +2059,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2081,7 +2081,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2103,7 +2103,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2129,7 +2129,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2223,7 +2223,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2276,7 +2276,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2358,7 +2358,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2449,7 +2449,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2527,7 +2527,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2565,8 +2565,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2627,7 +2627,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2682,7 +2682,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2736,7 +2736,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2790,7 +2790,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2843,7 +2843,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2898,7 +2898,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2963,7 +2963,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2999,7 +2999,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3046,7 +3046,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3088,7 +3088,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3115,7 +3115,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3141,7 +3141,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3155,42 +3155,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3534,7 +3534,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3566,7 +3566,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3601,7 +3601,7 @@ #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3637,7 +3637,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3669,7 +3669,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3696,7 +3696,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3732,7 +3732,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3762,7 +3762,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3795,7 +3795,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3833,7 +3833,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3858,7 +3858,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3894,7 +3894,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3942,7 +3942,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3968,7 +3968,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3988,7 +3988,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4154,270 +4154,13 @@ #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4426,7 +4169,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4435,7 +4178,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4444,7 +4187,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4453,7 +4196,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4462,7 +4205,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4471,7 +4214,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4481,7 +4224,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 diff --git a/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_btn0_config.h b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_init_btn0_config.h similarity index 61% rename from matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_btn0_config.h rename to matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_init_btn0_config.h index dac1086d80..e08670e8f1 100644 --- a/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_btn0_config.h +++ b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_init_btn0_config.h @@ -1,15 +1,13 @@ /***************************************************************************/ /** - * @file sl_si91x_button_config.h + * @file sl_si91x_button_init_btn0_config.h * @brief Button Driver Configuration ******************************************************************************* * # License * Copyright 2023 Silicon Laboratories Inc. www.silabs.com *******************************************************************************/ -#ifndef SL_SI91X_BUTTON_BTN0_CONFIG_H -#define SL_SI91X_BUTTON_BTN0_CONFIG_H - -#include "sl_si91x_button.h" +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H // <<< Use Configuration Wizard in Context Menu >>> @@ -25,4 +23,20 @@ // <<< end of configuration section >>> -#endif // SL_SI91X_BUTTON_BTN0_CONFIG_H +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_btn1_config.h b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_init_btn1_config.h similarity index 60% rename from matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_btn1_config.h rename to matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_init_btn1_config.h index 5f1a9a9a3e..f422b07001 100644 --- a/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_btn1_config.h +++ b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_init_btn1_config.h @@ -1,15 +1,13 @@ /***************************************************************************/ /** - * @file sl_si91x_button_config.h + * @file sl_si91x_button_init_btn1_config.h * @brief Button Driver Configuration ******************************************************************************* * # License * Copyright 2023 Silicon Laboratories Inc. www.silabs.com *******************************************************************************/ -#ifndef SL_SI91X_BUTTON_BTN1_CONFIG_H -#define SL_SI91X_BUTTON_BTN1_CONFIG_H - -#include "sl_si91x_button.h" +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H // <<< Use Configuration Wizard in Context Menu >>> @@ -25,4 +23,21 @@ // <<< end of configuration section >>> -#endif // SL_SI91X_BUTTON_BTN1_CONFIG_H +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_pin_config.h b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_pin_config.h index b0121118bb..adda54dcbc 100644 --- a/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_pin_config.h +++ b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_button_pin_config.h @@ -10,16 +10,21 @@ #define SL_SI91X_BUTTON_PIN_CONFIG_H #include "RTE_Device_917.h" +#include "sl_si91x_button_instances.h" #define SL_SI91x_BUTTON_COUNT (2) +#ifndef SL_SI91X_BUTTON_0_PORT #define SL_BUTTON_BTN0_PIN RTE_BUTTON0_PIN #define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT #define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER +#endif +#ifndef SL_SI91X_BUTTON_1_PORT #define SL_BUTTON_BTN1_PIN RTE_BUTTON1_PIN #define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT #define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER #define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD +#endif #endif // SL_SI91X_BUTTON_PIN_CONFIG_H diff --git a/matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_config.h b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_config.h index 3e553cbd07..acc70d318d 100644 --- a/matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_config.h +++ b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_config.h @@ -10,27 +10,21 @@ #define SL_SI91X_LED_CONFIG_H #include "RTE_Device_917.h" +#include "sl_si91x_led_instances.h" #define SL_SI91x_LED_COUNT 2 -#ifndef SI917_DEVKIT - +#ifndef SL_SI91X_LED_0_PORT #define SL_LED_LED0_PIN RTE_LED0_PIN #define SL_LED_LED0_PORT RTE_LED0_PORT #define SL_LED_LED0_NUMBER RTE_LED0_NUMBER +#endif +#ifndef SL_SI91X_LED_1_PORT #define SL_LED_LED1_PIN RTE_LED1_PIN #define SL_LED_LED1_PORT RTE_LED1_PORT #define SL_LED_LED1_NUMBER RTE_LED1_NUMBER #define SL_LED_LED1_PAD RTE_LED1_PAD - -#else - -#define SL_LED_LEDB_PIN RTE_LEDB_PIN -#define SL_LED_LEDB_PORT RTE_LEDB_PORT -#define SL_LED_LEDB_NUMBER RTE_LEDB_NUMBER -#define SL_LED_LEDB_PAD RTE_LEDB_PAD - #endif #endif // SL_SI91X_LED_CONFIG_H diff --git a/matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_init_led0_config.h b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_init_led0_config.h new file mode 100644 index 0000000000..2a41e676d8 --- /dev/null +++ b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_init_led0_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 2 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_init_led1_config.h b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_init_led1_config.h new file mode 100644 index 0000000000..14093b027a --- /dev/null +++ b/matter/si91x/siwx917/BRD4342A/config/sl_si91x_led_init_led1_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H