diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000..a83b0d9c --- /dev/null +++ b/.gitignore @@ -0,0 +1,11 @@ +*.json +GNU ARM */ +build +test/test_script/__pycache__ +doc/html/EFR32_ICE60730_Libraries/latex +*.temp-stream* +simplicity_sdk/src/* +!simplicity_sdk/src/CMakeLists.txt +cmake_build +log/ +tools/compile_commands.json diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml new file mode 100644 index 00000000..cbf2cbd0 --- /dev/null +++ b/.pre-commit-config.yaml @@ -0,0 +1,26 @@ +exclude: ^(docs|pictures|simplicity_sdk|test/test_script|log|sample|cmake|components|lib/inc/coding_standard.h|lib/inc/silabs_license_agreement.h|lib/inc/sl_iec60730_library_documentation.h) +repos: +- repo: https://github.com/pre-commit/pre-commit-hooks + rev: v4.0.1 + hooks: + - id: end-of-file-fixer + - id: trailing-whitespace +- repo: https://github.com/codespell-project/codespell + rev: v2.2.4 + hooks: + - id: codespell + args: [-w,--config,./tools/.codespell/.codespellrc] +- repo: https://github.com/pocc/pre-commit-hooks + rev: v1.3.5 + hooks: + - id: uncrustify + args: [-c,./tools/uncrustify.cfg,-lC,--no-backup,--replace] + - id: clang-tidy + args: + - --config-file=./tools/.clang-tidy + - --use-color + - --extra-arg=-Iusr/include + - --header-filter:'^((?!test).)*$' + - -p=./tools + - id: cppcheck + args: [--language=c,--std=c99,--check-config,-DSL_IEC60730_BOARD_HEADER="sl_iec60730_board.h",--suppress=missingInclude,--suppress=unmatchedSuppression] diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 00000000..126b5b62 --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,217 @@ +# Define minimal required version of CMake. +cmake_minimum_required(VERSION "3.25") + +# Project definition +project( + IE60730_LIBRARY + VERSION 1.2.0 + LANGUAGES C ASM CXX +) + +set(CMAKE_CXX_STANDARD 14) +set(CMAKE_CXX_STANDARD_REQUIRED OFF) +set(CMAKE_CXX_EXTENSIONS OFF) + +set(LIBRARY_NAME iec60730) +set(CMAKE_MODULE_PATH "${PROJECT_SOURCE_DIR}/cmake/") +set(LIB_IEC60730_MAP "lib_iec60730.map") +set(SDK_CMAKE_RELATIVE_DIR "simplicity_sdk") +set(SDK_LIB_CMAKE_RELATIVE_DIR "${SDK_CMAKE_RELATIVE_DIR}/src/lib_iec60730_cmake") + +# choose toolchain +if(DEFINED ENV{TOOL_CHAINS}) + set(TOOL_CHAINS "$ENV{TOOL_CHAINS}") +else() +set(TOOL_CHAINS "GCC") +endif() +message("-- [I] Toolchains build: ${TOOL_CHAINS}") + +# enable unit test +option(ENABLE_UNIT_TESTING "Enable a Unit Testing Build" OFF) +# enable integration test +option(ENABLE_INTEGRATION_TESTING "Enable a Integration Testing Build" OFF) +# enable test peripherals non-secure test +option(TEST_SECURE_PERIPHERALS_ENABLE "Check non-secure peripherals" OFF) +# enable integration test watchdog 1 +option(INTEGRATION_TEST_WDOG1_ENABLE "Enable integration test watchdog 1" OFF) +# disable using MarchXC algorithm +option(INTEGRATION_TEST_USE_MARCHX_DISABLE "Disable using MarchXC algorithm" OFF) +# pre-build iar tool +option(PRE_BUILD_IAR_TOOL "pre-build iar tool" OFF) +# Coding convention +option(CHECK_CODING_CONVETION_ENABLE "check coding convention" OFF) + +# choose board name +option(BOARD_NAME "choose board name" brd4187c) +message("-- [I] Board name: ${BOARD_NAME}") + +#Add external libraries with Fetch Content +include(FetchContent) + +if(ENABLE_UNIT_TESTING AND (NOT PRE_BUILD_IAR_TOOL)) + FetchContent_Declare( + unity + GIT_REPOSITORY https://github.com/ThrowTheSwitch/Unity + GIT_TAG v2.6.0 + GIT_SHALLOW TRUE) + FetchContent_MakeAvailable(unity) +endif() + +# Support calculate CRC +option(ENABLE_CAL_CRC_32 "Enable calculate crc 32" OFF) +option(ENABLE_CRC_USE_SW "Enable using software calculate CRC" OFF) +option(ENABLE_SW_CRC_TABLE "Enable software calculate CRC using table CRC" OFF) +set(OPTION_SUPPORT_TEST_IMC_MODULE "ENABLE_CAL_CRC_32 ENABLE_CRC_USE_SW ENABLE_SW_CRC_TABLE") + +# Set address start calculate crc +if(DEFINED ENV{FLASH_REGIONS_TEST}) + set(FLASH_REGIONS_TEST "$ENV{FLASH_REGIONS_TEST}") +else() + set(FLASH_REGIONS_TEST "0x00000000") +endif() + +message("-- [I] Options to support running tests of invariable memory modules: ${OPTION_SUPPORT_TEST_IMC_MODULE}") + +if(ENABLE_CAL_CRC_32) + message("-- [I] Support crc calculation for invariable memory modules: CRC-32") +else() + message("-- [I] Support crc calculation for invariable memory modules: CRC-16") +endif() + +if(ENABLE_CRC_USE_SW) + message("-- [I] Enable using software to calculate CRC") + if(ENABLE_SW_CRC_TABLE) + message("-- [I] Enable software using CRC pre-defined table to calculate CRC") + else() # ENABLE_SW_CRC_TABLE + message("-- [I] Disable software using CRC pre-defined table to calculate CRC") + endif() # ENABLE_SW_CRC_TABLE +else() # ENABLE_CRC_USE_SW + message("-- [I] Enable using hardware GPCRC to calculate CRC") +endif() # ENABLE_CRC_USE_SW + +message("-- [I] Start address calculate crc value of flash: ${FLASH_REGIONS_TEST}") + +# Run generate_lib_iec60730 +include(generate_lib_iec60730) + +if(${TOOL_CHAINS} STREQUAL "GCC") + if(ENABLE_UNIT_TESTING) + generate_lib_iec60730(${SDK_CMAKE_RELATIVE_DIR}) + get_target_property(MAIN_CFLAGS_LIB_IEC60730 slc_lib_iec60730 COMPILE_OPTIONS) + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + target_compile_options(unity PUBLIC + ${MAIN_CFLAGS_LIB_IEC60730}) + + endif() + + if(ENABLE_INTEGRATION_TESTING) + + if(TEST_SECURE_PERIPHERALS_ENABLE) + message("-- [I] Enable integration testing check secure peripherals") + else() + message("-- [I] Enable integration testing check non-secure peripherals") + endif() + + if(INTEGRATION_TEST_WDOG1_ENABLE) + message("-- [I] Watchdog 1 testing: enable") + else() + message("-- [I] Watchdog 1 testing: disable") + endif() + + if(INTEGRATION_TEST_USE_MARCHX_DISABLE) + message("-- [I] Using MarchXC algorithm: disable") + else() + message("-- [I] Using MarchXC algorithm: enable ") + endif() + + generate_lib_iec60730(${SDK_CMAKE_RELATIVE_DIR}) + get_target_property(COMPILE_DEFINITIONS_IEC60730 slc_lib_iec60730 COMPILE_DEFINITIONS) + endif() + +elseif (${TOOL_CHAINS} STREQUAL "IAR") + + if(PRE_BUILD_IAR_TOOL) + generate_lib_iec60730(${SDK_CMAKE_RELATIVE_DIR}) + get_target_property(MAIN_CFLAGS_LIB_IEC60730 slc_lib_iec60730 COMPILE_OPTIONS) + string(FIND "${MAIN_CFLAGS_LIB_IEC60730}" "cortex-m33" CORE_TYPE) + if(${CORE_TYPE} GREATER 0) + #message("-- [I] CORE_TYPE: cortex-m33") + set(PRE_IAR_CORE_TYPE "CORE_TYPE=m33") + else() + #message("-- [I] CORE_TYPE: cortex-m4") + set(PRE_IAR_CORE_TYPE "") + endif() + + if(ENABLE_CAL_CRC_32) + set(PRE_IAR_CAL_CRC_32 "CAL_CRC_32=enable") + else() + set(PRE_IAR_CAL_CRC_32 "") + endif() + + if(TEST_SECURE_PERIPHERALS_ENABLE) + set(PRE_IAR_SECURE_PERIPHERALS_ENABLE "SECURE_PERIPHERALS_ENABLE=enable") + else() + set(PRE_SECURE_PERIPHERALS_ENABLE "") + endif() + + execute_process(COMMAND python3 ${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}/pre_build_iar.py ${PRE_IAR_CORE_TYPE} ${PRE_IAR_CAL_CRC_32} ${PRE_IAR_SECURE_PERIPHERALS_ENABLE}) + endif() + + if(ENABLE_UNIT_TESTING) + + add_subdirectory(${SDK_CMAKE_RELATIVE_DIR}) + get_target_property(MAIN_CFLAGS_LIB_IEC60730 slc_lib_iec60730 COMPILE_OPTIONS) + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + target_compile_options(unity PUBLIC + ${MAIN_CFLAGS_LIB_IEC60730}) + set_property(TARGET unity PROPERTY C_STANDARD_REQUIRED OFF) + + endif() + + if(ENABLE_INTEGRATION_TESTING) + + add_subdirectory(${SDK_CMAKE_RELATIVE_DIR}) + if(TEST_SECURE_PERIPHERALS_ENABLE) + message("-- [I] Enable integration testing check secure peripherals") + else() + message("-- [I] Enable integration testing check non-secure peripherals") + endif() + + if(INTEGRATION_TEST_WDOG1_ENABLE) + message("-- [I] Watchdog 1 testing: enable") + else() + message("-- [I] Watchdog 1 testing: disable") + endif() + + if(INTEGRATION_TEST_USE_MARCHX_DISABLE) + message("-- [I] Using MarchXC algorithm: disable") + else() + message("-- [I] Using MarchXC algorithm: enable ") + endif() + + get_target_property(COMPILE_DEFINITIONS_IEC60730 slc_lib_iec60730 COMPILE_DEFINITIONS) + endif() +endif() + +# Start run test +add_subdirectory(lib) + +if(ENABLE_INTEGRATION_TESTING OR ENABLE_UNIT_TESTING) + add_subdirectory(test) +endif() + +# Start check coding convention +# Run coding_convention +include(coding_convention) + +if(CHECK_CODING_CONVETION_ENABLE) + set(CMAKE_EXPORT_COMPILE_COMMANDS ON) + # Disable response files + set(CMAKE_C_USE_RESPONSE_FILE_FOR_INCLUDES ON) + message("-- [I] Check coding convention: enable") + generate_coding_convention(${SDK_CMAKE_RELATIVE_DIR}) +endif() diff --git a/Makefile b/Makefile new file mode 100644 index 00000000..3d16b741 --- /dev/null +++ b/Makefile @@ -0,0 +1,6 @@ +prepare: + - @rm -rf build + rm -rf build + rm -rf log + mkdir build + mkdir log diff --git a/README.md b/README.md index d2a711e9..10314961 100644 --- a/README.md +++ b/README.md @@ -1,191 +1,2 @@ # IEC60730_Libs Platform codes for EFR32 series chips which complies to IEC60730 safety standard - -## Introduction -The IEC60730 library for EFR32 provides a basic implementation required to support the necessary requirements found in Table H.1 in the IEC60730 specification. It includes all the Power On Self Test (POST) functions executed when a device is first powered on, as well as Built In Self Test (BIST) functions that are called periodically to ensure correct operation. Certain portions of the requirements require a detailed understanding of the system under development. Callback functions must be completed by the developer to guarantee meeting the full specification. These include a Safe State function used when validation detects an anomaly, properly implemented communications channels (redundancy, error detection, periodic communications), and Plausibility functions to validate system state (internal variables and inputs/outputs). - -## License -Please refer document in Doc/html. - -## Release Notes -Please refer document in Doc/html. - -## IEC60730 Certificate -The Silicon Labs Appliances homepage will contain the final certificate and detailed report when it is completed. - -## OEM Testing -Once OEMs have completed integrating their system with the IEC60730 Library, they will need to certify their device with a qualified certification house. - -## Supported Families -This library supports all EFR32 devices listed in Doc/html. - -## Software Requirements -The IEC 60730 library dependencies: -- CMSIS package. -- Silicon Labs Devices header files. They are available in the Gecko SDK suite (platform). - -Currently tested on Windows and Linux platforms. - -## Building the IEC60730 Demo -To use Simplicity Studio to generate and build a demo IEC60730 and OEM Customization, refer to the IEC60730 Safety Library Integration Manual in the Doc folder for more details. - -## Generate document -Using Doxygen to generate HTML documentation, the documents will be generated in `Doc/html/EFR32_ICE60730_Libraries` - -```sh -$ sudo apt-get install doxygen -$ doxygen qat.doxygen -``` - -## Coding convention tool - -### Features - -- Automatically fixes end-of-file issues. -- Removes trailing whitespace from lines. -- Identifies and suggests fixes for common spelling errors using codespell. -- Formats code according to specified clang-format rules base on Silabs's coding standard. -- Checks code for potential errors and style issues using cppcheck. - -### Installation - -```sh -$ pip install pre-commit -$ sudo apt install clang-format clang-tidy cppcheck -``` - -### Run - -```sh -$ pre-commit install -$ pre-commit run --all-files -``` - -## Compiler specifications -**The C compilers:** -- GNU GCC V12.2 -- IAR EW for ARM V9.2 - -**Tools specification** - -Test frame work tools: -- Python V3.11 - -Simplicity Studio Commander -- Simplicity Commander version 1v16p8b1613 - -Support check coding convention by pre-commit -- pre-commit 3.5.0 -- clang-format version 19.0.0 -- Cppcheck 1.90 - -Support CMake -- CMake version >=3.25 - -**Source code control:** -- GIT V2.39 -- JIRA V8.22.2 - -## System Architecture -This library has two primary components. The POST component is run immediately after power on, validating system state before entering the main execution loop. - -The BIST component is run periodically in the -main execution loop. - -Validation for IEC 60730 also requires external communications validation. Every OEM application has unique external communications requirements. This library provides an example UART communications library that meets IEC 60730 requirements. OEMs must adapt their communications to IEC60730 requirements. - -This EFR32 IEC60730 library fulfills the requirements for a **Class B** device. - -**For more details, please refer document in Doc/html.** - -## Step run CMake - -### Install Dependencies - -#### Install slcc - -- Follow this link to Install slc: [Install slc](https://docs.silabs.com/simplicity-studio-5-users-guide/latest/ss-5-users-guide-tools-slc-cli/02-installation) -- Follow this link to [Install Amazon Corretto 17 on Debian-Based Linux](https://docs.aws.amazon.com/corretto/latest/corretto-17-ug/downloads-list.html) - -##### How to use slc - -Add the path to the expanded slc-cli to your PATH sh export PATH=$PATH:~/SimplicityStudio/slc_cli_linux/slc_cli/ - -Configure SDK. For example sh slc configuration --sdk ~/SimplicityStudio/SDKs/gecko_sdk/ - -Run slc signature trust --sdk if you have not yet trusted your SDK. - -For example your SDK locate at ~/SimplicityStudio/SDKs/gecko_sdk/ sh slc signature trust --sdk ~/SimplicityStudio/SDKs/gecko_sdk/ - -Set toolchain For example sh slc configuration -gcc=~/SimplicityStudio-5/SimplicityStudio_v5/developer/toolchains/gnu_arm/10.3_2021.10/ - -Generate the project sh slc generate \path\to\example.slcp -np -d -name= --with - -Choose one of the options below to generate the project - -| Operation | Arguments | Description | -|---|---|---| -|generate | -cp, --copy-sources | Copies all files referenced by this project, selected components, and any other running tools (Pin Tool, etc.). By default, no files are copied. | -|^ | -cpproj, --copy-proj-sources | Copies all files referenced by the project and links any SDK sources. This can be combined with -cpsdk. | -|^ | -cpsdk, --copy-sdk-sources | Copies all files referenced by the selected components and links any project sources. This can be combined with -cpproj. | - -##### For example - -```sh -$ GSDK=~/SimplicityStudio/SDKs/gecko_sdk -$ slc configuration --sdk=$GSDK --gcc-toolchain=/Applications/ARM -$ slc generate $GSDK/app/common/example/blink_baremetal -np -d blinky -name=blinky -o makefile - --with brd4166a -``` - -### Export Variable - -Export SDK_PATH=, ARM_GCC_DIR=, TOOL_CHAINS and START_ADDR_FLASH (flash start address support calculate crc for module invariable memory) before run config CMake. - -```sh -$ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk -$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin -$ export TOOL_CHAINS=GCC -$ export START_ADDR_FLASH=0x8000000 -``` - -with START_ADDR_FLASH=0x8000000 is flash start address of board name brd4187c (chip EFR32MG24) - - 1. Create Source and CMakeLists.txt - 2. mkdir build - 3. cd build - 4. cmake .. - Generting the Build Files / Configure the Project - 5. cmake --build . - -### Run unit test - -CMake config - -```sh -$ make prepare -$ cd build -$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_UNIT_TESTING=ON -DBOARD_NAME=brd4187c -``` - -With the commands above, the default value supports calculation CRC-16. If you want to change to calculate for CRC-32 bits, use the config command below - -```sh -$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_UNIT_TESTING=ON -DBOARD_NAME=brd4187c -DENABLE_CAL_CRC_32=ON -``` - -Here is some options to support running tests of invariable memory modules: -- ENABLE_CAL_CRC_32 -- ENABLE_CRC_USE_SW (if this option ON, you can enable option: ENABLE_SW_CRC_TABLE) - -CMake Build - -```sh -$ cmake --build . --target unit_tests -j4 -``` - -or - -```sh -$ make unit_tests -j4 -``` - diff --git a/cmake/coding_convention.cmake b/cmake/coding_convention.cmake new file mode 100644 index 00000000..62df9f8c --- /dev/null +++ b/cmake/coding_convention.cmake @@ -0,0 +1,154 @@ +function(generate_coding_convention relative_dir) + + set(FULL_DIR ${CMAKE_SOURCE_DIR}/${relative_dir}) + + if(DEFINED ENV{TOOL_CHAINS}) + set(TOOL_CHAINS "$ENV{TOOL_CHAINS}") + else() + set(TOOL_CHAINS "GCC") + endif() + execute_process(COMMAND make prepare + WORKING_DIRECTORY ${FULL_DIR}) + + if(${TOOL_CHAINS} STREQUAL "GCC") + execute_process(COMMAND slc generate -p + ${FULL_DIR}/lib_iec60730_coding_convention.slcp -np -d ${FULL_DIR}/src -cpproj -name=lib_iec60730 -o cmake --with ${BOARD_NAME} + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) + elseif (${TOOL_CHAINS} STREQUAL "IAR") + execute_process(COMMAND slc generate -p + ${FULL_DIR}/lib_iec60730_coding_convention.slcp -np -d ${FULL_DIR}/src -cpproj -name=lib_iec60730 -o cmake --with ${BOARD_NAME} + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) + execute_process(COMMAND slc generate -p + ${FULL_DIR}/lib_iec60730_coding_convention.slcp -np -d ${FULL_DIR}/src -cpproj -name=lib_iec60730 -o iar --with ${BOARD_NAME} + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) + endif() + + if (EXISTS ${FULL_DIR}/CMakeLists.txt) + message("-- [I] ${SDK_CMAKE_RELATIVE_DIR} path have CMake File: ${FULL_DIR}/CMakeLists.txt") + add_subdirectory(${FULL_DIR}) + else() + message("-- [I] ${SDK_CMAKE_RELATIVE_DIR} path don't have CMake File: ${FULL_DIR}") + endif() + + set(LINKER_PATH ${CMAKE_BINARY_DIR}/${SDK_LIB_CMAKE_RELATIVE_DIR}/${LIB_IEC60730_MAP}) + set(CODING_CONVENTION "coding_convention") + set(CODING_CONVENTION_BUILD_DIR "build/${BOARD_NAME}/${TOOL_CHAINS}/${CODING_CONVENTION}") + + if(${TOOL_CHAINS} STREQUAL "GCC") + set(SOURCE_LIBIEC60730 + "${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}/app.c" + "${CMAKE_SOURCE_DIR}/lib/asm/sl_iec60730_vmc_marchc.S" + "${CMAKE_SOURCE_DIR}/lib/asm/sl_iec60730_vmc_marchxc.S" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_bist.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers_ns.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers_s.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_invariable_memory.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_irq.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_post.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_program_counter.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_system_clock.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_variable_memory.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_watchdog.c" + "${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}/main.c" + ) + elseif(${TOOL_CHAINS} STREQUAL "IAR") + set(SOURCE_LIBIEC60730 + "${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}/app.c" + "${CMAKE_SOURCE_DIR}/lib/asm/sl_iec60730_vmc_marchc_iar.S" + "${CMAKE_SOURCE_DIR}/lib/asm/sl_iec60730_vmc_marchxc_iar.S" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_bist.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers_ns.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers_s.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_invariable_memory.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_irq.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_post.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_program_counter.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_system_clock.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_variable_memory.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_watchdog.c" + "${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}/main.c" + ) + endif() + + set(HEADER_LIBIEC60730 PUBLIC + "${CMAKE_SOURCE_DIR}/lib/config/sl_iec60730_config.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_toolchain.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_board.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_comm.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_cpu_registers.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_internal.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_invariable_memory.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_irq.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_program_counter.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_system_clock.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_variable_memory.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_watchdog.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730.h" + "${CMAKE_SOURCE_DIR}/lib/lib/asm" + "${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}" + ) + + + set(CODING_SOURCES + ${SOURCE_LIBIEC60730} + ) + set(CODING_INCLUDE + ${HEADER_LIBIEC60730}) + add_executable(${CODING_CONVENTION} "${CODING_SOURCES}") + target_include_directories(${CODING_CONVENTION} PUBLIC + "${CMAKE_SOURCE_DIR}/lib/config/" + "${CMAKE_SOURCE_DIR}/lib/inc/" + "${CODING_INCLUDE}" + ) + + + target_link_libraries(${CODING_CONVENTION} PUBLIC slc_lib_iec60730) + + # Create .bin, .hex and .s37 artifacts after building the project + if(${TOOL_CHAINS} STREQUAL "GCC") + add_custom_command(TARGET ${CODING_CONVENTION} + POST_BUILD + COMMAND rm -rf ${CODING_CONVENTION_BUILD_DIR} + COMMAND ${CMAKE_OBJCOPY} -O srec "$" "$/$.s37" + COMMAND ${CMAKE_OBJCOPY} -O ihex "$" "$/$.hex" + COMMAND ${CMAKE_OBJCOPY} -O binary "$" "$/$.bin" + COMMAND mkdir -p ${CODING_CONVENTION_BUILD_DIR} + COMMAND mv ${CODING_CONVENTION}.out ${CODING_CONVENTION_BUILD_DIR} + COMMAND mv ${CODING_CONVENTION}.bin ${CODING_CONVENTION_BUILD_DIR} + COMMAND mv ${CODING_CONVENTION}.hex ${CODING_CONVENTION_BUILD_DIR} + COMMAND mv ${CODING_CONVENTION}.s37 ${CODING_CONVENTION_BUILD_DIR} + COMMAND ${CMAKE_COMMAND} -E copy ${LINKER_PATH} ${CODING_CONVENTION_BUILD_DIR} + COMMAND mv ${CODING_CONVENTION_BUILD_DIR}/${LIB_IEC60730_MAP} ${CODING_CONVENTION_BUILD_DIR}/${CODING_CONVENTION}.map + ) + elseif (${TOOL_CHAINS} STREQUAL "IAR") + add_custom_command(TARGET ${CODING_CONVENTION} + POST_BUILD + COMMAND rm -rf ${CODING_CONVENTION_BUILD_DIR} + COMMAND ${CMAKE_OBJCOPY} --srec "$" "$/$.s37" + COMMAND ${CMAKE_OBJCOPY} --ihex "$" "$/$.hex" + COMMAND ${CMAKE_OBJCOPY} --bin "$" "$/$.bin" + COMMAND mkdir -p ${CODING_CONVENTION_BUILD_DIR} + COMMAND mv ${CODING_CONVENTION}.out ${CODING_CONVENTION_BUILD_DIR} + COMMAND mv ${CODING_CONVENTION}.bin ${CODING_CONVENTION_BUILD_DIR} + COMMAND mv ${CODING_CONVENTION}.hex ${CODING_CONVENTION_BUILD_DIR} + COMMAND mv ${CODING_CONVENTION}.s37 ${CODING_CONVENTION_BUILD_DIR} + COMMAND ${CMAKE_COMMAND} -E copy ${LINKER_PATH} ${CODING_CONVENTION_BUILD_DIR} + COMMAND mv ${CODING_CONVENTION_BUILD_DIR}/${LIB_IEC60730_MAP} ${CODING_CONVENTION_BUILD_DIR}/${CODING_CONVENTION}.map + ) + endif() + + # Run post-build pipeline to perform additional post-processing + if(post_build_command) + add_custom_command(TARGET ${CODING_CONVENTION} + POST_BUILD + COMMAND ${post_build_command} + ) + endif() + # copy database to folder tools + execute_process(COMMAND rm -rf ${CMAKE_SOURCE_DIR}/tools/compile_commands.json + WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}) + execute_process(COMMAND cp ${CMAKE_SOURCE_DIR}/build/compile_commands.json ${CMAKE_SOURCE_DIR}/tools/ + WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}) +endfunction(generate_coding_convention) \ No newline at end of file diff --git a/cmake/generate_lib_iec60730.cmake b/cmake/generate_lib_iec60730.cmake new file mode 100644 index 00000000..5ed314c1 --- /dev/null +++ b/cmake/generate_lib_iec60730.cmake @@ -0,0 +1,63 @@ +# choose toolchain +if(DEFINED ENV{TOOL_CHAINS}) + set(TOOL_CHAINS "$ENV{TOOL_CHAINS}") +else() +set(TOOL_CHAINS "GCC") +endif() + +function(generate_lib_iec60730 relative_dir) + + set(FULL_DIR ${CMAKE_SOURCE_DIR}/${relative_dir}) + + if(TEST_SECURE_PERIPHERALS_ENABLE AND ENABLE_INTEGRATION_TESTING) + execute_process(COMMAND make prepare + WORKING_DIRECTORY ${FULL_DIR}) + execute_process(COMMAND make vmc_support + WORKING_DIRECTORY ${FULL_DIR}) + else() + execute_process(COMMAND make prepare + WORKING_DIRECTORY ${FULL_DIR}) + endif() + + if(${TOOL_CHAINS} STREQUAL "GCC") + if(TEST_SECURE_PERIPHERALS_ENABLE AND ENABLE_INTEGRATION_TESTING) + execute_process(COMMAND slc generate -p + ${FULL_DIR}/lib_iec60730.slcp -np -d ${FULL_DIR}/src -cpproj -name=lib_iec60730_vmc_support -o cmake --with ${BOARD_NAME} + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) + execute_process(COMMAND slc generate -p + ${FULL_DIR}/lib_iec60730_secure.slcp -np -d ${FULL_DIR}/src -cpproj -name=lib_iec60730 -o cmake --with ${BOARD_NAME} + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) + else() + execute_process(COMMAND slc generate -p + ${FULL_DIR}/lib_iec60730.slcp -np -d ${FULL_DIR}/src -cpproj -name=lib_iec60730 -o cmake --with ${BOARD_NAME} + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) + endif() + elseif (${TOOL_CHAINS} STREQUAL "IAR") + if(TEST_SECURE_PERIPHERALS_ENABLE AND ENABLE_INTEGRATION_TESTING) + execute_process(COMMAND slc generate -p + ${FULL_DIR}/lib_iec60730.slcp -np -d ${FULL_DIR}/src -cpproj -name=lib_iec60730_vmc_support -o cmake --with ${BOARD_NAME} + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) + execute_process(COMMAND slc generate -p + ${FULL_DIR}/lib_iec60730_secure.slcp -np -d ${FULL_DIR}/src -cpproj -name=lib_iec60730 -o cmake --with ${BOARD_NAME} + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) + execute_process(COMMAND slc generate -p + ${FULL_DIR}/lib_iec60730_secure.slcp -np -d ${FULL_DIR}/src -cpproj -name=lib_iec60730 -o iar --with ${BOARD_NAME} + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) + else() + execute_process(COMMAND slc generate -p + ${FULL_DIR}/lib_iec60730.slcp -np -d ${FULL_DIR}/src -cpproj -name=lib_iec60730 -o cmake --with ${BOARD_NAME} + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) + execute_process(COMMAND slc generate -p + ${FULL_DIR}/lib_iec60730.slcp -np -d ${FULL_DIR}/src -cpproj -name=lib_iec60730 -o iar --with ${BOARD_NAME} + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) + endif() + endif() + + if (EXISTS ${FULL_DIR}/CMakeLists.txt) + message("-- [I] ${SDK_CMAKE_RELATIVE_DIR} path have CMake File: ${FULL_DIR}/CMakeLists.txt") + add_subdirectory(${FULL_DIR}) + else() + message("-- [I] ${SDK_CMAKE_RELATIVE_DIR} path don't have CMake File: ${FULL_DIR}") + endif() + +endfunction(generate_lib_iec60730) \ No newline at end of file diff --git a/cmake/integration_test.cmake b/cmake/integration_test.cmake new file mode 100644 index 00000000..f455d593 --- /dev/null +++ b/cmake/integration_test.cmake @@ -0,0 +1,222 @@ +function(generate_integration_test relative_dir target_name) + set(FULL_DIR ${CMAKE_SOURCE_DIR}/${relative_dir}) + set(LINKER_PATH ${CMAKE_BINARY_DIR}/${SDK_LIB_CMAKE_RELATIVE_DIR}/${LIB_IEC60730_MAP}) + set(INTEGRATION_TEST_NAME ${target_name}) + string(REPLACE "integration_test_" "" INTEGRATION_SOURCE_NAME "${INTEGRATION_TEST_NAME}") + + if(DEFINED ENV{TOOL_CHAINS}) + set(TOOL_CHAINS "$ENV{TOOL_CHAINS}") + else() + set(TOOL_CHAINS "GCC") + endif() + + # enable test peripherals non-secure test + if(TEST_SECURE_PERIPHERALS_ENABLE) + set(INTEGRATION_TEST_NAME_BUILD_DIR "build/${BOARD_NAME}/${TOOL_CHAINS}/${target_name}/S") + if(${target_name} STREQUAL "integration_test_iec60730_variable_memory") + set(DEFINE_TEST_SECURE_PERIPHERALS_ENABLE "SL_IEC60730_NON_SECURE_ENABLE") + set(DEFINE_SL_TRUSTZONE_SECURE_ENABLE "SL_TRUSTZONE_NON_SECURE") + else() + set(DEFINE_TEST_SECURE_PERIPHERALS_ENABLE "SL_IEC60730_SECURE_ENABLE") + set(DEFINE_SL_TRUSTZONE_SECURE_ENABLE "SL_TRUSTZONE_SECURE") + endif() + else() + set(INTEGRATION_TEST_NAME_BUILD_DIR "build/${BOARD_NAME}/${TOOL_CHAINS}/${target_name}/NS") + set(DEFINE_TEST_SECURE_PERIPHERALS_ENABLE "SL_IEC60730_NON_SECURE_ENABLE") + set(DEFINE_SL_TRUSTZONE_SECURE_ENABLE "SL_TRUSTZONE_NON_SECURE") + endif() + + # enable integration test watchdog 1 + if(INTEGRATION_TEST_WDOG1_ENABLE) + set(DEFINE_SL_IEC60730_WDOG1_ENABLE "SL_IEC60730_WDOG1_ENABLE=1") + else() + set(DEFINE_SL_IEC60730_WDOG1_ENABLE "SL_IEC60730_WDOG1_ENABLE=0") + endif() + + # disable using MarchXC algorithm + if(INTEGRATION_TEST_USE_MARCHX_DISABLE) + set(DEFINE_SL_IEC60730_USE_MARCHX_ENABLE "SL_IEC60730_USE_MARCHX_ENABLE=0") + else() + set(DEFINE_SL_IEC60730_USE_MARCHX_ENABLE "SL_IEC60730_USE_MARCHX_ENABLE=1") + endif() + + + if(${target_name} STREQUAL "integration_test_iec60730_cpu_registers") + set(INTEGRATION_TEST_SOURCES + "${FULL_DIR}/src/main.c" + "${FULL_DIR}/src/app.c" + "${FULL_DIR}/src/integration_test_common.c" + "${FULL_DIR}/src/${target_name}.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_cpu_registers.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_cpu_registers_ns.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_cpu_registers_s.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_post.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_bist.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_watchdog.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_program_counter.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_system_clock.c" + ) + elseif(${target_name} STREQUAL "integration_test_iec60730_variable_memory") + if(${TOOL_CHAINS} STREQUAL "GCC") + set(INTEGRATION_TEST_SOURCES + "${FULL_DIR}/src/main.c" + "${FULL_DIR}/src/app.c" + "${FULL_DIR}/src/integration_test_common.c" + "${FULL_DIR}/src/${target_name}.c" + "${FULL_DIR}/../../lib/src/sl_${INTEGRATION_SOURCE_NAME}.c" + "${FULL_DIR}/../../lib/asm/sl_iec60730_vmc_marchc.S" + "${FULL_DIR}/../../lib/asm/sl_iec60730_vmc_marchxc.S" + "${FULL_DIR}/../../lib/src/sl_iec60730_post.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_bist.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_watchdog.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_program_counter.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_system_clock.c" + ) + elseif(${TOOL_CHAINS} STREQUAL "IAR") + set(INTEGRATION_TEST_SOURCES + "${FULL_DIR}/src/main.c" + "${FULL_DIR}/src/app.c" + "${FULL_DIR}/src/integration_test_common.c" + "${FULL_DIR}/src/${target_name}.c" + "${FULL_DIR}/../../lib/src/sl_${INTEGRATION_SOURCE_NAME}.c" + "${FULL_DIR}/../../lib/asm/sl_iec60730_vmc_marchc_iar.S" + "${FULL_DIR}/../../lib/asm/sl_iec60730_vmc_marchxc_iar.S" + "${FULL_DIR}/../../lib/src/sl_iec60730_post.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_bist.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_watchdog.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_program_counter.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_system_clock.c" + ) + endif() + else() + set(INTEGRATION_TEST_SOURCES + "${FULL_DIR}/src/main.c" + "${FULL_DIR}/src/app.c" + "${FULL_DIR}/src/integration_test_common.c" + "${FULL_DIR}/src/${target_name}.c" + "${FULL_DIR}/../../lib/src/sl_${INTEGRATION_SOURCE_NAME}.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_post.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_bist.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_watchdog.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_program_counter.c" + "${FULL_DIR}/../../lib/src/sl_iec60730_system_clock.c" + ) + endif() + + string(TOUPPER ${INTEGRATION_TEST_NAME} DEFINE_INTEGRATION_TEST) + set(INTEGRATION_TEST_INCLUDES + "${FULL_DIR}/inc") + + if(${TOOL_CHAINS} STREQUAL "GCC") + set(DEFINE_IAR_TESTING "GCC_TESTING") + elseif(${TOOL_CHAINS} STREQUAL "IAR") + set(DEFINE_IAR_TESTING "IAR_TESTING") + endif() + + # Set address start calculate crc + if(DEFINED ENV{FLASH_REGIONS_TEST}) + set(FLASH_REGIONS_TEST "$ENV{FLASH_REGIONS_TEST}") + else() + set(FLASH_REGIONS_TEST "0x00000000") + endif() + + if(ENABLE_CAL_CRC_32) + set(DEFINE_ENABLE_CAL_CRC_32 "SL_IEC60730_USE_CRC_32_ENABLE=1") + else() + set(DEFINE_ENABLE_CAL_CRC_32 "SL_IEC60730_USE_CRC_32_ENABLE=0") + endif() + + if(ENABLE_CRC_USE_SW) + set(DEFINE_ENABLE_CRC_USE_SW "SL_IEC60730_CRC_USE_SW_ENABLE=1") + if(ENABLE_SW_CRC_TABLE) + set(DEFINE_ENABLE_SW_CRC_TABLE "SL_IEC60730_SW_CRC_TABLE_ENABLE=1") + else() # ENABLE_SW_CRC_TABLE + set(DEFINE_ENABLE_SW_CRC_TABLE "SL_IEC60730_SW_CRC_TABLE_ENABLE=0") + endif() # ENABLE_SW_CRC_TABLE + else() # ENABLE_CRC_USE_SW + set(DEFINE_ENABLE_CRC_USE_SW "SL_IEC60730_CRC_USE_SW_ENABLE=0") + endif() # ENABLE_CRC_USE_SW + + add_executable(${INTEGRATION_TEST_NAME} ${INTEGRATION_TEST_SOURCES}) + target_include_directories(${INTEGRATION_TEST_NAME} PUBLIC ${INTEGRATION_TEST_INCLUDES}) + target_compile_definitions(${INTEGRATION_TEST_NAME} PUBLIC ${DEFINE_INTEGRATION_TEST}_ENABLE + ${DEFINE_ENABLE_CAL_CRC_32} + ${DEFINE_ENABLE_CRC_USE_SW} + ${DEFINE_ENABLE_SW_CRC_TABLE} + ${DEFINE_TEST_SECURE_PERIPHERALS_ENABLE} + ${DEFINE_SL_TRUSTZONE_SECURE_ENABLE} + ${DEFINE_SL_IEC60730_WDOG1_ENABLE} + ${DEFINE_SL_IEC60730_USE_MARCHX_ENABLE} + ${DEFINE_IAR_TESTING}) + if(TEST_SECURE_PERIPHERALS_ENABLE AND (${target_name} STREQUAL "integration_test_iec60730_variable_memory")) + target_link_libraries(${INTEGRATION_TEST_NAME} PUBLIC slc_lib_iec60730_vmc_support) + else() + target_link_libraries(${INTEGRATION_TEST_NAME} PUBLIC slc_lib_iec60730) + endif() + + # Create .bin, .hex and .s37 artifacts after building the project + if(${TOOL_CHAINS} STREQUAL "GCC") + add_custom_command(TARGET ${INTEGRATION_TEST_NAME} + POST_BUILD + COMMAND rm -rf ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND ${CMAKE_OBJCOPY} -O srec "$" "$/$.s37" + COMMAND ${CMAKE_OBJCOPY} -O ihex "$" "$/$.hex" + COMMAND ${CMAKE_OBJCOPY} -O binary "$" "$/$.bin" + COMMAND mkdir -p ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND mv ${INTEGRATION_TEST_NAME}.out ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND mv ${INTEGRATION_TEST_NAME}.bin ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND mv ${INTEGRATION_TEST_NAME}.hex ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND mv ${INTEGRATION_TEST_NAME}.s37 ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND ${CMAKE_COMMAND} -E copy ${LINKER_PATH} ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND mv ${INTEGRATION_TEST_NAME_BUILD_DIR}/${LIB_IEC60730_MAP} ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.map + ) + elseif (${TOOL_CHAINS} STREQUAL "IAR") + add_custom_command(TARGET ${INTEGRATION_TEST_NAME} + POST_BUILD + COMMAND rm -rf ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND ${CMAKE_OBJCOPY} --srec "$" "$/$.s37" + COMMAND ${CMAKE_OBJCOPY} --ihex "$" "$/$.hex" + COMMAND ${CMAKE_OBJCOPY} --bin "$" "$/$.bin" + COMMAND mkdir -p ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND mv ${INTEGRATION_TEST_NAME}.out ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND mv ${INTEGRATION_TEST_NAME}.bin ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND mv ${INTEGRATION_TEST_NAME}.hex ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND mv ${INTEGRATION_TEST_NAME}.s37 ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND ${CMAKE_COMMAND} -E copy ${LINKER_PATH} ${INTEGRATION_TEST_NAME_BUILD_DIR} + COMMAND mv ${INTEGRATION_TEST_NAME_BUILD_DIR}/${LIB_IEC60730_MAP} ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.map + ) + endif() + + if(${target_name} STREQUAL "integration_test_iec60730_invariable_memory") + if(${TOOL_CHAINS} STREQUAL "GCC") + if(ENABLE_CAL_CRC_32) + set(post_build_command ${CMAKE_OBJDUMP} -t -h -d -S ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.out > ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.lst + && bash ${CMAKE_SOURCE_DIR}/lib/crc/sl_iec60730_cal_crc32.sh '${CMAKE_CURRENT_BINARY_DIR}/${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}' '' 'C:/srecord/bin' '${TOOL_CHAINS}' "${FLASH_REGIONS_TEST}") + else() + set(post_build_command ${CMAKE_OBJDUMP} -t -h -d -S ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.out > ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.lst + && bash ${CMAKE_SOURCE_DIR}/lib/crc/sl_iec60730_cal_crc16.sh '${CMAKE_CURRENT_BINARY_DIR}/${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}' '' 'C:/srecord/bin' '${TOOL_CHAINS}' "${FLASH_REGIONS_TEST}") + endif() + elseif (${TOOL_CHAINS} STREQUAL "IAR") + if(ENABLE_CAL_CRC_32) + set(post_build_command ${CMAKE_OBJDUMP} --all --source ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.out > ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.lst + && bash ${CMAKE_SOURCE_DIR}/lib/crc/sl_iec60730_cal_crc32.sh '${CMAKE_CURRENT_BINARY_DIR}/${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}' '' 'C:/srecord/bin' '${TOOL_CHAINS}' "${FLASH_REGIONS_TEST}") + else() + set(post_build_command ${CMAKE_OBJDUMP} --all --source ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.out > ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.lst + && bash ${CMAKE_SOURCE_DIR}/lib/crc/sl_iec60730_cal_crc16.sh '${CMAKE_CURRENT_BINARY_DIR}/${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}' '' 'C:/srecord/bin' '${TOOL_CHAINS}' "${FLASH_REGIONS_TEST}") + endif() + endif() + else() + if(${TOOL_CHAINS} STREQUAL "GCC") + set(post_build_command ${CMAKE_OBJDUMP} -t -h -d -S ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.out > ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.lst) + elseif (${TOOL_CHAINS} STREQUAL "IAR") + set(post_build_command ${CMAKE_OBJDUMP} --all --source ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.out > ${INTEGRATION_TEST_NAME_BUILD_DIR}/${INTEGRATION_TEST_NAME}.lst) + endif() + endif() + # Run post-build pipeline to perform additional post-processing + if(post_build_command) + add_custom_command(TARGET ${INTEGRATION_TEST_NAME} + POST_BUILD + COMMAND ${post_build_command} + ) + endif() +endfunction(generate_integration_test) \ No newline at end of file diff --git a/cmake/makefile.cmake b/cmake/makefile.cmake new file mode 100644 index 00000000..9cca61f4 --- /dev/null +++ b/cmake/makefile.cmake @@ -0,0 +1,46 @@ + +set(MAKEFILE_DIR "${CMAKE_CURRENT_SOURCE_DIR}/Make") +option(NON_SECURE_EN "NON_SECURE_EN" FALSE) +option(APP_SECURE "APP_SECURE" FALSE) + +if(DEFINED ENV{COMPONENT}) + set(COMPONENT "$ENV{COMPONENT}") +else() + set(COMPONENT "cpu_registers") + message("-- [I] Run cmake build . --target make_info for know componnents support. By default component is cpu_registers") +endif() + +if(DEFINED ENV{COMPILER}) + set(COMPILER "$ENV{COMPILER}") +else() + set(COMPILER "GCC") + message("-- [I] Export COMPILER= to choose compiler make build. By default is GCC") +endif() + +if(DEFINED ENV{TOOL_DIRS}) + set(TOOL_DIRS "$ENV{TOOL_DIRS}") +else() + set(TOOL_DIRS "${TOOLCHAIN_DIR}") +endif() + +# run make info +add_custom_target(make_info + COMMAND make info + WORKING_DIRECTORY ${MAKEFILE_DIR}/ +) + +# run make build +if(DEFINED ENV{DERIVATIVE}) + set(DERIVATIVE "$ENV{DERIVATIVE}") +else() + set(DERIVATIVE "efr32mg12p132f1024gl125") + message("-- [I] Export DERIVATIVE= to choose device make build. By default is efr32mg12p132f1024gl125") +endif() + +add_custom_target(make_build + COMMAND make build COMPONENT=${COMPONENT} DERIVATIVE=${DERIVATIVE} NON_SECURE_EN=${NON_SECURE_EN} APP_SECURE=${APP_SECURE} + WORKING_DIRECTORY ${MAKEFILE_DIR}/ +) + + + diff --git a/cmake/toolchain.cmake b/cmake/toolchain.cmake new file mode 100644 index 00000000..d71a403a --- /dev/null +++ b/cmake/toolchain.cmake @@ -0,0 +1,92 @@ +set(CMAKE_SYSTEM_NAME Generic) +set(CMAKE_SYSTEM_PROCESSOR arm) +set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY) + +if(WIN32) + set(EXE_SUFFIX ".exe") +else() + set(EXE_SUFFIX "") +endif() + +# choose toolchain +if(DEFINED ENV{TOOL_CHAINS}) + set(TOOL_CHAINS "$ENV{TOOL_CHAINS}") +else() +set(TOOL_CHAINS "GCC") +endif() + +if(DEFINED ENV{TOOL_DIRS}) + set(TOOLCHAIN_DIR "$ENV{TOOL_DIRS}/") +elseif(WIN32) + set(TOOLCHAIN_DIR "/bin/") +elseif(APPLE) + set(TOOLCHAIN_DIR "/bin/") +else() + set(TOOLCHAIN_DIR "/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin/") +endif() + +if(DEFINED ENV{POST_BUILD_EXE}) + set(POST_BUILD_EXE "$ENV{POST_BUILD_EXE}") +elseif(WIN32) + set(POST_BUILD_EXE "") +elseif(APPLE) + set(POST_BUILD_EXE "") +else() + set(POST_BUILD_EXE "/developer/adapter_packs/commander/commander") +endif() + +if(DEFINED ENV{NINJA_EXE_PATH}) + set(CMAKE_MAKE_PROGRAM "$ENV{NINJA_EXE_PATH}" CACHE FILEPATH "" FORCE) +elseif(WIN32) + set(NINJA_RUNTIME_PATH "") +elseif(APPLE) + set(NINJA_RUNTIME_PATH "") +else() + set(NINJA_RUNTIME_PATH "") +endif() +# Use default lookup mechanisms if the OS specific values are not set above +if (NINJA_RUNTIME_PATH) + set(CMAKE_MAKE_PROGRAM ${NINJA_RUNTIME_PATH} CACHE FILEPATH "" FORCE) +endif() + +if(${TOOL_CHAINS} STREQUAL "GCC") + set(TARGET_TRIPLET "arm-none-eabi-") + set(CMAKE_C_COMPILER ${TOOLCHAIN_DIR}${TARGET_TRIPLET}gcc${EXE_SUFFIX}) + set(CMAKE_CXX_COMPILER ${TOOLCHAIN_DIR}${TARGET_TRIPLET}g++${EXE_SUFFIX}) + set(CMAKE_ASM_COMPILER ${TOOLCHAIN_DIR}${TARGET_TRIPLET}gcc${EXE_SUFFIX}) + set(CMAKE_LINKER ${TOOLCHAIN_DIR}${TARGET_TRIPLET}gcc${EXE_SUFFIX}) + set(CMAKE_AR ${TOOLCHAIN_DIR}${TARGET_TRIPLET}ar${EXE_SUFFIX}) + set(CMAKE_SIZE_UTIL ${TOOLCHAIN_DIR}${TARGET_TRIPLET}size${EXE_SUFFIX}) + set(CMAKE_STRIP ${TOOLCHAIN_DIR}${TARGET_TRIPLET}strip${EXE_SUFFIX}) + set(CMAKE_OBJCOPY ${TOOLCHAIN_DIR}${TARGET_TRIPLET}objcopy${EXE_SUFFIX}) + set(CMAKE_OBJDUMP ${TOOLCHAIN_DIR}${TARGET_TRIPLET}objdump${EXE_SUFFIX}) + set(CMAKE_NM_UTIL ${TOOLCHAIN_DIR}${TARGET_TRIPLET}gcc-nm${EXE_SUFFIX}) + set(CMAKE_RANLIB ${TOOLCHAIN_DIR}${TARGET_TRIPLET}gcc-ranlib${EXE_SUFFIX}) + set(CMAKE_GCOV ${TOOLCHAIN_DIR}${TARGET_TRIPLET}gcov${EXE_SUFFIX}) +elseif (${TOOL_CHAINS} STREQUAL "IAR") + set(TARGET_TRIPLET "") + set(CMAKE_C_COMPILER ${TOOLCHAIN_DIR}${TARGET_TRIPLET}iccarm${EXE_SUFFIX}) + set(CMAKE_CXX_COMPILER ${TOOLCHAIN_DIR}${TARGET_TRIPLET}iccarm${EXE_SUFFIX}) + set(CMAKE_ASM_COMPILER ${TOOLCHAIN_DIR}${TARGET_TRIPLET}iasmarm${EXE_SUFFIX}) + set(CMAKE_LINKER ${TOOLCHAIN_DIR}${TARGET_TRIPLET}ilinkarm${EXE_SUFFIX}) + set(CMAKE_AR ${TOOLCHAIN_DIR}${TARGET_TRIPLET}iarchive${EXE_SUFFIX}) + set(CMAKE_OBJCOPY ${TOOLCHAIN_DIR}${TARGET_TRIPLET}ielftool${EXE_SUFFIX}) + set(CMAKE_OBJDUMP ${TOOLCHAIN_DIR}${TARGET_TRIPLET}ielfdumparm${EXE_SUFFIX}) +else() + message( SEND_ERROR "Toolchain invalid: ${TOOL_CHAINS}, select: GCC or IAR" ) +endif() + +set(CMAKE_C_STANDARD_REQUIRED OFF) +set(CMAKE_CXX_STANDARD_REQUIRED OFF) +set(CMAKE_C_EXTENSIONS OFF) + +set(CMAKE_C_FLAGS_RELEASE "" CACHE STRING "") +set(CMAKE_CXX_FLAGS_RELEASE "" CACHE STRING "") + +set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER) +set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY) +set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY) + +set(CMAKE_EXECUTABLE_SUFFIX .out) +set(CMAKE_EXECUTABLE_SUFFIX_C .out) +set(CMAKE_EXECUTABLE_SUFFIX_CXX .out) diff --git a/cmake/unit_test.cmake b/cmake/unit_test.cmake new file mode 100644 index 00000000..5502afcb --- /dev/null +++ b/cmake/unit_test.cmake @@ -0,0 +1,143 @@ +function(generate_unit_test relative_dir target_name source_file) + set(FULL_DIR ${CMAKE_SOURCE_DIR}/${relative_dir}) + set(LINKER_PATH ${CMAKE_BINARY_DIR}/${SDK_LIB_CMAKE_RELATIVE_DIR}/${LIB_IEC60730_MAP}) + set(UNIT_TEST_NAME ${target_name}) + + if(DEFINED ENV{TOOL_CHAINS}) + set(TOOL_CHAINS "$ENV{TOOL_CHAINS}") + else() + set(TOOL_CHAINS "GCC") + endif() + + set(UNIT_TEST_NAME_BUILD_DIR "build/${BOARD_NAME}/${TOOL_CHAINS}/${target_name}") + + if(${target_name} STREQUAL "unit_test_iec60730_cpu_registers") + set(UNIT_TEST_SOURCES + "${FULL_DIR}/src/main.c" + "${FULL_DIR}/src/app.c" + "${FULL_DIR}/src/unit_test_common.c" + "${FULL_DIR}/src/${target_name}.c" + "${FULL_DIR}/../../lib/src/${source_file}.c" + "${FULL_DIR}/../../lib/src/${source_file}_ns.c" + "${FULL_DIR}/../../lib/src/${source_file}_s.c" + ) + else() + set(UNIT_TEST_SOURCES + "${FULL_DIR}/src/main.c" + "${FULL_DIR}/src/app.c" + "${FULL_DIR}/src/unit_test_common.c" + "${FULL_DIR}/src/${target_name}.c" + "${FULL_DIR}/../../lib/src/${source_file}" + ) + endif() + string(TOUPPER ${UNIT_TEST_NAME} DEFINE_UNIT_TEST) + set(UNIT_TEST_INCLUDES + "${FULL_DIR}/inc" + ${UNITY_HEADER}) + + # Set address start calculate crc + if(DEFINED ENV{FLASH_REGIONS_TEST}) + set(FLASH_REGIONS_TEST "$ENV{FLASH_REGIONS_TEST}") + else() + set(FLASH_REGIONS_TEST "0x00000000") + endif() + + if(ENABLE_CAL_CRC_32) + set(DEFINE_ENABLE_CAL_CRC_32 "SL_IEC60730_USE_CRC_32_ENABLE=1") + else() + set(DEFINE_ENABLE_CAL_CRC_32 "SL_IEC60730_USE_CRC_32_ENABLE=0") + endif() + + if(ENABLE_CRC_USE_SW) + set(DEFINE_ENABLE_CRC_USE_SW "SL_IEC60730_CRC_USE_SW_ENABLE=1") + if(ENABLE_SW_CRC_TABLE) + set(DEFINE_ENABLE_SW_CRC_TABLE "SL_IEC60730_SW_CRC_TABLE_ENABLE=1") + else() # ENABLE_SW_CRC_TABLE + set(DEFINE_ENABLE_SW_CRC_TABLE "SL_IEC60730_SW_CRC_TABLE_ENABLE=0") + endif() # ENABLE_SW_CRC_TABLE + else() # ENABLE_CRC_USE_SW + set(DEFINE_ENABLE_CRC_USE_SW "SL_IEC60730_CRC_USE_SW_ENABLE=0") + endif() # ENABLE_CRC_USE_SW + + if(${TOOL_CHAINS} STREQUAL "GCC") + set(DEFINE_IAR_TESTING "GCC_TESTING") + elseif(${TOOL_CHAINS} STREQUAL "IAR") + set(DEFINE_IAR_TESTING "IAR_TESTING") + endif() + + add_executable(${UNIT_TEST_NAME} ${UNIT_TEST_SOURCES}) + target_include_directories(${UNIT_TEST_NAME} PUBLIC ${UNIT_TEST_INCLUDES}) + target_compile_definitions(${UNIT_TEST_NAME} PUBLIC ${DEFINE_UNIT_TEST}_ENABLE + ${DEFINE_ENABLE_CAL_CRC_32} + ${DEFINE_ENABLE_CRC_USE_SW} + ${DEFINE_ENABLE_SW_CRC_TABLE} + ${DEFINE_IAR_TESTING}) + + target_link_libraries(${UNIT_TEST_NAME} PUBLIC unity slc_lib_iec60730) + + # Create .bin, .hex and .s37 artifacts after building the project + if(${TOOL_CHAINS} STREQUAL "GCC") + add_custom_command(TARGET ${UNIT_TEST_NAME} + POST_BUILD + COMMAND rm -rf ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND ${CMAKE_OBJCOPY} -O srec "$" "$/$.s37" + COMMAND ${CMAKE_OBJCOPY} -O ihex "$" "$/$.hex" + COMMAND ${CMAKE_OBJCOPY} -O binary "$" "$/$.bin" + COMMAND mkdir -p ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND mv ${UNIT_TEST_NAME}.out ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND mv ${UNIT_TEST_NAME}.bin ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND mv ${UNIT_TEST_NAME}.hex ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND mv ${UNIT_TEST_NAME}.s37 ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND ${CMAKE_COMMAND} -E copy ${LINKER_PATH} ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND mv ${UNIT_TEST_NAME_BUILD_DIR}/${LIB_IEC60730_MAP} ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.map + ) + elseif (${TOOL_CHAINS} STREQUAL "IAR") + add_custom_command(TARGET ${UNIT_TEST_NAME} + POST_BUILD + COMMAND rm -rf ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND ${CMAKE_OBJCOPY} --srec "$" "$/$.s37" + COMMAND ${CMAKE_OBJCOPY} --ihex "$" "$/$.hex" + COMMAND ${CMAKE_OBJCOPY} --bin "$" "$/$.bin" + COMMAND mkdir -p ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND mv ${UNIT_TEST_NAME}.out ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND mv ${UNIT_TEST_NAME}.bin ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND mv ${UNIT_TEST_NAME}.hex ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND mv ${UNIT_TEST_NAME}.s37 ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND ${CMAKE_COMMAND} -E copy ${LINKER_PATH} ${UNIT_TEST_NAME_BUILD_DIR} + COMMAND mv ${UNIT_TEST_NAME_BUILD_DIR}/${LIB_IEC60730_MAP} ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.map + ) + endif() + + if(${target_name} STREQUAL "unit_test_iec60730_invariable_memory") + if(${TOOL_CHAINS} STREQUAL "GCC") + if(ENABLE_CAL_CRC_32) + set(post_build_command ${CMAKE_OBJDUMP} -t -h -d -S ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.out > ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.lst + && bash ${CMAKE_SOURCE_DIR}/lib/crc/sl_iec60730_cal_crc32.sh '${CMAKE_CURRENT_BINARY_DIR}/${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}' '' 'C:/srecord/bin' '${TOOL_CHAINS}' "${FLASH_REGIONS_TEST}") + else() + set(post_build_command ${CMAKE_OBJDUMP} -t -h -d -S ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.out > ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.lst + && bash ${CMAKE_SOURCE_DIR}/lib/crc/sl_iec60730_cal_crc16.sh '${CMAKE_CURRENT_BINARY_DIR}/${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}' '' 'C:/srecord/bin' '${TOOL_CHAINS}' "${FLASH_REGIONS_TEST}") + endif() + elseif (${TOOL_CHAINS} STREQUAL "IAR") + if(ENABLE_CAL_CRC_32) + set(post_build_command ${CMAKE_OBJDUMP} --all --source ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.out > ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.lst + && bash ${CMAKE_SOURCE_DIR}/lib/crc/sl_iec60730_cal_crc32.sh '${CMAKE_CURRENT_BINARY_DIR}/${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}' '' 'C:/srecord/bin' '${TOOL_CHAINS}' "${FLASH_REGIONS_TEST}") + else() + set(post_build_command ${CMAKE_OBJDUMP} --all --source ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.out > ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.lst + && bash ${CMAKE_SOURCE_DIR}/lib/crc/sl_iec60730_cal_crc16.sh '${CMAKE_CURRENT_BINARY_DIR}/${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}' '' 'C:/srecord/bin' '${TOOL_CHAINS}' "${FLASH_REGIONS_TEST}") + endif() + endif() + else() + if(${TOOL_CHAINS} STREQUAL "GCC") + set(post_build_command ${CMAKE_OBJDUMP} -t -h -d -S ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.out > ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.lst) + elseif (${TOOL_CHAINS} STREQUAL "IAR") + set(post_build_command ${CMAKE_OBJDUMP} --all --source ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.out > ${UNIT_TEST_NAME_BUILD_DIR}/${UNIT_TEST_NAME}.lst) + endif() + endif() + # Run post-build pipeline to perform additional post-processing + if(post_build_command) + add_custom_command(TARGET ${UNIT_TEST_NAME} + POST_BUILD + COMMAND ${post_build_command} + ) + endif() +endfunction(generate_unit_test) \ No newline at end of file diff --git a/components/iec60730_custom_linker.slcc b/components/iec60730_custom_linker.slcc new file mode 100644 index 00000000..a045c1a0 --- /dev/null +++ b/components/iec60730_custom_linker.slcc @@ -0,0 +1,25 @@ +package: iec60730 +description: > + This component generates linker file support lib IEC60730. + The linker file will be created in the autogen folder with the name linkerfile_iec60730.ld. + Users must follow these steps to edit the linker file: + + 1) Go to C/C++ Build > Settings > Tool Settings > Memory Layout. + + 2) Browse to edit the linker file. +label: IEC60730 Custom Linker +quality: production +id: iec60730_custom_linker +category: Linker File +provides: + - name: "iec60730_custom_linker" +template_contribution: + - name: iec60730_custom_linker_enable + value: 1 +template_file: + - path: ./lib/toolchain/template/GCC/linkerfile_iec60730.ld.jinja + unless: + - toolchain_iar + - path: ./lib/toolchain/template/IAR/linkerfile_iec60730.icf.jinja + condition: + - toolchain_iar diff --git a/components/iec60730_lib.slcc b/components/iec60730_lib.slcc new file mode 100644 index 00000000..9a3ff9c8 --- /dev/null +++ b/components/iec60730_lib.slcc @@ -0,0 +1,89 @@ +package: iec60730 +description: > + This component adds a source library component to the project and creates linker file support by adding a dependency. Some actions need to be followed to build it: + + 1) Go to C/C++ Build > Settings > Tool Settings > Memory Layout and browse to edit the linker file. The default linker file name is linkerfile_iec60730.ld. + + 2) In the default configuration, SL_IEC60730_CRC_DEBUG_ENABLE can support debugging the CRC test module invariable memory calculations. If you want to disable this configuration, you should copy either sl_iec60730_cal_crc32.sh or sl_iec60730_cal_crc16.sh in the path: "lib/crc/" which helps a CRC-calculated image file for testing. + You must flash the image which have the corresponding image file suffix _crc16 and _crc32. + + To support CRC image calculation, follow these steps: Go to C/C++ Build > Settings > Build Steps > Post-build steps > Command and use the appropriate command for the toolchain, for instance: + + If you want to calculate from start address to end address of flash: + + - With GCC: arm-none-eabi-objdump -t -h -d -S '${BuildArtifactFileBaseName}.axf' >'${BuildArtifactFileBaseName}.lst' && bash ${ProjDirPath}/iec60730_1.0.0/lib/crc/sl_iec60730_cal_crc16.sh ${BuildArtifactFileBaseName} "" "C:\srecord\bin" GCC "0x8000000" + + - With IAR: ielfdumparm --all --source ${BuildArtifactFileBaseName}.out > ${BuildArtifactFileBaseName}.lst && bash ${ProjDirPath}/iec60730_1.0.0/lib/crc/sl_iec60730_cal_crc16.sh ${BuildArtifactFileBaseName} "" "C:\srecord\bin" IAR "0x8000000" + + or if you want to calculate multiple regions: + + - With GCC: arm-none-eabi-objdump -t -h -d -S '${BuildArtifactFileBaseName}.axf' >'${BuildArtifactFileBaseName}.lst' && bash ${ProjDirPath}/iec60730_1.0.0/lib/crc/sl_iec60730_cal_crc16.sh ${BuildArtifactFileBaseName} "" "C:\srecord\bin" GCC "0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190" + + - With IAR: ielfdumparm --all --source ${BuildArtifactFileBaseName}.out > ${BuildArtifactFileBaseName}.lst && bash ${ProjDirPath}/iec60730_1.0.0/lib/crc/sl_iec60730_cal_crc16.sh ${BuildArtifactFileBaseName} "" "C:\srecord\bin" IAR "0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190" + + For the IAR toolchain, it is necessary to add the linker option in C/C++ Build > Settings > Tool Settings > IAR Linker for ARM > Extra Options: "--keep check_sum --place_holder check_sum,2,.checksum,64" + +label: IEC60730 Lib +quality: production +id: iec60730_lib +category: Library +provides: + - name: "iec60730_lib" +requires: + - name: iec60730_vmc_march + - name: iec60730_custom_linker + - name: emlib_wdog + - name: emlib_gpcrc + - name: emlib_timer + - name: emlib_letimer +config_file: + - path: ./lib/config/sl_iec60730_config.h +include: + - path: ./lib/inc + file_list: + - path: coding_standard.h + - path: efr32_iec60730_release_notes.h + - path: sl_iec60730_toolchain.h + - path: sl_iec60730_board.h + - path: sl_iec60730_comm.h + - path: sl_iec60730_cpu_registers.h + - path: sl_iec60730_internal.h + - path: sl_iec60730_invariable_memory.h + - path: sl_iec60730_irq.h + - path: sl_iec60730_library_documentation.h + - path: sl_iec60730_program_counter.h + - path: sl_iec60730_system_clock.h + - path: sl_iec60730_variable_memory.h + - path: sl_iec60730_watchdog.h + - path: sl_iec60730.h + - path: silabs_license_agreement.h +source: + - path: ./lib/src/sl_iec60730_bist.c + - path: ./lib/src/sl_iec60730_cpu_registers.c + - path: ./lib/src/sl_iec60730_cpu_registers_ns.c + - path: ./lib/src/sl_iec60730_cpu_registers_s.c + - path: ./lib/src/sl_iec60730_invariable_memory.c + - path: ./lib/src/sl_iec60730_irq.c + - path: ./lib/src/sl_iec60730_post.c + - path: ./lib/src/sl_iec60730_program_counter.c + - path: ./lib/src/sl_iec60730_system_clock.c + - path: ./lib/src/sl_iec60730_variable_memory.c + - path: ./lib/src/sl_iec60730_watchdog.c + - path: ./lib/crc/sl_iec60730_cal_crc16.sh + - path: ./lib/crc/sl_iec60730_cal_crc32.sh +define: + - name: SL_IEC60730_BOARD_HEADER + value: "\"sl_iec60730_board.h\"" +toolchain_settings: + - option: linkerfile + value: autogen/linkerfile_iec60730.ld + unless: + - toolchain_iar + - option: linkerfile + value: autogen/linkerfile_iec60730.icf + condition: + - toolchain_iar + - option: iar_linker_option + value: "--keep check_sum --place_holder check_sum,2,.checksum,64" + condition: + - toolchain_iar \ No newline at end of file diff --git a/components/iec60730_unit_test.slcc b/components/iec60730_unit_test.slcc new file mode 100644 index 00000000..34e5e0e1 --- /dev/null +++ b/components/iec60730_unit_test.slcc @@ -0,0 +1,34 @@ +package: iec60730 +description: This components support run unit test function lib IEC60730 +label: IEC60730 Unit Test +quality: test +id: iec60730_unit_test +category: Unit Test +provides: + - name: "iec60730_unit_test" +config_file: + - path: ./lib/config/sl_iec60730_config.h +include: + - path: ./lib/inc + file_list: + - path: coding_standard.h + - path: efr32_iec60730_release_notes.h + - path: sl_iec60730_toolchain.h + - path: sl_iec60730_board.h + - path: sl_iec60730_comm.h + - path: sl_iec60730_cpu_registers.h + - path: sl_iec60730_internal.h + - path: sl_iec60730_invariable_memory.h + - path: sl_iec60730_irq.h + - path: sl_iec60730_library_documentation.h + - path: sl_iec60730_program_counter.h + - path: sl_iec60730_system_clock.h + - path: sl_iec60730_variable_memory.h + - path: sl_iec60730_watchdog.h + - path: sl_iec60730.h + - path: silabs_license_agreement.h +define: + - name: SL_IEC60730_BOARD_HEADER + value: "\"sl_iec60730_board.h\"" +ui_hints: + visibility: never diff --git a/components/iec60730_vmc_march.slcc b/components/iec60730_vmc_march.slcc new file mode 100644 index 00000000..8e5c379d --- /dev/null +++ b/components/iec60730_vmc_march.slcc @@ -0,0 +1,21 @@ +package: iec60730 +description: This component adds the marchC and marchXC algorithms to test the variable memory module. +label: IEC60730 VMC MarchC +quality: production +id: iec60730_vmc_march +category: MarchC Algorithm +provides: + - name: "iec60730_vmc_march" +include: + - path: ./lib/asm/ + file_list: + - path: sl_iec60730_vmc_marchc.S + - path: sl_iec60730_vmc_marchxc.S + unless: + - toolchain_iar + - path: ./lib/asm/ + file_list: + - path: sl_iec60730_vmc_marchc_iar.S + - path: sl_iec60730_vmc_marchxc_iar.S + condition: + - toolchain_iar diff --git a/docs/coding_convention_tool.md b/docs/coding_convention_tool.md new file mode 100644 index 00000000..df03d3ea --- /dev/null +++ b/docs/coding_convention_tool.md @@ -0,0 +1,175 @@ +> [!NOTE] +> This is a code formatter tool that helps ensure consistent coding style and detects common issues in source code files. +It integrates with pre-commit, allowing you to automate code formatting and checks as part of your development workflow. + +- See details rule check in folder tools: [tools](../tools/). +- See details coding standard by Silicon Labs in file: [coding_standard.md](./coding_standard.md). + +# Features + +- Automatically fixes end-of-file issues. +- Removes trailing whitespace from lines. +- Identifies and suggests fixes for common spelling errors using codespell. +- Formats code according to specified Uncrustify rules base on Silabs's coding standard. +- Checks for identifiers naming style mismatch of function, definition, struct, variable using clang-tidy. +- Checks code for potential errors and style issues using cppcheck. + +# Project Structure +the following outlines the structure of the code formatter project, detailing the purpose of each file and directory. + +```sh +├── tools: Contains all config file of codespell, clang-format, clang-tidy. +| ├── codespell +| | ├── exclude-file.txt: Contains lines to be +| | | excluded from Codespell checks. +| | └── cignore-words.txt: Contains words to be +| | ignored by Codespell to avoid false +| | positives. +| | +| ├── uncrustify.cfg: Configuration file for Uncrustify, +| | specifying the coding style and formatting rules. +| └── .clang-tidy: Configuration file for clang-tidy, +| specifying checks and options for static analysis. +└── .pre-commit-config.yaml: Configuration file for + pre-commit, defining the hooks and their settings + to be run before commits. +``` + +# Installation +## Ubuntu +Recommended operating system: WSL, Ubuntu 20.04. + +Ensure Python is installed on your system. Then, install pre-commit clang-format clang-tidy cppcheck by running: + +```sh +$ pip install pre-commit +$ sudo apt install uncrustify clang-tidy cppcheck +``` + +Recommended version: + +- Codespell 2.2.4 +- Uncrustify 0.72.0 +- Clang tidy 14.0.0 +- Cppcheck 1.9 + +# Quick start +## How To Run + +Before running the coding convention test, to create a database file for clang-tidy to test, run the command below + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DCHECK_CODING_CONVETION_ENABLE=ON -DBOARD_NAME=brd4187c +``` +After running the above command, the file `compile_commands.json` data base will be created in the folder [tools](../tools/). + +Run pre-commit install to install pre-commit into your git hooks. pre-commit will now run on every commit: + +```sh +$ pre-commit install +``` + +Staging files need formatting. For example: + +```sh +$ git add data_format_sample.c +``` + +Run pre-commit hooks on a repository to check coding convention. + +```sh +$ pre-commit run --all-files +``` + +## Exclude Folder +When using this tool, you may want to skip some folders. + +You can specify folders to exclude from formatting and checks by replacing the exclude regex pattern with the folders you want to skip. + +Here's how you can exclude folders build and gecko_sdk_xxx using regex patterns in .pre-commit-config.yaml file: + +```sh +exclude: .*/build/.*|.*/gecko_sdk.*/.* +``` + +Exclude File, Ignore Words for Codespell +When using Codespell, you may encounter false positives or want to exclude specific files or directories from being checked. + +Codespell provides configuration options to handle these scenarios. + +Here's an example of a codespell configuration file .codespellrc + +```sh +ignore-words = ./tools/.codespell/ignore-words.txt +exclude-file = ./tools/.codespell/exclude-file.txt +check-filenames = +check-hidden = +count = +skip = .git,*.a, +``` + +Explanation of Configuration Options + +- ignore-words : This option points to a file containing words that should be ignored by Codespell. +If you encounter a false positive, add the problematic word to ignore-words.txt. +Ensure each word is in lowercase and on a new line. +- exclude-file : This option points to a file containing lines that should be excluded from spell-checking. +If a specific line in your code is causing a false positive, copy and paste the entire line into exclude-file.txt. +- check-filenames: Set this option to true if you want Codespell to check filenames for spelling errors. +By default, this is empty (disabled). +- check-hidden: Set this option to true if you want Codespell to check hidden files for spelling errors. +By default, this is empty (disabled). +- count: Set this option to true if you want Codespell to display the number of occurrences of each misspelled word. +By default, this is empty (disabled). +- skip: This option allows you to specify files or directories that Codespell should skip. +You can list multiple entries separated by commas. +For example, .git,*.a, will skip the .git directory and all files with the .a extension. + +## Uncrustify +Using automatic source code formatting follows Silabs's coding standard. +The Uncrustify configuration file is located at /tools/uncrustify.cfg. Base on the repo /projects/WMN_TOOLS/repos/scripts/browse/uncrustify + +## Clang-Tidy +- Checks for identifiers naming style mismatch +- Clang-Tidy supports checking casing types (UPPER_CASE/lower_case) and prefixes of +- Function, Struct, Enum, Global Constant. You can modify the prefix in the file /tools/.clang-tidy. + +For example, config function with lower_case and prefix 'sl_' + +```sh +- key: readability-identifier-naming.FunctionCase + value: lower_case +- key: readability-identifier-naming.FunctionPrefix + value: 'sl_' +``` + +### Adding Extra Arguments +You may need to provide additional paths to header files or define macros for Clang-Tidy to ensure it correctly analyzes your code. + +This can be done using the --extra-arg option in the hook configuration. + +To add extra arguments to the clang-tidy hook, modify the args section of the hook configuration in your .pre-commit-config.yaml file. + +Here's an example of how to add extra arguments: + +```sh +- repo: https://github.com/pocc/pre-commit-hooks + rev: v1.3.5 + hooks: + - id: clang-tidy + args: + - --config-file=./tools/.clang-tidy + - --use-color + - --extra-arg=-I/inc/ + - --extra-arg=-DMY_MACRO=1 +``` + +In this example, we've added two extra arguments to Clang-Tidy: + +- `I/inc/`: Specifies an include directory where Clang-Tidy will look for header files. + +- `DMY_MACRO=1`: Defines a macro named MY_MACRO with the value 1 for use in the code analysis. + + diff --git a/docs/coding_standard.md b/docs/coding_standard.md new file mode 100644 index 00000000..38501c1d --- /dev/null +++ b/docs/coding_standard.md @@ -0,0 +1,2626 @@ +# 1 Introduction # + +## 1.1 Purpose of this document ## + +The purpose of this document is to describe the coding standard used by Silicon +Labs MCU customer facing firmware. A unified coding standard is necessary to +provide a professional look & feel in the source code that we provide to our +customers. Furthermore, it reduces cognitive load, when you need to work with +another group's code. Coding style and preferences differ from person to person, +which means that there will be rules in this document that you will disagree +with. However, please adhere to the rules described here, as having a coding +standard that you (somewhat) disagree with is better than having no coding +standard. + +## 1.2 Latest version of this document ## + +This document is version **1.0**. + +## 1.3 Changing this document ## + +## 1.4 Structure and wording of this document ## + +This document contains three separate parts: Coding guidelines, coding style and +documentation. The coding guidelines deal with the structure of your code. This +part is split into a general and a C specific part. The coding style guide +details how your code should look, e.g. brace style, comment style etc. +Documentation deals with how you should document your code to make it easy for +other people to use and modify the code. + +### 1.4.1 Source Code ### + +In this document, **Source code** is used as a common name for any C, C++ or +header file from Silicon Labs that is being provided to customers. It applies to +both manually created as well as autogenerated code. + +### 1.4.2 Required ### + +Some of the coding standards are required and some are recommendations. All +required coding standards are tagged with **Required**. + +### 1.4.3 Recommended ### + +Recommended rules should generally be followed. However, recommended rules can +be broken in special circumstances. All recommended coding standards are tagged +**Recommended**. + +### 1.4.4 Should ### + +The word "should" is used throughout this document. In this context, "should" is +used to indicate best practice. You should strive to meet these guidelines. +However, it is possible to break these rules, if that results in a better end +result. + +## 1.5 Application of this standard ## + +### 1.5.1 New modules ### + +This standard applies unconditionally to new modules. + +Please note that a new software module does not need to be a new full stack. +This could be only a new part in an existing stack. + +### 1.5.2 Existing modules ### + +Existing components will continue to use the coding standard they are already +using (there is still some differences between the various stacks). + +When updating to the new coding standard, especially from a naming convention +perspective, it will be required to provide a compatibility layer. Exceptions +will only be made for stack/modules with a valid, documented justification as +well as agreement from the various stakeholders. An exception could be made +either to have a partial compatibility layer or none at all. + +Some modules left in 'maintenance mode' or currently deprecated (exact list to +be provided) might never be updated, and that is acceptable. Examples of this +would include the SLEEP Driver, RTCDRV, several parts of Base, etc. + +***** + +# 2 General Guidelines # + +## 2.1 General Guidelines ## + +We can't put everything into these guidelines, for things not covered in the +guidelines, try to make your code blend in with the code you are editing. Use +your best judgment! + +### 2.1.1 Use peer review ### + +A coworker should review all code. In practice, pull requests are encouraged as +it allows people to comment on your work easily and it makes it possible to have +good discussions about specific lines of code. + +### 2.1.2 Fix what you break ### + +If your changes break anything, then you are responsible for correcting the +problem. This means that if you break an automated or manual testing job by +committing something, you should strive to fix it as soon as possible. Other +people depend on being able to build! + +### 2.1.3 Be a Boy Scout ### + +Leave the source code in a better condition than you found it! + +### 2.1.4 Avoid reinventing the Wheel ### + +If somebody has implemented some functionality before, you should use that +rather than developing it again from scratch. This could be a function in a +standard library, or a module that was internally developed. Silicon Labs is a +large company with many different groups developing software for various use. +What you need might already exist! If the existing code doesn't suit your needs +exactly but is close, consider whether the required changes would make it more +generally useful. If so, change it. + +### 2.1.5 Refactor code ### + +Try to refactor code instead of duplicating it. Extract common functionality +into functions, parameterize or abstract differences, etc. + +## 2.2 Testing ## + +### 2.2.1 Testability ### + +Design the code in a modular fashion that allows functional testing. If +possible, create unit tests for your software. + +### 2.2.2 Regression Test ### + +It is encouraged to add a decent level of automated regression tests. + +## 2.3 Embedded Coding ## + +### 2.3.1 Write energy friendly code ### + +The code should be energy friendly. This means taking advantage of hardware +features available and always going down to the lowest energy mode possible. Try +to always keep this in mind when writing energy aware code: + +* Make sure all hardware modules or functions that are not needed by the + application are disabled or shut down as often as possible +* Use DMA whenever possible and put the device in the lowest possible sleep mode +* Faster code = more time to sleep +* Avoid busy waiting unless absolutely necessary! +* Remember: everything matters! +* Energy aware code can get complicated and difficult to debug. That is why it + adds more value! +* Use Simplicity Studio or similar tool to profile the energy usage of your + code. The results are often surprising. + +### 2.3.2 Interrupts ### + +Interrupts shall have as minimal processing as possible. If possible it should +just send an event to a task for later processing. Having long interrupt +processing times might cause problems when other time-critical pieces of code +are blocked from executing (radio protocols being a prime example). + +***** + +# 3 C Specific Guidelines # + +## 3.1 Compilers ## + +### 3.1.1 C standards version (Required) ### + +For 32-bit MCUs (Cortex-Mx) we use C99. + +For 8-bit MCUs (8051) we use C90. Since the Keil PK51 development tool is the +default build tool for our 8051 devices, we have to make sure that we comply +with the C90 exceptions Keil implemented in their PK51. These exceptions can be +found here: + +[http://www.keil.com/support/man/docs/c51/c51\_xa.htm] [keil] + +[keil]: http://www.keil.com/support/man/docs/c51/c51_xa.htm + +Even though we are restricted to C90 code for 8051 MCUs, we still use C99 +standard integer types (uint8_t, etc). We provide our own stdint.h and stdbool.h +in our SDK. + +If a project is intended to run on both 8-bit and 32-bit platforms, use the +lowest common denominator (i.e. C90 with compatible extensions). + +### 3.1.2 Support mixing C++ and C (Recommended) ### + +C++ is increasing in popularity. To make sure that our libraries and code are +compatible with C++ code, functions in header files should be defined inside an +`extern "C"` block. This makes it possible to call C functions from C++. + +__Example__ + + #ifdef __cplusplus + extern "C" { + #endif + + void foo(void); + + // other functions ... + + #ifdef __cplusplus + } + #endif + +>**Comment:** Do not add an extra layer of indentation between the opening and +closing braces in this case. This is also an exception to the rule that +requires braces to be on line by themselves. + +### 3.1.3 Multiple build tool support (Recommended) ### + +Most of our 8051 and Cortex-M source code can be built with more than one build +tool chain. To make the porting job easier between toolchains we will use header +files that define macros/functions for how to access register, intrinsic +functions and other parts of the device that differs between the different tool +chains. + +For Cortex-M, this is defined by CMSIS and located in `cmsis_compiler.h`. For +8051 MCUs we use the `si_toolchain.h` file. + +### 3.1.4 Compile with warnings (Required) ### + +Compiler warnings often indicate bugs that will only be seen at runtime and that +may be very difficult to find during testing. For example, the compiler may +warn you about using an uninitialized variable. This can be difficult to find +during testing. + +Use the compiler option -Wall to enable all warnings. + +### 3.1.5 Treat warnings as errors (Required) ### + +Warnings should be treated as errors so that the build does not complete until +the warning if fixed. Having a zero tolerance for warnings will help keep our +code cleaner and contain fewer bugs. + +Use the compiler option -Werror to treat warnings as errors. This applies to +builds that are part of "make test". It does not apply to build mechanisms +passed through to customer projects. + +Exceptions to Werror have to be approved by the module owner and have their +rationale documented. Exceptions should disable errors, but leave warning +intact (-wno-error=some-kind-of-warning) unless the warning is so noisy as flood +build output. In that case it should be disabled entirely. +(-wno-some-kind-of-warning) + +## 3.2 Preprocessor ## + +### 3.2.1 Use header file guards (Required) ### + +A header file guard must cover all header files unless they are intended to be +included multiple times from the same source file (which should be rare and +justified). The name of the guard is of the form: + +*upper case file name* + +where characters in the file name other than alphanumerics are replaced with +underscores and leading underscores are stripped. Guards should guard all other +code in the file except comment headers. In particular, they should guard +`extern` declarations and `#include` statements. + +__Example__ + + #ifndef MY_FILE_H + #define MY_FILE_H + + #include + + extern volatile uint64_t jiffies; + + // ... + + #endif // MY_FILE_H + +### 3.2.2 Preprocessor conditional compilation (Recommended) ### + +Limit the use of preprocessor conditional compile statements like `#if` and +`#ifdef`. If used, avoid using preprocessor conditions inside functions. + +__Example__ + + #if !defined(LINUX_DBG) + #define sl_enable_interrupts() __restore_interrupt() + #define sl_disable_interrupts() __disable_interrupt() + #else + #define sl_enable_interrupts() (void)0 + #define sl_disable_interrupts() (void)0 + #endif + + void sl_do_something(void) + { + sl_enable_interrupts(); + sl_do_atomic_operation(); + sl_disable_interrupts(); + } + +>**Comment**: The above is a cleaner way to write code that in this example has +more than one way to enable/disable interrupts. Below is the original, not so +clean, code from the example above. + + void sl_do_something(void) + { + #if !defined(LINUX_DBG) + __disable_interrupt(); + #endif + sl_do_atomic_operation(); + #ifndef LINUX_DBG + __restore_interrupt(); + #endif + } + +### 3.2.3 Use of preprocessor directive #error (Recommended) ### + +Use `#error` when #defines can only be set to certain values, or other +configuration problems. + +__Example__ + + #if (DEFAULT_SAMPLE_RATE8 == 44) + #define DEFAULT_SAMPLE_FREQ 44100 + #elif (DEFAULT_SAMPLE_RATE8 == 48) + #define DEFAULT_SAMPLE_FREQ 48000 + #else + #error Invalid value: DEFAULT_SAMPLE_RATE8 + #endif + +### 3.2.4 Use of preprocessor directive #include (Recommended) ### + +Header files should generally list their dependencies explicitly. The preferred +way is to `#include` prerequisite header files. Alternatively, the header file +may validate that an appropriate macro is defined. + +__Preferred__ + + #include "sl_foo.h" + + void sl_bar(sl_foo_t baz); // sl_foo_t is defined in sl_foo.h + +__Alternative__ + + // sl_foo_t is defined in sl_foo.h + #ifndef FOO_T_DEFINED + #error This source file needs to #include sl_foo.h + #endif + + void sl_bar(sl_foo_t baz); // sl_foo_t is defined in sl_foo.h + +You should strive to not include more header files than you really require in a +given C file. Having more than you need increases compilation time and increases +the chance of unintended side effects. `<>` and `""` are used by the compiler to +change the search path for included files. In general, `<>` should only be used +for C standard libraries. `#include` should generally not be used for C files. + +__Example__ + + #include + #include "SI_C8051F850_Register_Enums.h" + #include "SI_Bluetooth_Init.h" + +## 3.2.5 Use of preprocessor directive `#undef` (Recommended) ### + +Using `#undef` should be avoided as it can lead to weird behaviors that are +often fairly difficult to detect and solve. For example, errors can occur only +when compiling files in a certain order. + +## 3.2.6 Use of preprocessor 'stringify' and concatenation (Recommended) ### + +Use of the preprocessor 'stringify' or string concatenation operations should +be avoided or kept to a minimum. Manipulations such as these can quickly become +quite complex to understand, maintain or debug and should be avoided whenever +possible. + +## 3.2.7 General use of preprocessor (Recommended) ### + +The preprocessor should be used reasonably, mostly for usual operations such as +doing conditional compilation including that described in section 3.2.2, +including files, reporting an error, etc. Using the preprocessor to do complex +or unusual operations should normally be avoided. + +## 3.3 Standard Libraries ## + +### 3.3.1 Use of stdint.h and stdbool.h (Required) ### + +Use `stdint.h` and `stdbool.h` types whenever possible. This makes types +unambiguous, more portable and opens up compiler optimizations. + +This means that you should always use C99 types like `uint8_t`. Do not use other +types such as `U8` or `UINT8` unless needed to maintain compatibility with older +code or third party library. + +### 3.3.2 Use of stdlib (Recommended) ### + +You can use the stdlib functions *memset*, *memcpy*, *memmove*, *memcmp*, +*strcmp*, etc. instead of writing your own for-loops. In code bases where these +functions have been abstracted (e.g., by MEMSET, MEMCMP, and friends in the base +repo), it is recommended to use those abstractions. Otherwise, for Cortex-M +class devices it is recommended to use the stdlib versions as they are often +heavily optimized. + +### 3.3.3 Use of dynamic memory / the heap (Recommended) ### + +Dynamic memory allocation with `malloc()` and `free()` should generally not be +used. Some of our customers have strict rules in their QA procedures that +dictate that malloc() cannot be used in embedded software. If we use it, then +our libraries become unusable for them. The problem with malloc()/free() is +fragmentation. Because our micros are memory constrained and have no virtual +memory, malloc() can over time fragment memory, which in turn can cause a +malloc() to fail down the road. + +### 3.3.4 Do not use the standard C assert() (Required) ### + +It is strongly recommended to not use the assert() function that comes with the +standard C/C++ library. If the Silicon Labs libraries used in your project +contains assert function(s), then use them. If no Silicon Labs specific assert +function is available, then use the code from the example below. The rationale +for this rule is that a number of toolchains will bring in their standard +library versions of printf and friends in order to implement assert. This can +bring in unwanted side effects, such as code size increases. + +__Example__ + + // void user_assert (int file, int line); /* declaration */ + // #define USER_ASSERT(file, line) user_assert(file, line) /* definition */ + + void sl_assert(const char *file, int line) + { + (void)file; // Unused parameter + (void)line; // Unused parameter + // Wait forever until the watchdog fires + while (1); + } + + #if defined(NDEBUG) + #define SL_ASSERT(expr) + #else + #if defined(USER_ASSERT) + #define SL_ASSERT(expr) ((expr) ? ((void)0) : USER_ASSERT(__FILE__, __LINE__)) + #else + #define SL_ASSERT(expr) ((expr) ? ((void)0) : sl_assert(__FILE__, __LINE__)) + #endif + #endif + +>**Comment:** Below are the steps to overwrite Silicon Labs assert function +>with a user defined assert. +>1. Define a `void user_assert(const char *, int)` function +>2. Uncomment the two lines below (marked "declaration" and "definition"). +> +>`assert()` is a void function and never return any value. If you like +>a function to return a value depending on the evaluation of an expression, +>then feel free to create a new function for that purpose. + +## 3.4 Keywords ## + +### 3.4.1 The "volatile" keyword (Recommended) ### + +Be careful using the `volatile` keyword. Access to a volatile variable/constant +can never be optimized away. Only variable/constants that can have side effects +and/or that can change value from outside the embedded application should be +declared `volatile`. Typically Special Function Registers (SFRs) are volatile. + +Delay loops using volatile are usually a bad idea since they consume both CPU +time and energy. It is better to implement delays with for example timer/counter +interrupts. But there are exceptions when using a volatile variable may be +favorable, such as: + +* Very short delays when timer setup and interrupt handling is time consuming, +especially when the latency is longer than the delay period itself. +* Applications that are constrained on timer resources. + +As an example, the Gecko "udelay.c" file in kits/common/drivers is a good +example of a "busy wait" delay loop, and is used successfully in the Sharp +Memory LCD device driver where we need delays of down to 2 microseconds. + +### 3.4.2 The "inline" keyword (Recommended) ### + +The `inline` keyword is supported in C99, which is the language standard use for +our 32-bit MCUs, but behaves differently compared to inline in C++. Inline was +also added/used by some C89/C90 compilers and those implementations might also +differ compared to the C99 standard. + +So adding `inline` to your code is usually not a problem. Moving code that uses +inline and was built with a C++ or C89/C90 compiler might change the behavior of +your application. + +Only very small (few lines of code) global functions that can be called from +many different files can be inlined. + +For Cortex-Mx devices, use the CMSIS `__INLINE` macro since this will expand to +whatever keyword is used by the supported set of build tools. + +Generally speaking, `inline` is just a hint to the compiler to inline the +function body at the call site. It still can decide not to do so. In the case +of a global function where the body is defined in a header file, you could end +up with multiple definitions of the same symbol. A solution is to use static +inlining, but that can duplicate the implementation of the function in each +compilation unit that invokes it. A better recommended approach is to not use +static inlining but add an external reference to the function in a single +(related) c file. That will tell the linker to only keep one definition of the +function and put it in this compilation unit. + +__Example__ + +main.c + + #include "lib_temp.h" + + int main (void) + { + int temp; + + temp = temp_get_temp(); + + return 0; + } + +lib_temp.h + + __INLINE int temp_get_temp(void) + { + return the_temp; + } + +lib_temp.c + + // In case temp_get_temp() is not inlined, only one instance will be kept here. + extern __INLINE int temp_get_temp(void); + +In case there is absolutely no obvious related .c file where to put the +external reference for an inline function, it is recommended to keep using +`__STATIC_INLINE`. + +### 3.4.3 The "static" keyword (Recommended) ### + +For file global variables (variables that are global to a file but not visible +outside the file) should always use the `static` keyword. This should also apply +to any functions that are used only within a single file. + +Keep in mind the difference between a static variable at the file scope level, +and a static variable declared within a function. + +__Example__ + + // A variable that is only visible within a file + static uint32_t my_local_variable = 0xFF; + + // A function that is used only within a file + static void do_something(void) + { + // ... + } + +For Cortex-Mx devices, use the CMSIS `__STATIC_INLINE` macro if you need +something to be both static and inline. + +## 3.5 Data Types ## + +### 3.5.1 Avoid enums in arrays, structures, or unions (Required) ### + +This is especially important for aggregate types shared between pre-built +libraries (e.g. RAIL) and customer-compiled code (e.g. emlib). The problem +is that the size of enums is not standardized, but is compiler-defined. +Even within the same compiler, there could be options to select one style +vs. another. Libraries built with one compiler or options will not +interface properly to non-library code built with a different compiler +or options -- field offsets and structure / array sizes could mismatch. + +__Example__ + + // sl_lib.h include file: + + typedef enum { + SL_LIB_OPTION_A, // 0 + SL_LIB_OPTION_B, // 1 + SL_LIB_OPTION_C, // 2 + } sl_lib_option_t; + + typedef struct { + sl_lib_option_t default_option; + uint8_t some_other_field; + } sl_lib_config_t; + + extern void sl_lib_init(sl_lib_config_t *config); + extern void sl_lib_set_options(sl_lib_option_t *option_list, uint32_t option_count); + + // sl_lib.c implementation: + // + // Built with compiler or options where enums are the smallest type + // able to represent all of its defined values, so: + // sizeof(sl_lib_option_t) == 1 (int8_t can represent 0..2) + // sizeof(sl_lib_config_t) == 2, offsetof(some_other_field) == 1 + + // Customer application code: + // + // This code might be built with compiler or options where enums are + // of type int (i.e. int32_t on an I32 platform). + + #include "sl_lib.h" + + const sl_lib_config_t SL_LIB_CONFIG = { + .default_option = SL_LIB_OPTION_A, + .some_other_field = 10, + } + + void sl_lib_use_lib(void) + { + sl_lib_option_t lib_options[] = { SL_LIB_OPTION_B, SL_LIB_OPTION_C }; + + // sizeof(SL_LIB_CONFIG) == 8, offsetof(some_other_field) == 4 + sl_lib_init(&SL_LIB_CONFIG); + + // sizeof(lib_options) == 8, sizeof(*lib_options) == 4 + sl_lib_set_options(lib_options, sizeof(lib_options)/sizeof(*lib_options)); + } + +### 3.5.2 Avoid bitfields in structures/unions (Required) ### + +This is also especially important for aggregate types shared between libraries +and customer-compiled code. As with enums, the size and bit layout of +bitfields is not standardized, but is compiler-defined or subject to +compiler options. Libraries built with one compiler or options will +not interface properly to non-library code built with a different compiler +or options. + +__Example__ + + // sl_lib.h include file: + + typedef struct { + bool ena : 1; + uint8_t some_setting : 5; + } sl_lib_struct_t; + + // Library could be built such that this structure is laid out in a byte: + // 7 6 5 4 3 2 1 0 + // [ x | x | some_setting |ena] + // while application could be built such that this structure is laid out + // across two bytes, or in different endian order: + // 7 6 5 4 3 2 1 0 + // [ena| x | x | x | x | x | x | x ] + // [ some_setting | x | x | x ] + +## 3.6 Variables ## + +### 3.6.1 Using global variables (Recommended) ### + +Minimize use of global variables. It is hard for a compiler to optimize code +using them. The compiler (usually) only sees one C file at the time and does not +know if the global has been changed between accesses. + +A way around this might be to copy the global to a static/auto variable and use +the copy in your code. + +Global variables can also easily become a source for confusion and errors in the +application code as time goes on. As different developers work on the code they +might use the global in slightly different ways and accidentally break something +in parts of the code they are not working on. This recommendation should be +evaluated at an architecture/project level to determine if it applies. + +>**8051 Note:** The 8051 compiler will often produce more efficient code when +using a project global instead of sharing global data through a handle pointer +or other mechanism. This trade-off should be taken into account when writing +code targeted for 8051. As much as possible, steps should still be taken to +minimize the use of global variables. + +## 3.7 Functions ## + +### 3.7.1 Prototype functions (Required) ### + +Make sure either the full implementation or a prototype precedes any call to a +function. For external functions, this should be done by with a `#include` of +the appropriate header. + +### 3.7.2 Functions return data types (Required) ### + +All functions that can fail should return `sl_status_t`. The idea is to be as +consistent and predictable throughout all of our code base to make it easier +for customers to know what to expect from our functions. + +There will be functions that will not return `sl_status_t`. For example, +functions returning `void`; simple "getter" functions that cannot fail or that +we don't need to differentiate between error cases; a function checking if a +condition is true or false could return a `bool`; a function adding data to a +string or buffer could return the number of bytes added to the string or +buffer; or a callback function could return an indicator to let the stack know +how to act. Other examples may exist but all of these exceptions should be used +sparingly and with good reason. Please check with your team and/or manager +before doing so. + +In any case, the following requirements must be complied with: +- if a function can fail, there must be a clear indication as to how to detect +a failure. This is preferrably done through returning `sl_status`, but having a +special 'invalid' value returned in case of failure is also allowed. No matter +how this is achieved, it must be documented in the doxygen function header. +- `bool` must not be returned to indicate success or failure. `bool` should +only be used to indicate if a given condition is true or false. Even then, +using an `enum` should be considered for future-proofing the function, should +it need to return more than a true/false value in the future. + +__Example__ + + // Don't do: + bool sl_do_something(sl_type_t *var) + { + sl_status_t my_status; + // [...] + my_status = sli_do_anything(var); + // [...] + if (my_status == SL_STATUS_OK) { + return true; + } else { + return false; + } + } + + sl_status_t sl_net_is_link_up(bool *is_up) + { + // [...] + *is_up = true; + } + + // Instead do: + sl_status_t sl_do_something(sl_type_t *var) + { + sl_status_t my_status; + // [...] + my_status = sli_do_anything(var); + // [...] + return my_status; + } + + bool sl_net_is_link_up(void) + { + // [...] + return true; + } + + sl_usbh_action_t sl_usbh_on_device_connection(void) + { + // [...] + return SL_USBH_ACTION_ACCEPT; + } + + sl_usbd_handle_t sl_usbd_get_handle(uint8_t id) + { + // [...] + if (id < max_id) { + return sli_usbd_handle_table[id]; + } else { + return SL_USBD_HANDLE_INVALID; //defined to something invalid and properly documented + } + } + +### 3.7.3 Return values should always be checked and propagated (Recommended) ### + +Values returned by any function should always be checked to see if an error +occurred. Such return values should normally be propagated up the callers tree +up to the application or to a function that can react to it. + +### 3.7.4 Functions replicating a standard API can follow that API (Recommended) ### + +If a function aims to replicate a standard API (like `strcpy` or `printf`), our +version of the function can replicate that standard function's API. These +functions do not need to follow our coding standards' directives relating to +data types, return values or status. It should still follow our naming +convention. + +## 3.8 Macros ## + +### 3.8.1 Macros with side-effects (Recommended) ### + +Macros that may have have side-effects should be function-like and named +appropriately. + +__Example__ + + #define sl_lock() do {__acquire_mutex(&sl_top_level_mutex);} while(0) + #define sl_unlock() do {__release_mutex(&sl_top_level_mutex);} while(0) + +### 3.8.2 Macros with statement(s) (Required) ### + +If a macro expands into one or more full statements, make sure it consumes a +subsequent semicolon. Furthermore, multiple-statement macros must be wrapped in +a block. These rules ensure that the expanded macro will have the same syntax as +a non-compound statement. Otherwise, it may cause undesirable parsing if a +customer uses it without braces in a selection (`if (...) FOO();`) or iteration +(`while (...) FOO();`) statement. + +__Example__ + + #define SLI_FOO(x, y) \ + do { \ + ga = (x); \ + gb = (y); \ + gc = ga + gb; \ + } while (0) + + #define sli_do_nothing() (void)0 + + void sl_bar(int baz) + { + if (baz) { + SLI_FOO(123, 321); + } else { + sli_do_nothing(); + } + } + +### 3.8.3 Functional macros with argument(s) (Required) ### + +Uses of arguments within macros, and the macro body itself, if it is an +expression, should be wrapped in parentheses. This avoids problems stemming from +unintended precedence groupings. Arguments should be used only once if possible +to avoid problems when a statement or expression with side effects is passed. + +**Note:** In general, static inline functions are preferred to macros as they +have less weird side-effects and are easier to read. + +__Example__ + + #define sl_bar(x, y, z) (0xFFFF | ((x) & ((y) | (z)))) + +## 3.9 goto statements ## + +### 3.9.1 `goto` statements should only be used for cleanup purposes or early exit in case of an error, when there is no simple workaround (Required) ### + +`goto`s should never be used, except when needing to cleanup (free resources, +release a lock, exit a critical section, etc.) in the case an error occurred in +the function. If a simple workaround can be used instead of `goto`, the +workaround should be used instead. + +__Example__ + + // Using goto, if no simple workaround available + void sli_usb_function(void) + { + // Acquire lock + // [...] + if (!ok) { + goto release; + } + // [...] + release: + // Release lock + } + + // Workaround, whenever possible + void sli_usb_function(void) + { + // Acquire lock + // [...] + if (ok) { + // [...] + } + // Release lock + } + +### 3.9.2 `goto`s should only refer to a label declared after them (Required) ### + +A `goto` statement should only refer to a label declared after (below) them, in +the code. + +No `goto` shall ever cause the code to go back "up", it should always jump +"down", towards the end of the function. + +__Example__ + + // Don't do: + void sli_usb_function(void) + { + // [...] + loop_start: + // [...] + if (loop) { + goto loop_start; + } + } + + // Instead do: + void sli_usb_function(void) + { + // Acquire lock + // [...] + if (!ok) { + goto release; + } + // [...] + release: + // Release lock + } + +### 3.9.3 `goto`s should only refer to a static label located in the same function (Required) ### + +No computed `goto` statement (as available in some GCC extensions) shall be +used. `setjmp` and `longjmp` should never be used. The label referred to by a +`goto` statement needs to be in the same function as the goto statement itself. + +### 3.9.4 Any label referenced by a `goto` need to be declared in the same block or a block enclosing the `goto` (Required) ### +`goto` statements and labels should not be used to jump between blocks, as it +can easily lead to unstructured code. `goto` should not be used either to jump +between `case`s of a `switch`. + +__Example__ + + // Don't do: + void sli_usb_function(uint8_t bar) + { + if (bar > 0) { + goto label; + } + // [...] + goto label; + // [...] + if (foo > 0) { + label: + // [...] + } + } + + // Instead do: + void sli_usb_function(uint8_t bar) + { + // [...] + goto label; + // [...] + if (bar > 0) { + goto label; + } + // [...] + label: + // [...] + } + + // Don't do: + void sli_usb_function(uint8_t bar) + { + switch(bar) { + case 1: + if (x == y) { + goto label; + } + break; + + case 2: + doThat(); + label: + doTheOtherThing(); + break; + + default: + break; + } + } + +## 3.10 Libraries ## + +### 3.10.1 Dependencies (Required) ### + +Be conscious about what code the library depends on. To avoid excessive code +footprint, we must be aware of what external functions each library pulls in. +E.g. the `printf` and `sprintf` functions are better avoided within a library as +they require a large footprint + +**Exception:** They can be used for generating debug information as long as they +are conditionally compiled in with a flag that defaults to false). + +### 3.10.2 Including third party code (Required) ### + +For all open source or third party software that we include in our software +releases, we need to have an acceptable license that allows us to do so. That +means we need to send an email to our legal department (DL.Legal) and ask for +permission before introducing new open source software into our distributions. +Consult the Software Manager before including any third party software code +intended to be released. + +### 3.10.3 Configuring libraries in source form (Required) ### + +The customer should never have to change the original source files to configure +the library (this creates problems when upgrading the library to a newer +version, and also makes it impossible to have two projects with different +configuration settings using the same instance of the library). Instead, it +should be possible to set all configurations settings from the customer's +application project. Normally this can be done with macros that allow a customer +to configure library settings from within the application. + +__Example__ + + #if !defined(EM_SETTING) // If EM_SETTING is not defined by user, + #define EM_SETTING default_value_for_em // then we set our default value/function. + #endif + +### 3.10.4 Configuring libraries in binary form (Recommended) ### + +If a library is provided in binary form, then macros cannot be used for +configuration settings. + +A good alternative is to use callback functions or static variables. Callbacks +might not be appropriate for 8-bit code, so use your judgment. + +__Example__ + + // We call sl_custom_configuration_callback() from our library to get the + // user defined configuration. + // + int configuration = sl_custom_configuration_callback(); + + // The user have to define sl_custom_configuration_callback() and return a + // valid configuration for the application. + // + int sl_custom_configuration_callback(void) + { + return OPT_SIZE | MAX_BUF_SIZE; + } + +>**Comment:** sl_custom_configuration_callback is defined in user application +and returns different values depending on the user implementation. + +__Example__ + + // We initialize configuration with a sensible default that is suitable + // for the largest number of applications + // + int configuration = SL_DEFAULT_CONFIGURATION; + + // The user application can customize the behavior by calling + // sl_set_configuration + // + void sl_set_configuration(int user_config) + { + configuration = user_config; + } + +## 3.11 Misc ## + +### 3.11.1 Avoid embedding assignments in expressions (Recommended) ### + +Embedding assignments in expressions makes for all kinds of wacky bugs. When +scanning some code it is easy to miss that a complicated expression contains an +assignment deep inside. + +__Example__ + + ++ceiling; + *handle = ceiling; + +>**Comment:** The above is easy to understand, hard to get wrong and most +compilers today will generate the same optimized code that that example as it +will for the below code; + + *handle = ++ceiling; + +### 3.11.2 Use designated initializers in structure literals (Required) ### + +Structure literals used in initializations shall use the C99 designated +initializer syntax. The only exception is defined literals exposed via header +file. Because C++ does not fully support C99 style designated initializers, and +we want to make our headers usable from C++, initializers in headers must use +the structure order syntax. Structures allocated automatically (on the stack) +shall be initialized when declared. + +__Example__ + +foo.h: + typedef struct { + int bar; + int baz; + bool quux; + } foo_t; + + #define FOO_DEFAULT {3,5,false} + +foo.c: + foo_t tuna = { + .bar = 3, + .baz = 5, + .quux = false + }; + foo_t salmon = FOO_DEFAULT; + +>**Comment:** Literals without field identifiers create backward compatibility +traps whenever structures are updated. Structures that are not initialized when +declared can contain random values on the stack, leading to subtle bugs. + +***** + +# 4 Coding style and formatting # + +## 4.1 General formatting ## + +### 4.1.1 Use spaces, not tabs (Required) ### + +For indenting files, use spaces and never tabs. A mix of tabs and spaces is +never acceptable. + +### 4.1.2 Indents are 2 spaces per level (Required) ### + +Indent each nested level with 2 spaces of indent. + +#### 4.1.2.1 Preprocessor indentation (Recommended) #### + +Preprocessor directives historically have not been indented, but they may be +indented to make them less distracting to the module's code flow (though the +technique described in the section 3.2.2 offers an even cleaner alternative +where it makes sense). When indented, the # should remain attached to the +directive and not remain in the first column -- no modern preprocessor still +requires the # be in the first column. When an #if or #ifdef is indented, +its #else, #elif, and #endif shall also be identically indented. The code +between the preprocessor directives may also be indented. + +__Example__ + + void sl_set_xyz_option(xyz_option_t xyz_option) + { + #if defined( _XYZ_LFCCLKEN0_MASK ) // XYZ supports LFC clock + if (xyz_option == xyz_clock_lfc) { + xyz_clock_set_lfc(); + return; + } + #endif + #if defined( _XYZ_LFECLKSEL_MASK ) // XYZ supports LFE clock + if (xyz_option == xyz_clock_lfe) { + xyz_clock_set_lfe(); + return; + } + #endif + } + +### 4.1.3 Lines should not be longer than 80 characters (Recommended) ### + +We enforce an 80 characters limit per line of source code. This lets people set +up their editors such that they can have multiple editors side-by-side. Although +80 characters are little by modern standards, it mixes well with existing code. + +### 4.1.4 Line endings (Required) ### + +We use line ending normalization in our repositories. This means that all text +files are converted to '\n' line endings when they are stored in git. However +most customers are using Windows operating system which expects a CRLF line +ending. Therefore, with rare exception, all source code delivered to customers +should have CRLF (DOS) line endings. There are two ways to accomplish this. +First, if you are using a Windows host operating system, set your git autocrlf +setting as follows: + + core.autocrlf true + +This will ensure all text files have DOS line endings when checked out from the +repository. + +The second method is to use a release script that forces all text file line +endings to CRLF when a source code release package is built by the release +script. + +>**Exceptions:** if the source code is intended for a system that >use normal +line endings, for example a OS X or Linux system, then >the source line endings +can be left as '\n'. + +>**Note:** All repositories should include a .gitattributes file to explicitly +specify file types for line endings. + +### 4.1.5 Use only plain ASCII or UTF-8 (Required) ### + +Text files should almost always contain only plain ASCII. Specifically, avoid +characters outside the usual whitespace and printable ones (0x9-0xD and +0x20-0x7E, inclusive). Internationalized strings, when used, are best placed in +a resource file. + +In the rare case that other characters are needed in a text file and cannot be +escaped, the file should be UTF-8 encoded with no byte-order mark. + +### 4.1.6 Use ISO8601 formatting for dates (Required) ### + +If you use a date in the comments or elsewhere, specify it using the unambiguous +ISO8601 format, i.e. `2013-11-26`. + +### 4.1.7 Inserting empty and blank lines (Required) ### + +There should never be consecutive blank rows. + +Use two slashes (C++ comment) and 77 dashes to separate logical parts of the +code. Use 2 slashes and 32 dashes for minor sections. Use of section separators +as shown here is optional. + +__Example__ + + // ----------------------------------------------------------------------------- + // Here we start a new logical part in this source/header file... + + // ------------------------------- + // And here comes a new minor section... + +### 4.1.8 Use parentheses liberally (Required) ### + +Add parentheses if you have any doubt at all about precedence, not doing so has +led to some very obscure bugs. This is especially true of the bitwise binary +operators `{&, |, ^}` and Boolean operators `{&&, ||}`. + +### 4.1.9 Break up long expressions (Required) ### + +Whenever there are long expressions, it should be broken into multiple lines. +When a line is broken into multiple lines, each line should start with the +operator that operates on that full line (single element or a group of elements +within parentheses). The operator must be the first thing on the line, and it +should be indented appropriately. + +__Example__ + + int bitmask = (OPTION_1 + | OPTION_2 + | (IS_THIS_SET + ? OPTION_3 + : OPTION_4)); + + int bitmask = (OPTION_1 + | OPTION_2 + | (IS_THIS_SET ? OPTION_3 : OPTION_4)); + + int bitmask = (OPTION_1 + | OPTION_2 + | (OPTION_3 & OPTION_4)); + +>**Comment:** All the above are examples of nicely formatted long expressions. +> +>Below is an example how you should not format long and complex expressions. +> + // Avoid this... + int no_good_formatting = (OPTION_1 + | OPTION_2 + | OPTION_3 & OPTION_4); + +### 4.1.10 `goto` labels should be on column 1 (Required) ### + +Labels referred to by `goto`s need to be located at column 1, disregarding any +indentation. + +__Example__ + + // Don't do: + void sli_usb_function(void) + { + // Acquire lock + // [...] + if (!ok) { + goto release; + } + // [...] + release: + // Release lock + } + + // Instead do: + void sli_usb_function(void) + { + // Acquire lock + // [...] + if (!ok) { + goto release; + } + // [...] + release: + // Release lock + } + +## 4.2 Commenting code (Required) ## + +### 4.2.1 Use C++ style comments ("//") ### + +All inline code comments should use the C++ style `//`. However there are two +exceptions to this rule. First, function and file documentation blocks use a +different style (see documentation section below). + +Second, for multi-line macros using `#define`, C style comments `/* ... */` +should be used for embedded comments (see example below). + +For both kinds of comments, there should be a space following the opening +comment marker. For example `// My comment`. + +Make sure constant values in the code are explained. Function calls with raw +constants should be labeled based on the parameter that is being passed in. + +__Example__ + + // Example for the exception + // This type is needed because using // would swallow the line continuation marker. + #define MY_CLI_COMMANDS \ + /* This command takes 3 arguments: */ \ + /* Node ID - a 2-byte node ID destination */ \ + /* Endpoint - a 1-byte node ID */ \ + /* Cluster - a 2-byte cluster ID */ \ + { "my_command", my_command_function, "vuv" }, + + // Example of how to comment constant values. + // For the function declaration below + void function(int seconds, boolean print_output); + + // we add comments after each parameter (OPTIONAL) + function(0, // seconds + FALSE); // print_output + +## 4.3 Bracing style (Required) ## + +Use the so called "One True Brace Style" (see +https://en.wikipedia.org/wiki/Indentation_style#Variant:_1TBS\_(OTBS)) Indent +increases one level after an opening brace, and decreases one level before a +closing brace. Opening braces do not go on their own separate line, except for +free standing blocks and function definitions. Closing braces are on their own +separate line with nothing else on these lines. + +**All if/else/while/for/do-while blocks must be enclosed by braces, even if +there is only one statement in the block.** + +Exceptions for the above rule are; + +1. The typedef alias for a composite (`struct`/`union`) or `enum` type is on the +same line as the closing brace. +2. In a do-while loop the condition (`while (...);`) is on the same line as the +closing brace. +3. else and else if are on the same line as the closing brace. + +__Example__ + + void sl_do_something(uint8_t bar) + { + if (foo > bar) { // The preceding brace is *required* + do_this(); + } else if (for < bar) { + do_that(); + } else { + do_another_thing(); + } + + if (foo > bar) { + do_this(); + } + + while (1) { + } + + do { + sli_do_work(); + } while (foo); + } + + typedef enum { + SL_CARD_SPADE, + SL_CARD_HEART, + SL_CARD_CLUB, + SL_CARD_DIAMOND + } sl_card_suit_t; + +## 4.4 Switch statements and labels ## + +### 4.4.1 Using labels (Required) ### + +Switch-case labels should be indented as any other line of code would be. + +__Example__ + + if (foo) { + sl_bsp_set_leds(0xff00); + + testing: + + sl_bsp_set_leds(0x00ff); + } + +### 4.4.2 Labels with block (Required) ### + +If a block is desired after a label, then the opening brace should be by itself +on the line following the label, at the same indentation. + +The closing brace should be on a line by itself after the last statement in the +block, at the same indent level as the opening brace. + +__Example__ + + if (foo) { + sl_bsp_set_leds(0xff00); + + testing: + { + sl_bsp_set_leds(0x00ff); + sl_bsp_set_leds(0x0000); + } + } + +### 4.4.3 Switch statements (Required) ### + +The cases in switch statements should be indented one level from the enclosing +braces. Separate case blocks with a blank line after each `break;`. All switch +statements should include a `default` block unless there is a good reason not +to. The default block can collapse into one of the other cases but it should +clearly show what happens when there is no matching case. Finally, if a case +block does not end with an unconditional jump, there should be a comment clearly +stating that the code is intentionally meant to fall through. + +__Example__ + + switch(baz) { + case 1: + sli_do_this(); + break; + + case 2: + sli_do_that(); + // This case is meant to fall through to the next + + case 3: { + sli_do_the_other_thing(); + break; + } + + case 0: + default: + sli_do_what(); + break; + } + +## 4.5 Functions, operators and C keywords ## + +### 4.5.1 Listing function parameters (Required) ### + +Whenever there is a list of function parameters, they should all fit on a single +line or be listed one parameter per line. If listed on separate lines, each +parameter has the same indent level as the first parameter. + +__Example__ + + void sl_do_something(int a, + int b, + int c, + const char *string1, + const char *string2) + { + // ... + } + + void sl_do_something2(int a, int b, int c) + { + // ... + } + +### 4.5.2 Using function parentheses (Required) ### + +For function declarations, definitions and calls, there shall be no spaces +before or after the opening parentheses, or before the closing parentheses. + +__Example__ + + int sl_foo(int days, int seconds); + // ... + ret = sl_foo(days, seconds); + +### 4.5.3 Binary and ternary operators (Required) ### + +Use spaces around binary & ternary operators in expressions. C expressions are +hard enough to parse without running them altogether. + +__Example__ + + for (j = 0; j < parameter_sizes[i]; j++) { + +### 4.5.4 Use a single space after C keywords (Required) ### + +C keywords (ex. `for`, `switch`, `while`, `if`, `do`) – should have a single +space after the keyword. + +__Example__ + + while (counter < UART_MAX_IO_BUFFER) { + +### 4.5.5 Additional space within expressions ### + +Use of additional whitespace within expressions to improve readability +is permitted as long as it doesn't interfere with appropriate multi-line +expression indentation. Such style should be consistent within the module. + +### 4.5.6 Identify do-nothing code (Recommended) ### + +Avoid loops that do not make it obvious that they do nothing. Add a comment to +explain the reason for the do-nothing loop. This applies to any code that does +not do anything. + +__Example__ + + // Don't do: + while (waiting_for_something); + + // Instead do: + // Useful comment explaining why you are waiting + while (waiting_for_something); + +### 4.5.7 Pointer asterisk position (Required) ### + +When declaring a pointer to a variable, the pointer asterisk should be placed +together with the variable name, not together with the type. + +__Example__ + + // Don't do: + char* c = (char*)a; + void sl_foo(uint32_t* bar); + + // Instead do: + char *c = (char *)a; + void sl_foo(uint32_t *bar); + +### 4.5.8 Don't mix pointer and value type declarations (Required) ### + +Don't mix declarations of pointer type variables and value type variables on the +same line. + +__Example__ + + // Don't do: + uint32_t *a, b; + + // Instead do: + uint32_t *a; + uint32_t b; + +## 4.6 Naming ## + +### 4.6.1 General Considerations ### + +#### 4.6.1.1 Use meaningful names (Required) #### + +Special care should be taken when naming anything. The name should convey +the purpose of the construct as clearly as possible. + +#### 4.6.1.2 Avoid abbreviations (Required) #### + +In general, use long names and avoid unclear abbreviations and other cryptic +notations. + +Prefixes such as `sl_` and `sli_` are exceptions to this rule and therefore can +and need to be used where appropriate. + +### 4.6.2 Namespaces (Required) ### + +All constructs will have a prefix, with the exception of function parameters, +variables local to a function and structure fields. + +The purpose of using namespace prefixes is to prevent namespace collisions and +not necessarily for branding. + +The prefix will be the same for all constructs, it will only change based on +whether that construct is public (can be used by end users), internal (can only +be used from within Silicon Labs code), static (local to a file) or experimental +(may change without further notice during prototyping). + +If a construct is public, it should be prefixed by `sl_`. + +If a construct is internal, it should be prefixed by `sli_`. + +If a construct is experimental, it should be prefixed by `slx_`. For code which +is not yet following this coding standard to the full extend the prefix +`EXPERIMENTAL` should be used. + +For example, this means that no public function would refer to either a private +or internal type in one of their parameters. + +Those constructs' names should then be followed by a `_` prefix, that +can consists of either one or two words, separated by an underscore. For +example, this could be `uart_` or `usbd_msc_`. The `_` prefix can be +omitted if the code is intended to be common code used by **any** other module +and is placed in `platform/common` or a similar common location. + +Constants and macros will use capitalized version of these prefixes (`SL_`, +`SLI_`, `SLX_` and `_`). + +As previously stated, function parameters, variables local to a function and +structure fields will be prefixed by neither the sl[i;x]_/SL[I;X]_ nor the +_/ prefix. + +If a construct is static or in any way local to a single file, it is not +required to have any prefix at all. If it has some kind of prefix, it should +not use anything starting with `sl`. + +__Example__ + + // File-local + #define SLI_READY 0x0020 + + static uint8_t next_transmit; + + static urb_t transmit_buffer(uint8_t *buffer); + + typedef struct { + uint8_t urb_size; // Struct fields do not have any prefix. + uint8_t *urb_list_next; + uint16_t array[10]; + } urb_t; + + // Internal-only + #define SLI_UNUSED_PARAMETER(param) (void)(param) + + const unsigned int SLI_MAX_UART_CONNECTIONS = 3; + + sl_usbd_endpoint sli_usbd_msc_endpoint; // Internal variable using public type. + + typedef struct { + uint8_t time_ms; + uint8_t *longer_blah_ptr; + } sli_usbd_msc_cnt_t; + + void sli_usbd_msc_tx_endpoint(sli_usbd_msc_cnt_t *buffer, + uint8_t count); + + void sli_usbd_msc_tx_endpoint(sli_usbd_msc_cnt_t *buffer, + uint8_t count) + { + uint8_t flag; // Local variable does not have any prefix. + urb_t urb; // Referring to static type from within public function is ok. + } + + // Public + + #define SL_CREATE_HANDLE(node, id) (node).flag = ((id) | 0xFF00) + + const unsigned int SL_USBD_VERSION = 20200; + + sl_uart_channel_t sl_uart_channels_list[10]; + + sl_time_t sl_get_time(void); + + typedef struct { + uint32_t hour; + uint32_t minute; + uint32_t second; + } sl_time_t; + + // Experimental + + #define SLX_CREATE_MYHANDLE(node, id) (node).flag = ((id) | 0xAA00) + + const unsigned int SLX_USBD_VERSION = 20200; + + sl_uart_channel_t slx_proto_uart_channels_list[10]; + + slx_mytime_t slx_get_time(void); + + typedef struct { + uint32_t hour; + uint32_t minute; + // uint32_t second; + } slx_mytime_t; + +### 4.6.3 Naming (Required) ### + +The following section (4.6.3.*) contains information on how to name anything. +This acts as a default, if nothing more specific exists for a particular +construct. In general, construct-specific standards should be avoided. + +#### 4.6.3.1 Casing (Required) #### + +Every construct's name needs to be all lower-case, with each word or +abbreviation separated by an underscore. This is also known as +[snake case](https://en.wikipedia.org/wiki/Snake_case). + +__Example__ + + // Global variable + uint8_t sl_uart_char; // Publicly available + uint8_t sli_usbd_endpoint_buffer[32]; // Internal use only + + // File-local variable + static sl_usbd_urb_t *urb_list_head; + + // Functions + void sl_led_turn_on(void); + void sli_nvic_set_priority(ADC_IRQ); + + // Data types + typedef uint32_t sli_kernel_flags_t; + typedef struct { + uint8_t *data_start; + } sl_usbd_urb_t; + +#### 4.6.3.2 Casing and acronyms (Required) #### + +Acronyms and abbreviations are treated like any other +word. Do not put in lower-case or upper-case some or all letters of an +abbreviation, even if it is normally written that way. Instead, comply with the +standard about that particular construct and treat acronyms as a regular word. + +__Example__ + + static sl_usbd_urb_t *urb_list_head; + + sl_led_turn_on(); + + sl_irq_priority_t irq_priority = sl_nvic_get_priority(ADC_IRQ); + +### 4.6.4 Naming functions and variables ### + +#### 4.6.4.1 Functions and variables names have the form verb_noun (Required) #### + +When a verb and a noun the verb acts on are in a function name, the verb should +come first (`xxxx_get_power`, not `xxxx_power_get`). It should feel natural to +read the name. Most functions should contain both a verb and a noun and +therefore need to follow this rule. Notable exceptions are functions that are +callbacks, interrupt handlers and tasks, which typically do not have a verb. +These functions follow their own naming convention, as stated in 4.6.4.5, +4.6.4.6 and 4.6.4.7, respectively. + +Variables and functions of boolean type should use a naming style indicating the +sense of the boolean. For example `sl_usbd_device_is_connected`. + +__Example__ + + // This is for legacy EM code and does not apply to 8051 + // code base. + + sl_get_power(); // Call to a new-style API function. + + // Below is an example of how to redefine old style API calls to the new syntax. + #if (SLAB_OLD_API == SLAB_REPLACE_OLD_API_CALLS) + #define power_get sl_get_power + #define power_set sl_set_power + #endif + +#### 4.6.4.2 Function parameters should not have any prefix (Required) #### + +Do not prefix any function parameter with any `sl_`, `sli_` or `_` +prefix. + +#### 4.6.4.3 Function-local variables should not have any prefix (Required) #### + +Do not prefix any function-local variable with any `sl_`, `sli_` or `_` +prefix. + +#### 4.6.4.4 Variable and Function Names Indicate Units for Time (Required) #### + +When a variable is used for time, it must include the units in the name. When +a function returns a value that is used for time it must include units in the +name. This is important to prevent problems with accidentally +utilizing one unit of time in a function or variable that takes a different unit +of time. + +Variables and function names may either use abbreviations or spell out the +units. If abbreviations are used, the following shall be the abbreviations: + +Full Name | Abbreviation (if applicable) +--------- | ------------ +Years | Years +Days | Days +Hours | Hours +Minutes | Minutes +Seconds | Sec +Milliseconds | Ms +Microseconds | Us +Nanoseconds | Ns + +__Example__ + + #define SLI_JITTER_DELAY_MS 100 + + static void restart_discovery_after_delay(uint8_t delay_ms); + + uint8_t sli_get_discovery_time_remaining_ms(void); + +#### 4.6.4.5 Functions/stubs called on specific events/callbacks should start 'on' in their name (Required) #### + +Whenever a function is called to indicate an event occurred, or is called in +'reaction' to an event happenning, this function should have `on` in its name, +directly after the `_` prefix. +This also applies to callbacks or function stubs shipped to the user. + +__Example__ + void sl_usb_on_device_connection(void); + + void sl_kernel_on_task_deletion(void); + + static void on_transmit_completed(void); + +#### 4.6.4.6 Interrupt handlers should be suffixed by 'IRQHandler' or 'irq_handler' (Required) #### + +If a function is an interrupt handler, it should either be suffixed by +`IRQHandler` if it needs to follow CMSIS' format or by `irq_handler` if it +doesn't (for example, if an interrupt source is shared and multiplexed) between +several handlers. + +__Example__ + void RTCC_IRQHandler(void); + + void sl_gpio_irq_handler(void); + +#### 4.6.4.7 Non-blocking functions executed periodically in a main loop should be suffixed by 'step' (Required) #### + +If a non-blocking function (a function that doesn't pend or delay before +returning) needs to be called periodically in order to check if it has +something to process and then process what it can, this function needs to be +suffixed with `step`, to indicate it executes a single round of processing. It +should not be called `tick`, since `tick` can lead to confusion with timer or +OS ticks. + +__Example__ + void sl_cli_step(void); + + void sli_usb_msc_step(void); + +#### 4.6.4.8 Functions that are tasks should be suffixed by 'task' (Required) #### + +If a function is a task (in an OS environment), this function needs to be +suffixed with `task`, to indicate it is a task and needs to loop indefinitely +and never return. + +__Example__ + void sl_cli_task(void *task_argument); + + void sli_usb_task(void *task_argument); + +### 4.6.5 Naming constants ### + +#### 4.6.5.1 Constants should use upper case (Required) #### + +All constants should be named and use upper case letters. Avoid raw numbers in +code. This includes #defines constants, `const` variables and enum values. + +All #defines that are intended to be used by applications (customers) and part +of the API need to be prefixed by `SL_`. This includes #defines in +configuration files. + +All #defines that are local to a C file or private to our products (not +intended to be used by applications; present in a private header file) need to +be prefixed by `SLI_`. This is to prevent name clashes with compiler defines +(with `-D`) that could be specified by the user when building our source files. + +__Example__ + + #define SLI_NET_ARP_FLAG 0x0040 + const unsigned int SL_MAX_UART_CONNECTIONS = 3; + + typedef enum { + SL_USBH_HC_TYPE_LIST, + SL_USBH_HC_TYPE_PIPE + } sl_usbh_hc_type_t; + +### 4.6.6 Naming function-like macros ### + +#### 4.6.6.1 Follow the naming convention for regular functions (Required) #### + +Functional macros that can be used in the same way as functions follow the same +naming conventions as regular functions. + +#### 4.6.6.2 Use all caps for macros that can't be functions (Required) #### + +All caps with underscores are used for macros that cannot be made into +semantically equivalent functions. + +__Example__ + + // This is a macro function that can be used as a regular function. + #define sl_uart_init_default_uart(x) init_uart(UART0, (x)) + + // This is a macro function that cannot be used as a function. + #define SL_SOME_NUMBERS(x) {(x), ((x)+(x)), ((x)*(x))} + +### 4.6.7 Naming types ### + +#### 4.6.7.1 Public typedefs (Required) #### + +Each typedef must end with a '_t' suffix and cannot start with +'int', 'uint' or 'unicode'. + +#### 4.6.7.2 Structure fields should be snake_case, without any prefixes (Required) #### + +There should not be any prefix (no `sl_` and no `_`) in the name of any +structure field. + +__Example__ + + // Don't do + typedef struct { + uint32_t sl_nvm_page_header_offset; + uint32_t sl_nvm_page_header_size; + } sl_nvm_page_header_t; + + // Instead do: + typedef struct { + uint32_t offset; + uint32_t size; + } sl_nvm_page_header_t; + +#### 4.6.7.3 Type from typedef (Optional) #### + +If the type is a typedef, you can optionally add a type name if there is a +reason the anonymous type does not work. In this case use the same name as the +typedef name, without the '_t'. + +__Example__ + + // Anonymous structure name ... + // Use this style in most cases. + typedef struct { + // ... + } sl_nvm_page_header_t; + + // You can use this style if the struct needs a name. + typedef struct sl_nvm_page_header { + // ... + } sl_nvm_page_header_t; + +### 4.6.8 Files and directory structure ### + +#### 4.6.8.1 Filenames and directories use lower case (Required) #### + +All file names are lower case and multiple words are separated with one +underscore '_'. + +__Example__ + + sl_packet_buffer.c + +#### 4.6.8.2 Avoid duplicate filenames #### + +Avoid using the same file name for source files. + +**Note:** Among our entire source code there will be files with the same name. +This cannot be avoided. But files with the same name should never be used in the +same project/build. + +#### 4.6.8.3 File names (Required) #### + +File names (both for library and source) must include the namespace prefix of +the module as well as the `sl_` or `sli_` prefix (see section 9.2). Source files +must always be prefixed by `sl_` while header files (including configuration +files) must be prefixed by `sl_` if they only contain public APIs (functions, +defines, data types, etc.) and by `sli_` if they only contain private things. + +__Example__ + + sl_simple_mpu.c + sl_status.h + sl_sleeptimer_config.h + sli_iostream_swo_itm_8.h + +#### 4.6.8.4 Directory names (Required) #### + +Directories use lower case names and underscores as word separators. Subfolder +names do not need to be unique. + +### 4.6.9 UC-Instantiable components ### + +The following section (4.6.9.\*) defines naming format for UC-Instantiable +component related information (configuration files, macros and handles) + +#### 4.6.9.1 Configuration file names (Required) #### + +The configuration files for every instance of an instantiable component must +have the following format: +`sl____config.h` + +__Example__ + + // instance_name - vcom + sl_iostream_usart_vcom_config.h + // instance_name - btn0 + sl_simple_button_btn0_config.h + +#### 4.6.9.2 Configuration macros (Required) #### + +The configuration macros for the instantiable components must have the following +format: +`SL____CFG_VAL` + +__Example__ + + // instance_name - vcom + #define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + // instance_name - btn0 + #define SL_SIMPLE_BUTTON_BTN0_POLARITY 0 + +#### 4.6.9.3 Instance handles (Required) #### + +The handles for the instantiable components must have the following format: +`sl__` + +__Example__ + + sl_iostream_vcom + sl_button_btn0 + +***** + +# 5 Documentation # + +## 5.1 General ## + +Write documentation so that others can easily pick up the code. It makes life +easier for everyone. In particular, it makes supports job a lot easier as it +will generate less support requests. + +## 5.2 Comments should answer the question "Why?" (Required) ## + +Write comments that say why the code is the way it is. What the code does, and +how it does it, can usually be figured out from the code itself. Why it does it, +and why it does it the way that it does, cannot. If you write it the obvious +way, and it doesn't work, explain in a comment why it didn't. Otherwise the next +person to come along is going to convert it back to the obvious method and have +to learn the same painful lesson (or even worse, force you to relearn it). + +There needs to be enough documentation that a peer can read and understand the +code without having to ask the author for explanations. If a code reviewer feels +the need to ask for explanations about how stuff works, then the code author +should add this additional information as comments in the code. + +Comments should use correct grammar and full sentences. + +***** + +# 6 Doxygen Coding Style Guide # + +Doxygen is used to document all code that is released to customers, with a focus +on functions that are part of an API. For code that is only used internally it +is still strongly recommended to use Doxygen commenting as internal users will +find it useful. + +For file and function comment blocks, the Javadoc style is used: + + /**************************************************************************//** + * doc comments ... + *****************************************************************************/ + +For all other doc comments, the C++ style `///` is used. + +**Note**: The reason we are using C style doxygen for this is that Eclipse +(which Simplicity Studio is based on) can do correct code folding of this type +of blocks. + +## 6.1 File comment header (Required) ## + +All source files should have a file comment header that looks similar to the +following. The actual license text will depend on the project. See section 7 +for details about licenses. + + +## 6.2 Grouping modules (@addtogroup) (Recommended) ## + +Use the Doxygen command `@addtogroup` to group together source code that belongs +to the same module, for example UART and SPI and so on. This will make it easier +for customers to find the API documentation for the modules they are interested +in. + +It is recommended to add experimental source code making use of the `SLX`or +`EXPERIMENTAL` prefixes to a group called experimental as indicated in the +example below. + +It is also possible to create groups hierarchies, for example to have an ADC +group in the EM_Library group. + +__Example__ + + /**************************************************************************//** + * @addtogroup EM_Library + * @{ + *****************************************************************************/ + + /// variable, constants and code belonging to EM_Library + /// (but not in the ADC module). + uint32_t sl_some_global_variable; + + /**************************************************************************//** + * @addtogroup experimental + * @{ + *****************************************************************************/ + + /// experimental variable, constants and code belonging to EM_Library + /// (but not in the ADC module). + uint32_t slx_some_experimental_global_variable; + + /** @} (end addtogroup experimental) */ + + /**************************************************************************//** + * @addtogroup ADC + * @brief Analog to Digital Converter (ADC) Peripheral API + * @{ + *****************************************************************************/ + + /// variable, constants and code belonging to EM_Library and ADC module + bool sl_is_adc_configured; + + /** @} (end addtogroup ADC) */ + + /** @} (end addtogroup EM_Library) */ + + /// @} (end groupName) + + + +## 6.3 File/module level documentation (Recommended) ## + +If a file is part of a module, it may be desirable to include file-level +documentation. For example, the file level documentation may provide an overview +of how to use an API. To provide file-level documentation, a Javadoc style +Doxygen comment block should follow the file include statements. + +__Example__ + + /**************************************************************************//** + * + * @addtogroup adc_group ADC API + * + * @brief Brief one-sentence description of ADC module. + * + * The rest of this section can be multi paragraph explanation of the + * module. It can include tables and code examples. End the description + * as shown below and this will collect the remaining API documentation + * into this group. + * + * @{ + * + *****************************************************************************/ + +If a group is created as shown above, it needs to be closed at the end of the +file using one of the two methods shown below: + + // The following is used if there is only one group in a file or + // groups are not nested. + + /// @} end adc_group + + // The following is used when groups are nested. This is needed so + // that doxygen does not pick up the "end adc_group" as part of a doc + // comment for a following or enclosing group. + + /** @} end adc_group */ + +>**Comment:** The method used is optional. If in doubt about whether the second +method is needed, run Doxygen on your file and see if the "end" comment is being +picked up in the documentation. + +## 6.4 Function documentation (Required) ## + +This is required for any library or module code that will be customer facing. It +is also highly recommended to document any other code in the same way, even if +it is not expected to be customer-facing. Often times non-customer-facing code +ends up being delivered to a customer anyway. + +Normally, functions that are part of an example (like main) or other simple +functions that are part of the application and not library or module functions +are not documented with Doxygen. It may still be useful to use Doxygen to +provide documentation for complex examples. + +Each function definition contains at least a function brief statement and list +of parameters and return value if any. Doxygen will pick up a single sentence at +the start of the comment block as the brief description, so the `@brief` tag is +not necessary. + +If the function contains parameters and a return value, then these parameters +and return value must also be documented in Doxygen. + +Optionally the `@note` command can be used to highlight anything that the user +should pay extra attention to when using this function. + +It is useful to read the Doxygen documentation about how you can write good +documentation for your functions. Besides `@note`, there are other tags that can +also be used. For example `@sa` (see also) can be used to create a link to +another documented section. If you put a full function name or variable name +that Doxygen knows about, it will automatically create a link to the +documentation for that other function or variable. For macros you can add the +`@ref` tag before the item name and a link will be generated. + +__Example__ + + /**************************************************************************//** + * Brief description of function. + * + * @param myParam1 is a parameter that is most excellent + * @param myParam2 is not such a good parameter + * @returns Returns true on Tuesdays or whenever it is raining. + * + * Detailed description here. Can be multiple sentences. Can + * contain markdown (tables, code examples, bulleted lists) + * + * Can add as many additional paragraphs as needed. + * + * @note A note if the API needs a note. + *****************************************************************************/ + uint8_t sl_my_public_function(uint8_t my_param1, uint16_t my_param2) + { + // ... + } + +## 6.5 Variable documentation (Required) ## + +All public variables that are part of an API must be documented. It is also +recommended to document all file-level global variables even if they are not +public. + +**Note:** It is not necessary to document local (automatic) variables. + +Many variable will only require a single line or brief comment. In this case you +should use a C++ style doxygen comment `///`. You can use this same style even +for several lines of a documenting comment. However, if the variable requires a +large documentation block or needs to be visually separated from other sections +of the source code file, then use the Javadoc style blocks as used for +functions. + +__Example__ + + /// A brief description of this variable. + uint8_t sl_meaningful_variable_name; + + /// This variable has a brief line of documentation. + /// Then it also has some additional lines of documentation. + uint32_t sl_another_variable; + + /**************************************************************************//** + * Brief description of complicated variable. + * Additional extra documentation for this complicated variable that + * needs a bigger explanation. Or perhaps I just want this variable to + * stand out in my source file so I use the large comment blocks. + *****************************************************************************/ + +For fields of a structure, or a list of constants or anything that requires just +a brief comment, there is another style (post) that can be used. In this case +you put the doc comment on the same line as the item (instead of before it). To +do this the comment needs to start like this: `///< Brief comment.` + +__Example__ + + /// A brief comment about this data type. + /// I can follow with additional explanation as needed, perhaps how + /// it is used or allowed values or constraints. + typedef struct { + uint8_t r; ///< Brief comment about this field. + uint8_t g; ///< Green pixel value. + uint8_t b; ///< Blue pixel value. + } sl_pixel_t; + +## 6.6 Header file vs. implementation file (Recommended) ## + +To keep a simple distinction between public documentation and internal +documentation, all public documentation comments should be placed into the +library or module header (.h) file. This allows us to just pull in header files +when generating public-facing documentation and not need to worry about +separation of public or private content. + +The implementation file (.c) should also be documented if there additional non- +public functions or variables that are not part of the public documentation. The +.c doc comments can be used for generating internal documentation. + +If a function in a .c file is already documented in the header file, then it is +not necessary to repeat the documentation. However, a comment block should be +used with the brief description to visually mark the function in the source +file. + +__Example__ + + /**************************************************************************//** + * Brief description of function. + *****************************************************************************/ + uint8_t sl_do_something(uint8_t my_param1, uint16_t my_param2) + +If the function is a private (`static`) function then it should use a normal +comment block (same as public function in a header file). Private variables +should also be documented. + +## 6.7 Do not document sections (Recommended) ## + +The Doxygen configuration file for the project should be configured to exclude +undocumented objects. Therefore it is not necessary to add extra statements to +exclude Doxygen processing. Simply do not add Doxygen comments to the code you +do not want documented. + +__Example__ + + /// The following variable will be picked as part of the + /// documentation. + uint8_t sl_my_public_variable; + + // This variable should also have a comment to explain it, + // but by using only double-slash, it will not get picked + // up by Doxygen. + static uint8_t my_private_variable; + + /****************************************************************************** + * This is a function that will not be documented. + * + * Note the lack of the double slash at the end of the top line. That + * means this is not a true Javadoc comment block and Doxygen will not + * see it. + *****************************************************************************/ + void sli_do_something_secret(void) + { + // ... + } + +## 6.8 Do not release sections (Recommended) ## + +There may be instances where there are source files which contain sections that +should not be released, for example references to an emulator or todo comments. +In some build systems, you may use commented double square brackets (`//[[...]] +or `//[[` and `//]]`) to hide such code. You must make sure that the build +system used on said source runs the codestripper before relying on this +functionality. + +__Example__ + + //[[ + // Don't release this define + #define SL_EMULATOR_CONFIG 1 + //]] + +***** + +# 7 Licensing # + +## 7.1 Silicon Labs Licenses ## + +All of our released source files (.c, .h, others; generated and manually +written) should fall under one of the few licenses approved by our legal team. +All source files are therefore required to have a file comment header +containing the correct license type. + +- The [default license text](license-header-standard.h) must be used unless +otherwise specified. +- The [Open-Source/zlib license text](license-header-zlib.h) is used for select +software such as our CMSIS-Device header files and emlib, but can also be +applied to other parts of the code. Only use this license text if the module +already uses it, or with permission from the VP of Software. +- The [Apache 2.0 license text](license-header-apache.h) is used for select +software, but can also be applied to other parts of the code. Only use this +license text if the module already uses it, or with permission from the VP of +Software. +- The [third-party license text](license-header-third-party.h) is added on top +of any third-party code. It does not remove the existing text. If we include +any third party software, we need a way to clearly identify it as such. Yes, +this is extra work, but is required by our legal team. Using and releasing +third-party code has more constraints, see section 7.2 for the details. +- The [Micrium license text](license-header-micrium.h) is used for any code +that we charge for (i.e. the Micrium software stacks, with the exception of the +kernel). + +Please note that the version field in these headers is optional. If used, the +version field should be used to denote the component version, not the Gecko +SDK version. + +## 7.2 Third-Party Code ## + +We generally favor writing and maintaining our own code when the differences +(in effort, quality, market acceptance, etc.) with an open-source one are +small. + +The VP of Software must give his consent before any kind of third-party code is +allowed to be used, as special care must be taken when dealing with this type +of code. Specifically, content licensed to us under a "copyleft" license (GPL +and other viral open-source licenses) **must not be released**, including in +compiled form (such as a library or binary). + +New copyleft content should not be added. Existing copyleft released content +must be audited against this rule, documented and flagged to the VP of Software +for quick resolution. Whenever feasible and regardless of whether it is being +released or is a documented exception, existing copyleft content should be +replaced. + +Content that is "multi-licensed" (offered to us under our choice of more than +one license) is not considered copyleft if at least one of the offered licenses +is not copyleft. + +***** + + + +# 8 Universal Configurator (UC) Metadata Specific Guidelines # + +## 8.1 Motivations ## + +Now that we are starting to write more and more UC metadata files, we see a +need to define a standard for some of the information (component id, provides, +description, label, category, etc). This offers many benefits: + + - Simplifies writing metadata: Lots of inter-connections exist in the metadata + (for instance when comes time to define the requirements of a module). If the + naming (id/provides) of the components follow a standard, it becomes much + easier to guess the provides of another component and thus we don't need to + dig into the metadata to find the information. + - Improves look and feel/UX: If there is a standard way of describing/ + categorizing/etc the components, the UI tools will look much more consistent + and thus improve the UX. + - etc + +This section, for now, only describes the standard for software module +metadata. It does not cover hardware/chip description. + +## 8.2 Metadata good practices ## + +### 8.2.1 Super components ### + +**_Description_** + +Super components are components of components. They are normally used to +represent concepts or libraries. For example, a component "emlib" can be +created and composed of all the emlib drivers. While they are allowed, the +super components main usage should be to be included from example application +(to showcase some functionalities, for instance). + +**_Standard (encouraged)_** + +- Should only contain a list of other components (list of requirements) and not +define any file list +- In normal situation, they should not be used as a requirement for another +component. As a matter of fact, they should ideally have no "provides" +- They should only be include-able from a .slcp file and selectable from the UC +GUI. + +The reasons why this standard recommends against using these super components +as requirements from other components are the following: + +- The categorization of components is always evolving. As a matter of fact, the +library "emlib" will disappear in a near future. Making these super component's +name and content unpredictable. +- Adding a requirement on a super component when only one (or a few) +sub-components are really needed will result in a project that may contain more +stuff than really needed. Not everything can be optimized out by the linker, +this is likely to end up having a cost in footprints. + +### 8.2.2 Style guideline ### + +The YAML format is quite flexible, so in order to have the same style across +the SDK it will help to have some guidelines for how we write the content of +the .slcc YAML files. + + - Use 2 space indentation + - Prefere not to use quotes around elements. This will make the files look + clean and nice, and will match what python generation tools produce. + - When writing multiline comment prefere to use the : > syntax. There are + nine+ different ways of writing multiline comments in YAML, so we should + default to : > to be consistent. + +## 8.3 Components metadata (slcc) ## + +### 8.3.1 File name ### + +**_Standard_** + +`.slcc` + +**_Description_** + +From a technical point of view, it doesn't matter. However, having the files +always named this way allows to quickly see the id of the components by +browsing the component folders without having to open the files. + +**_Example(s)_** + +`power_manager.slcc` + +### 8.3.2 Component Id / Standard provide names ### + +**_Standard_** + +`` + +`_` + +`__` + +`____` + +All lower case and snake_case + +**_Description_** + +Use module names without taking into consideration any categorizations as much +as possible. EMLIB, EMDRV and Micrium OS, for example, should not be seen as +components or group. + +We should try to make our components as small as possible (basically being +atomic pieces of code). + +This may be complicated in some cases, for instance some modules have a "common" +component such as "micrium os" and "emdrv". Of course we cannot have two +components with id = "common". In order to avoid having "micriumos_common" and +"emdrv_common" as components, those could be split up in multiple components. + +Note that most of these "common to a module" components will have a tendency to +disappear with UP. + +Groups are added for clarity as generic provides may have to be added. More on +that in the following section. + +The only components that are allowed to have their id starting with a group are +the ones that are hardware specific and have no common parent module (for +instance; BSPs). + +**_Example(s)_** + +| Component | Id | +|-----------|----| +| SL_STATUS (part of platform/common) | `slstatus` | +| Micrium OS - kernel | `kernel` | +| Micrium OS - Common - Auth | `auth` | +| Micrium OS - USB Device | `usbd` | +| Gecko USB device core | `geckousbd` | +| Micrium OS - USBD MSC class | `usbd_class_msc` | +| BSP for stk3701 | `bsp_stk3701` | + +### 8.3.3 Generic provide names ### + +**_Standard_** + +`` + +`_` + +`___` + +All lower case and snake_case + +**_Description_** + +Is considered a generic provide something that can be provided by multiple +software components, hence having multiple software components having the exact +same provide name in their list. + +There are typically 2 use cases for those: + +**Single functionality that can be provided by different modules** + +Only a single component that has the provide must be added to a project. + +Most typical cases are generic hardware drivers. For cases where the driver +files are not generic and are tied to a given module (for example: +sleeptimer_hal), or if they do not require a choice from the user, those should +just be conditionally included to the main module itself. + +**Necessary add-ons to a given module** + +At least one component that has the provide must be added to the project + +Those are normally add-ons or plugins to a module. + +**_Example(s)_** + +| Case | Generic provide | +|------|-----------------| +| BSP. BSP are board specific. Once a board has been selected, only one software module will fulfill the needs. | `bsp` | +| Kernel port. For a given architecture, different ports with different functionalities may be provided such as FPU support or not. May end up being a user's choice. | `kernel_port` | +| USB Device classes. At least one usb device class must be added once you add USB device to your project. However, you can add as many as you want. | `usbd_class` | + +### 8.3.4 Label ### + +**_Standard_** + +Module name, in Capital Case and human readable format. For improved +readability, parent module name, if any, should be added in the label. + +**_Example(s)_** + +| Component | Label | +|-----------|-------| +| SL_STATUS (part of platform/common) | Status Code +| Micrium OS - kernel | Micrium OS Kernel | +| Micrium OS - USB Device | Micrium OS USB Device | +| Gecko USB device core | Gecko USB Device | +| Micrium OS - USBD MSC class | Micrium OS USB Device: MSC Class | +| BSP for stk3701 | STK3701 BSP | + +### 8.3.5 Category ### + +**_Standard_** + +Categorization should follow as much as possible the directory structure as +described here: +[IoT Platform Software - A Home for Unified Platform Components](https://confluence.silabs.com/display/SOFTWAREPLATFORM/IoT+Platform+Software+-+A+Home+for+Unified+Platform+Components) +without level 1. + +### 8.3.6 Description ### + +**_Standard_** + +1-3 succinct complete sentences, in simple English, describing the contents +and/or purpose of the component or project. + +## 8.4 Validation Libraries ## + +As the components get more and more complex, there will be a need to write an +increasing number of validation scripts to ensure that the correct +configurations and required dependencies are selected. In order to avoid code +duplication, writing more generic functions inside validation libraries and +importing those libraries into the validation helpers will greatly improve the +readability and maintainability of these scripts. + +Validation libraries that are generic enough to be used by components in +multiple repositories should be placed in platform/common. The validation +libraries target more specifically at a single repo should remain inside that +repo. It would be strongly recommended to avoid using libraries from one +repository in another, try to see instead if the required library can be made +generic enough to be placed inside of platform/common. + +Avoid grouping multiple validation functions used for very different tasks in +the same library, this will make finding the use case of the library easier. + +***** + +# 9 Content organization # + +## 9.1 General ## + +This section describes how our data (source code, template, metadata, test +code, etc) must be organized. + +## 9.2 Folders name and content ## + +All of our modules must have their content organized as described below. +Note that it is not mandatory for a given module to contain all of the folders +described here. + +### 9.2.1 inc ### + +Contains all header files that can be included by other modules/application. +Only these folders can be added to the include paths. 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 ▼Nenums
 CJLinkAccessFlags
 CJLinkAccessMaskFlags
 CJLinkBreakpoint
 CJLinkBreakpointImplementation
 CJLinkCore
 CJLinkCPUCapabilities
 CJLinkDataErrors
 CJLinkDeviceFamily
 CJLinkEraseErrors
 CJLinkEventTypes
 CJLinkFlags
 CJLinkFlashErrors
 CJLinkFunctions
 CJLinkGlobalErrors
 CJLinkHaltReasons
 CJLinkHost
 CJLinkInterfaces
 CJLinkReadErrors
 CJLinkResetStrategyCortexM3
 CJLinkROMTable
 CJLinkRTTCommand
 CJLinkRTTDirection
 CJLinkRTTErrors
 CJLinkStraceCommand
 CJLinkStraceEvent
 CJLinkStraceOperation
 CJLinkSWOCommands
 CJLinkSWOInterfaces
 CJLinkTraceCommand
 CJLinkTraceFormat
 CJLinkTraceSource
 CJLinkVectorCatchCortexM3
 CJLinkWriteErrors
 ▼Nerrors
 CJLinkDataException
 CJLinkEraseException
 CJLinkException
 CJLinkFlashException
 CJLinkReadException
 CJLinkRTTException
 CJLinkWriteException
 ▼Niec60730_cpu_registers
 Ciec60730_cpu_regsIEC60730 CPU Register Check Tests
 ▼Niec60730_invariable_memory
 Ciec60730_imcIEC60730 Invariable Memory Plausibility Verification Tests
 ▼Niec60730_irq
 Ciec60730_irqIEC60730 IRQ Plausibility Verification Tests
 ▼Niec60730_programme_counter
 Ciec60730_programme_counterIEC60730 CPU programme counter Tests
 ▼Niec60730_system_clock
 Ciec60730_system_clockIEC60730 System Clock Verification Tests
 ▼Niec60730_test_base
 Ciec60730TestBase
 ▼Niec60730_variable_memory
 Ciec60730_vmcIEC60730 Variable Memory Plausibility Verification Tests
 ▼Niec60730_watchdog
 Ciec60730_watchdogIEC60730 Watchdog Verification Tests
 ▼Njlink
 CJLinkDll
 ▼Njlink_constants
 CJlinkArm_Speed_Info_CStruct
 CJLinkArmEmuConnectInfo_CStruct
 CJLinkJtagIdData_CStruct
 ▼Nutil
 CPyTestSuites
 CTelnetDeviceUtil
 CTelnetHostUtil
 CTimeStampUtil
 Ciec60730_IRQExecutionBounds_t
 Ciec60730_LibraryVersion_t
 Ciec60730_WatchDog_tWatchdog component configuration structure
 CimcParams_tThis structure is used as configuration for IMC testing, that holds GPCRC Register
 CupdateCrcParams_t
 CvmcParams_tThis structure is used as configuration for VMC testing
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PRIV (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
READ (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
SIZE_16BIT (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
SIZE_32BIT (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
SIZE_8BIT (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
WRITE (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
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enums.JLinkAccessFlags Class Reference
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+Static Public Attributes

+tuple READ = (0 << 0)
 
+tuple WRITE = (1 << 0)
 
+tuple PRIV = (1 << 4)
 
+tuple SIZE_8BIT = (0 << 1)
 
+tuple SIZE_16BIT = (1 << 1)
 
+tuple SIZE_32BIT = (2 << 1)
 
+

Detailed Description

+
J-Link access types for data events.
+These access types allow specifying the different types of access events
+that should be monitored.
+Attributes:
+  READ: specifies to monitor read accesses.
+  WRITE: specifies to monitor write accesses.
+  PRIVILEGED: specifies to monitor privileged accesses.
+  SIZE_8BIT: specifies to monitor an 8-bit access width.
+  SIZE_16BIT: specifies to monitor an 16-bit access width.
+  SIZE_32BIT: specifies to monitor an 32-bit access width.
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessFlags__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessFlags__coll__graph.dot new file mode 100644 index 00000000..14c065db --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessFlags__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkAccessFlags" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkAccessFlags",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessFlags__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessFlags__inherit__graph.dot new file mode 100644 index 00000000..14c065db --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessFlags__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkAccessFlags" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkAccessFlags",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessMaskFlags-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessMaskFlags-members.html new file mode 100644 index 00000000..4a6dedb6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessMaskFlags-members.html @@ -0,0 +1,86 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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DIR (defined in enums.JLinkAccessMaskFlags)enums.JLinkAccessMaskFlagsstatic
PRIV (defined in enums.JLinkAccessMaskFlags)enums.JLinkAccessMaskFlagsstatic
SIZE (defined in enums.JLinkAccessMaskFlags)enums.JLinkAccessMaskFlagsstatic
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+Static Public Attributes

+tuple SIZE = (3 << 1)
 
+tuple DIR = (1 << 0)
 
+tuple PRIV = (1 << 4)
 
+

Detailed Description

+
J-Link access mask flags.
+Attributes:
+  SIZE: specifies to not care about the access size of the event.
+  DIR: specifies to not care about the access direction of the event.
+  PRIV: specifies to not care about the access privilege of the event.
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessMaskFlags__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessMaskFlags__coll__graph.dot new file mode 100644 index 00000000..1cfdcc0b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessMaskFlags__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkAccessMaskFlags" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkAccessMaskFlags",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessMaskFlags__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessMaskFlags__inherit__graph.dot new file mode 100644 index 00000000..1cfdcc0b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkAccessMaskFlags__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkAccessMaskFlags" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkAccessMaskFlags",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint-members.html new file mode 100644 index 00000000..fdc222e8 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint-members.html @@ -0,0 +1,90 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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ANY (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
ARM (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
HW (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
SW (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
SW_FLASH (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
SW_RAM (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
THUMB (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint.html new file mode 100644 index 00000000..cf5cf315 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint.html @@ -0,0 +1,131 @@ + + + + + + + +IEC_60730: enums.JLinkBreakpoint Class Reference + + + + + + + + + +
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IEC_60730 +
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+Static Public Attributes | +List of all members
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+
enums.JLinkBreakpoint Class Reference
+
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+
+Inheritance diagram for enums.JLinkBreakpoint:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkBreakpoint:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + +

+Static Public Attributes

+tuple SW_RAM = (1 << 4)
 
+tuple SW_FLASH = (1 << 5)
 
+tuple SW = (0x000000F0)
 
+tuple HW = (0xFFFFFF00)
 
+tuple ANY = (0xFFFFFFF0)
 
+tuple ARM = (1 << 0)
 
+tuple THUMB = (2 << 0)
 
+

Detailed Description

+
J-Link breakpoint types.
+Attributes:
+  SW_RAM: Software breakpont located in RAM.
+  SW_FLASH: Software breakpoint located in flash.
+  SW: Software breakpoint located in RAM or flash.
+  HW: Hardware breakpoint.
+  ANY: Allows specifying any time of breakpoint.
+  ARM: Breakpoint in ARM mode (only available on ARM 7/9 cores).
+  THUMB: Breakpoint in THUMB mode (only available on ARM 7/9 cores).
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation-members.html new file mode 100644 index 00000000..a636f0c8 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation-members.html @@ -0,0 +1,87 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkBreakpointImplementation Member List
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This is the complete list of members for enums.JLinkBreakpointImplementation, including all inherited members.

+ + + + + +
FLASH (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
HARD (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
PENDING (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
SOFT (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation.html new file mode 100644 index 00000000..d316de8d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation.html @@ -0,0 +1,119 @@ + + + + + + + +IEC_60730: enums.JLinkBreakpointImplementation Class Reference + + + + + + + + + +
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+Static Public Attributes | +List of all members
+
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enums.JLinkBreakpointImplementation Class Reference
+
+
+
+Inheritance diagram for enums.JLinkBreakpointImplementation:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkBreakpointImplementation:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + +

+Static Public Attributes

+tuple HARD = (1 << 0)
 
+tuple SOFT = (1 << 1)
 
+tuple PENDING = (1 << 2)
 
+tuple FLASH = (1 << 4)
 
+

Detailed Description

+
J-Link breakpoint implementation types.
+Attributes:
+  HARD: Hardware breakpoint using a breakpoint unit.
+  SOFT: Software breakpoint using a breakpoint instruction.
+  PENDING: Breakpoint has not been set yet.
+  FLASH: Breakpoint set in flash.
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation__coll__graph.dot new file mode 100644 index 00000000..64a80e7b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkBreakpointImplementation" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkBreakpointImplementation",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation__inherit__graph.dot new file mode 100644 index 00000000..64a80e7b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpointImplementation__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkBreakpointImplementation" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkBreakpointImplementation",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint__coll__graph.dot new file mode 100644 index 00000000..2b89ddb9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkBreakpoint" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkBreakpoint",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint__inherit__graph.dot new file mode 100644 index 00000000..2b89ddb9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkBreakpoint__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkBreakpoint" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkBreakpoint",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities-members.html new file mode 100644 index 00000000..9ab8caf9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities-members.html @@ -0,0 +1,96 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkCPUCapabilities Member List
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This is the complete list of members for enums.JLinkCPUCapabilities, including all inherited members.

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DCC (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
GO (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
HALT (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
HSS (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
IS_HALTED (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
READ_MEMORY (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
READ_REGISTERS (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
RESET (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
RUN_STOP (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
STEP (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
TERMINAL (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
WRITE_MEMORY (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
WRITE_REGISTERS (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities.html new file mode 100644 index 00000000..d1ac7ff4 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities.html @@ -0,0 +1,140 @@ + + + + + + + +IEC_60730: enums.JLinkCPUCapabilities Class Reference + + + + + + + + + +
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+Static Public Attributes | +List of all members
+
+
enums.JLinkCPUCapabilities Class Reference
+
+
+
+Inheritance diagram for enums.JLinkCPUCapabilities:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkCPUCapabilities:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+tuple READ_MEMORY = (1 << 1)
 
+tuple WRITE_MEMORY = (1 << 2)
 
+tuple READ_REGISTERS = (1 << 3)
 
+tuple WRITE_REGISTERS = (1 << 4)
 
+tuple GO = (1 << 5)
 
+tuple STEP = (1 << 6)
 
+tuple HALT = (1 << 7)
 
+tuple IS_HALTED = (1 << 8)
 
+tuple RESET = (1 << 9)
 
+tuple RUN_STOP = (1 << 10)
 
+tuple TERMINAL = (1 << 11)
 
+tuple DCC = (1 << 14)
 
+tuple HSS = (1 << 15)
 
+

Detailed Description

+
Target CPU Cabilities.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities__coll__graph.dot new file mode 100644 index 00000000..56202c41 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkCPUCapabilities" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkCPUCapabilities",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities__inherit__graph.dot new file mode 100644 index 00000000..56202c41 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCPUCapabilities__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkCPUCapabilities" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkCPUCapabilities",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCore-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCore-members.html new file mode 100644 index 00000000..5f4717e6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCore-members.html @@ -0,0 +1,163 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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ANY (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM11 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1136 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1136J (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1136J_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1136JF (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1136JF_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1156 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1176 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1176J (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1176J_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1176JF (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1176JF_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI_R3 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI_R4 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI_S_R3 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI_S_R4 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM9 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM920T (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM922T (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM926EJ_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM946E_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM966E_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM968E_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM9TDMI_S (defined in enums.JLinkCore)enums.JLinkCorestatic
CIP51 (defined in enums.JLinkCore)enums.JLinkCorestatic
COLDFIRE (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A12 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A15 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A17 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A5 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A7 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A8 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A9 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M0 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M1 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M3 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M3_R1P0 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M3_R1P1 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M3_R2P0 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M4 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M7 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M_V8BASEL (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M_V8MAINL (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_R4 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_R5 (defined in enums.JLinkCore)enums.JLinkCorestatic
EFM8_UNSPEC (defined in enums.JLinkCore)enums.JLinkCorestatic
MIPS (defined in enums.JLinkCore)enums.JLinkCorestatic
MIPS_M4K (defined in enums.JLinkCore)enums.JLinkCorestatic
MIPS_MICROAPTIV (defined in enums.JLinkCore)enums.JLinkCorestatic
NONE (defined in enums.JLinkCore)enums.JLinkCorestatic
POWER_PC (defined in enums.JLinkCore)enums.JLinkCorestatic
POWER_PC_N1 (defined in enums.JLinkCore)enums.JLinkCorestatic
POWER_PC_N2 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX (defined in enums.JLinkCore)enums.JLinkCorestatic
RX110 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX111 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX113 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX210 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX21A (defined in enums.JLinkCore)enums.JLinkCorestatic
RX220 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX230 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX231 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX23T (defined in enums.JLinkCore)enums.JLinkCorestatic
RX610 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX621 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX62G (defined in enums.JLinkCore)enums.JLinkCorestatic
RX62N (defined in enums.JLinkCore)enums.JLinkCorestatic
RX62T (defined in enums.JLinkCore)enums.JLinkCorestatic
RX630 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX631 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX63N (defined in enums.JLinkCore)enums.JLinkCorestatic
RX63T (defined in enums.JLinkCore)enums.JLinkCorestatic
RX64M (defined in enums.JLinkCore)enums.JLinkCorestatic
RX71M (defined in enums.JLinkCore)enums.JLinkCorestatic
SIM (defined in enums.JLinkCore)enums.JLinkCorestatic
XSCALE (defined in enums.JLinkCore)enums.JLinkCorestatic
+ +
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enums.JLinkCore Class Reference
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+
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Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkCore:
+
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Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int NONE = 0x00000000
 
+int ANY = 0xFFFFFFFF
 
+int CORTEX_M1 = 0x010000FF
 
+int COLDFIRE = 0x02FFFFFF
 
+int CORTEX_M3 = 0x030000FF
 
+int CORTEX_M3_R1P0 = 0x03000010
 
+int CORTEX_M3_R1P1 = 0x03000011
 
+int CORTEX_M3_R2P0 = 0x03000020
 
+int SIM = 0x04FFFFFF
 
+int XSCALE = 0x05FFFFFF
 
+int CORTEX_M0 = 0x060000FF
 
+int CORTEX_M_V8BASEL = 0x060100FF
 
+int ARM7 = 0x07FFFFFF
 
+int ARM7TDMI = 0x070000FF
 
+int ARM7TDMI_R3 = 0x0700003F
 
+int ARM7TDMI_R4 = 0x0700004F
 
+int ARM7TDMI_S = 0x070001FF
 
+int ARM7TDMI_S_R3 = 0x0700013F
 
+int ARM7TDMI_S_R4 = 0x0700014F
 
+int CORTEX_A8 = 0x080000FF
 
+int CORTEX_A7 = 0x080800FF
 
+int CORTEX_A9 = 0x080900FF
 
+int CORTEX_A12 = 0x080A00FF
 
+int CORTEX_A15 = 0x080B00FF
 
+int CORTEX_A17 = 0x080C00FF
 
+int ARM9 = 0x09FFFFFF
 
+int ARM9TDMI_S = 0x090001FF
 
+int ARM920T = 0x092000FF
 
+int ARM922T = 0x092200FF
 
+int ARM926EJ_S = 0x092601FF
 
+int ARM946E_S = 0x094601FF
 
+int ARM966E_S = 0x096601FF
 
+int ARM968E_S = 0x096801FF
 
+int ARM11 = 0x0BFFFFFF
 
+int ARM1136 = 0x0B36FFFF
 
+int ARM1136J = 0x0B3602FF
 
+int ARM1136J_S = 0x0B3603FF
 
+int ARM1136JF = 0x0B3606FF
 
+int ARM1136JF_S = 0x0B3607FF
 
+int ARM1156 = 0x0B56FFFF
 
+int ARM1176 = 0x0B76FFFF
 
+int ARM1176J = 0x0B7602FF
 
+int ARM1176J_S = 0x0B7603FF
 
+int ARM1176JF = 0x0B7606FF
 
+int ARM1176JF_S = 0x0B7607FF
 
+int CORTEX_R4 = 0x0C0000FF
 
+int CORTEX_R5 = 0x0C0100FF
 
+int RX = 0x0DFFFFFF
 
+int RX610 = 0x0D00FFFF
 
+int RX62N = 0x0D01FFFF
 
+int RX62T = 0x0D02FFFF
 
+int RX63N = 0x0D03FFFF
 
+int RX630 = 0x0D04FFFF
 
+int RX63T = 0x0D05FFFF
 
+int RX621 = 0x0D06FFFF
 
+int RX62G = 0x0D07FFFF
 
+int RX631 = 0x0D08FFFF
 
+int RX210 = 0x0D10FFFF
 
+int RX21A = 0x0D11FFFF
 
+int RX220 = 0x0D12FFFF
 
+int RX230 = 0x0D13FFFF
 
+int RX231 = 0x0D14FFFF
 
+int RX23T = 0x0D15FFFF
 
+int RX111 = 0x0D20FFFF
 
+int RX110 = 0x0D21FFFF
 
+int RX113 = 0x0D22FFFF
 
+int RX64M = 0x0D30FFFF
 
+int RX71M = 0x0D31FFFF
 
+int CORTEX_M4 = 0x0E0000FF
 
+int CORTEX_M7 = 0x0E0100FF
 
+int CORTEX_M_V8MAINL = 0x0E0200FF
 
+int CORTEX_A5 = 0x0F0000FF
 
+int POWER_PC = 0x10FFFFFF
 
+int POWER_PC_N1 = 0x10FF00FF
 
+int POWER_PC_N2 = 0x10FF01FF
 
+int MIPS = 0x11FFFFFF
 
+int MIPS_M4K = 0x1100FFFF
 
+int MIPS_MICROAPTIV = 0x1101FFFF
 
+int EFM8_UNSPEC = 0x12FFFFFF
 
+int CIP51 = 0x1200FFFF
 
+

Detailed Description

+
Enumeration for the different CPU core identifiers.
+These are the possible cores for targets the J-Link is connected to.
+Note that these are bitfields.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCore__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCore__coll__graph.dot new file mode 100644 index 00000000..6b404c15 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCore__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkCore" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkCore",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCore__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCore__inherit__graph.dot new file mode 100644 index 00000000..6b404c15 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkCore__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkCore" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkCore",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors-members.html new file mode 100644 index 00000000..dd477079 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors-members.html @@ -0,0 +1,111 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkDataErrors Member List
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This is the complete list of members for enums.JLinkDataErrors, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ERROR_INVALID_ACCESS_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_INVALID_ADDR_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_INVALID_DATA_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_ADDR_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_DATA_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_EVENTS (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_UNKNOWN (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkDataErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors.html new file mode 100644 index 00000000..59cd8e8a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors.html @@ -0,0 +1,228 @@ + + + + + + + +IEC_60730: enums.JLinkDataErrors Class Reference + + + + + + + + + +
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Inheritance graph
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+Collaboration diagram for enums.JLinkDataErrors:
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+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int ERROR_UNKNOWN = 0x80000000
 
+int ERROR_NO_MORE_EVENTS = 0x80000001
 
+int ERROR_NO_MORE_ADDR_COMP = 0x80000002
 
+int ERROR_NO_MORE_DATA_COMP = 0x80000004
 
+int ERROR_INVALID_ADDR_MASK = 0x80000020
 
+int ERROR_INVALID_DATA_MASK = 0x80000040
 
+int ERROR_INVALID_ACCESS_MASK = 0x80000080
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes generated when setting a data event.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkDataErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given error code.
+Args:
+  cls (JLinkDataErrors): the ``JLinkDataErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors__coll__graph.dot new file mode 100644 index 00000000..c5686cae --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "enums.JLinkDataErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkDataErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors__inherit__graph.dot new file mode 100644 index 00000000..75d9e689 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDataErrors__inherit__graph.dot @@ -0,0 +1,13 @@ +digraph "enums.JLinkDataErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkDataErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="errors.JLinkDataException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkDataException.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily-members.html new file mode 100644 index 00000000..5635ff78 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily-members.html @@ -0,0 +1,104 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkDeviceFamily Member List
+
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+ +

This is the complete list of members for enums.JLinkDeviceFamily, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + +
ANY (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
ARM10 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
ARM11 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
ARM7 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
ARM9 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
AUTO (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
COLDFIRE (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_A5 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_A8 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_A9 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_M0 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_M1 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_M3 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_M4 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_R4 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
EFM8 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
MIPS (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
POWERPC (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
RX (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
SIMULATOR (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
XSCALE (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily.html new file mode 100644 index 00000000..7ca1e1ce --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily.html @@ -0,0 +1,166 @@ + + + + + + + +IEC_60730: enums.JLinkDeviceFamily Class Reference + + + + + + + + + +
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+
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+
[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int AUTO = 0
 
+int CORTEX_M1 = 1
 
+int COLDFIRE = 2
 
+int CORTEX_M3 = 3
 
+int SIMULATOR = 4
 
+int XSCALE = 5
 
+int CORTEX_M0 = 6
 
+int ARM7 = 7
 
+int CORTEX_A8 = 8
 
+int CORTEX_A9 = 8
 
+int ARM9 = 9
 
+int ARM10 = 10
 
+int ARM11 = 11
 
+int CORTEX_R4 = 12
 
+int RX = 13
 
+int CORTEX_M4 = 14
 
+int CORTEX_A5 = 15
 
+int POWERPC = 16
 
+int MIPS = 17
 
+int EFM8 = 18
 
+int ANY = 255
 
+

Detailed Description

+
Enumeration for the difference device families.
+These are the possible device families for targets that the J-Link is
+connected to.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily__coll__graph.dot new file mode 100644 index 00000000..9666faa1 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkDeviceFamily" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkDeviceFamily",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily__inherit__graph.dot new file mode 100644 index 00000000..9666faa1 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkDeviceFamily__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkDeviceFamily" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkDeviceFamily",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors-members.html new file mode 100644 index 00000000..381b7f8b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors-members.html @@ -0,0 +1,105 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkEraseErrors Member List
+
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+ +

This is the complete list of members for enums.JLinkEraseErrors, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + +
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ILLEGAL_COMMAND (defined in enums.JLinkEraseErrors)enums.JLinkEraseErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkEraseErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors.html new file mode 100644 index 00000000..4045b213 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors.html @@ -0,0 +1,210 @@ + + + + + + + +IEC_60730: enums.JLinkEraseErrors Class Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
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+
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+
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+Public Member Functions | +Static Public Attributes | +List of all members
+
+
enums.JLinkEraseErrors Class Reference
+
+
+
+Inheritance diagram for enums.JLinkEraseErrors:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkEraseErrors:
+
+
Collaboration graph
+
[legend]
+ + + + +

+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int ILLEGAL_COMMAND = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes generated during an erase operation.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkEraseErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkEraseErrors): the ``JLinkEraseErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors__coll__graph.dot new file mode 100644 index 00000000..413bad22 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "enums.JLinkEraseErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkEraseErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors__inherit__graph.dot new file mode 100644 index 00000000..0dc223f8 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEraseErrors__inherit__graph.dot @@ -0,0 +1,13 @@ +digraph "enums.JLinkEraseErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkEraseErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="errors.JLinkEraseException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkEraseException.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes-members.html new file mode 100644 index 00000000..499b76f6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes-members.html @@ -0,0 +1,84 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkEventTypes Member List
+
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+ +

This is the complete list of members for enums.JLinkEventTypes, including all inherited members.

+ + +
BREAKPOINT (defined in enums.JLinkEventTypes)enums.JLinkEventTypesstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes.html new file mode 100644 index 00000000..c3155612 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes.html @@ -0,0 +1,107 @@ + + + + + + + +IEC_60730: enums.JLinkEventTypes Class Reference + + + + + + + + + +
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IEC_60730 +
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+Static Public Attributes | +List of all members
+
+
enums.JLinkEventTypes Class Reference
+
+
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+Inheritance diagram for enums.JLinkEventTypes:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkEventTypes:
+
+
Collaboration graph
+
[legend]
+ + + + +

+Static Public Attributes

+tuple BREAKPOINT = (1 << 0)
 
+

Detailed Description

+
J-Link data event types.
+Attributes:
+  BREAKPOINT: breakpoint data event.
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes__coll__graph.dot new file mode 100644 index 00000000..7ac417e4 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkEventTypes" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkEventTypes",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes__inherit__graph.dot new file mode 100644 index 00000000..7ac417e4 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkEventTypes__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkEventTypes" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkEventTypes",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags-members.html new file mode 100644 index 00000000..eead5508 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags-members.html @@ -0,0 +1,91 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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IEC_60730 +
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+
+
enums.JLinkFlags Member List
+
+
+ +

This is the complete list of members for enums.JLinkFlags, including all inherited members.

+ + + + + + + + + +
DLG_BUTTON_CANCEL (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
DLG_BUTTON_NO (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
DLG_BUTTON_OK (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
DLG_BUTTON_YES (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
GO_OVERSTEP_BP (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
HW_PIN_STATUS_HIGH (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
HW_PIN_STATUS_LOW (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
HW_PIN_STATUS_UNKNOWN (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags.html new file mode 100644 index 00000000..881c9f97 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags.html @@ -0,0 +1,126 @@ + + + + + + + +IEC_60730: enums.JLinkFlags Class Reference + + + + + + + + + +
+
+ + + + + + +
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IEC_60730 +
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+Static Public Attributes | +List of all members
+
+
enums.JLinkFlags Class Reference
+
+
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+Inheritance diagram for enums.JLinkFlags:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkFlags:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+tuple GO_OVERSTEP_BP = (1 << 0)
 
+tuple DLG_BUTTON_YES = (1 << 0)
 
+tuple DLG_BUTTON_NO = (1 << 1)
 
+tuple DLG_BUTTON_OK = (1 << 2)
 
+tuple DLG_BUTTON_CANCEL = (1 << 3)
 
+int HW_PIN_STATUS_LOW = 0
 
+int HW_PIN_STATUS_HIGH = 1
 
+int HW_PIN_STATUS_UNKNOWN = 255
 
+

Detailed Description

+
Enumeration for the different flags that are passed to the J-Link C SDK
+API methods.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags__coll__graph.dot new file mode 100644 index 00000000..e4b05730 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkFlags" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkFlags",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags__inherit__graph.dot new file mode 100644 index 00000000..e4b05730 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlags__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkFlags" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkFlags",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors-members.html new file mode 100644 index 00000000..ed87ee5a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors-members.html @@ -0,0 +1,107 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkFlashErrors Member List
+
+
+ +

This is the complete list of members for enums.JLinkFlashErrors, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + +
COMPARE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
PROGRAM_ERASE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkFlashErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VERIFICATION_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors.html new file mode 100644 index 00000000..a6c57927 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors.html @@ -0,0 +1,216 @@ + + + + + + + +IEC_60730: enums.JLinkFlashErrors Class Reference + + + + + + + + + +
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IEC_60730 +
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+Public Member Functions | +Static Public Attributes | +List of all members
+
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enums.JLinkFlashErrors Class Reference
+
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+Inheritance diagram for enums.JLinkFlashErrors:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkFlashErrors:
+
+
Collaboration graph
+
[legend]
+ + + + +

+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int COMPARE_ERROR = -2
 
+int PROGRAM_ERASE_ERROR = -3
 
+int VERIFICATION_ERROR = -4
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes generated during a flash operation.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkFlashErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkFlashErrors): the ``JLinkFlashErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors__coll__graph.dot new file mode 100644 index 00000000..e86a991d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "enums.JLinkFlashErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkFlashErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors__inherit__graph.dot new file mode 100644 index 00000000..54a96a25 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFlashErrors__inherit__graph.dot @@ -0,0 +1,13 @@ +digraph "enums.JLinkFlashErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkFlashErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="errors.JLinkFlashException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkFlashException.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions-members.html new file mode 100644 index 00000000..d91fa7a8 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions-members.html @@ -0,0 +1,86 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
+
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+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
enums.JLinkFunctions Member List
+
+
+ +

This is the complete list of members for enums.JLinkFunctions, including all inherited members.

+ + + + +
FLASH_PROGRESS_PROTOTYPE (defined in enums.JLinkFunctions)enums.JLinkFunctionsstatic
LOG_PROTOTYPE (defined in enums.JLinkFunctions)enums.JLinkFunctionsstatic
UNSECURE_HOOK_PROTOTYPE (defined in enums.JLinkFunctions)enums.JLinkFunctionsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions.html new file mode 100644 index 00000000..64330702 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions.html @@ -0,0 +1,162 @@ + + + + + + + +IEC_60730: enums.JLinkFunctions Class Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Static Public Attributes | +List of all members
+
+
enums.JLinkFunctions Class Reference
+
+
+
+Inheritance diagram for enums.JLinkFunctions:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkFunctions:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + +

+Static Public Attributes

+ LOG_PROTOTYPE = ctypes.CFUNCTYPE(None, ctypes.c_char_p)
 
 UNSECURE_HOOK_PROTOTYPE
 
 FLASH_PROGRESS_PROTOTYPE
 
+

Detailed Description

+
Collection of function prototype and type builders for the J-Link SDK
+API calls.

Member Data Documentation

+ +

◆ FLASH_PROGRESS_PROTOTYPE

+ +
+
+ + + + + +
+ + + + +
enums.JLinkFunctions.FLASH_PROGRESS_PROTOTYPE
+ 		+static
+
+Initial value:
= ctypes.CFUNCTYPE(None,
+
ctypes.c_char_p,
+
ctypes.c_char_p,
+
ctypes.c_int)
+
+
+
+ +

◆ UNSECURE_HOOK_PROTOTYPE

+ +
+
+ + + + + +
+ + + + +
enums.JLinkFunctions.UNSECURE_HOOK_PROTOTYPE
+ 		+static
+
+Initial value:
= ctypes.CFUNCTYPE(ctypes.c_int,
+
ctypes.c_char_p,
+
ctypes.c_char_p,
+
ctypes.c_uint32)
+
+
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions__coll__graph.dot new file mode 100644 index 00000000..ec36ceca --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkFunctions" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkFunctions",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions__inherit__graph.dot new file mode 100644 index 00000000..ec36ceca --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkFunctions__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkFunctions" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkFunctions",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors-members.html new file mode 100644 index 00000000..61ca7738 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors-members.html @@ -0,0 +1,104 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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+
enums.JLinkGlobalErrors Member List
+
+
+ +

This is the complete list of members for enums.JLinkGlobalErrors, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + +
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkGlobalErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors.html new file mode 100644 index 00000000..ec82f45a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors.html @@ -0,0 +1,207 @@ + + + + + + + +IEC_60730: enums.JLinkGlobalErrors Class Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
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+
+Public Member Functions | +Static Public Attributes | +List of all members
+
+
enums.JLinkGlobalErrors Class Reference
+
+
+
+Inheritance diagram for enums.JLinkGlobalErrors:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkGlobalErrors:
+
+
Collaboration graph
+
[legend]
+ + + + +

+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes which any J-Link SDK DLL API-function
+can have as a return value.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkGlobalErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given ``error_code``.
+Args:
+  cls (JlinkGlobalErrors): the ``JLinkGlobalErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented in enums.JLinkRTTErrors, enums.JLinkDataErrors, enums.JLinkReadErrors, enums.JLinkWriteErrors, enums.JLinkFlashErrors, and enums.JLinkEraseErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors__coll__graph.dot new file mode 100644 index 00000000..2f4eef24 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkGlobalErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors__inherit__graph.dot new file mode 100644 index 00000000..80eaf112 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkGlobalErrors__inherit__graph.dot @@ -0,0 +1,42 @@ +digraph "enums.JLinkGlobalErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node1 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkDataErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkDataErrors.html",tooltip=" "]; + Node3 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="errors.JLinkDataException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkDataException.html",tooltip=" "]; + Node1 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="enums.JLinkEraseErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkEraseErrors.html",tooltip=" "]; + Node5 -> Node6 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="errors.JLinkEraseException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkEraseException.html",tooltip=" "]; + Node1 -> Node7 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node7 [label="enums.JLinkFlashErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkFlashErrors.html",tooltip=" "]; + Node7 -> Node8 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node8 [label="errors.JLinkFlashException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkFlashException.html",tooltip=" "]; + Node1 -> Node9 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node9 [label="enums.JLinkReadErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkReadErrors.html",tooltip=" "]; + Node9 -> Node10 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node10 [label="errors.JLinkReadException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkReadException.html",tooltip=" "]; + Node1 -> Node11 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node11 [label="enums.JLinkRTTErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkRTTErrors.html",tooltip=" "]; + Node11 -> Node12 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node12 [label="errors.JLinkRTTException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkRTTException.html",tooltip=" "]; + Node1 -> Node13 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node13 [label="enums.JLinkWriteErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkWriteErrors.html",tooltip=" "]; + Node13 -> Node14 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node14 [label="errors.JLinkWriteException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkWriteException.html",tooltip=" "]; + Node1 -> Node15 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node15 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node15 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node15 -> Node6 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node15 -> Node8 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node15 -> Node10 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node15 -> Node12 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node15 -> Node14 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons-members.html new file mode 100644 index 00000000..1aab1052 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons-members.html @@ -0,0 +1,87 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkHaltReasons Member List
+
+
+ +

This is the complete list of members for enums.JLinkHaltReasons, including all inherited members.

+ + + + + +
CODE_BREAKPOINT (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
DATA_BREAKPOINT (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
DBGRQ (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
VECTOR_CATCH (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons.html new file mode 100644 index 00000000..2a008749 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons.html @@ -0,0 +1,119 @@ + + + + + + + +IEC_60730: enums.JLinkHaltReasons Class Reference + + + + + + + + + +
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enums.JLinkHaltReasons Class Reference
+
+
+
+Inheritance diagram for enums.JLinkHaltReasons:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkHaltReasons:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + +

+Static Public Attributes

+int DBGRQ = 0
 
+int CODE_BREAKPOINT = 1
 
+int DATA_BREAKPOINT = 2
 
+int VECTOR_CATCH = 3
 
+

Detailed Description

+
Halt reasons for the CPU.
+Attributes:
+  DBGRQ: CPU has been halted because DBGRQ signal asserted.
+  CODE_BREAKPOINT: CPU has been halted because of code breakpoint match.
+  DATA_BREAKPOINT: CPU has been halted because of data breakpoint match.
+  VECTOR_CATCH: CPU has been halted because of vector catch.
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons__coll__graph.dot new file mode 100644 index 00000000..26dbc7d8 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkHaltReasons" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkHaltReasons",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons__inherit__graph.dot new file mode 100644 index 00000000..26dbc7d8 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHaltReasons__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkHaltReasons" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkHaltReasons",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost-members.html new file mode 100644 index 00000000..4ca86ab6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost-members.html @@ -0,0 +1,86 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkHost Member List
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This is the complete list of members for enums.JLinkHost, including all inherited members.

+ + + + +
IP (defined in enums.JLinkHost)enums.JLinkHoststatic
USB (defined in enums.JLinkHost)enums.JLinkHoststatic
USB_OR_IP (defined in enums.JLinkHost)enums.JLinkHoststatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost.html new file mode 100644 index 00000000..8ddecf79 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost.html @@ -0,0 +1,110 @@ + + + + + + + +IEC_60730: enums.JLinkHost Class Reference + + + + + + + + + +
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IEC_60730 +
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+Static Public Attributes | +List of all members
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enums.JLinkHost Class Reference
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+Inheritance diagram for enums.JLinkHost:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkHost:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + +

+Static Public Attributes

+tuple USB = (1 << 0)
 
+tuple IP = (1 << 1)
 
+tuple USB_OR_IP = USB | IP
 
+

Detailed Description

+
Enumeration for the different JLink hosts: currently only IP and USB.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost__coll__graph.dot new file mode 100644 index 00000000..dc9fac1b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkHost" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkHost",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost__inherit__graph.dot new file mode 100644 index 00000000..dc9fac1b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkHost__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkHost" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkHost",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces-members.html new file mode 100644 index 00000000..5a400f41 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces-members.html @@ -0,0 +1,89 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkInterfaces Member List
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This is the complete list of members for enums.JLinkInterfaces, including all inherited members.

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C2 (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
FINE (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
ICSP (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
JTAG (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
SPI (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
SWD (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces.html new file mode 100644 index 00000000..e1ba302a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces.html @@ -0,0 +1,119 @@ + + + + + + + +IEC_60730: enums.JLinkInterfaces Class Reference + + + + + + + + + +
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+Static Public Attributes | +List of all members
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enums.JLinkInterfaces Class Reference
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+Inheritance diagram for enums.JLinkInterfaces:
+
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Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkInterfaces:
+
+
Collaboration graph
+
[legend]
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+Static Public Attributes

+int JTAG = 0
 
+int SWD = 1
 
+int FINE = 3
 
+int ICSP = 4
 
+int SPI = 5
 
+int C2 = 6
 
+

Detailed Description

+
Target interfaces for the J-Link.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces__coll__graph.dot new file mode 100644 index 00000000..d490db99 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkInterfaces" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkInterfaces",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces__inherit__graph.dot new file mode 100644 index 00000000..d490db99 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkInterfaces__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkInterfaces" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkInterfaces",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable-members.html new file mode 100644 index 00000000..d12e9154 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable-members.html @@ -0,0 +1,99 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkROMTable Member List
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This is the complete list of members for enums.JLinkROMTable, including all inherited members.

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AHBAP (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
APBAP (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
DBG (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
DWT (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
ETB (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
ETM (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
FPB (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
ITM (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
MTB (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
NONE (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
NVIC (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
PTM (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
SECURE (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
TF (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
TMC (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
TPIU (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable.html new file mode 100644 index 00000000..0079e239 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable.html @@ -0,0 +1,149 @@ + + + + + + + +IEC_60730: enums.JLinkROMTable Class Reference + + + + + + + + + +
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IEC_60730 +
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+Static Public Attributes | +List of all members
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enums.JLinkROMTable Class Reference
+
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+Inheritance diagram for enums.JLinkROMTable:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkROMTable:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int NONE = 0x100
 
+int ETM = 0x101
 
+int MTB = 0x102
 
+int TPIU = 0x103
 
+int ITM = 0x104
 
+int DWT = 0x105
 
+int FPB = 0x106
 
+int NVIC = 0x107
 
+int TMC = 0x108
 
+int TF = 0x109
 
+int PTM = 0x10A
 
+int ETB = 0x10B
 
+int DBG = 0x10C
 
+int APBAP = 0x10D
 
+int AHBAP = 0x10E
 
+int SECURE = 0x10F
 
+

Detailed Description

+
The J-Link ROM tables.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable__coll__graph.dot new file mode 100644 index 00000000..48e3a6dd --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkROMTable" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkROMTable",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable__inherit__graph.dot new file mode 100644 index 00000000..48e3a6dd --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkROMTable__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkROMTable" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkROMTable",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand-members.html new file mode 100644 index 00000000..2ddb2525 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand-members.html @@ -0,0 +1,88 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkRTTCommand Member List
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This is the complete list of members for enums.JLinkRTTCommand, including all inherited members.

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GETDESC (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
GETNUMBUF (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
GETSTAT (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
START (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
STOP (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand.html new file mode 100644 index 00000000..821e2913 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand.html @@ -0,0 +1,116 @@ + + + + + + + +IEC_60730: enums.JLinkRTTCommand Class Reference + + + + + + + + + +
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enums.JLinkRTTCommand Class Reference
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Inheritance graph
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[legend]
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Collaboration graph
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+Static Public Attributes

+int START = 0
 
+int STOP = 1
 
+int GETDESC = 2
 
+int GETNUMBUF = 3
 
+int GETSTAT = 4
 
+

Detailed Description

+
RTT commands.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand__coll__graph.dot new file mode 100644 index 00000000..924503e0 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkRTTCommand" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkRTTCommand",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand__inherit__graph.dot new file mode 100644 index 00000000..924503e0 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTCommand__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkRTTCommand" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkRTTCommand",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection-members.html new file mode 100644 index 00000000..ce165d35 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection-members.html @@ -0,0 +1,84 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkRTTDirection Member List
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UP (defined in enums.JLinkRTTDirection)enums.JLinkRTTDirectionstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection.html new file mode 100644 index 00000000..2c3bfe3c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection.html @@ -0,0 +1,104 @@ + + + + + + + +IEC_60730: enums.JLinkRTTDirection Class Reference + + + + + + + + + +
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enums.JLinkRTTDirection Class Reference
+
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+Inheritance diagram for enums.JLinkRTTDirection:
+
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Inheritance graph
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[legend]
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+Collaboration diagram for enums.JLinkRTTDirection:
+
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Collaboration graph
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[legend]
+ + + + +

+Static Public Attributes

+int UP = 0
 
+

Detailed Description

+
RTT Direction.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection__coll__graph.dot new file mode 100644 index 00000000..fffd0c6c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkRTTDirection" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkRTTDirection",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection__inherit__graph.dot new file mode 100644 index 00000000..fffd0c6c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTDirection__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkRTTDirection" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkRTTDirection",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors-members.html new file mode 100644 index 00000000..c50c20c1 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors-members.html @@ -0,0 +1,105 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkRTTErrors Member List
+
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This is the complete list of members for enums.JLinkRTTErrors, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + +
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
RTT_ERROR_CONTROL_BLOCK_NOT_FOUND (defined in enums.JLinkRTTErrors)enums.JLinkRTTErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkRTTErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors.html new file mode 100644 index 00000000..7c5df760 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors.html @@ -0,0 +1,210 @@ + + + + + + + +IEC_60730: enums.JLinkRTTErrors Class Reference + + + + + + + + + +
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+Public Member Functions | +Static Public Attributes | +List of all members
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enums.JLinkRTTErrors Class Reference
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+Inheritance diagram for enums.JLinkRTTErrors:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkRTTErrors:
+
+
Collaboration graph
+
[legend]
+ + + + +

+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int RTT_ERROR_CONTROL_BLOCK_NOT_FOUND = -2
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for error codes from RTT.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkRTTErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given error code.
+Args:
+  cls (JLinkRTTErrors): the ``JLinkRTTErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors__coll__graph.dot new file mode 100644 index 00000000..e9dbdf85 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "enums.JLinkRTTErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkRTTErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors__inherit__graph.dot new file mode 100644 index 00000000..c7a1074a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkRTTErrors__inherit__graph.dot @@ -0,0 +1,13 @@ +digraph "enums.JLinkRTTErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkRTTErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="errors.JLinkRTTException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkRTTException.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors-members.html new file mode 100644 index 00000000..7cb03277 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors-members.html @@ -0,0 +1,105 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkReadErrors Member List
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This is the complete list of members for enums.JLinkReadErrors, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + +
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkReadErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ZONE_NOT_FOUND_ERROR (defined in enums.JLinkReadErrors)enums.JLinkReadErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors.html new file mode 100644 index 00000000..dc320110 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors.html @@ -0,0 +1,210 @@ + + + + + + + +IEC_60730: enums.JLinkReadErrors Class Reference + + + + + + + + + +
+
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+Public Member Functions | +Static Public Attributes | +List of all members
+
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enums.JLinkReadErrors Class Reference
+
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+Inheritance diagram for enums.JLinkReadErrors:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkReadErrors:
+
+
Collaboration graph
+
[legend]
+ + + + +

+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int ZONE_NOT_FOUND_ERROR = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes generated during a read.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkReadErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkReadErrors): the ``JLinkReadErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors__coll__graph.dot new file mode 100644 index 00000000..b591062c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "enums.JLinkReadErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkReadErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors__inherit__graph.dot new file mode 100644 index 00000000..c2a91fbf --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkReadErrors__inherit__graph.dot @@ -0,0 +1,13 @@ +digraph "enums.JLinkReadErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkReadErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="errors.JLinkReadException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkReadException.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3-members.html new file mode 100644 index 00000000..236ac8cb --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3-members.html @@ -0,0 +1,94 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkResetStrategyCortexM3 Member List
+
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This is the complete list of members for enums.JLinkResetStrategyCortexM3, including all inherited members.

+ + + + + + + + + + + + +
ADI_HALT_AFTER_KERNEL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
CONNECT_UNDER_RESET (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
CORE (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
CORE_AND_PERIPHERALS (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
HALT_AFTER_BTL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
HALT_BEFORE_BTL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
KINETIS (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
LPC1200 (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
NORMAL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
RESETPIN (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
S3FN60D (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3.html new file mode 100644 index 00000000..ee664a46 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3.html @@ -0,0 +1,154 @@ + + + + + + + +IEC_60730: enums.JLinkResetStrategyCortexM3 Class Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
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+Static Public Attributes | +List of all members
+
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enums.JLinkResetStrategyCortexM3 Class Reference
+
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+Inheritance diagram for enums.JLinkResetStrategyCortexM3:
+
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Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkResetStrategyCortexM3:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int NORMAL = 0
 
+int CORE = 1
 
+int RESETPIN = 2
 
+int CONNECT_UNDER_RESET = 3
 
+int HALT_AFTER_BTL = 4
 
+int HALT_BEFORE_BTL = 5
 
+int KINETIS = 6
 
+int ADI_HALT_AFTER_KERNEL = 7
 
+int CORE_AND_PERIPHERALS = 8
 
+int LPC1200 = 9
 
+int S3FN60D = 10
 
+

Detailed Description

+
Target reset strategies for the J-Link.
+Attributes:
+  NORMAL: default reset strategy, does whatever is best to reset.
+  CORE: only the core is reset via the ``VECTRESET`` bit.
+  RESETPIN: pulls the reset pin low to reset the core and peripherals.
+  CONNECT_UNDER_RESET: J-Link connects to target while keeping reset
+    active.  This is recommented for STM32 devices.
+  HALT_AFTER_BTL: halt the core after the bootloader is executed.
+  HALT_BEFORE_BTL: halt the core before the bootloader is executed.
+  KINETIS: performs a normal reset, but also disables the watchdog.
+  ADI_HALT_AFTER_KERNEL: sets the ``SYSRESETREQ`` bit in the ``AIRCR`` in
+    order to reset the device.
+  CORE_AND_PERIPHERALS: sets the ``SYSRESETREQ`` bit in the ``AIRCR``, and
+    the ``VC_CORERESET`` bit in the ``DEMCR`` to make sure that the CPU is
+    halted immediately after reset.
+  LPC1200: reset for LPC1200 devices.
+  S3FN60D: reset for Samsung S3FN60D devices.
+Note:
+  Please see the J-Link SEGGER Documentation, UM8001, for full information
+  about the different reset strategies.
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3__coll__graph.dot new file mode 100644 index 00000000..38734399 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkResetStrategyCortexM3" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkResetStrategy\lCortexM3",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3__inherit__graph.dot new file mode 100644 index 00000000..38734399 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkResetStrategyCortexM3__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkResetStrategyCortexM3" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkResetStrategy\lCortexM3",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands-members.html new file mode 100644 index 00000000..6ad616a4 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands-members.html @@ -0,0 +1,90 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkSWOCommands Member List
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+ +

This is the complete list of members for enums.JLinkSWOCommands, including all inherited members.

+ + + + + + + + +
FLUSH (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
GET_NUM_BYTES (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
GET_SPEED_INFO (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
SET_BUFFERSIZE_EMU (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
SET_BUFFERSIZE_HOST (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
START (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
STOP (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands.html new file mode 100644 index 00000000..cbafc6bf --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands.html @@ -0,0 +1,122 @@ + + + + + + + +IEC_60730: enums.JLinkSWOCommands Class Reference + + + + + + + + + +
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+Static Public Attributes | +List of all members
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enums.JLinkSWOCommands Class Reference
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+Inheritance diagram for enums.JLinkSWOCommands:
+
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Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkSWOCommands:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + +

+Static Public Attributes

+int START = 0
 
+int STOP = 1
 
+int FLUSH = 2
 
+int GET_SPEED_INFO = 3
 
+int GET_NUM_BYTES = 10
 
+int SET_BUFFERSIZE_HOST = 20
 
+int SET_BUFFERSIZE_EMU = 21
 
+

Detailed Description

+
Serial Wire Output (SWO) commands.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands__coll__graph.dot new file mode 100644 index 00000000..02ee220a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkSWOCommands" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkSWOCommands",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands__inherit__graph.dot new file mode 100644 index 00000000..02ee220a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOCommands__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkSWOCommands" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkSWOCommands",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces-members.html new file mode 100644 index 00000000..3ef96849 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces-members.html @@ -0,0 +1,85 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkSWOInterfaces Member List
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This is the complete list of members for enums.JLinkSWOInterfaces, including all inherited members.

+ + + +
MANCHESTER (defined in enums.JLinkSWOInterfaces)enums.JLinkSWOInterfacesstatic
UART (defined in enums.JLinkSWOInterfaces)enums.JLinkSWOInterfacesstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces.html new file mode 100644 index 00000000..952bd3d0 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces.html @@ -0,0 +1,107 @@ + + + + + + + +IEC_60730: enums.JLinkSWOInterfaces Class Reference + + + + + + + + + +
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+Static Public Attributes | +List of all members
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enums.JLinkSWOInterfaces Class Reference
+
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+Inheritance diagram for enums.JLinkSWOInterfaces:
+
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Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkSWOInterfaces:
+
+
Collaboration graph
+
[legend]
+ + + + + + +

+Static Public Attributes

+int UART = 0
 
+int MANCHESTER = 1
 
+

Detailed Description

+
Serial Wire Output (SWO) interfaces.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces__coll__graph.dot new file mode 100644 index 00000000..9fd3a9a7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkSWOInterfaces" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkSWOInterfaces",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces__inherit__graph.dot new file mode 100644 index 00000000..9fd3a9a7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkSWOInterfaces__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkSWOInterfaces" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkSWOInterfaces",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand-members.html new file mode 100644 index 00000000..a4eecc2f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand-members.html @@ -0,0 +1,87 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkStraceCommand Member List
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This is the complete list of members for enums.JLinkStraceCommand, including all inherited members.

+ + + + + +
SET_BUFFER_SIZE (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
TRACE_EVENT_CLR (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
TRACE_EVENT_CLR_ALL (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
TRACE_EVENT_SET (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand.html new file mode 100644 index 00000000..780fe884 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand.html @@ -0,0 +1,113 @@ + + + + + + + +IEC_60730: enums.JLinkStraceCommand Class Reference + + + + + + + + + +
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enums.JLinkStraceCommand Class Reference
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+Inheritance diagram for enums.JLinkStraceCommand:
+
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Inheritance graph
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[legend]
+
+Collaboration diagram for enums.JLinkStraceCommand:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + +

+Static Public Attributes

+int TRACE_EVENT_SET = 0
 
+int TRACE_EVENT_CLR = 1
 
+int TRACE_EVENT_CLR_ALL = 2
 
+int SET_BUFFER_SIZE = 3
 
+

Detailed Description

+
STRACE commmands.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand__coll__graph.dot new file mode 100644 index 00000000..d33af4d3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkStraceCommand" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkStraceCommand",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand__inherit__graph.dot new file mode 100644 index 00000000..d33af4d3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceCommand__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkStraceCommand" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkStraceCommand",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent-members.html new file mode 100644 index 00000000..9607cd69 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent-members.html @@ -0,0 +1,87 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkStraceEvent Member List
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This is the complete list of members for enums.JLinkStraceEvent, including all inherited members.

+ + + + + +
CODE_FETCH (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
DATA_ACCESS (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
DATA_LOAD (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
DATA_STORE (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent.html new file mode 100644 index 00000000..17251225 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent.html @@ -0,0 +1,113 @@ + + + + + + + +IEC_60730: enums.JLinkStraceEvent Class Reference + + + + + + + + + +
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enums.JLinkStraceEvent Class Reference
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+Collaboration diagram for enums.JLinkStraceEvent:
+
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Collaboration graph
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[legend]
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+Static Public Attributes

+int CODE_FETCH = 0
 
+int DATA_ACCESS = 1
 
+int DATA_LOAD = 2
 
+int DATA_STORE = 3
 
+

Detailed Description

+
STRACE events.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent__coll__graph.dot new file mode 100644 index 00000000..cc072384 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkStraceEvent" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkStraceEvent",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent__inherit__graph.dot new file mode 100644 index 00000000..cc072384 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceEvent__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkStraceEvent" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkStraceEvent",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation-members.html new file mode 100644 index 00000000..ba0d2524 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation-members.html @@ -0,0 +1,87 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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TRACE_EXCLUDE_RANGE (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
TRACE_INCLUDE_RANGE (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
TRACE_START (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
TRACE_STOP (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation.html new file mode 100644 index 00000000..f45930cc --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation.html @@ -0,0 +1,113 @@ + + + + + + + +IEC_60730: enums.JLinkStraceOperation Class Reference + + + + + + + + + +
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+
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+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + +

+Static Public Attributes

+int TRACE_START = 0
 
+int TRACE_STOP = 1
 
+int TRACE_INCLUDE_RANGE = 2
 
+int TRACE_EXCLUDE_RANGE = 3
 
+

Detailed Description

+
STRACE operation specifiers.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation__coll__graph.dot new file mode 100644 index 00000000..867ad592 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkStraceOperation" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkStraceOperation",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation__inherit__graph.dot new file mode 100644 index 00000000..867ad592 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkStraceOperation__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkStraceOperation" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkStraceOperation",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand-members.html new file mode 100644 index 00000000..3a29c5c3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand-members.html @@ -0,0 +1,96 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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This is the complete list of members for enums.JLinkTraceCommand, including all inherited members.

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FLUSH (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_CONF_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_FORMAT (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_MAX_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_MIN_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_NUM_REGIONS (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_NUM_SAMPLES (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_REGION_PROPS (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_REGION_PROPS_EX (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
SET_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
SET_FORMAT (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
START (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
STOP (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand.html new file mode 100644 index 00000000..a29a9685 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand.html @@ -0,0 +1,140 @@ + + + + + + + +IEC_60730: enums.JLinkTraceCommand Class Reference + + + + + + + + + +
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+Static Public Attributes | +List of all members
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enums.JLinkTraceCommand Class Reference
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+Inheritance diagram for enums.JLinkTraceCommand:
+
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Inheritance graph
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[legend]
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+Collaboration diagram for enums.JLinkTraceCommand:
+
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Collaboration graph
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[legend]
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+Static Public Attributes

+int START = 0x0
 
+int STOP = 0x1
 
+int FLUSH = 0x2
 
+int GET_NUM_SAMPLES = 0x10
 
+int GET_CONF_CAPACITY = 0x11
 
+int SET_CAPACITY = 0x12
 
+int GET_MIN_CAPACITY = 0x13
 
+int GET_MAX_CAPACITY = 0x14
 
+int SET_FORMAT = 0x20
 
+int GET_FORMAT = 0x21
 
+int GET_NUM_REGIONS = 0x30
 
+int GET_REGION_PROPS = 0x31
 
+int GET_REGION_PROPS_EX = 0x32
 
+

Detailed Description

+
J-Link trace commands.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand__coll__graph.dot new file mode 100644 index 00000000..ec2a8224 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkTraceCommand" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkTraceCommand",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand__inherit__graph.dot new file mode 100644 index 00000000..ec2a8224 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceCommand__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkTraceCommand" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkTraceCommand",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat-members.html new file mode 100644 index 00000000..eec7e279 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat-members.html @@ -0,0 +1,93 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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FORMAT_16BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_1BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_2BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_4BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_8BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_DEMULTIPLEXED (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_DOUBLE_EDGE (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_ETM10 (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_ETM7_9 (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_MULTIPLEXED (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat.html new file mode 100644 index 00000000..5c80b639 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat.html @@ -0,0 +1,143 @@ + + + + + + + +IEC_60730: enums.JLinkTraceFormat Class Reference + + + + + + + + + +
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+Static Public Attributes

+int FORMAT_4BIT = 0x1
 
+int FORMAT_8BIT = 0x2
 
+int FORMAT_16BIT = 0x4
 
+int FORMAT_MULTIPLEXED = 0x8
 
+int FORMAT_DEMULTIPLEXED = 0x10
 
+int FORMAT_DOUBLE_EDGE = 0x20
 
+int FORMAT_ETM7_9 = 0x40
 
+int FORMAT_ETM10 = 0x80
 
+int FORMAT_1BIT = 0x100
 
+int FORMAT_2BIT = 0x200
 
+

Detailed Description

+
J-Link trace formats.
+Attributes:
+  FORMAT_4BIT: 4-bit data.
+  FORMAT_8BIT: 8-bit data.
+  FORMAT_16BIT: 16-bit data.
+  FORMAT_MULTIPLEXED: multiplexing on ETM / buffer link.
+  FORMAT_DEMULTIPLEXED: de-multiplexing on ETM / buffer link.
+  FORMAT_DOUBLE_EDGE: clock data on both ETM / buffer link edges.
+  FORMAT_ETM7_9: ETM7/ETM9 protocol.
+  FORMAT_ETM10: ETM10 protocol.
+  FORMAT_1BIT: 1-bit data.
+  FORMAT_2BIT: 2-bit data.
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat__coll__graph.dot new file mode 100644 index 00000000..cfb404b3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkTraceFormat" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkTraceFormat",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat__inherit__graph.dot new file mode 100644 index 00000000..cfb404b3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceFormat__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkTraceFormat" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkTraceFormat",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource-members.html new file mode 100644 index 00000000..2a8947a6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource-members.html @@ -0,0 +1,86 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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ETB (defined in enums.JLinkTraceSource)enums.JLinkTraceSourcestatic
ETM (defined in enums.JLinkTraceSource)enums.JLinkTraceSourcestatic
MTB (defined in enums.JLinkTraceSource)enums.JLinkTraceSourcestatic
+ +
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource.html new file mode 100644 index 00000000..cfa547c7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource.html @@ -0,0 +1,110 @@ + + + + + + + +IEC_60730: enums.JLinkTraceSource Class Reference + + + + + + + + + +
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+Static Public Attributes

+int ETB = 0
 
+int ETM = 1
 
+int MTB = 2
 
+

Detailed Description

+
Sources for tracing.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource__coll__graph.dot new file mode 100644 index 00000000..b10c2655 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkTraceSource" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkTraceSource",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource__inherit__graph.dot new file mode 100644 index 00000000..b10c2655 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkTraceSource__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkTraceSource" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkTraceSource",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkVectorCatchCortexM3-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkVectorCatchCortexM3-members.html new file mode 100644 index 00000000..e5504b85 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkVectorCatchCortexM3-members.html @@ -0,0 +1,91 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkVectorCatchCortexM3 Member List
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BUS_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
CHECK_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
COPROCESSOR_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
CORE_RESET (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
HARD_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
INT_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
MEM_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
STATE_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
+ +
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enums.JLinkVectorCatchCortexM3 Class Reference
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+Static Public Attributes

+tuple CORE_RESET = (1 << 0)
 
+tuple MEM_ERROR = (1 << 4)
 
+tuple COPROCESSOR_ERROR = (1 << 5)
 
+tuple CHECK_ERROR = (1 << 6)
 
+tuple STATE_ERROR = (1 << 7)
 
+tuple BUS_ERROR = (1 << 8)
 
+tuple INT_ERROR = (1 << 9)
 
+tuple HARD_ERROR = (1 << 10)
 
+

Detailed Description

+
Vector catch types for the ARM Cortex M3.
+Attributes:
+  CORE_RESET: The CPU core reset.
+  MEM_ERROR: A memory management error occurred.
+  COPROCESSOR_ERROR: Usage fault error accessing the Coprocessor.
+  CHECK_ERROR: Usage fault error on enabled check.
+  STATE_ERROR: Usage fault state error.
+  BUS_ERROR: Normal bus error.
+  INT_ERROR: Interrupt or exception service error.
+  HARD_ERROR: Hard fault error.
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkVectorCatchCortexM3__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkVectorCatchCortexM3__coll__graph.dot new file mode 100644 index 00000000..caf92222 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkVectorCatchCortexM3__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkVectorCatchCortexM3" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkVectorCatchCortexM3",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkVectorCatchCortexM3__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkVectorCatchCortexM3__inherit__graph.dot new file mode 100644 index 00000000..caf92222 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkVectorCatchCortexM3__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "enums.JLinkVectorCatchCortexM3" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkVectorCatchCortexM3",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors-members.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors-members.html new file mode 100644 index 00000000..6e30cf2f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors-members.html @@ -0,0 +1,105 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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enums.JLinkWriteErrors Member List
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This is the complete list of members for enums.JLinkWriteErrors, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + +
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkWriteErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ZONE_NOT_FOUND_ERROR (defined in enums.JLinkWriteErrors)enums.JLinkWriteErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors.html b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors.html new file mode 100644 index 00000000..f52e3cad --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors.html @@ -0,0 +1,210 @@ + + + + + + + +IEC_60730: enums.JLinkWriteErrors Class Reference + + + + + + + + + +
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+Public Member Functions | +Static Public Attributes | +List of all members
+
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enums.JLinkWriteErrors Class Reference
+
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+Inheritance diagram for enums.JLinkWriteErrors:
+
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Inheritance graph
+
[legend]
+
+Collaboration diagram for enums.JLinkWriteErrors:
+
+
Collaboration graph
+
[legend]
+ + + + +

+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int ZONE_NOT_FOUND_ERROR = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes generated during a write.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkWriteErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkWriteErrors): the ``JLinkWriteErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors__coll__graph.dot new file mode 100644 index 00000000..537f9f3f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "enums.JLinkWriteErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkWriteErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors__inherit__graph.dot new file mode 100644 index 00000000..56896be9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classenums_1_1JLinkWriteErrors__inherit__graph.dot @@ -0,0 +1,13 @@ +digraph "enums.JLinkWriteErrors" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="enums.JLinkWriteErrors",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="errors.JLinkWriteException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkWriteException.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException-members.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException-members.html new file mode 100644 index 00000000..81dae59e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException-members.html @@ -0,0 +1,134 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ERROR_INVALID_ACCESS_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_INVALID_ADDR_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_INVALID_DATA_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_ADDR_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_DATA_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_EVENTS (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_UNKNOWN (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkDataErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException.html new file mode 100644 index 00000000..8508a89a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException.html @@ -0,0 +1,196 @@ + + + + + + + +IEC_60730: errors.JLinkDataException Class Reference + + + + + + + + + +
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+List of all members
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errors.JLinkDataException Class Reference
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+Inheritance diagram for errors.JLinkDataException:
+
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Inheritance graph
+
[legend]
+
+Collaboration diagram for errors.JLinkDataException:
+
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Collaboration graph
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[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkDataErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkDataErrors
+int ERROR_UNKNOWN = 0x80000000
 
+int ERROR_NO_MORE_EVENTS = 0x80000001
 
+int ERROR_NO_MORE_ADDR_COMP = 0x80000002
 
+int ERROR_NO_MORE_DATA_COMP = 0x80000004
 
+int ERROR_INVALID_ADDR_MASK = 0x80000020
 
+int ERROR_INVALID_DATA_MASK = 0x80000040
 
+int ERROR_INVALID_ACCESS_MASK = 0x80000080
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link data event exception.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException__coll__graph.dot new file mode 100644 index 00000000..06d94adf --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException__coll__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkDataException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkDataException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkDataErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkDataErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException__inherit__graph.dot new file mode 100644 index 00000000..06d94adf --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkDataException__inherit__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkDataException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkDataException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkDataErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkDataErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException-members.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException-members.html new file mode 100644 index 00000000..118ec371 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException-members.html @@ -0,0 +1,128 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ILLEGAL_COMMAND (defined in enums.JLinkEraseErrors)enums.JLinkEraseErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkEraseErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException.html new file mode 100644 index 00000000..784d1824 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException.html @@ -0,0 +1,178 @@ + + + + + + + +IEC_60730: errors.JLinkEraseException Class Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+List of all members
+
+
errors.JLinkEraseException Class Reference
+
+
+
+Inheritance diagram for errors.JLinkEraseException:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for errors.JLinkEraseException:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkEraseErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkEraseErrors
+int ILLEGAL_COMMAND = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link erase exception.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException__coll__graph.dot new file mode 100644 index 00000000..24be6b37 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException__coll__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkEraseException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkEraseException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkEraseErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkEraseErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException__inherit__graph.dot new file mode 100644 index 00000000..24be6b37 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkEraseException__inherit__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkEraseException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkEraseException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkEraseErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkEraseErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException-members.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException-members.html new file mode 100644 index 00000000..437498e3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException-members.html @@ -0,0 +1,107 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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+
+
errors.JLinkException Member List
+
+
+ +

This is the complete list of members for errors.JLinkException, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + +
__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkGlobalErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException.html new file mode 100644 index 00000000..61ac2865 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException.html @@ -0,0 +1,218 @@ + + + + + + + +IEC_60730: errors.JLinkException Class Reference + + + + + + + + + +
+
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+
IEC_60730 +
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+Public Member Functions | +Public Attributes | +List of all members
+
+
errors.JLinkException Class Reference
+
+
+
+Inheritance diagram for errors.JLinkException:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for errors.JLinkException:
+
+
Collaboration graph
+
[legend]
+ + + + + + + +

+Public Member Functions

def __init__ (self, code)
 
- Public Member Functions inherited from enums.JLinkGlobalErrors
def to_string (cls, error_code)
 
+ + + + + +

+Public Attributes

+ code
 
+ message
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Additional Inherited Members

- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Generic J-Link exception.

Constructor & Destructor Documentation

+ +

◆ __init__()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def errors.JLinkException.__init__ ( self,
 code 
)
+
+
Generates an exception by coercing the given ``code`` to an error
+string if is a number, otherwise assumes it is the message.
+
+Args:
+  self (JLinkException): the 'JLinkException' instance
+  code (object): message or error code
+
+Returns:
+  ``None``
+
+
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException__coll__graph.dot new file mode 100644 index 00000000..494d65f5 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException__coll__graph.dot @@ -0,0 +1,13 @@ +digraph "errors.JLinkException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node4 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException__inherit__graph.dot new file mode 100644 index 00000000..193194c5 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkException__inherit__graph.dot @@ -0,0 +1,26 @@ +digraph "errors.JLinkException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node1 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node4 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkDataException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkDataException.html",tooltip=" "]; + Node1 -> Node6 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="errors.JLinkEraseException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkEraseException.html",tooltip=" "]; + Node1 -> Node7 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node7 [label="errors.JLinkFlashException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkFlashException.html",tooltip=" "]; + Node1 -> Node8 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node8 [label="errors.JLinkReadException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkReadException.html",tooltip=" "]; + Node1 -> Node9 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node9 [label="errors.JLinkRTTException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkRTTException.html",tooltip=" "]; + Node1 -> Node10 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node10 [label="errors.JLinkWriteException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkWriteException.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException-members.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException-members.html new file mode 100644 index 00000000..5674880f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException-members.html @@ -0,0 +1,130 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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errors.JLinkFlashException Member List
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This is the complete list of members for errors.JLinkFlashException, including all inherited members.

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__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
COMPARE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
PROGRAM_ERASE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkFlashErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VERIFICATION_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException.html new file mode 100644 index 00000000..29a5e96a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException.html @@ -0,0 +1,184 @@ + + + + + + + +IEC_60730: errors.JLinkFlashException Class Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
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+
+
+List of all members
+
+
errors.JLinkFlashException Class Reference
+
+
+
+Inheritance diagram for errors.JLinkFlashException:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for errors.JLinkFlashException:
+
+
Collaboration graph
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[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkFlashErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkFlashErrors
+int COMPARE_ERROR = -2
 
+int PROGRAM_ERASE_ERROR = -3
 
+int VERIFICATION_ERROR = -4
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link flash exception.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException__coll__graph.dot new file mode 100644 index 00000000..c29ad8f6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException__coll__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkFlashException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkFlashException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkFlashErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkFlashErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException__inherit__graph.dot new file mode 100644 index 00000000..c29ad8f6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkFlashException__inherit__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkFlashException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkFlashException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkFlashErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkFlashErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException-members.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException-members.html new file mode 100644 index 00000000..270eb4e0 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException-members.html @@ -0,0 +1,128 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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errors.JLinkRTTException Member List
+
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+ +

This is the complete list of members for errors.JLinkRTTException, including all inherited members.

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__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
RTT_ERROR_CONTROL_BLOCK_NOT_FOUND (defined in enums.JLinkRTTErrors)enums.JLinkRTTErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkRTTErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException.html new file mode 100644 index 00000000..b318da9d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException.html @@ -0,0 +1,178 @@ + + + + + + + +IEC_60730: errors.JLinkRTTException Class Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
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+
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+ +
+ + +
+
+
+List of all members
+
+
errors.JLinkRTTException Class Reference
+
+
+
+Inheritance diagram for errors.JLinkRTTException:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for errors.JLinkRTTException:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkRTTErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkRTTErrors
+int RTT_ERROR_CONTROL_BLOCK_NOT_FOUND = -2
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link RTT exception.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException__coll__graph.dot new file mode 100644 index 00000000..4272bded --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException__coll__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkRTTException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkRTTException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkRTTErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkRTTErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException__inherit__graph.dot new file mode 100644 index 00000000..4272bded --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkRTTException__inherit__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkRTTException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkRTTException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkRTTErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkRTTErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkReadException-members.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkReadException-members.html new file mode 100644 index 00000000..1eff9d65 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkReadException-members.html @@ -0,0 +1,128 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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errors.JLinkReadException Member List
+
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+ +

This is the complete list of members for errors.JLinkReadException, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkReadErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ZONE_NOT_FOUND_ERROR (defined in enums.JLinkReadErrors)enums.JLinkReadErrorsstatic
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+Inheritance diagram for errors.JLinkReadException:
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+Collaboration diagram for errors.JLinkReadException:
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+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkReadErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkReadErrors
+int ZONE_NOT_FOUND_ERROR = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link read exception.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkReadException__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkReadException__coll__graph.dot new file mode 100644 index 00000000..5ee9fb78 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkReadException__coll__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkReadException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkReadException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkReadErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkReadErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkReadException__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkReadException__inherit__graph.dot new file mode 100644 index 00000000..5ee9fb78 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkReadException__inherit__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkReadException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkReadException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkReadErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkReadErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException-members.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException-members.html new file mode 100644 index 00000000..84a07f30 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException-members.html @@ -0,0 +1,128 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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errors.JLinkWriteException Member List
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This is the complete list of members for errors.JLinkWriteException, including all inherited members.

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__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkWriteErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ZONE_NOT_FOUND_ERROR (defined in enums.JLinkWriteErrors)enums.JLinkWriteErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException.html b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException.html new file mode 100644 index 00000000..8a491c80 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException.html @@ -0,0 +1,178 @@ + + + + + + + +IEC_60730: errors.JLinkWriteException Class Reference + + + + + + + + + +
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errors.JLinkWriteException Class Reference
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+Inheritance diagram for errors.JLinkWriteException:
+
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Inheritance graph
+
[legend]
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+Collaboration diagram for errors.JLinkWriteException:
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+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkWriteErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkWriteErrors
+int ZONE_NOT_FOUND_ERROR = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link write exception.
The documentation for this class was generated from the following file:
    +
  • Test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException__coll__graph.dot new file mode 100644 index 00000000..a1832576 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException__coll__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkWriteException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkWriteException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkWriteErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkWriteErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException__inherit__graph.dot new file mode 100644 index 00000000..a1832576 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classerrors_1_1JLinkWriteException__inherit__graph.dot @@ -0,0 +1,18 @@ +digraph "errors.JLinkWriteException" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="errors.JLinkWriteException",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="enums.JLinkWriteErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkWriteErrors.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node4 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classes.html b/docs/html/EFR32_ICE60730_Libraries/classes.html new file mode 100644 index 00000000..ba5979fa --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classes.html @@ -0,0 +1,172 @@ + + + + + + + +IEC_60730: Class Index + + + + + + + + + +
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iec60730TestBase (iec60730_test_base)   JLinkEraseException (errors)   JLinkROMTable (enums)   JLinkWriteException (errors)   
imcParams_t   JLinkEventTypes (enums)   JLinkRTTCommand (enums)   
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iec60730_cpu_registers.iec60730_cpu_regs Member List
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adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
core_register_common_test(self, bkp_label_inject, bkp_testcase_pass, bkp_fail, reg_test, reg_mask, reg_new_value=[0]) (defined in iec60730_cpu_registers.iec60730_cpu_regs)iec60730_cpu_registers.iec60730_cpu_regs
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self) (defined in iec60730_cpu_registers.iec60730_cpu_regs)iec60730_cpu_registers.iec60730_cpu_regs
test_01_core_register_APSR(self)iec60730_cpu_registers.iec60730_cpu_regs
test_02_MSP_NS_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_03_MSP_S_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_04_PSP_NS_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_05_PSP_S_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_06_MSPLIM_NS_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_07_MSPLIM_S_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_08_PSPLIM_NS_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_09_PSPLIM_S_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_10_CONTROL_NS_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_11_CONTROL_S_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_12_PRIMASK_NS_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_13_PRIMASK_S_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_14_BASEPRI_NS_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_15_BASEPRI_S_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_16_FAULTMASK_NS_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_17_FAULTMASK_S_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_18_FPU_FPSCR_register(self)iec60730_cpu_registers.iec60730_cpu_regs
test_19_FPU_Sx_register(self)iec60730_cpu_registers.iec60730_cpu_regs
TEST_SUITE_NAMEiec60730_cpu_registers.iec60730_cpu_regsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__cpu__registers_1_1iec60730__cpu__regs.html b/docs/html/EFR32_ICE60730_Libraries/classiec60730__cpu__registers_1_1iec60730__cpu__regs.html new file mode 100644 index 00000000..d7f7f617 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__cpu__registers_1_1iec60730__cpu__regs.html @@ -0,0 +1,705 @@ + + + + + + + +IEC_60730: iec60730_cpu_registers.iec60730_cpu_regs Class Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Public Member Functions | +Static Public Attributes | +List of all members
+
+
iec60730_cpu_registers.iec60730_cpu_regs Class Reference
EFR32 IEC60730 Library » IEC60730 Test Specification » CPU Register Check Automated Verification Tests
+
+
+ +

IEC60730 CPU Register Check Tests. + More...

+
+Inheritance diagram for iec60730_cpu_registers.iec60730_cpu_regs:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for iec60730_cpu_registers.iec60730_cpu_regs:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def setUp (self)
 
+def core_register_common_test (self, bkp_label_inject, bkp_testcase_pass, bkp_fail, reg_test, reg_mask, reg_new_value=[0])
 
def test_01_core_register_APSR (self)
 Verify the error detected correctly on the Core Registers APSR, R0-R2, LR. More...
 
def test_02_MSP_NS_register (self)
 Verify the error detected correctly on the Core Registers MSP_NS. More...
 
def test_03_MSP_S_register (self)
 Verify the error detected correctly on the Register MSP_S. More...
 
def test_04_PSP_NS_register (self)
 Verify the error detected correctly on the Register PSP_NS. More...
 
def test_05_PSP_S_register (self)
 Verify the error detected correctly on the Register PSP_S. More...
 
def test_06_MSPLIM_NS_register (self)
 Verify the error detected correctly on the Register MSPLIM_NS. More...
 
def test_07_MSPLIM_S_register (self)
 Verify the error detected correctly on the Register MSPLIM_S. More...
 
def test_08_PSPLIM_NS_register (self)
 Verify the error detected correctly on the Register PSPLIM_NS. More...
 
def test_09_PSPLIM_S_register (self)
 Verify the error detected correctly on the Register PSPLIM_S. More...
 
def test_10_CONTROL_NS_register (self)
 Verify the error detected correctly on the Register CONTROL_NS. More...
 
def test_11_CONTROL_S_register (self)
 Verify the error detected correctly on the Register CONTROL_S. More...
 
def test_12_PRIMASK_NS_register (self)
 Verify the error detected correctly on the Register PRIMASK_NS. More...
 
def test_13_PRIMASK_S_register (self)
 Verify the error detected correctly on the Register PRIMASK_S. More...
 
def test_14_BASEPRI_NS_register (self)
 Verify the error detected correctly on the Register BASEPRI_NS. More...
 
def test_15_BASEPRI_S_register (self)
 Verify the error detected correctly on the Register BASEPRI_S. More...
 
def test_16_FAULTMASK_NS_register (self)
 Verify the error detected correctly on the Register FAULTMASK_NS. More...
 
def test_17_FAULTMASK_S_register (self)
 Verify the error detected correctly on the Register FAULTMASK_S. More...
 
def test_18_FPU_FPSCR_register (self)
 Verify the error detected correctly on the Register FPSCR. More...
 
def test_19_FPU_Sx_register (self)
 Verify the error detected correctly on the FPU Registers S0 - S31. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "CPU_REGS"
 Text name of the test suite, used in XML output.
 
+ + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ adapter
 
+

Detailed Description

+

IEC60730 CPU Register Check Tests.

+

This class runs IEC60730 CPU Register tests.
+

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_01_core_register_APSR()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_01_core_register_APSR ( self)
+
+ +

Verify the error detected correctly on the Core Registers APSR, R0-R2, LR.

+

Order of execution:

    +
  • Verify error detecting on APSR
    • +
  • Verify error detecting on R0-R2
    • +
  • Verify error detecting on R2-R13
    • +
  • Verify error detecting on LR
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_02_MSP_NS_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_02_MSP_NS_register ( self)
+
+ +

Verify the error detected correctly on the Core Registers MSP_NS.

+

Order of execution:

    +
  • Verify error detecting on MSP_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_03_MSP_S_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_03_MSP_S_register ( self)
+
+ +

Verify the error detected correctly on the Register MSP_S.

+

Order of execution:

    +
  • Verify error detecting on MSP_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_04_PSP_NS_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_04_PSP_NS_register ( self)
+
+ +

Verify the error detected correctly on the Register PSP_NS.

+

Order of execution:

    +
  • Verify error detecting on PSP_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_05_PSP_S_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_05_PSP_S_register ( self)
+
+ +

Verify the error detected correctly on the Register PSP_S.

+

Order of execution:

    +
  • Verify error detecting on PSP_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_06_MSPLIM_NS_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_06_MSPLIM_NS_register ( self)
+
+ +

Verify the error detected correctly on the Register MSPLIM_NS.

+

Order of execution:

    +
  • Verify error detecting on MSPLIM_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_07_MSPLIM_S_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_07_MSPLIM_S_register ( self)
+
+ +

Verify the error detected correctly on the Register MSPLIM_S.

+

Order of execution:

    +
  • Verify error detecting on MSPLIM_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_08_PSPLIM_NS_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_08_PSPLIM_NS_register ( self)
+
+ +

Verify the error detected correctly on the Register PSPLIM_NS.

+

Order of execution:

    +
  • Verify error detecting on PSPLIM_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_09_PSPLIM_S_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_09_PSPLIM_S_register ( self)
+
+ +

Verify the error detected correctly on the Register PSPLIM_S.

+

Order of execution:

    +
  • Verify error detecting on PSPLIM_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_10_CONTROL_NS_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_10_CONTROL_NS_register ( self)
+
+ +

Verify the error detected correctly on the Register CONTROL_NS.

+

Order of execution:

    +
  • Verify error detecting on CONTROL_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_11_CONTROL_S_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_11_CONTROL_S_register ( self)
+
+ +

Verify the error detected correctly on the Register CONTROL_S.

+

Order of execution:

    +
  • Verify error detecting on CONTROL_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_12_PRIMASK_NS_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_12_PRIMASK_NS_register ( self)
+
+ +

Verify the error detected correctly on the Register PRIMASK_NS.

+

Order of execution:

    +
  • Verify error detecting on PRIMASK_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_13_PRIMASK_S_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_13_PRIMASK_S_register ( self)
+
+ +

Verify the error detected correctly on the Register PRIMASK_S.

+

Order of execution:

    +
  • Verify error detecting on PRIMASK_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_14_BASEPRI_NS_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_14_BASEPRI_NS_register ( self)
+
+ +

Verify the error detected correctly on the Register BASEPRI_NS.

+

Order of execution:

    +
  • Verify error detecting on BASEPRI_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_15_BASEPRI_S_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_15_BASEPRI_S_register ( self)
+
+ +

Verify the error detected correctly on the Register BASEPRI_S.

+

Order of execution:

    +
  • Verify error detecting on BASEPRI_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_16_FAULTMASK_NS_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_16_FAULTMASK_NS_register ( self)
+
+ +

Verify the error detected correctly on the Register FAULTMASK_NS.

+

Order of execution:

    +
  • Verify error detecting on FAULTMASK_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_17_FAULTMASK_S_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_17_FAULTMASK_S_register ( self)
+
+ +

Verify the error detected correctly on the Register FAULTMASK_S.

+

Order of execution:

    +
  • Verify error detecting on FAULTMASK_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_18_FPU_FPSCR_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_18_FPU_FPSCR_register ( self)
+
+ +

Verify the error detected correctly on the Register FPSCR.

+

Order of execution:

    +
  • Verify error detecting on FPSCR
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_19_FPU_Sx_register()

+ +
+
+ + + + + + + + +
def iec60730_cpu_registers.iec60730_cpu_regs.test_19_FPU_Sx_register ( self)
+
+ +

Verify the error detected correctly on the FPU Registers S0 - S31.

+

Order of execution:

    +
  • Verify error detecting on S0 - S31
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/iec60730_cpu_registers.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__cpu__registers_1_1iec60730__cpu__regs__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__cpu__registers_1_1iec60730__cpu__regs__coll__graph.dot new file mode 100644 index 00000000..f4c859b7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__cpu__registers_1_1iec60730__cpu__regs__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_cpu_registers.iec60730_cpu_regs" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_cpu_registers.iec60730\l_cpu_regs",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 CPU Register Check Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__cpu__registers_1_1iec60730__cpu__regs__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__cpu__registers_1_1iec60730__cpu__regs__inherit__graph.dot new file mode 100644 index 00000000..f4c859b7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__cpu__registers_1_1iec60730__cpu__regs__inherit__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_cpu_registers.iec60730_cpu_regs" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_cpu_registers.iec60730\l_cpu_regs",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 CPU Register Check Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__invariable__memory_1_1iec60730__imc-members.html b/docs/html/EFR32_ICE60730_Libraries/classiec60730__invariable__memory_1_1iec60730__imc-members.html new file mode 100644 index 00000000..c8288058 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__invariable__memory_1_1iec60730__imc-members.html @@ -0,0 +1,106 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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iec60730_invariable_memory.iec60730_imc Member List
+
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+ +

This is the complete list of members for iec60730_invariable_memory.iec60730_imc, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + +
adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
reach_to_breakpoint(self, label, setbkp, time) (defined in iec60730_invariable_memory.iec60730_imc)iec60730_invariable_memory.iec60730_imc
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_breakpoint(self, label) (defined in iec60730_invariable_memory.iec60730_imc)iec60730_invariable_memory.iec60730_imc
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self) (defined in iec60730_invariable_memory.iec60730_imc)iec60730_invariable_memory.iec60730_imc
test_CalCRC_Block_Memory(self)iec60730_invariable_memory.iec60730_imc
test_CalCRC_Full_Memory(self)iec60730_invariable_memory.iec60730_imc
test_CorruptCRC_CalCRC_Block_Memory(self)iec60730_invariable_memory.iec60730_imc
test_CorruptCRC_Full_Memory(self)iec60730_invariable_memory.iec60730_imc
test_CorruptIntegrity_RunCRC_Block_Memory(self)iec60730_invariable_memory.iec60730_imc
TEST_SUITE_NAME (defined in iec60730_invariable_memory.iec60730_imc)iec60730_invariable_memory.iec60730_imcstatic
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+Public Member Functions | +Static Public Attributes | +List of all members
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iec60730_invariable_memory.iec60730_imc Class Reference
EFR32 IEC60730 Library » IEC60730 Test Specification » Invariable Memory Automated Verification Tests
+
+
+ +

IEC60730 Invariable Memory Plausibility Verification Tests. + More...

+
+Inheritance diagram for iec60730_invariable_memory.iec60730_imc:
+
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Inheritance graph
+
[legend]
+
+Collaboration diagram for iec60730_invariable_memory.iec60730_imc:
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+Public Member Functions

+def setUp (self)
 
+def set_breakpoint (self, label)
 
+def reach_to_breakpoint (self, label, setbkp, time)
 
def test_CalCRC_Full_Memory (self)
 Verify the DUT calculation of CRC value at POST. More...
 
def test_CorruptCRC_Full_Memory (self)
 Verify the DUT jump to iec60730_SafeState when flash faied at POST. More...
 
def test_CalCRC_Block_Memory (self)
 Verify the DUT calculation of CRC value at BIST. More...
 
def test_CorruptCRC_CalCRC_Block_Memory (self)
 Verify the DUT jump to iec60730_SafeState when flash faied at BIST. More...
 
def test_CorruptIntegrity_RunCRC_Block_Memory (self)
 Verify integrity of runCrc variable. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "IMC"
 
+ + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ adapter
 
+

Detailed Description

+

IEC60730 Invariable Memory Plausibility Verification Tests.

+

This class runs IEC60730 verification tests for the invariable memory plausibility test.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/iec60730_invariable_memory.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__invariable__memory_1_1iec60730__imc__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__invariable__memory_1_1iec60730__imc__coll__graph.dot new file mode 100644 index 00000000..adf70e72 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__invariable__memory_1_1iec60730__imc__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_invariable_memory.iec60730_imc" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_invariable\l_memory.iec60730_imc",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 Invariable Memory Plausibility Verification Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__invariable__memory_1_1iec60730__imc__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__invariable__memory_1_1iec60730__imc__inherit__graph.dot new file mode 100644 index 00000000..adf70e72 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__invariable__memory_1_1iec60730__imc__inherit__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_invariable_memory.iec60730_imc" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_invariable\l_memory.iec60730_imc",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 Invariable Memory Plausibility Verification Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq-members.html b/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq-members.html new file mode 100644 index 00000000..46fb95c8 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq-members.html @@ -0,0 +1,101 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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iec60730_irq.iec60730_irq Member List
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This is the complete list of members for iec60730_irq.iec60730_irq, including all inherited members.

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adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self)iec60730_irq.iec60730_irq
test_irq_execution(self)iec60730_irq.iec60730_irq
test_IRQ_out_of_bounds(self)iec60730_irq.iec60730_irq
TEST_SUITE_NAMEiec60730_irq.iec60730_irqstatic
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq.html b/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq.html new file mode 100644 index 00000000..d895a1b4 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq.html @@ -0,0 +1,240 @@ + + + + + + + +IEC_60730: iec60730_irq.iec60730_irq Class Reference + + + + + + + + + +
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iec60730_irq.iec60730_irq Class Reference
EFR32 IEC60730 Library » IEC60730 Test Specification » IRQ Automated Verification Tests
+
+
+ +

IEC60730 IRQ Plausibility Verification Tests. + More...

+
+Inheritance diagram for iec60730_irq.iec60730_irq:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for iec60730_irq.iec60730_irq:
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+Public Member Functions

+def setUp (self)
 Initialization function.
 
def test_irq_execution (self)
 Verify the DUT repeatedly executes the IRQ plausibility test, indicating no erroneous entry into safe state. More...
 
def test_IRQ_out_of_bounds (self)
 Verifies that the IRQ plausibility test forces entry into safe state when IRQs execute out-of-spec. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "IRQ"
 Text name of the test suite, used in XML output.
 
+ + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ adapter
 
+

Detailed Description

+

IEC60730 IRQ Plausibility Verification Tests.

+

This class runs IEC60730 verification tests for the irq plausibility test.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_irq_execution()

+ +
+
+ + + + + + + + +
def iec60730_irq.iec60730_irq.test_irq_execution ( self)
+
+ +

Verify the DUT repeatedly executes the IRQ plausibility test, indicating no erroneous entry into safe state.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
      +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_IRQ_out_of_bounds()

+ +
+
+ + + + + + + + +
def iec60730_irq.iec60730_irq.test_IRQ_out_of_bounds ( self)
+
+ +

Verifies that the IRQ plausibility test forces entry into safe state when IRQs execute out-of-spec.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
    • +
  • Force value of interrupt count to be less than minimum
    • +
  • Verify safe state entrance
    • +
  • Reset
    • +
  • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
    • +
  • Force value of interrupt count to be higher than maximum
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
      +
    • Code correctly tested entered iec60730_SafeState() due to out of bounds clock
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+
+ +
+Figure 1 Execution Flow of of IRQ plausibility test
+

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/iec60730_irq.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq__coll__graph.dot new file mode 100644 index 00000000..78160ce2 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_irq.iec60730_irq" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_irq.iec60730_irq",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 IRQ Plausibility Verification Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq__inherit__graph.dot new file mode 100644 index 00000000..78160ce2 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__irq_1_1iec60730__irq__inherit__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_irq.iec60730_irq" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_irq.iec60730_irq",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 IRQ Plausibility Verification Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__programme__counter_1_1iec60730__programme__counter-members.html b/docs/html/EFR32_ICE60730_Libraries/classiec60730__programme__counter_1_1iec60730__programme__counter-members.html new file mode 100644 index 00000000..39705a7c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__programme__counter_1_1iec60730__programme__counter-members.html @@ -0,0 +1,101 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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iec60730_programme_counter.iec60730_programme_counter Member List
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This is the complete list of members for iec60730_programme_counter.iec60730_programme_counter, including all inherited members.

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adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self) (defined in iec60730_programme_counter.iec60730_programme_counter)iec60730_programme_counter.iec60730_programme_counter
test_01_programme_counter_execution(self)iec60730_programme_counter.iec60730_programme_counter
test_02_programme_counter_too_slow(self)iec60730_programme_counter.iec60730_programme_counter
TEST_SUITE_NAMEiec60730_programme_counter.iec60730_programme_counterstatic
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iec60730_programme_counter.iec60730_programme_counter Class Reference
EFR32 IEC60730 Library » IEC60730 Test Specification » Programme Counter Verification Tests
+
+
+ +

IEC60730 CPU programme counter Tests. + More...

+
+Inheritance diagram for iec60730_programme_counter.iec60730_programme_counter:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for iec60730_programme_counter.iec60730_programme_counter:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def setUp (self)
 
def test_01_programme_counter_execution (self)
 Verify the DUT repeatedly programme counter test, indicating programme counter correctly running. More...
 
def test_02_programme_counter_too_slow (self)
 Verify the DUT repeatedly executes programme counter test, indicating programme counter enters safe state. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "PROGRAMME_COUNTER"
 Text name of the test suite, used in XML output.
 
+ + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ adapter
 
+

Detailed Description

+

IEC60730 CPU programme counter Tests.

+

This class runs IEC60730 programme counter tests.
+

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_01_programme_counter_execution()

+ +
+
+ + + + + + + + +
def iec60730_programme_counter.iec60730_programme_counter.test_01_programme_counter_execution ( self)
+
+ +

Verify the DUT repeatedly programme counter test, indicating programme counter correctly running.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_PC_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_PC_BKPT
      +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_02_programme_counter_too_slow()

+ +
+
+ + + + + + + + +
def iec60730_programme_counter.iec60730_programme_counter.test_02_programme_counter_too_slow ( self)
+
+ +

Verify the DUT repeatedly executes programme counter test, indicating programme counter enters safe state.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_PC_BKPT
    • +
  • Inject fault condition into programme counter flags
    • +
  • Verify code reaches breakpoint at iec60730_SafeState
      +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/iec60730_programme_counter.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__programme__counter_1_1iec60730__programme__counter__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__programme__counter_1_1iec60730__programme__counter__coll__graph.dot new file mode 100644 index 00000000..af152791 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__programme__counter_1_1iec60730__programme__counter__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_programme_counter.iec60730_programme_counter" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_programme\l_counter.iec60730_programme\l_counter",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 CPU programme counter Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__programme__counter_1_1iec60730__programme__counter__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__programme__counter_1_1iec60730__programme__counter__inherit__graph.dot new file mode 100644 index 00000000..af152791 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__programme__counter_1_1iec60730__programme__counter__inherit__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_programme_counter.iec60730_programme_counter" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_programme\l_counter.iec60730_programme\l_counter",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 CPU programme counter Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__system__clock_1_1iec60730__system__clock-members.html b/docs/html/EFR32_ICE60730_Libraries/classiec60730__system__clock_1_1iec60730__system__clock-members.html new file mode 100644 index 00000000..af9d7ca4 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__system__clock_1_1iec60730__system__clock-members.html @@ -0,0 +1,102 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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iec60730_system_clock.iec60730_system_clock Member List
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This is the complete list of members for iec60730_system_clock.iec60730_system_clock, including all inherited members.

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adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self) (defined in iec60730_system_clock.iec60730_system_clock)iec60730_system_clock.iec60730_system_clock
TEST_SUITE_NAMEiec60730_system_clock.iec60730_system_clockstatic
test_system_clock_execution(self)iec60730_system_clock.iec60730_system_clock
test_system_clock_high_safe_state_entry(self)iec60730_system_clock.iec60730_system_clock
test_system_clock_Low_safe_state_entry(self)iec60730_system_clock.iec60730_system_clock
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iec60730_system_clock.iec60730_system_clock Class Reference
EFR32 IEC60730 Library » IEC60730 Test Specification » System Clock Automated Verification Tests
+
+
+ +

IEC60730 System Clock Verification Tests. + More...

+
+Inheritance diagram for iec60730_system_clock.iec60730_system_clock:
+
+
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+
[legend]
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+Collaboration diagram for iec60730_system_clock.iec60730_system_clock:
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+Public Member Functions

+def setUp (self)
 
def test_system_clock_execution (self)
 Verify the DUT repeatedly executes the system clock test, indicating no erroneous entry into safe state. More...
 
def test_system_clock_Low_safe_state_entry (self)
 Verifies that the BIST system clock test enters safe state when out-of-bounds system clock is enabled. More...
 
def test_system_clock_high_safe_state_entry (self)
 Verifies that the BIST system clock test enters safe state when out-of-bounds system clock is enabled. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "SystemClock"
 Text name of the test suite, used in XML output.
 
+ + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ adapter
 
+

Detailed Description

+

IEC60730 System Clock Verification Tests.

+

This class runs IEC60730 verification tests for the system clock test.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_system_clock_execution()

+ +
+
+ + + + + + + + +
def iec60730_system_clock.iec60730_system_clock.test_system_clock_execution ( self)
+
+ +

Verify the DUT repeatedly executes the system clock test, indicating no erroneous entry into safe state.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_SYSTEM_CLOCK_TICK_BKPT (to verify Clock counter is working).
    • +
  • Verify code reaches breakpoint at IEC60730_TEST_CLOCK_TICK_BKPT (To verify Clock counter is checked. Test finishes without stucked in safe state.).
      +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_system_clock_high_safe_state_entry()

+ +
+
+ + + + + + + + +
def iec60730_system_clock.iec60730_system_clock.test_system_clock_high_safe_state_entry ( self)
+
+ +

Verifies that the BIST system clock test enters safe state when out-of-bounds system clock is enabled.

+

The system clock test is validated by simulate a system clock frequency that runs high bound checked by the test. Testing validates that the system enters safe state after the system clock is out of bounds, as shown in Figure 2.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_SYSTEM_CLOCK_FREQ_ADJUSTMENT_BKPT
    • +
  • Change timer TOP register to devided by 2, forcing it high bound
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
      +
    • Code correctly tested entered iec60730_SafeState() due to out of bounds clock
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+
+ +
+Figure 2 System clock frequency check flowchart
+

+ +
+
+ +

◆ test_system_clock_Low_safe_state_entry()

+ +
+
+ + + + + + + + +
def iec60730_system_clock.iec60730_system_clock.test_system_clock_Low_safe_state_entry ( self)
+
+ +

Verifies that the BIST system clock test enters safe state when out-of-bounds system clock is enabled.

+

The system clock test is validated by forcing a system clock frequency that runs low bound checked by the test. Testing validates that the system enters safe state after the system clock is forced low bound, as shown in Figure 2.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_SYSTEM_CLOCK_FREQ_ADJUSTMENT_BKPT
    • +
  • Change timer TOP register to multi by 2, forcing it low bound
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
      +
    • Code correctly tested entered iec60730_SafeState() due to out of bounds clock
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+
+ +
+Figure 2 System clock frequency check flowchart
+

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/iec60730_system_clock.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__system__clock_1_1iec60730__system__clock__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__system__clock_1_1iec60730__system__clock__coll__graph.dot new file mode 100644 index 00000000..800bc09e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__system__clock_1_1iec60730__system__clock__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_system_clock.iec60730_system_clock" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_system_clock.iec60730\l_system_clock",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 System Clock Verification Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="unittest::TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__system__clock_1_1iec60730__system__clock__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__system__clock_1_1iec60730__system__clock__inherit__graph.dot new file mode 100644 index 00000000..800bc09e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__system__clock_1_1iec60730__system__clock__inherit__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_system_clock.iec60730_system_clock" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_system_clock.iec60730\l_system_clock",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 System Clock Verification Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="unittest::TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__test__base_1_1iec60730TestBase-members.html b/docs/html/EFR32_ICE60730_Libraries/classiec60730__test__base_1_1iec60730TestBase-members.html new file mode 100644 index 00000000..222a4a68 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__test__base_1_1iec60730TestBase-members.html @@ -0,0 +1,97 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
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iec60730_test_base.iec60730TestBase Class Reference
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+Public Member Functions

+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + +

+Public Attributes

+ adapter
 
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/iec60730_test_base.py
    • +
+
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This is the complete list of members for iec60730_variable_memory.iec60730_vmc, including all inherited members.

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adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
corruption(self, address=0, value=0, time=1, label='', label_pass='iec60730_SafeState') (defined in iec60730_variable_memory.iec60730_vmc)iec60730_variable_memory.iec60730_vmc
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
reach_to_breakpoint(self, label, setbkp, time) (defined in iec60730_variable_memory.iec60730_vmc)iec60730_variable_memory.iec60730_vmc
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_breakpoint(self, label) (defined in iec60730_variable_memory.iec60730_vmc)iec60730_variable_memory.iec60730_vmc
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self) (defined in iec60730_variable_memory.iec60730_vmc)iec60730_variable_memory.iec60730_vmc
test_CorrectBackGround_FullRamClassB(self)iec60730_variable_memory.iec60730_vmc
test_CorrectBackGround_StepRamClassB(self)iec60730_variable_memory.iec60730_vmc
test_DetectCorruption_FullRamClassB(self)iec60730_variable_memory.iec60730_vmc
test_DetectCorruption_StepRamClassB(self)iec60730_variable_memory.iec60730_vmc
test_DetectFailed_StackTest(self)iec60730_variable_memory.iec60730_vmc
TEST_SUITE_NAME (defined in iec60730_variable_memory.iec60730_vmc)iec60730_variable_memory.iec60730_vmcstatic
test_WorkNormally_StackTest(self)iec60730_variable_memory.iec60730_vmc
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iec60730_variable_memory.iec60730_vmc Class Reference
EFR32 IEC60730 Library » IEC60730 Test Specification » Variable Memory Automated Verification Tests
+
+
+ +

IEC60730 Variable Memory Plausibility Verification Tests. + More...

+
+Inheritance diagram for iec60730_variable_memory.iec60730_vmc:
+
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Inheritance graph
+
[legend]
+
+Collaboration diagram for iec60730_variable_memory.iec60730_vmc:
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+Public Member Functions

+def setUp (self)
 
+def set_breakpoint (self, label)
 
+def reach_to_breakpoint (self, label, setbkp, time)
 
+def corruption (self, address=0, value=0, time=1, label='', label_pass='iec60730_SafeState')
 
def test_CorrectBackGround_FullRamClassB (self)
 Verify the DUT run step by step when testing full ram at POST. More...
 
def test_DetectCorruption_FullRamClassB (self)
 Verify the DUT jump to iec60730_SafeState when testing ram failed at post. More...
 
def test_CorrectBackGround_StepRamClassB (self)
 Verify the DUT run step by step when testing full ram at BIST. More...
 
def test_DetectCorruption_StepRamClassB (self)
 Verify the DUT jump to iec60730_SafeState when testing ram failed at BIST. More...
 
def test_WorkNormally_StackTest (self)
 Verify the DUT run to check RAM and not failed at BIST. More...
 
def test_DetectFailed_StackTest (self)
 Verify the DUT jump to iec60730_SafeState when stack test failed at BIST. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "VMC"
 
+ + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ adapter
 
+

Detailed Description

+

IEC60730 Variable Memory Plausibility Verification Tests.

+

This class runs IEC60730 verification tests for the variable memory plausibility test.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/iec60730_variable_memory.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__variable__memory_1_1iec60730__vmc__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__variable__memory_1_1iec60730__vmc__coll__graph.dot new file mode 100644 index 00000000..eee89f45 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__variable__memory_1_1iec60730__vmc__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_variable_memory.iec60730_vmc" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_variable_memory.iec60730_vmc",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 Variable Memory Plausibility Verification Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__variable__memory_1_1iec60730__vmc__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__variable__memory_1_1iec60730__vmc__inherit__graph.dot new file mode 100644 index 00000000..eee89f45 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__variable__memory_1_1iec60730__vmc__inherit__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_variable_memory.iec60730_vmc" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_variable_memory.iec60730_vmc",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 Variable Memory Plausibility Verification Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog-members.html b/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog-members.html new file mode 100644 index 00000000..10d6d7fd --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog-members.html @@ -0,0 +1,107 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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iec60730_watchdog.iec60730_watchdog Member List
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This is the complete list of members for iec60730_watchdog.iec60730_watchdog, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + +
adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
clear_rst_causes(self) (defined in iec60730_watchdog.iec60730_watchdog)iec60730_watchdog.iec60730_watchdog
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self) (defined in iec60730_watchdog.iec60730_watchdog)iec60730_watchdog.iec60730_watchdog
TEST_SUITE_NAMEiec60730_watchdog.iec60730_watchdogstatic
test_tc1_watchdog_por_execution(self)iec60730_watchdog.iec60730_watchdog
test_tc2_watchdog_counter_execution(self)iec60730_watchdog.iec60730_watchdog
test_tc3_watchdog_wrong_rst_execution(self)iec60730_watchdog.iec60730_watchdog
test_tc4_watchdog_wrong_testing_execution(self)iec60730_watchdog.iec60730_watchdog
test_tc5_restart_watchdog_execution(self)iec60730_watchdog.iec60730_watchdog
wdog_power_cycle(self) (defined in iec60730_watchdog.iec60730_watchdog)iec60730_watchdog.iec60730_watchdog
wdog_test_running_enable(self) (defined in iec60730_watchdog.iec60730_watchdog)iec60730_watchdog.iec60730_watchdog
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog.html b/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog.html new file mode 100644 index 00000000..af214990 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog.html @@ -0,0 +1,339 @@ + + + + + + + +IEC_60730: iec60730_watchdog.iec60730_watchdog Class Reference + + + + + + + + + +
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iec60730_watchdog.iec60730_watchdog Class Reference
EFR32 IEC60730 Library » IEC60730 Test Specification » Watchdog Automated Verification Tests
+
+
+ +

IEC60730 Watchdog Verification Tests. + More...

+
+Inheritance diagram for iec60730_watchdog.iec60730_watchdog:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for iec60730_watchdog.iec60730_watchdog:
+
+
Collaboration graph
+
[legend]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def setUp (self)
 
+def clear_rst_causes (self)
 
+def wdog_test_running_enable (self)
 
+def wdog_power_cycle (self)
 
def test_tc1_watchdog_por_execution (self)
 Verify the DUT follows the watchdog timer POST test logic correctly. More...
 
def test_tc2_watchdog_counter_execution (self)
 Verify the DUT follows the watchdog timer POST test logic correctly. More...
 
def test_tc3_watchdog_wrong_rst_execution (self)
 Verify the DUT follows the watchdog timer POST test logic correctly. More...
 
def test_tc4_watchdog_wrong_testing_execution (self)
 Verify the DUT follows the watchdog timer POST test logic correctly. More...
 
def test_tc5_restart_watchdog_execution (self)
 Verify the DUT follows the watchdog timer POST test logic correctly. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, app_type, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "Watchdog"
 Text name of the test suite, used in XML output.
 
+ + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ adapter
 
+

Detailed Description

+

IEC60730 Watchdog Verification Tests.

+

This class runs IEC60730 verification tests for the watchdog.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_tc1_watchdog_por_execution()

+ +
+
+ + + + + + + + +
def iec60730_watchdog.iec60730_watchdog.test_tc1_watchdog_por_execution ( self)
+
+ +

Verify the DUT follows the watchdog timer POST test logic correctly.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_POR_RESET_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TIMEOUT_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_END_BKPT
      +
    • Verify the Watchdog status is iec60730_WatchdogValid
      • +
    • Verify the Watchdog status saved to BURAM is iec60730_WatchdogValid (On EFR32 series 2 only)
      • +
    • Code correctly tested watchdog timer and watchdog reset trigger, enters main loop
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_tc2_watchdog_counter_execution()

+ +
+
+ + + + + + + + +
def iec60730_watchdog.iec60730_watchdog.test_tc2_watchdog_counter_execution ( self)
+
+ +

Verify the DUT follows the watchdog timer POST test logic correctly.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
      +
    • Code correctly enters safe state
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_tc3_watchdog_wrong_rst_execution()

+ +
+
+ + + + + + + + +
def iec60730_watchdog.iec60730_watchdog.test_tc3_watchdog_wrong_rst_execution ( self)
+
+ +

Verify the DUT follows the watchdog timer POST test logic correctly.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
      +
    • Code correctly enters safe state
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_tc4_watchdog_wrong_testing_execution()

+ +
+
+ + + + + + + + +
def iec60730_watchdog.iec60730_watchdog.test_tc4_watchdog_wrong_testing_execution ( self)
+
+ +

Verify the DUT follows the watchdog timer POST test logic correctly.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_WORKING_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
      +
    • Code correctly enters safe state
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_tc5_restart_watchdog_execution()

+ +
+
+ + + + + + + + +
def iec60730_watchdog.iec60730_watchdog.test_tc5_restart_watchdog_execution ( self)
+
+ +

Verify the DUT follows the watchdog timer POST test logic correctly.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_TEST_RESTART_WDOG_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
      +
    • Code correctly enters safe state
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/iec60730_watchdog.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog__coll__graph.dot new file mode 100644 index 00000000..9188d005 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_watchdog.iec60730_watchdog" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_watchdog.iec60730\l_watchdog",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 Watchdog Verification Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog__inherit__graph.dot new file mode 100644 index 00000000..9188d005 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classiec60730__watchdog_1_1iec60730__watchdog__inherit__graph.dot @@ -0,0 +1,11 @@ +digraph "iec60730_watchdog.iec60730_watchdog" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="iec60730_watchdog.iec60730\l_watchdog",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="IEC60730 Watchdog Verification Tests."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink_1_1JLinkDll-members.html b/docs/html/EFR32_ICE60730_Libraries/classjlink_1_1JLinkDll-members.html new file mode 100644 index 00000000..cb862cf9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink_1_1JLinkDll-members.html @@ -0,0 +1,136 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
jlink.JLinkDll Member List
+
+
+ +

This is the complete list of members for jlink.JLinkDll, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
__init__(self, lib_path) (defined in jlink.JLinkDll)jlink.JLinkDll
abort(self, errMsg) (defined in jlink.JLinkDll)jlink.JLinkDll
clear_all_breakpoints(self) (defined in jlink.JLinkDll)jlink.JLinkDll
clear_breakpoint(self, bp_to_clear)jlink.JLinkDll
close(self)jlink.JLinkDll
connect(self, serial_number, chip_name) (defined in jlink.JLinkDll)jlink.JLinkDll
download(self, image, offset=0) (defined in jlink.JLinkDll)jlink.JLinkDll
erase_chip(self)jlink.JLinkDll
ErrorOutHandler(cls, errorMsg)jlink.JLinkDll
execute_command(self, command_string)jlink.JLinkDll
get_adapter_list(self)jlink.JLinkDll
get_device_family(self) (defined in jlink.JLinkDll)jlink.JLinkDll
get_id(self)jlink.JLinkDll
get_id_data(self)jlink.JLinkDll
get_speed(self)jlink.JLinkDll
get_speed_info(self)jlink.JLinkDll
get_tcp_ip_adapter_list(self)jlink.JLinkDll
get_usb_adapter_list(self)jlink.JLinkDll
go_ex(self)jlink.JLinkDll
halt(self) (defined in jlink.JLinkDll)jlink.JLinkDll
halted(self)jlink.JLinkDll
logger (defined in jlink.JLinkDll)jlink.JLinkDllstatic
MAX_BUF_SIZE (defined in jlink.JLinkDll)jlink.JLinkDllstatic
MAX_NUM_ADAPTERS (defined in jlink.JLinkDll)jlink.JLinkDllstatic
MAX_NUM_CPU_REGISTERS (defined in jlink.JLinkDll)jlink.JLinkDllstatic
memory_read(self, addr, num_units, zone=None, nbits=None)jlink.JLinkDll
memory_read16(self, addr, num_halfwords, zone=None)jlink.JLinkDll
memory_read32(self, addr, num_words, zone=None)jlink.JLinkDll
memory_read64(self, addr, num_long_words)jlink.JLinkDll
memory_read8(self, addr, num_bytes, zone=None)jlink.JLinkDll
memory_write(self, addr, data, zone=None, nbits=None)jlink.JLinkDll
memory_write16(self, addr, data, zone=None)jlink.JLinkDll
memory_write32(self, addr, data, zone=None)jlink.JLinkDll
memory_write64(self, addr, data, zone=None)jlink.JLinkDll
memory_write8(self, addr, data, zone=None)jlink.JLinkDll
num_active_breakpoints(self)jlink.JLinkDll
read_mem(self, address, num_bytes) (defined in jlink.JLinkDll)jlink.JLinkDll
read_ram_arm_16(self, address, num_words) (defined in jlink.JLinkDll)jlink.JLinkDll
read_ram_arm_32(self, address, num_words) (defined in jlink.JLinkDll)jlink.JLinkDll
read_ram_arm_64(self, address, num_words)jlink.JLinkDll
read_ram_arm_8(self, address, num_bytes) (defined in jlink.JLinkDll)jlink.JLinkDll
register_list(self)jlink.JLinkDll
register_name(self, register_index)jlink.JLinkDll
register_read(self, register_index)jlink.JLinkDll
register_write(self, reg_index, value)jlink.JLinkDll
reset(self, halt=True)jlink.JLinkDll
run_to_breakpoint(self, timeout) (defined in jlink.JLinkDll)jlink.JLinkDll
set_breakpoint(self, address, typeflags)jlink.JLinkDll
set_device(self, device) (defined in jlink.JLinkDll)jlink.JLinkDll
set_max_speed(self)jlink.JLinkDll
set_speed(self, speed=4000)jlink.JLinkDll
step(self) (defined in jlink.JLinkDll)jlink.JLinkDll
WarnOutHandler(cls, warnMsg)jlink.JLinkDll
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink_1_1JLinkDll.html b/docs/html/EFR32_ICE60730_Libraries/classjlink_1_1JLinkDll.html new file mode 100644 index 00000000..1be8f0e3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink_1_1JLinkDll.html @@ -0,0 +1,1462 @@ + + + + + + + +IEC_60730: jlink.JLinkDll Class Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Public Member Functions | +Static Public Attributes | +List of all members
+
+
jlink.JLinkDll Class Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def __init__ (self, lib_path)
 
+def abort (self, errMsg)
 
def execute_command (self, command_string)
 
def get_usb_adapter_list (self)
 
def get_tcp_ip_adapter_list (self)
 
def get_adapter_list (self)
 
+def connect (self, serial_number, chip_name)
 
def close (self)
 
def get_speed (self)
 
def set_max_speed (self)
 
def set_speed (self, speed=4000)
 
def get_speed_info (self)
 
def get_id (self)
 
def get_id_data (self)
 
def halted (self)
 
+def run_to_breakpoint (self, timeout)
 
def go_ex (self)
 
+def step (self)
 
+def halt (self)
 
def reset (self, halt=True)
 
+def get_device_family (self)
 
+def set_device (self, device)
 
+def read_mem (self, address, num_bytes)
 
+def read_ram_arm_8 (self, address, num_bytes)
 
+def read_ram_arm_16 (self, address, num_words)
 
+def read_ram_arm_32 (self, address, num_words)
 
def read_ram_arm_64 (self, address, num_words)
 
def clear_breakpoint (self, bp_to_clear)
 
+def clear_all_breakpoints (self)
 
def register_name (self, register_index)
 
def register_list (self)
 
def register_read (self, register_index)
 
def register_write (self, reg_index, value)
 
def num_active_breakpoints (self)
 
def set_breakpoint (self, address, typeflags)
 
def memory_read (self, addr, num_units, zone=None, nbits=None)
 
def memory_read8 (self, addr, num_bytes, zone=None)
 
def memory_read16 (self, addr, num_halfwords, zone=None)
 
def memory_read32 (self, addr, num_words, zone=None)
 
def memory_read64 (self, addr, num_long_words)
 
def memory_write (self, addr, data, zone=None, nbits=None)
 
def memory_write8 (self, addr, data, zone=None)
 
def memory_write16 (self, addr, data, zone=None)
 
def memory_write32 (self, addr, data, zone=None)
 
def memory_write64 (self, addr, data, zone=None)
 
def erase_chip (self)
 
+def download (self, image, offset=0)
 
def ErrorOutHandler (cls, errorMsg)
 
def WarnOutHandler (cls, warnMsg)
 
+ + + + + + + + + +

+Static Public Attributes

+int MAX_BUF_SIZE = 336
 
+int MAX_NUM_ADAPTERS = 32
 
+int MAX_NUM_CPU_REGISTERS = 256
 
+ logger = None
 
+

Detailed Description

+
Object for accessing and controlling a JLink adapter
+

Member Function Documentation

+ +

◆ clear_breakpoint()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.clear_breakpoint ( self,
 bp_to_clear 
)
+
+
Clears breakpoint on the connected device.
+
+Keyword arguments:
+bp_to_clear - Handle of the breakpoint to clear. 
+    Pass JLINKARM_BP_HANDLE_ALL to clear all breakpoints.
+
+
+
+ +

◆ close()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.close ( self)
+
+
Closes the connection to the JLink adapter.
+
+
+
+ +

◆ erase_chip()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.erase_chip ( self)
+
+
Erases all user flash on the connected device.
+
+
+
+ +

◆ ErrorOutHandler()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.ErrorOutHandler ( cls,
 errorMsg 
)
+
+
Log error from the DLL.
+
+:param errorMsg: The DLL error message.
+
+
+
+ +

◆ execute_command()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.execute_command ( self,
 command_string 
)
+
+
Execute a JLink command string.
+
+Keyword arguments:
+command_string -- the string to execute with JLINKARM_ExecCommand()
+
+Returns the return value of the executed command.
+
+
+
+ +

◆ get_adapter_list()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_adapter_list ( self)
+
+
Returns a list of all adapters connected to the host via TCP/IP or USB.
+
+
+
+ +

◆ get_id()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_id ( self)
+
+
Retrives ID of the core.
+
+
+
+ +

◆ get_id_data()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_id_data ( self)
+
+
Retrives detailed info of the device on the JTAG bus.
+
+
+
+ +

◆ get_speed()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_speed ( self)
+
+
Returns the current JTAG connection speed.
+
+
+
+ +

◆ get_speed_info()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_speed_info ( self)
+
+
Gets the target interface speed information.
+
+Returns a dictionary containing the speed information.
+
+
+
+ +

◆ get_tcp_ip_adapter_list()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_tcp_ip_adapter_list ( self)
+
+
Returns a list of all adapters connected to the host via TCP/IP.
+
+
+
+ +

◆ get_usb_adapter_list()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_usb_adapter_list ( self)
+
+
Returns a list of all adapters connected to the host via USB.
+
+
+
+ +

◆ go_ex()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.go_ex ( self)
+
+
Runs the currently connected device, skipping over any breakpoint at the current instruction.
+
+
+
+ +

◆ halted()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.halted ( self)
+
+
Returns whether the CPU core was halted.
+
+Args:
+  self (JLink): the ``JLink`` instance
+
+Returns:
+  ``True`` if the CPU core is halted, otherwise ``False``.
+
+Raises:
+  JLinkException: on device errors.
+
+
+
+ +

◆ memory_read()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_read ( self,
 addr,
 num_units,
 zone = None,
 nbits = None 
)
+
+
Reads memory from a target system or specific memory zone.
+
+The optional ``zone`` specifies a memory zone to access to read from,
+e.g. ``IDATA``, ``DDATA``, or ``CODE``.
+
+The given number of bits, if provided, must be either ``8``, ``16``, or
+``32``.  If not provided, always reads ``num_units`` bytes.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_units (int): number of units to read
+  zone (str): optional memory zone name to access
+  nbits (int): number of bits to use for each unit
+
+Returns:
+  List of units read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read.
+  ValueError: if ``nbits`` is not ``None``, and not in ``8``, ``16``,
+    or ``32``.
+
+
+
+ +

◆ memory_read16()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_read16 ( self,
 addr,
 num_halfwords,
 zone = None 
)
+
+
Reads memory from the target system in units of 16-bits.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_halfwords (int): number of half words to read
+  zone (str): memory zone to read from
+
+Returns:
+  List of halfwords read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read
+
+
+
+ +

◆ memory_read32()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_read32 ( self,
 addr,
 num_words,
 zone = None 
)
+
+
Reads memory from the target system in units of 32-bits.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_words (int): number of words to read
+  zone (str): memory zone to read from
+
+Returns:
+  List of words read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read
+
+
+
+ +

◆ memory_read64()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_read64 ( self,
 addr,
 num_long_words 
)
+
+
Reads memory from the target system in units of 64-bits.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_long_words (int): number of long words to read
+
+Returns:
+  List of long words read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read
+
+
+
+ +

◆ memory_read8()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_read8 ( self,
 addr,
 num_bytes,
 zone = None 
)
+
+
Reads memory from the target system in units of bytes.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_bytes (int): number of bytes to read
+  zone (str): memory zone to read from
+
+Returns:
+  List of bytes read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read.
+
+
+
+ +

◆ memory_write()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_write ( self,
 addr,
 data,
 zone = None,
 nbits = None 
)
+
+
Writes memory to a target system or specific memory zone.
+
+The optional ``zone`` specifies a memory zone to access to write to,
+e.g. ``IDATA``, ``DDATA``, or ``CODE``.
+
+The given number of bits, if provided, must be either ``8``, ``16``, or
+``32``.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of data units to write
+  zone (str): optional memory zone name to access
+  nbits (int): number of bits to use for each unit
+
+Returns:
+  Number of units written.
+
+Raises:
+  JLinkException: on write hardware failure.
+  ValueError: if ``nbits`` is not ``None``, and not in ``8``, ``16`` or
+    ``32``.
+
+
+
+ +

◆ memory_write16()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_write16 ( self,
 addr,
 data,
 zone = None 
)
+
+
Writes half-words to memory of a target system.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of half-words to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of half-words written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
+
+
+ +

◆ memory_write32()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_write32 ( self,
 addr,
 data,
 zone = None 
)
+
+
Writes words to memory of a target system.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of words to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of words written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
+
+
+ +

◆ memory_write64()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_write64 ( self,
 addr,
 data,
 zone = None 
)
+
+
Writes long words to memory of a target system.
+
+Note:
+  This is little-endian.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of long words to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of long words written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
+
+
+ +

◆ memory_write8()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_write8 ( self,
 addr,
 data,
 zone = None 
)
+
+
Writes bytes to memory of a target system.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of bytes to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of bytes written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
+
+
+ +

◆ num_active_breakpoints()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.num_active_breakpoints ( self)
+
+
Returns the number of currently active breakpoints.
+
+Args:
+  self (JLink): the ``JLink`` instance
+
+Returns:
+  The number of breakpoints that are currently set.
+
+
+
+ +

◆ read_ram_arm_64()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.read_ram_arm_64 ( self,
 address,
 num_words 
)
+
+
Reads a block of RAM in 64-bit words.
+
+Keyword arguments:
+address -- starting address to read
+num_words -- number of 64-bit words to read
+
+
+
+ +

◆ register_list()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.register_list ( self)
+
+
Returns a list of the indices for the CPU registers.
+
+The returned indices can be used to read the register content or grab
+the register name.
+
+Args:
+  self (JLink): the ``JLink`` instance
+
+Returns:
+  List of registers.
+
+
+
+ +

◆ register_name()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.register_name ( self,
 register_index 
)
+
+
Retrives and returns the name of an ARM CPU register.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  register_index (int): index of the register whose name to retrieve
+
+Returns:
+  Name of the register.
+
+
+
+ +

◆ register_read()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.register_read ( self,
 register_index 
)
+
+
Reads the value from the given register.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  register_index (int/str): the register to read
+
+Returns:
+  The value stored in the given register.
+
+
+
+ +

◆ register_write()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.register_write ( self,
 reg_index,
 value 
)
+
+
Writes into an ARM register.
+
+Note:
+  The data is not immediately written, but is cached before being
+  transferred to the CPU on CPU start.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  reg_index (int/str): the ARM register to write to
+  value (int): the value to write to the register
+
+Returns:
+  The value written to the ARM register.
+
+Raises:
+  JLinkException: on write error.
+
+
+
+ +

◆ reset()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.reset ( self,
 halt = True 
)
+
+
Resets the currently connected device.
+
+Keyword arguments:
+halt -- if true, the part will be halted before reset
+if false, the part will not be halted before reset
+
+
+
+ +

◆ set_breakpoint()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.set_breakpoint ( self,
 address,
 typeflags 
)
+
+
Set a breakpoint within the CPU.
+
+address - Address for the breakpoint.
+typeflags - Flags for the breakpoint.  Ignored for EFM8 devices.
+
+
+
+ +

◆ set_max_speed()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.set_max_speed ( self)
+
+
Sets the JTAG connection speed to its maximum value.
+
+
+
+ +

◆ set_speed()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.set_speed ( self,
 speed = 4000 
)
+
+
Sets the JTAG connection speed.
+
+Keyword arguments:
+speed -- speed of JTAG connection in kHz.
+
+
+
+ +

◆ WarnOutHandler()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.WarnOutHandler ( cls,
 warnMsg 
)
+
+
Log warning from the DLL.
+
+:param warnMsg: The DLL error message.
+
+
+
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/jlink.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct-members.html b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct-members.html new file mode 100644 index 00000000..ae1297c9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct-members.html @@ -0,0 +1,82 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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This is the complete list of members for jlink_constants.JLinkArmEmuConnectInfo_CStruct, including all inherited members.

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+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct.html b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct.html new file mode 100644 index 00000000..705f43b1 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct.html @@ -0,0 +1,96 @@ + + + + + + + +IEC_60730: jlink_constants.JLinkArmEmuConnectInfo_CStruct Class Reference + + + + + + + + + +
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jlink_constants.JLinkArmEmuConnectInfo_CStruct Class Reference
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+Inheritance diagram for jlink_constants.JLinkArmEmuConnectInfo_CStruct:
+
+
Inheritance graph
+
[legend]
+
+Collaboration diagram for jlink_constants.JLinkArmEmuConnectInfo_CStruct:
+
+
Collaboration graph
+
[legend]
+

Detailed Description

+
JLINKARM_EMU_CONNECT_INFO struct
The documentation for this class was generated from the following file:
    +
  • Test/test_script/jlink_constants.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct__coll__graph.dot new file mode 100644 index 00000000..263fa1a3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "jlink_constants.JLinkArmEmuConnectInfo_CStruct" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="jlink_constants.JLinkArm\lEmuConnectInfo_CStruct",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Structure",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct__inherit__graph.dot new file mode 100644 index 00000000..263fa1a3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "jlink_constants.JLinkArmEmuConnectInfo_CStruct" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="jlink_constants.JLinkArm\lEmuConnectInfo_CStruct",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Structure",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkJtagIdData__CStruct-members.html b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkJtagIdData__CStruct-members.html new file mode 100644 index 00000000..3690f4c2 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkJtagIdData__CStruct-members.html @@ -0,0 +1,82 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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jlink_constants.JLinkJtagIdData_CStruct Member List
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jlink_constants.JLinkJtagIdData_CStruct Class Reference
+
+
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+Inheritance diagram for jlink_constants.JLinkJtagIdData_CStruct:
+
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Inheritance graph
+
[legend]
+
+Collaboration diagram for jlink_constants.JLinkJtagIdData_CStruct:
+
+
Collaboration graph
+
[legend]
+

Detailed Description

+
JLINKARM_EMU_CONNECT_INFO struct
The documentation for this class was generated from the following file:
    +
  • Test/test_script/jlink_constants.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkJtagIdData__CStruct__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkJtagIdData__CStruct__coll__graph.dot new file mode 100644 index 00000000..e3fe4e53 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkJtagIdData__CStruct__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "jlink_constants.JLinkJtagIdData_CStruct" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="jlink_constants.JLinkJtag\lIdData_CStruct",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Structure",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkJtagIdData__CStruct__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkJtagIdData__CStruct__inherit__graph.dot new file mode 100644 index 00000000..e3fe4e53 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JLinkJtagIdData__CStruct__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "jlink_constants.JLinkJtagIdData_CStruct" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="jlink_constants.JLinkJtag\lIdData_CStruct",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Structure",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JlinkArm__Speed__Info__CStruct-members.html b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JlinkArm__Speed__Info__CStruct-members.html new file mode 100644 index 00000000..59e09e07 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JlinkArm__Speed__Info__CStruct-members.html @@ -0,0 +1,82 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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+
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+
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+

Detailed Description

+
JLINKARM_SPEED_INFO struct
The documentation for this class was generated from the following file:
    +
  • Test/test_script/jlink_constants.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JlinkArm__Speed__Info__CStruct__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JlinkArm__Speed__Info__CStruct__coll__graph.dot new file mode 100644 index 00000000..c50bcc6d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JlinkArm__Speed__Info__CStruct__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "jlink_constants.JlinkArm_Speed_Info_CStruct" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="jlink_constants.JlinkArm\l_Speed_Info_CStruct",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="ct::Structure",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JlinkArm__Speed__Info__CStruct__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JlinkArm__Speed__Info__CStruct__inherit__graph.dot new file mode 100644 index 00000000..c50bcc6d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classjlink__constants_1_1JlinkArm__Speed__Info__CStruct__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "jlink_constants.JlinkArm_Speed_Info_CStruct" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="jlink_constants.JlinkArm\l_Speed_Info_CStruct",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="ct::Structure",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classutil_1_1PyTestSuites-members.html b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1PyTestSuites-members.html new file mode 100644 index 00000000..b3ace488 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1PyTestSuites-members.html @@ -0,0 +1,91 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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__init__(self, xmlDir=None) (defined in util.PyTestSuites)util.PyTestSuites
abort_test_suite(self) (defined in util.PyTestSuites)util.PyTestSuites
assume(self, statement, level=1) (defined in util.PyTestSuites)util.PyTestSuites
close_test_suite(self) (defined in util.PyTestSuites)util.PyTestSuites
complete_test_case(self) (defined in util.PyTestSuites)util.PyTestSuites
insert_test_case(self, testName, testClass, testResult=None, file=None) (defined in util.PyTestSuites)util.PyTestSuites
log_test(self, msg) (defined in util.PyTestSuites)util.PyTestSuites
store_log(self, msg) (defined in util.PyTestSuites)util.PyTestSuites
+ +
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+Public Member Functions

+def __init__ (self, xmlDir=None)
 
+def store_log (self, msg)
 
+def log_test (self, msg)
 
+def close_test_suite (self)
 
+def complete_test_case (self)
 
+def insert_test_case (self, testName, testClass, testResult=None, file=None)
 
+def abort_test_suite (self)
 
+def assume (self, statement, level=1)
 
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/util.py
    • +
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__init__(self, logService=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
clear_binding_table(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
close_device_connection(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
close_host_connection(self, hide=None)util.TelnetHostUtil
device_read_until(self, expectStr, timeout) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
device_send(self, cmd, timeout=None, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
device_send_expect(self, cmd, expectStr, timeout=None, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
device_send_no_socket_ret(self, cmd, timeout=None, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
host_send(self, cmd, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
host_send_expect(self, cmd, expectStr, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
is_host_connected(self) (defined in util.TelnetHostUtil)util.TelnetHostUtil
leave_nwk_and_reset_device(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
log(self, msg, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
open_device_connection(self, hostName, hostPort=None, timeout=30, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
open_host_connection(self, hostName=None, hostPort=None, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
reset_device(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
write_log(self, msg, hide=None, logAsResult=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
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+Public Member Functions

+def __init__ (self, logService=None)
 
+def log (self, msg, hide=None)
 
+def open_device_connection (self, hostName, hostPort=None, timeout=30, hide=None)
 
+def close_device_connection (self, hide=None)
 
+def leave_nwk_and_reset_device (self, hide=None)
 
+def reset_device (self, hide=None)
 
+def clear_binding_table (self, hide=None)
 
+def device_read_until (self, expectStr, timeout)
 
+def device_send (self, cmd, timeout=None, hide=None)
 
+def device_send_expect (self, cmd, expectStr, timeout=None, hide=None)
 
+def device_send_no_socket_ret (self, cmd, timeout=None, hide=None)
 
- Public Member Functions inherited from util.TelnetHostUtil
+def open_host_connection (self, hostName=None, hostPort=None, timeout=None, hide=None)
 
+def host_send_expect (self, cmd, expectStr, timeout=None, hide=None)
 
+def host_send (self, cmd, timeout=None, hide=None)
 
+def write_log (self, msg, hide=None, logAsResult=None)
 
+def close_host_connection (self, hide=None)
 Helper methods.
 
+def is_host_connected (self)
 
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/util.py
    • +
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+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetDeviceUtil__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetDeviceUtil__coll__graph.dot new file mode 100644 index 00000000..57612930 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetDeviceUtil__coll__graph.dot @@ -0,0 +1,11 @@ +digraph "util.TelnetDeviceUtil" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="util.TelnetDeviceUtil",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="util.TelnetHostUtil",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classutil_1_1TelnetHostUtil.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="telnetlib::Telnet",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetDeviceUtil__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetDeviceUtil__inherit__graph.dot new file mode 100644 index 00000000..57612930 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetDeviceUtil__inherit__graph.dot @@ -0,0 +1,11 @@ +digraph "util.TelnetDeviceUtil" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="util.TelnetDeviceUtil",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="util.TelnetHostUtil",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classutil_1_1TelnetHostUtil.html",tooltip=" "]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="telnetlib::Telnet",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetHostUtil-members.html b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetHostUtil-members.html new file mode 100644 index 00000000..eab52191 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetHostUtil-members.html @@ -0,0 +1,91 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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util.TelnetHostUtil Member List
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This is the complete list of members for util.TelnetHostUtil, including all inherited members.

+ + + + + + + + + +
__init__(self, logService=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
close_host_connection(self, hide=None)util.TelnetHostUtil
host_send(self, cmd, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
host_send_expect(self, cmd, expectStr, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
is_host_connected(self) (defined in util.TelnetHostUtil)util.TelnetHostUtil
log(self, msg, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
open_host_connection(self, hostName=None, hostPort=None, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
write_log(self, msg, hide=None, logAsResult=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
+ +
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+Public Member Functions

+def __init__ (self, logService=None)
 
+def open_host_connection (self, hostName=None, hostPort=None, timeout=None, hide=None)
 
+def host_send_expect (self, cmd, expectStr, timeout=None, hide=None)
 
+def host_send (self, cmd, timeout=None, hide=None)
 
+def log (self, msg, hide=None)
 
+def write_log (self, msg, hide=None, logAsResult=None)
 
+def close_host_connection (self, hide=None)
 Helper methods.
 
+def is_host_connected (self)
 
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/util.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetHostUtil__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetHostUtil__coll__graph.dot new file mode 100644 index 00000000..acb3ed03 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetHostUtil__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "util.TelnetHostUtil" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="util.TelnetHostUtil",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="telnetlib::Telnet",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetHostUtil__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetHostUtil__inherit__graph.dot new file mode 100644 index 00000000..964454ac --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TelnetHostUtil__inherit__graph.dot @@ -0,0 +1,11 @@ +digraph "util.TelnetHostUtil" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="util.TelnetHostUtil",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="telnetlib::Telnet",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="util.TelnetDeviceUtil",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classutil_1_1TelnetDeviceUtil.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TimeStampUtil-members.html b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TimeStampUtil-members.html new file mode 100644 index 00000000..5e012a70 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TimeStampUtil-members.html @@ -0,0 +1,88 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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util.TimeStampUtil Member List
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__init__(self) (defined in util.TimeStampUtil)util.TimeStampUtil
convert_time_to_readable(self, timeIn) (defined in util.TimeStampUtil)util.TimeStampUtil
get_absolute_time(self) (defined in util.TimeStampUtil)util.TimeStampUtil
get_total_running_time(self) (defined in util.TimeStampUtil)util.TimeStampUtil
update_startUp_time(self) (defined in util.TimeStampUtil)util.TimeStampUtil
+ +
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+Public Member Functions

+def __init__ (self)
 
+def update_startUp_time (self)
 
+def get_absolute_time (self)
 
+def get_total_running_time (self)
 
+def convert_time_to_readable (self, timeIn)
 
+
The documentation for this class was generated from the following file:
    +
  • Test/test_script/util.py
    • +
+
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+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TimeStampUtil__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TimeStampUtil__coll__graph.dot new file mode 100644 index 00000000..6d741191 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TimeStampUtil__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "util.TimeStampUtil" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="util.TimeStampUtil",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TimeStampUtil__inherit__graph.dot b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TimeStampUtil__inherit__graph.dot new file mode 100644 index 00000000..6d741191 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/classutil_1_1TimeStampUtil__inherit__graph.dot @@ -0,0 +1,9 @@ +digraph "util.TimeStampUtil" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="util.TimeStampUtil",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/closed.png b/docs/html/EFR32_ICE60730_Libraries/closed.png new file mode 100644 index 00000000..98cc2c90 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/closed.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/coding__standard_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/coding__standard_8h_source.html new file mode 100644 index 00000000..57679631 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/coding__standard_8h_source.html @@ -0,0 +1,1322 @@ + + + + + + + +IEC_60730: Lib/inc/coding_standard.h Source File + + + + + + + + + +
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coding_standard.h
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1  /******************************************************************************
+
2  * # License
+
3  * <b>Copyright 2023 Silicon Laboratories Inc. www.silabs.com</b>
+
4  *******************************************************************************
+
5  *
+
6  * The licensor of this software is Silicon Laboratories Inc. Your use of this
+
7  * software is governed by the terms of Silicon Labs Master Software License
+
8  * Agreement (MSLA) available at
+
9  * www.silabs.com/about-us/legal/master-software-license-agreement. This
+
10  * software is distributed to you in Source Code format and is governed by the
+
11  * sections of the MSLA applicable to Source Code.
+
12  *
+
13  ******************************************************************************/
+
14 
+
15 /**************************************************************************/
+
272 // #define USER_ASSERT(file, line) user_assert(file, line) /* definition */
+
273 
+
274 void sl_assert(const char *file, int line)
+
275 {
+
276  (void)file; // Unused parameter
+
277  (void)line; // Unused parameter
+
278  // Wait forever until the watchdog fires
+
279  while (1);
+
280 }
+
281 
+
282 #if defined(NDEBUG)
+
283 #define SL_ASSERT(expr)
+
284 #else
+
285 #if defined(USER_ASSERT)
+
286 #define SL_ASSERT(expr) ((expr) ? ((void)0) : USER_ASSERT(__FILE__, __LINE__))
+
287 #else
+
288 #define SL_ASSERT(expr) ((expr) ? ((void)0) : sl_assert(__FILE__, __LINE__))
+
289 #endif
+
290 #endif
+
291 Comment: Below are the steps to overwrite Silicon Labs assert function with a user defined assert.
+
292 
+
293 Define a void user_assert(const char *, int) function
+
294 Uncomment the two lines below (marked "declaration" and "definition").
+
295 assert() is a void function and never return any value. If you like a function to return a value depending on the evaluation of an expression, then feel free to create a new function for that purpose.
+
296 
+
297 3.4 Keywords
+
298 3.4.1 The "volatile" keyword (Recommended)
+
299 Be careful using the volatile keyword. Access to a volatile variable/constant can never be optimized away. Only variable/constants that can have side effects and/or that can change value from outside the embedded application should be declared volatile. Typically Special Function Registers (SFRs) are volatile.
+
300 
+
301 Delay loops using volatile are usually a bad idea since they consume both CPU time and energy. It is better to implement delays with for example timer/counter interrupts. But there are exceptions when using a volatile variable may be favorable, such as:
+
302 
+
303 Very short delays when timer setup and interrupt handling is time consuming, especially when the latency is longer than the delay period itself.
+
304 Applications that are constrained on timer resources.
+
305 As an example, the Gecko "udelay.c" file in kits/common/drivers is a good example of a "busy wait" delay loop, and is used successfully in the Sharp Memory LCD device driver where we need delays of down to 2 microseconds.
+
306 
+
307 3.4.2 The "inline" keyword (Recommended)
+
308 The inline keyword is supported in C99, which is the language standard use for our 32-bit MCUs and Wireless SoCs, but behaves differently compared to inline in C++. Inline was also added/used by some C89/C90 compilers and those implementations might also differ compared to the C99 standard.
+
309 
+
310 So adding inline to your code is usually not a problem. Moving code that uses inline and was built with a C++ or C89/C90 compiler might change the behavior of your application.
+
311 
+
312 For Cortex-Mx devices, use the CMSIS __INLINE macro since this will expand to whatever keyword is used by the supported set of build tools.
+
313 
+
314 3.4.3 The "static" keyword (Recommended)
+
315 For file global variables (variables that are global to a file but not visible outside the file) should always use the static keyword. This should also apply to any functions that are used only within a single file.
+
316 
+
317 Keep in mind the difference between a static variable at the file scope level, and a static variable declared within a function.
+
318 
+
319 Example
+
320 
+
321 // A variable that is only visible within a file
+
322 static uint32_t my_local_variable = 0xFF;
+
323 
+
324 // A function that is used only within a file
+
325 static void do_something(void)
+
326 {
+
327  // ...
+
328 }
+
329 For Cortex-Mx devices, use the CMSIS __STATIC_INLINE macro if you need something to be both static and inline.
+
330 
+
331 3.5 Data Types
+
332 3.5.1 Avoid enums in arrays, structures, or unions (Required)
+
333 This is especially important for aggregate types shared between pre-built libraries (e.g. RAIL) and customer-compiled code (e.g. emlib). The problem is that the size of enums is not standardized, but is compiler-defined. Even within the same compiler, there could be options to select one style vs. another. Libraries built with one compiler or options will not interface properly to non-library code built with a different compiler or options -- field offsets and structure / array sizes could mismatch.
+
334 
+
335 Example
+
336 
+
337 // sl_lib.h include file:
+
338 
+
339 typedef enum {
+
340  SL_LIB_OPTION_A, // 0
+
341  SL_LIB_OPTION_B, // 1
+
342  SL_LIB_OPTION_C, // 2
+
343 } sl_lib_option_t;
+
344 
+
345 typedef struct {
+
346  sl_lib_option_t default_option;
+
347  uint8_t some_other_field;
+
348 } sl_lib_config_t;
+
349 
+
350 extern void sl_lib_init(sl_lib_config_t *config);
+
351 extern void sl_lib_set_options(sl_lib_option_t *option_list, uint32_t option_count);
+
352 
+
353 // sl_lib.c implementation:
+
354 //
+
355 // Built with compiler or options where enums are the smallest type
+
356 // able to represent all of its defined values, so:
+
357 // sizeof(sl_lib_option_t) == 1 (int8_t can represent 0..2)
+
358 // sizeof(sl_lib_config_t) == 2, offsetof(some_other_field) == 1
+
359 
+
360 // Customer application code:
+
361 //
+
362 // This code might be built with compiler or options where enums are
+
363 // of type int (i.e. int32_t on an I32 platform).
+
364 
+
365 #include "sl_lib.h"
+
366 
+
367 const sl_lib_config_t SL_LIB_CONFIG = {
+
368  .default_option = SL_LIB_OPTION_A,
+
369  .some_other_field = 10,
+
370 }
+
371 
+
372 void sl_lib_use_lib(void)
+
373 {
+
374  sl_lib_option_t lib_options[] = { SL_LIB_OPTION_B, SL_LIB_OPTION_C };
+
375 
+
376  // sizeof(SL_LIB_CONFIG) == 8, offsetof(some_other_field) == 4
+
377  sl_lib_init(&SL_LIB_CONFIG);
+
378 
+
379  // sizeof(lib_options) == 8, sizeof(*lib_options) == 4
+
380  sl_lib_set_options(lib_options, sizeof(lib_options)/sizeof(*lib_options));
+
381 }
+
382 3.5.2 Avoid bitfields in structures/unions (Required)
+
383 This is also especially important for aggregate types shared between libraries and customer-compiled code. As with enums, the size and bit layout of bitfields is not standardized, but is compiler-defined or subject to compiler options. Libraries built with one compiler or options will not interface properly to non-library code built with a different compiler or options.
+
384 
+
385 Example
+
386 
+
387 // sl_lib.h include file:
+
388 
+
389 typedef struct {
+
390  bool ena : 1;
+
391  uint8_t some_setting : 5;
+
392 } sl_lib_struct_t;
+
393 
+
394 // Library could be built such that this structure is laid out in a byte:
+
395 // 7 6 5 4 3 2 1 0
+
396 // [ x | x | some_setting |ena]
+
397 // while application could be built such that this structure is laid out
+
398 // across two bytes, or in different endian order:
+
399 // 7 6 5 4 3 2 1 0
+
400 // [ena| x | x | x | x | x | x | x ]
+
401 // [ some_setting | x | x | x ]
+
402 3.6 Variables
+
403 3.6.1 Using global variables (Recommended)
+
404 Minimize use of global variables. It is hard for a compiler to optimize code using them. The compiler (usually) only sees one C file at the time and does not know if the global has been changed between accesses.
+
405 
+
406 A way around this might be to copy the global to a static/auto variable and use the copy in your code.
+
407 
+
408 Global variables can also easily become a source for confusion and errors in the application code as time goes on. As different developers work on the code they might use the global in slightly different ways and accidentally break something in parts of the code they are not working on. This recommendation should be evaluated at an architecture/project level to determine if it applies.
+
409 
+
410 8051 Note: The 8051 compiler will often produce more efficient code when using a project global instead of sharing global data through a handle pointer or other mechanism. This trade-off should be taken into account when writing code targeted for 8051. As much as possible, steps should still be taken to minimize the use of global variables.
+
411 
+
412 3.7 Functions
+
413 3.7.1 Prototype functions (Required)
+
414 Make sure either the full implementation or a prototype precedes any call to a function. For external functions, this should be done by with a #include of the appropriate header.
+
415 
+
416 3.7.2 Functions return data types (Required)
+
417 All functions that can fail should return sl_status_t. The idea is to be as consistent and predictable throughout all of our code base to make it easier for customers to know what to expect from our functions.
+
418 
+
419 There will be functions that will not return sl_status_t. For example, functions returning void; simple "getter" functions that cannot fail or that we don't need to differentiate between error cases; a function checking if a condition is true or false could return a bool; a function adding data to a string or buffer could return the number of bytes added to the string or buffer; or a callback function could return an indicator to let the stack know how to act. Other examples may exist but all of these exceptions should be used sparingly and with good reason. Please check with your team and/or manager before doing so.
+
420 
+
421 In any case, the following requirements must be complied with:
+
422 
+
423 if a function can fail, there must be a clear indication as to how to detect a failure. This is preferrably done through returning sl_status, but having a special 'invalid' value returned in case of failure is also allowed. No matter how this is achieved, it must be documented in the doxygen function header.
+
424 bool must not be returned to indicate success or failure. bool should only be used to indicate if a given condition is true or false. Even then, using an enum should be considered for future-proofing the function, should it need to return more than a true/false value in the future.
+
425 Example
+
426 
+
427 // Don't do:
+
428 bool sl_do_something(sl_type_t *var)
+
429 {
+
430  sl_status_t my_status;
+
431  // [...]
+
432  my_status = sli_do_anything(var);
+
433  // [...]
+
434  if (my_status == SL_STATUS_OK) {
+
435  return true;
+
436  } else {
+
437  return false;
+
438  }
+
439 }
+
440 
+
441 sl_status_t sl_net_is_link_up(bool *is_up)
+
442 {
+
443  // [...]
+
444  *is_up = true;
+
445 }
+
446 
+
447 // Instead do:
+
448 sl_status_t sl_do_something(sl_type_t *var)
+
449 {
+
450  sl_status_t my_status;
+
451  // [...]
+
452  my_status = sli_do_anything(var);
+
453  // [...]
+
454  return my_status;
+
455 }
+
456 
+
457 bool sl_net_is_link_up(void)
+
458 {
+
459  // [...]
+
460  return true;
+
461 }
+
462 
+
463 sl_usbh_action_t sl_usbh_on_device_connection(void)
+
464 {
+
465  // [...]
+
466  return SL_USBH_ACTION_ACCEPT;
+
467 }
+
468 
+
469 sl_usbd_handle_t sl_usbd_get_handle(uint8_t id)
+
470 {
+
471  // [...]
+
472  if (id < max_id) {
+
473  return sli_usbd_handle_table[id];
+
474  } else {
+
475  return SL_USBD_HANDLE_INVALID; //defined to something invalid and properly documented
+
476  }
+
477 }
+
478 3.7.3 Return values should always be checked and propagated (Recommended)
+
479 Values returned by any function should always be checked to see if an error occurred. Such return values should normally be propagated up the callers tree up to the application or to a function that can react to it.
+
480 
+
481 3.7.4 Functions replicating a standard API can follow that API (Recommended)
+
482 If a function aims to replicate a standard API (like strcpy or printf), our version of the function can replicate that standard function's API. These functions do not need to follow our coding standards' directives relating to data types, return values or status. It should still follow our naming convention.
+
483 
+
484 3.8 Macros
+
485 3.8.1 Macros with side-effects (Recommended)
+
486 Macros that may have have side-effects should be function-like and named appropriately.
+
487 
+
488 Example
+
489 
+
490 #define sl_lock() do {__acquire_mutex(&sl_top_level_mutex);} while(0)
+
491 #define sl_unlock() do {__release_mutex(&sl_top_level_mutex);} while(0)
+
492 3.8.2 Macros with statement(s) (Required)
+
493 If a macro expands into one or more full statements, make sure it consumes a subsequent semicolon. Furthermore, multiple-statement macros must be wrapped in a block. These rules ensure that the expanded macro will have the same syntax as a non-compound statement. Otherwise, it may cause undesirable parsing if a customer uses it without braces in a selection (if (...) FOO();) or iteration (while (...) FOO();) statement.
+
494 
+
495 Example
+
496 
+
497 #define SLI_FOO(x, y) \
+
498  do { \
+
499  ga = (x); \
+
500  gb = (y); \
+
501  gc = ga + gb; \
+
502  } while (0)
+
503 
+
504 #define sli_do_nothing() (void)0
+
505 
+
506 void sl_bar(int baz)
+
507 {
+
508  if (baz) {
+
509  SLI_FOO(123, 321);
+
510  } else {
+
511  sli_do_nothing();
+
512  }
+
513 }
+
514 3.8.3 Functional macros with argument(s) (Required)
+
515 Uses of arguments within macros, and the macro body itself, if it is an expression, should be wrapped in parentheses. This avoids problems stemming from unintended precedence groupings. Arguments should be used only once if possible to avoid problems when a statement or expression with side effects is passed.
+
516 
+
517 Note: In general, static inline functions are preferred to macros as they have less weird side-effects and are easier to read.
+
518 
+
519 Example
+
520 
+
521 #define sl_bar(x, y, z) (0xFFFF | ((x) & ((y) | (z))))
+
522 3.9 goto statements
+
523 3.9.1 goto statements should only be used for cleanup purposes or early exit in case of an error, when there is no simple workaround (Required)
+
524 gotos should never be used, except when needing to cleanup (free resources, release a lock, exit a critical section, etc.) in the case an error occurred in the function. If a simple workaround can be used instead of goto, the workaround should be used instead.
+
525 
+
526 Example
+
527 
+
528 // Using goto, if no simple workaround available
+
529 void sli_usb_function(void)
+
530 {
+
531  // Acquire lock
+
532  // [...]
+
533  if (!ok) {
+
534  goto release;
+
535  }
+
536  // [...]
+
537 release:
+
538  // Release lock
+
539 }
+
540 
+
541 // Workaround, whenever possible
+
542 void sli_usb_function(void)
+
543 {
+
544  // Acquire lock
+
545  // [...]
+
546  if (ok) {
+
547  // [...]
+
548  }
+
549  // Release lock
+
550 }
+
551 3.9.2 gotos should only refer to a label declared after them (Required)
+
552 A goto statement should only refer to a label declared after (below) them, in the code.
+
553 
+
554 No goto shall ever cause the code to go back "up", it should always jump "down", towards the end of the function.
+
555 
+
556 Example
+
557 
+
558 // Don't do:
+
559 void sli_usb_function(void)
+
560 {
+
561  // [...]
+
562 loop_start:
+
563  // [...]
+
564  if (loop) {
+
565  goto loop_start;
+
566  }
+
567 }
+
568 
+
569 // Instead do:
+
570 void sli_usb_function(void)
+
571 {
+
572  // Acquire lock
+
573  // [...]
+
574  if (!ok) {
+
575  goto release;
+
576  }
+
577  // [...]
+
578 release:
+
579  // Release lock
+
580 }
+
581 3.9.3 gotos should only refer to a static label located in the same function (Required)
+
582 No computed goto statement (as available in some GCC extensions) shall be used. setjmp and longjmp should never be used. The label referred to by a goto statement needs to be in the same function as the goto statement itself.
+
583 
+
584 3.9.4 Any label referenced by a goto need to be declared in the same block or a block enclosing the goto (Required)
+
585 goto statements and labels should not be used to jump between blocks, as it can easily lead to unstructured code. goto should not be used either to jump between cases of a switch.
+
586 
+
587 Example
+
588 
+
589 // Don't do:
+
590 void sli_usb_function(uint8_t bar)
+
591 {
+
592  if (bar > 0) {
+
593  goto label;
+
594  }
+
595  // [...]
+
596  goto label;
+
597  // [...]
+
598  if (foo > 0) {
+
599 label:
+
600  // [...]
+
601  }
+
602 }
+
603 
+
604 // Instead do:
+
605 void sli_usb_function(uint8_t bar)
+
606 {
+
607  // [...]
+
608  goto label;
+
609  // [...]
+
610  if (bar > 0) {
+
611  goto label;
+
612  }
+
613  // [...]
+
614 label:
+
615  // [...]
+
616 }
+
617 
+
618 // Don't do:
+
619 void sli_usb_function(uint8_t bar)
+
620 {
+
621  switch(bar) {
+
622  case 1:
+
623  if (x == y) {
+
624  goto label;
+
625  }
+
626  break;
+
627 
+
628  case 2:
+
629  doThat();
+
630 label:
+
631  doTheOtherThing();
+
632  break;
+
633 
+
634  default:
+
635  break;
+
636  }
+
637 }
+
638 3.10 Libraries
+
639 3.10.1 Dependencies (Required)
+
640 Be conscious about what code the library depends on. To avoid excessive code footprint, we must be aware of what external functions each library pulls in. E.g. the printf and sprintf functions are better avoided within a library as they require a large footprint
+
641 
+
642 Exception: They can be used for generating debug information as long as they are conditionally compiled in with a flag that defaults to false).
+
643 
+
644 3.10.2 Including third party code (Required)
+
645 For all open source or third party software that we include in our software releases, we need to have an acceptable license that allows us to do so. That means we need to send an email to our legal department (DL.Legal) and ask for permission before introducing new open source software into our distributions. Consult the Software Manager before including any third party software code intended to be released.
+
646 
+
647 3.10.3 Configuring libraries in source form (Required)
+
648 The customer should never have to change the original source files to configure the library (this creates problems when upgrading the library to a newer version, and also makes it impossible to have two projects with different configuration settings using the same instance of the library). Instead, it should be possible to set all configurations settings from the customer's application project. Normally this can be done with macros that allow a customer to configure library settings from within the application.
+
649 
+
650 Example
+
651 
+
652 #if !defined(EM_SETTING) // If EM_SETTING is not defined by user,
+
653 #define EM_SETTING default_value_for_em // then we set our default value/function.
+
654 #endif
+
655 3.10.4 Configuring libraries in binary form (Recommended)
+
656 If a library is provided in binary form, then macros cannot be used for configuration settings.
+
657 
+
658 A good alternative is to use callback functions or static variables. Callbacks might not be appropriate for 8-bit code, so use your judgment.
+
659 
+
660 Example
+
661 
+
662 // We call sl_custom_configuration_callback() from our library to get the
+
663 // user defined configuration.
+
664 //
+
665 int configuration = sl_custom_configuration_callback();
+
666 
+
667 // The user have to define sl_custom_configuration_callback() and return a
+
668 // valid configuration for the application.
+
669 //
+
670 int sl_custom_configuration_callback(void)
+
671 {
+
672  return OPT_SIZE | MAX_BUF_SIZE;
+
673 }
+
674 Comment: sl_custom_configuration_callback is defined in user application and returns different values depending on the user implementation.
+
675 
+
676 Example
+
677 
+
678 // We initialize configuration with a sensible default that is suitable
+
679 // for the largest number of applications
+
680 //
+
681 int configuration = SL_DEFAULT_CONFIGURATION;
+
682 
+
683 // The user application can customize the behavior by calling
+
684 // sl_set_configuration
+
685 //
+
686 void sl_set_configuration(int user_config)
+
687 {
+
688  configuration = user_config;
+
689 }
+
690 3.11 Misc
+
691 3.11.1 Avoid embedding assignments in expressions (Recommended)
+
692 Embedding assignments in expressions makes for all kinds of wacky bugs. When scanning some code it is easy to miss that a complicated expression contains an assignment deep inside.
+
693 
+
694 Example
+
695 
+
696 ++ceiling;
+
697 *handle = ceiling;
+
698 Comment: The above is easy to understand, hard to get wrong and most compilers today will generate the same optimized code that that example as it will for the below code;
+
699 
+
700 *handle = ++ceiling;
+
701 4 Coding style and formatting
+
702 4.1 General formatting
+
703 4.1.1 Use spaces, not tabs (Required)
+
704 For indenting files, use spaces and never tabs. A mix of tabs and spaces is never acceptable.
+
705 
+
706 4.1.2 Indents are 2 spaces per level (Required)
+
707 Indent each nested level with 2 spaces of indent.
+
708 
+
709 4.1.2.1 Preprocessor indentation (Recommended)
+
710 Preprocessor directives historically have not been indented, but they may be indented to make them less distracting to the module's code flow (though the technique described in the section 3.2.2 offers an even cleaner alternative where it makes sense). When indented, the # should remain attached to the directive and not remain in the first column -- no modern preprocessor still requires the # be in the first column. When an #if or #ifdef is indented, its #else, #elif, and #endif shall also be identically indented. The code between the preprocessor directives may also be indented.
+
711 
+
712 Example
+
713 
+
714 void sl_set_xyz_option(xyz_option_t xyz_option)
+
715 {
+
716  #if defined( _XYZ_LFCCLKEN0_MASK ) // XYZ supports LFC clock
+
717  if (xyz_option == xyz_clock_lfc) {
+
718  xyz_clock_set_lfc();
+
719  return;
+
720  }
+
721  #endif
+
722  #if defined( _XYZ_LFECLKSEL_MASK ) // XYZ supports LFE clock
+
723  if (xyz_option == xyz_clock_lfe) {
+
724  xyz_clock_set_lfe();
+
725  return;
+
726  }
+
727  #endif
+
728 }
+
729 4.1.3 Lines should not be longer than 80 characters (Recommended)
+
730 We enforce an 80 characters limit per line of source code. This lets people set up their editors such that they can have multiple editors side-by-side. Although 80 characters are little by modern standards, it mixes well with existing code.
+
731 
+
732 4.1.4 Line endings (Required)
+
733 We use line ending normalization in our repositories. This means that all text files are converted to '\n' line endings when they are stored in git. However most customers are using Windows operating system which expects a CRLF line ending. Therefore, with rare exception, all source code delivered to customers should have CRLF (DOS) line endings. There are two ways to accomplish this. First, if you are using a Windows host operating system, set your git autocrlf setting as follows:
+
734 
+
735 core.autocrlf true
+
736 This will ensure all text files have DOS line endings when checked out from the repository.
+
737 
+
738 The second method is to use a release script that forces all text file line endings to CRLF when a source code release package is built by the release script.
+
739 
+
740 Exceptions: if the source code is intended for a system that >use normal line endings, for example a OS X or Linux system, then >the source line endings can be left as '\n'.
+
741 
+
742 Note: All repositories should include a .gitattributes file to explicitly specify file types for line endings.
+
743 
+
744 4.1.5 Use only plain ASCII or UTF-8 (Required)
+
745 Text files should almost always contain only plain ASCII. Specifically, avoid characters outside the usual whitespace and printable ones (0x9-0xD and 0x20-0x7E, inclusive). Internationalized strings, when used, are best placed in a resource file.
+
746 
+
747 In the rare case that other characters are needed in a text file and cannot be escaped, the file should be UTF-8 encoded with no byte-order mark.
+
748 
+
749 4.1.6 Use ISO8601 formatting for dates (Required)
+
750 If you use a date in the comments or elsewhere, specify it using the unambiguous ISO8601 format, i.e. 2013-11-26.
+
751 
+
752 4.1.7 Inserting empty and blank lines (Required)
+
753 There should never be consecutive blank rows.
+
754 
+
755 Use two slashes (C++ comment) and 77 dashes to separate logical parts of the code. Use 2 slashes and 32 dashes for minor sections. Use of section separators as shown here is optional.
+
756 
+
757 Example
+
758 
+
759 // -----------------------------------------------------------------------------
+
760 // Here we start a new logical part in this source/header file...
+
761 
+
762 // -------------------------------
+
763 // And here comes a new minor section...
+
764 4.1.8 Use parentheses liberally (Required)
+
765 Add parentheses if you have any doubt at all about precedence, not doing so has led to some very obscure bugs. This is especially true of the bitwise binary operators {&, |, ^} and Boolean operators {&&, ||}.
+
766 
+
767 4.1.9 Break up long expressions (Required)
+
768 Whenever there are long expressions, it should be broken into multiple lines. When a line is broken into multiple lines, each line should start with the operator that operates on that full line (single element or a group of elements within parentheses). The operator must be the first thing on the line, and it should be indented appropriately.
+
769 
+
770 Example
+
771 
+
772 int bitmask = (OPTION_1
+
773  | OPTION_2
+
774  | (IS_THIS_SET
+
775  ? OPTION_3
+
776  : OPTION_4));
+
777 
+
778 int bitmask = (OPTION_1
+
779  | OPTION_2
+
780  | (IS_THIS_SET ? OPTION_3 : OPTION_4));
+
781 
+
782 int bitmask = (OPTION_1
+
783  | OPTION_2
+
784  | (OPTION_3 & OPTION_4));
+
785 Comment: All the above are examples of nicely formatted long expressions.
+
786 
+
787 Below is an example how you should not format long and complex expressions.
+
788 
+
789 // Avoid this...
+
790 int no_good_formatting = (OPTION_1
+
791  | OPTION_2
+
792  | OPTION_3 & OPTION_4);
+
793 4.1.10 goto labels should be on column 1 (Required)
+
794 Labels referred to by gotos need to be located at column 1, disregarding any indentation.
+
795 
+
796 Example
+
797 
+
798 // Don't do:
+
799 void sli_usb_function(void)
+
800 {
+
801  // Acquire lock
+
802  // [...]
+
803  if (!ok) {
+
804  goto release;
+
805  }
+
806  // [...]
+
807  release:
+
808  // Release lock
+
809 }
+
810 
+
811 // Instead do:
+
812 void sli_usb_function(void)
+
813 {
+
814  // Acquire lock
+
815  // [...]
+
816  if (!ok) {
+
817  goto release;
+
818  }
+
819  // [...]
+
820 release:
+
821  // Release lock
+
822 }
+
823 4.2 Commenting code (Required)
+
824 4.2.1 Use C++ style comments ("//")
+
825 All inline code comments should use the C++ style //. However there are two exceptions to this rule. First, function and file documentation blocks use a different style (see documentation section below).
+
826 
+
827 Second, for multi-line macros using #define, C style comments /* ... */ should be used for embedded comments (see example below).
+
828 
+
829 For both kinds of comments, there should be a space following the opening comment marker. For example // My comment.
+
830 
+
831 Make sure constant values in the code are explained. Function calls with raw constants should be labeled based on the parameter that is being passed in.
+
832 
+
833 Example
+
834 
+
835 // Example for the exception
+
836 // This type is needed because using // would swallow the line continuation marker.
+
837 #define MY_CLI_COMMANDS \
+
838  /* This command takes 3 arguments: */ \
+
839  /* Node ID - a 2-byte node ID destination */ \
+
840  /* Endpoint - a 1-byte node ID */ \
+
841  /* Cluster - a 2-byte cluster ID */ \
+
842  { "my_command", my_command_function, "vuv" },
+
843 
+
844 // Example of how to comment constant values.
+
845 // For the function declaration below
+
846 void function(int seconds, boolean print_output);
+
847 
+
848 // we add comments after each parameter (OPTIONAL)
+
849 function(0, // seconds
+
850  FALSE); // print_output
+
851 4.3 Bracing style (Required)
+
852 Use the so called "One True Brace Style" (see [https://en.wikipedia.org/wiki/Indent_style#Variant:_1TBS]) Indent increases one level after an opening brace, and decreases one level before a closing brace. Opening braces do not go on their own separate line, except for free standing blocks and function definitions. Closing braces are on their own separate line with nothing else on these lines.
+
853 
+
854 All if/else/while/for/do-while blocks must be enclosed by braces, even if there is only one statement in the block.
+
855 
+
856 Exceptions for the above rule are;
+
857 
+
858 The typedef alias for a composite (struct/union) or enum type is on the same line as the closing brace.
+
859 In a do-while loop the condition (while (...);) is on the same line as the closing brace.
+
860 else and else if are on the same line as the closing brace.
+
861 Example
+
862 
+
863 void sl_do_something(uint8_t bar)
+
864 {
+
865  if (foo > bar) { // The preceding brace is *required*
+
866  do_this();
+
867  } else if (for < bar) {
+
868  do_that();
+
869  } else {
+
870  do_another_thing();
+
871  }
+
872 
+
873  if (foo > bar) {
+
874  do_this();
+
875  }
+
876 
+
877  while (1) {
+
878  }
+
879 
+
880  do {
+
881  sli_do_work();
+
882  } while (foo);
+
883 }
+
884 
+
885 typedef enum {
+
886  SL_CARD_SPADE,
+
887  SL_CARD_HEART,
+
888  SL_CARD_CLUB,
+
889  SL_CARD_DIAMOND
+
890 } sl_card_suit_t;
+
891 4.4 Switch statements and labels
+
892 4.4.1 Using labels (Required)
+
893 Switch-case labels should be indented as any other line of code would be.
+
894 
+
895 Example
+
896 
+
897 if (foo) {
+
898  sl_bsp_set_leds(0xff00);
+
899 
+
900  testing:
+
901 
+
902  sl_bsp_set_leds(0x00ff);
+
903 }
+
904 4.4.2 Labels with block (Required)
+
905 If a block is desired after a label, then the opening brace should be by itself on the line following the label, at the same indentation.
+
906 
+
907 The closing brace should be on a line by itself after the last statement in the block, at the same indent level as the opening brace.
+
908 
+
909 Example
+
910 
+
911 if (foo) {
+
912  sl_bsp_set_leds(0xff00);
+
913 
+
914  testing:
+
915  {
+
916  sl_bsp_set_leds(0x00ff);
+
917  sl_bsp_set_leds(0x0000);
+
918  }
+
919 }
+
920 4.4.3 Switch statements (Required)
+
921 The cases in switch statements should be indented one level from the enclosing braces. Separate case blocks with a blank line after each break;. All switch statements should include a default block unless there is a good reason not to. The default block can collapse into one of the other cases but it should clearly show what happens when there is no matching case. Finally, if a case block does not end with an unconditional jump, there should be a comment clearly stating that the code is intentionally meant to fall through.
+
922 
+
923 Example
+
924 
+
925 switch(baz) {
+
926  case 1:
+
927  sli_do_this();
+
928  break;
+
929 
+
930  case 2:
+
931  sli_do_that();
+
932  // This case is meant to fall through to the next
+
933 
+
934  case 3: {
+
935  sli_do_the_other_thing();
+
936  break;
+
937  }
+
938 
+
939  case 0:
+
940  default:
+
941  sli_do_what();
+
942  break;
+
943 }
+
944 4.5 Functions, operators and C keywords
+
945 4.5.1 Listing function parameters (Required)
+
946 Whenever there is a list of function parameters, they should all fit on a single line or be listed one parameter per line. If listed on separate lines, each parameter has the same indent level as the first parameter.
+
947 
+
948 Example
+
949 
+
950 void sl_do_something(int a,
+
951  int b,
+
952  int c,
+
953  const char *string1,
+
954  const char *string2)
+
955 {
+
956  // ...
+
957 }
+
958 
+
959 void sl_do_something2(int a, int b, int c)
+
960 {
+
961  // ...
+
962 }
+
963 4.5.2 Using function parentheses (Required)
+
964 For function declarations, definitions and calls, there shall be no spaces before or after the opening parentheses, or before the closing parentheses.
+
965 
+
966 Example
+
967 
+
968 int sl_foo(int days, int seconds);
+
969 // ...
+
970 ret = sl_foo(days, seconds);
+
971 4.5.3 Binary and ternary operators (Required)
+
972 Use spaces around binary & ternary operators in expressions. C expressions are hard enough to parse without running them altogether.
+
973 
+
974 Example
+
975 
+
976 for (j = 0; j < parameter_sizes[i]; j++) {
+
977 4.5.4 Use a single space after C keywords (Required)
+
978 C keywords (ex. for, switch, while, if, do) – should have a single space after the keyword.
+
979 
+
980 Example
+
981 
+
982 while (counter < UART_MAX_IO_BUFFER) {
+
983 4.5.5 Additional space within expressions
+
984 Use of additional whitespace within expressions to improve readability is permitted as long as it doesn't interfere with appropriate multi-line expression indentation. Such style should be consistent within the module.
+
985 
+
986 4.5.6 Identify do-nothing code (Recommended)
+
987 Avoid loops that do not make it obvious that they do nothing. Add a comment to explain the reason for the do-nothing loop. This applies to any code that does not do anything.
+
988 
+
989 Example
+
990 
+
991 // Don't do:
+
992 while (waiting_for_something);
+
993 
+
994 // Instead do:
+
995 // Useful comment explaining why you are waiting
+
996 while (waiting_for_something);
+
997 4.5.7 Pointer asterisk position (Required)
+
998 When declaring a pointer to a variable, the pointer asterisk should be placed together with the variable name, not together with the type.
+
999 
+
1000 Example
+
1001 
+
1002 // Don't do:
+
1003 char* c = (char*)a;
+
1004 void sl_foo(uint32_t* bar);
+
1005 
+
1006 // Instead do:
+
1007 char *c = (char *)a;
+
1008 void sl_foo(uint32_t *bar);
+
1009 4.5.8 Don't mix pointer and value type declarations (Required)
+
1010 Don't mix declarations of pointer type variables and value type variables on the same line.
+
1011 
+
1012 Example
+
1013 
+
1014 // Don't do:
+
1015 uint32_t *a, b;
+
1016 
+
1017 // Instead do:
+
1018 uint32_t *a;
+
1019 uint32_t b;
+
1020 4.6 Naming
+
1021 4.6.1 General Considerations
+
1022 4.6.1.1 Use meaningful names (Required)
+
1023 Special care should be taken when naming anything. The name should convey the purpose of the construct as clearly as possible.
+
1024 
+
1025 4.6.1.2 Avoid abbreviations (Required)
+
1026 In general, use long names and avoid unclear abbreviations and other cryptic notations.
+
1027 
+
1028 Prefixes such as sl_ and sli_ are exceptions to this rule and therefore can and need to be used where appropriate.
+
1029 
+
1030 4.6.2 Namespaces (Required)
+
1031 All constructs will have a prefix, with the exception of function parameters, variables local to a function and structure fields.
+
1032 
+
1033 The purpose of using namespace prefixes is to prevent namespace collisions and not necessarily for branding.
+
1034 
+
1035 The prefix will be the same for all constructs, it will only change based on whether that construct is public (can be used by end users), internal (can only be used from within Silicon Labs code) or static (local to a file).
+
1036 
+
1037 If a construct is public, it should be prefixed by sl_.
+
1038 
+
1039 If a construct is internal, it should be prefixed by sli_.
+
1040 
+
1041 For example, this means that no public function would refer to either a private or internal type in one of their parameters.
+
1042 
+
1043 Those constructs' names should then be followed by a <module>_ prefix, that can consists of either one or two words, separated by an underscore. For example, this could be uart_ or usbd_msc_. The <module>_ prefix can be omitted if the code is intended to be common code used by any other module and is placed in platform/common or a similar common location.
+
1044 
+
1045 Constants and macros will use capitalized version of these prefixes (SL_, SLI_ and <MODULE>_).
+
1046 
+
1047 As previously stated, function parameters, variables local to a function and structure fields will be prefixed by neither the sl[i]/SL[I] nor the _/ prefix.
+
1048 
+
1049 If a construct is static or in any way local to a single file, it is not required to have any prefix at all. If it has some kind of prefix, it should not use anything starting with sl.
+
1050 
+
1051 Example
+
1052 
+
1053 // File-local
+
1054 #define SLI_READY 0x0020
+
1055 
+
1056 static uint8_t next_transmit;
+
1057 
+
1058 static urb_t transmit_buffer(uint8_t *buffer);
+
1059 
+
1060 typedef struct {
+
1061  uint8_t urb_size; // Struct fields do not have any prefix.
+
1062  uint8_t *urb_list_next;
+
1063  uint16_t array[10];
+
1064 } urb_t;
+
1065 
+
1066 // Internal-only
+
1067 #define SLI_UNUSED_PARAMETER(param) (void)(param)
+
1068 
+
1069 const unsigned int SLI_MAX_UART_CONNECTIONS = 3;
+
1070 
+
1071 sl_usbd_endpoint sli_usbd_msc_endpoint; // Internal variable using public type.
+
1072 
+
1073 typedef struct {
+
1074  uint8_t time_ms;
+
1075  uint8_t *longer_blah_ptr;
+
1076 } sli_usbd_msc_cnt_t;
+
1077 
+
1078 void sli_usbd_msc_tx_endpoint(sli_usbd_msc_cnt_t *buffer,
+
1079  uint8_t count);
+
1080 
+
1081 void sli_usbd_msc_tx_endpoint(sli_usbd_msc_cnt_t *buffer,
+
1082  uint8_t count)
+
1083 {
+
1084  uint8_t flag; // Local variable does not have any prefix.
+
1085  urb_t urb; // Referring to static type from within public function is ok.
+
1086 }
+
1087 
+
1088 // Public
+
1089 
+
1090 #define SL_CREATE_HANDLE(node, id) (node).flag = ((id) | 0xFF00)
+
1091 
+
1092 const unsigned int SL_USBD_VERSION = 20200;
+
1093 
+
1094 sl_uart_channel_t sl_uart_channels_list[10];
+
1095 
+
1096 sl_time_t sl_get_time(void);
+
1097 
+
1098 typedef struct {
+
1099  uint32_t hour;
+
1100  uint32_t minute;
+
1101  uint32_t second;
+
1102 } sl_time_t;
+
1103 4.6.3 Naming (Required)
+
1104 The following section (4.6.3.*) contains information on how to name anything. This acts as a default, if nothing more specific exists for a particular construct. In general, construct-specific standards should be avoided.
+
1105 
+
1106 4.6.3.1 Casing (Required)
+
1107 Every construct's name needs to be all lower-case, with each word or abbreviation separated by an underscore. This is also known as snake case.
+
1108 
+
1109 Example
+
1110 
+
1111 // Global variable
+
1112 uint8_t sl_uart_char; // Publicly available
+
1113 uint8_t sli_usbd_endpoint_buffer[32]; // Internal use only
+
1114 
+
1115 // File-local variable
+
1116 static sl_usbd_urb_t *urb_list_head;
+
1117 
+
1118 // Functions
+
1119 void sl_led_turn_on(void);
+
1120 void sli_nvic_set_priority(ADC_IRQ);
+
1121 
+
1122 // Data types
+
1123 typedef uint32_t sli_kernel_flags_t;
+
1124 typedef struct {
+
1125  uint8_t *data_start;
+
1126 } sl_usbd_urb_t;
+
1127 4.6.3.2 Casing and acronyms (Required)
+
1128 Acronyms and abbreviations are treated like any other word. Do not put in lower-case or upper-case some or all letters of an abbreviation, even if it is normally written that way. Instead, comply with the standard about that particular construct and treat acronyms as a regular word.
+
1129 
+
1130 Example
+
1131 
+
1132 static sl_usbd_urb_t *urb_list_head;
+
1133 
+
1134 sl_led_turn_on();
+
1135 
+
1136 sl_irq_priority_t irq_priority = sl_nvic_get_priority(ADC_IRQ);
+
1137 4.6.4 Naming functions and variables
+
1138 4.6.4.1 Functions and variables names have the form verb_noun (Required)
+
1139 When a verb and a noun the verb acts on are in a function name, the verb should come first (xxxx_get_power, not xxxx_power_get). It should feel natural to read the name. Most functions should contain both a verb and a noun and therefore need to follow this rule. Notable exceptions are functions that are callbacks, interrupt handlers and tasks, which typically do not have a verb. These functions follow their own naming convention, as stated in 4.6.4.5, 4.6.4.6 and 4.6.4.7, respectively.
+
1140 
+
1141 Variables and functions of boolean type should use a naming style indicating the sense of the boolean. For example sl_usbd_device_is_connected.
+
1142 
+
1143 Example
+
1144 
+
1145 // This is for legacy EM code and does not apply to 8051
+
1146 // code base.
+
1147 
+
1148 sl_get_power(); // Call to a new-style API function.
+
1149 
+
1150 // Below is an example of how to redefine old style API calls to the new syntax.
+
1151 #if (SLAB_OLD_API == SLAB_REPLACE_OLD_API_CALLS)
+
1152 #define power_get sl_get_power
+
1153 #define power_set sl_set_power
+
1154 #endif
+
1155 4.6.4.2 Function parameters should not have any prefix (Required)
+
1156 Do not prefix any function parameter with any sl_, sli_ or <module>_ prefix.
+
1157 
+
1158 4.6.4.3 Function-local variables should not have any prefix (Required)
+
1159 Do not prefix any function-local variable with any sl_, sli_ or <module>_ prefix.
+
1160 
+
1161 4.6.4.4 Variable and Function Names Indicate Units for Time (Required)
+
1162 When a variable is used for time, it must include the units in the name. When a function returns a value that is used for time it must include units in the name. This is important to prevent problems with accidentally utilizing one unit of time in a function or variable that takes a different unit of time.
+
1163 
+
1164 Variables and function names may either use abbreviations or spell out the units. If abbreviations are used, the following shall be the abbreviations:
+
1165 
+
1166 Full Name Abbreviation (if applicable)
+
1167 Years Years
+
1168 Days Days
+
1169 Hours Hours
+
1170 Minutes Minutes
+
1171 Seconds Sec
+
1172 Milliseconds Ms
+
1173 Microseconds Us
+
1174 Nanoseconds Ns
+
1175 Example
+
1176 
+
1177 #define SLI_JITTER_DELAY_MS 100
+
1178 
+
1179 static void restart_discovery_after_delay(uint8_t delay_ms);
+
1180 
+
1181 uint8_t sli_get_discovery_time_remaining_ms(void);
+
1182 
+
1183 4.6.4.5 Functions/stubs called on specific events/callbacks should start 'on' in their name (Required)
+
1184 Whenever a function is called to indicate an event occurred, or is called in 'reaction' to an event happenning, this function should have on in its name, directly after the <module>_ prefix. This also applies to callbacks or function stubs shipped to the user.
+
1185 
+
1186 Example void sl_usb_on_device_connection(void);
+
1187 
+
1188 void sl_kernel_on_task_deletion(void);
+
1189 
+
1190 static void on_transmit_completed(void);
+
1191 4.6.4.6 Interrupt handlers should be suffixed by 'IRQHandler' or 'irq_handler' (Required)
+
1192 If a function is an interrupt handler, it should either be suffixed by IRQHandler if it needs to follow CMSIS' format or by irq_handler if it doesn't (for example, if an interrupt source is shared and multiplexed) between several handlers.
+
1193 
+
1194 Example void RTCC_IRQHandler(void);
+
1195 
+
1196 void sl_gpio_irq_handler(void);
+
1197 4.6.4.7 Non-blocking functions executed periodically in a main loop should be suffixed by 'step' (Required)
+
1198 If a non-blocking function (a function that doesn't pend or delay before returning) needs to be called periodically in order to check if it has something to process and then process what it can, this function needs to be suffixed with step, to indicate it executes a single round of processing. It should not be called tick, since tick can lead to confusion with timer or OS ticks.
+
1199 
+
1200 Example void sl_cli_step(void);
+
1201 
+
1202 void sli_usb_msc_step(void);
+
1203 4.6.4.8 Functions that are tasks should be suffixed by 'task' (Required)
+
1204 If a function is a task (in an OS environment), this function needs to be suffixed with task, to indicate it is a task and needs to loop indefinitely and never return.
+
1205 
+
1206 Example void sl_cli_task(void *task_argument);
+
1207 
+
1208 void sli_usb_task(void *task_argument);
+
1209 4.6.5 Naming constants
+
1210 4.6.5.1 Constants should use upper case (Required)
+
1211 All constants should be named and use upper case letters. Avoid raw numbers in code. This includes #defines constants, const variables and enum values.
+
1212 
+
1213 All #defines that are intended to be used by applications (customers) and part of the API need to be prefixed by SL_. This includes #defines in configuration files.
+
1214 
+
1215 All #defines that are local to a C file or private to our products (not intended to be used by applications; present in a private header file) need to be prefixed by SLI_. This is to prevent name clashes with compiler defines (with -D) that could be specified by the user when building our source files.
+
1216 
+
1217 Example
+
1218 
+
1219 #define SLI_NET_ARP_FLAG 0x0040
+
1220 const unsigned int SL_MAX_UART_CONNECTIONS = 3;
+
1221 
+
1222 typedef enum {
+
1223  SL_USBH_HC_TYPE_LIST,
+
1224  SL_USBH_HC_TYPE_PIPE
+
1225 } sl_usbh_hc_type_t;
+
1226 4.6.6 Naming function-like macros
+
1227 4.6.6.1 Follow the naming convention for regular functions (Required)
+
1228 Functional macros that can be used in the same way as functions follow the same naming conventions as regular functions.
+
1229 
+
1230 4.6.6.2 Use all caps for macros that can't be functions (Required)
+
1231 All caps with underscores are used for macros that cannot be made into semantically equivalent functions.
+
1232 
+
1233 Example
+
1234 
+
1235 // This is a macro function that can be used as a regular function.
+
1236 #define sl_uart_init_default_uart(x) init_uart(UART0, (x))
+
1237 
+
1238 // This is a macro function that cannot be used as a function.
+
1239 #define SL_SOME_NUMBERS(x) {(x), ((x)+(x)), ((x)*(x))}
+
1240 4.6.7 Naming types
+
1241 4.6.7.1 Public typedefs (Required)
+
1242 Each typedef must end with a '_t' suffix and cannot start with 'int', 'uint' or 'unicode'.
+
1243 
+
1244 4.6.7.2 Structure fields should be snake_case, without any prefixes (Required)
+
1245 There should not be any prefix (no sl_ and no <module>_) in the name of any structure field.
+
1246 
+
1247 Example
+
1248 
+
1249 // Don't do
+
1250 typedef struct
+
1251 {
+
1252  uint32_t sl_nvm_page_header_offset;
+
1253  uint32_t sl_nvm_page_header_size;
+
1254 } sl_nvm_page_header_t;
+
1255 
+
1256 // Instead do:
+
1257 typedef struct
+
1258 {
+
1259  uint32_t offset;
+
1260  uint32_t size;
+
1261 } sl_nvm_page_header_t;
+
1262 4.6.7.3 Type from typedef (Optional)
+
1263 If the type is a typedef, you can optionally add a type name if there is a reason the anonymous type does not work. In this case use the same name as the typedef name, without the '_t'.
+
1264 
+
1265 Example
+
1266 
+
1267 // Anonymous structure name ...
+
1268 // Use this style in most cases.
+
1269 typedef struct
+
1270 {
+
1271  // ...
+
1272 } sl_nvm_page_header_t;
+
1273 
+
1274 // You can use this style if the struct needs a name.
+
1275 typedef struct sl_nvm_page_header
+
1276 {
+
1277  // ...
+
1278 } sl_nvm_page_header_t;
+
1279 4.6.8 Files and directory structure
+
1280 4.6.8.1 Filenames and directories use lower case (Required)
+
1281 All file names are lower case and multiple words are separated with one underscore '_'.
+
1282 
+
1283 Example
+
1284 
+
1285 sl_packet_buffer.c
+
1286 4.6.8.2 Avoid duplicate filenames
+
1287 Avoid using the same file name for source files.
+
1288 
+
1289 Note: Among our entire source code there will be files with the same name. This cannot be avoided. But files with the same name should never be used in the same project/build.
+
1290 
+
1291 4.6.8.3 File names (Required)
+
1292 File names (both for library and source) should include the namespace prefix of the module as well as the sl_ (no distinction made with sli for internal files) prefix. This includes configuration files.
+
1293 
+
1294 Example
+
1295 
+
1296 sl_simple_mpu.c
+
1297 sl_status.h
+
1298 sl_sleeptimer_config.h
+
1299 4.6.8.4 Directory names (Required)
+
1300 Directories use lower case names and underscores as word separators. Subfolder names do not need to be unique.
+
1301 
+
1302 4.6.9 UC-Instantiable components
+
1303 The following section (4.6.9.*) defines naming format for UC-Instantiable component related information (configuration files, macros and handles)
+
1304 
+
1305 4.6.9.1 Configuration file names (Required)
+
1306 The configuration files for every instance of an instantiable component must have the following format: sl_<module>_<type>_<instance_name>_config.h
+
1307 
+
1308 Example
+
1309 
+
1310 // instance_name - vcom
+
1311 sl_iostream_usart_vcom_config.h
+
1312 // instance_name - btn0
+
1313 sl_simple_button_btn0_config.h
+
1314 4.6.9.2 Configuration macros (Required)
+
1315 The configuration macros for the instantiable components must have the following format: SL_<module>_<type>_<instance_name>_CFG_VAL
+
1316 
+
1317 Example
+
1318 
+
1319 // instance_name - vcom
+
1320 #define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200
+
1321 // instance_name - btn0
+
1322 #define SL_SIMPLE_BUTTON_BTN0_POLARITY 0
+
1323 4.6.9.3 Instance handles (Required)
+
1324 The handles for the instantiable components must have the following format: sl_<module>_<instance_name>
+
1325 
+
1326 Example
+
1327 
+
1328 sl_iostream_vcom
+
1329 sl_button_btn0
+
1330 5 Documentation
+
1331 5.1 General
+
1332 Write documentation so that others can easily pick up the code. It makes life easier for everyone. In particular, it makes supports job a lot easier as it will generate less support requests.
+
1333 
+
1334 5.2 Comments should answer the question "Why?" (Required)
+
1335 Write comments that say why the code is the way it is. What the code does, and how it does it, can usually be figured out from the code itself. Why it does it, and why it does it the way that it does, cannot. If you write it the obvious way, and it doesn't work, explain in a comment why it didn't. Otherwise the next person to come along is going to convert it back to the obvious method and have to learn the same painful lesson (or even worse, force you to relearn it).
+
1336 
+
1337 There needs to be enough documentation that a peer can read and understand the code without having to ask the author for explanations. If a code reviewer feels the need to ask for explanations about how stuff works, then the code author should add this additional information as comments in the code.
+
1338 
+
1339 Comments should use correct grammar and full sentences.
+
1340 
+
1341 6 Doxygen Coding Style Guide
+
1342 Doxygen is used to document all code that is released to customers, with a focus on functions that are part of an API. For code that is only used internally it is still strongly recommended to use Doxygen commenting as internal users will find it useful.
+
1343 
+
1344 For file and function comment blocks, the Javadoc style is used:
+
1345 
+
1346 /**************************************************************************/
+
1349 For all other doc comments, the C++ style
+
1350 
+
1351 Note: The reason we are using C style doxygen for this is that Eclipse (which Simplicity Studio is based on) can do correct code folding of this type of blocks.
+
1352 
+
1353 6.1 File comment header (Required)
+
1354 All source files should have a file comment header that looks similar to the following. The actual license text will depend on the project. See section 7 for details about licenses.
+
1355 
+
1356 6.2 Grouping modules (@addtogroup) (Recommended)
+
1357 Use the Doxygen command @addtogroup to group together source code that belongs to the same module, for example UART and SPI and so on. This will make it easier for customers to find the API documentation for the modules they are interested in.
+
1358 
+
1359 It is also possible to create groups hierarchies, for example to have an ADC group in the EM_Library group.
+
1360 
+
1361 Example
+
1362 
+
1363 /**************************************************************************/
+
1368 uint32_t sl_some_global_variable;
+
1371 
+
1372 /**************************************************************************/
+
1378 bool sl_is_adc_configured;
+
1380 
+
1385 6.3 File/module level documentation (Recommended)
+
1387 If a file is part of a module, it may be desirable to include file-level documentation. For example, the file level documentation may provide an overview of how to use an API. To provide file-level documentation, a Javadoc style Doxygen comment block should follow the file include statements.
+
1388 
+
1389 Example
+
1390 
+
1391 /**************************************************************************/
+
1405 If a group is created as shown above, it needs to be closed at the end of the file using one of the two methods shown below:
+
1406 
+
1407 // The following is used if there is only one group in a file or
+
1408 // groups are not nested.
+
1409 
+
1411 
+
1412 // The following is used when groups are nested. This is needed so
+
1413 // that doxygen does not pick up the "end adc_group" as part of a doc
+
1414 // comment for a following or enclosing group.
+
1415 
+
1417 Comment: The method used is optional. If in doubt about whether the second method is needed, run Doxygen on your file and see if the "end" comment is being picked up in the documentation.
+
1418 
+
1419 6.4 Function documentation (Required)
+
1420 This is required for any library or module code that will be customer facing. It is also highly recommended to document any other code in the same way, even if it is not expected to be customer-facing. Often times non-customer-facing code ends up being delivered to a customer anyway.
+
1421 
+
1422 Normally, functions that are part of an example (like main) or other simple functions that are part of the application and not library or module functions are not documented with Doxygen. It may still be useful to use Doxygen to provide documentation for complex examples.
+
1423 
+
1424 Each function definition contains at least a function brief statement and list of parameters and return value if any. Doxygen will pick up a single sentence at the start of the comment block as the brief description, so the @brief tag is not necessary.
+
1425 
+
1426 If the function contains parameters and a return value, then these parameters and return value must also be documented in Doxygen.
+
1427 
+
1428 Optionally the @note command can be used to highlight anything that the user should pay extra attention to when using this function.
+
1429 
+
1430 It is useful to read the Doxygen documentation about how you can write good documentation for your functions. Besides @note, there are other tags that can also be used. For example @sa (see also) can be used to create a link to another documented section. If you put a full function name or variable name that Doxygen knows about, it will automatically create a link to the documentation for that other function or variable. For macros you can add the @ref tag before the item name and a link will be generated.
+
1431 
+
1432 Example
+
1433 
+
1434 /**************************************************************************/
+
1448  uint8_t sl_my_public_function(uint8_t my_param1, uint16_t my_param2)
+
1449  {
+
1450  // ...
+
1451  }
+
1452 6.5 Variable documentation (Required)
+
1453 All public variables that are part of an API must be documented. It is also recommended to document all file-level global variables even if they are not public.
+
1454 
+
1455 Note: It is not necessary to document local (automatic) variables.
+
1456 
+
1457 Many variable will only require a single line or brief comment. In this case you should use a C++ style doxygen comment
+
1458 
+
1459 Example
+
1460 
+
1462 uint8_t sl_meaningful_variable_name;
+
1463 
+
1466 uint32_t sl_another_variable;
+
1467 
+
1468 /**************************************************************************/
+
1474 For fields of a structure, or a list of constants or anything that requires just a brief comment, there is another style (post) that can be used. In this case you put the doc comment on the same line as the item (instead of before it). To do this the comment needs to start like this:
+
1475 
+
1476 Example
+
1477 
+
1481 typedef struct
+
1482 {
+
1483  uint8_t r;
+
1484  uint8_t g;
+
1485  uint8_t b;
+
1486 } sl_pixel_t;
+
1487 6.6 Header file vs. implementation file (Recommended)
+
1488 To keep a simple distinction between public documentation and internal documentation, all public documentation comments should be placed into the library or module header (.h) file. This allows us to just pull in header files when generating public-facing documentation and not need to worry about separation of public or private content.
+
1489 
+
1490 The implementation file (.c) should also be documented if there additional non- public functions or variables that are not part of the public documentation. The .c doc comments can be used for generating internal documentation.
+
1491 
+
1492 If a function in a .c file is already documented in the header file, then it is not necessary to repeat the documentation. However, a comment block should be used with the brief description to visually mark the function in the source file.
+
1493 
+
1494 Example
+
1495 
+
1496 /**************************************************************************/
+
1499  uint8_t sl_do_something(uint8_t my_param1, uint16_t my_param2)
+
1500 If the function is a private (static) function then it should use a normal comment block (same as public function in a header file). Private variables should also be documented.
+
1501 
+
1502 6.7 Do not document sections (Recommended)
+
1503 The Doxygen configuration file for the project should be configured to exclude undocumented objects. Therefore it is not necessary to add extra statements to exclude Doxygen processing. Simply do not add Doxygen comments to the code you do not want documented.
+
1504 
+
1505 Example
+
1506 
+
1509 uint8_t sl_my_public_variable;
+
1510 
+
1511 // This variable should also have a comment to explain it,
+
1512 // but by using only double-slash, it will not get picked
+
1513 // up by Doxygen.
+
1514 static uint8_t my_private_variable;
+
1515 
+
1516 /******************************************************************************
+
1517  * This is a function that will not be documented.
+
1518  *
+
1519  * Note the lack of the double slash at the end of the top line. That
+
1520  * means this is not a true Javadoc comment block and Doxygen will not
+
1521  * see it.
+
1522  *****************************************************************************/
+
1523 void sli_do_something_secret(void)
+
1524 {
+
1525  // ...
+
1526 }
+
1527 6.8 Do not release sections (Recommended)
+
1528 There may be instances where there are source files which contain sections that should not be released, for example references to an emulator or todo comments. In some build systems, you may use commented double square brackets (//[[...]] or //[[and//]]`) to hide such code. You must make sure that the build system used on said source runs the codestripper before relying on this functionality.
+
1529 
+
1530 Example
+
1531 
+
1532 //[[
+
1533 // Don't release this define
+
1534 #define SL_EMULATOR_CONFIG 1
+
1535 //]]
+
1536 7 Licensing
+
1537 7.1 Silicon Labs Licenses
+
1538 All of our released source files (.c, .h, others; generated and manually written) should fall under one of the few licenses approved by our legal team. All source files are therefore required to have a file comment header containing the correct license type.
+
1539 
+
1540 The default license text must be used unless otherwise specified.
+
1541 The Open-Source/zlib license text is used for select software such as our CMSIS-Device header files and emlib, but can also be applied to other parts of the code. Only use this license text if the module already uses it, or with permission from the VP of Software.
+
1542 The Apache 2.0 license text is used for select software, but can also be applied to other parts of the code. Only use this license text if the module already uses it, or with permission from the VP of Software.
+
1543 The third-party license text is added on top of any third-party code. It does not remove the existing text. If we include any third party software, we need a way to clearly identify it as such. Yes, this is extra work, but is required by our legal team. Using and releasing third-party code has more constraints, see section 7.2 for the details.
+
1544 The Micrium license text is used for any code that we charge for (i.e. the Micrium software stacks, with the exception of the kernel).
+
1545 Please note that the version field in these headers is optional. If used, the version field should be used to denote the component version, not the Gecko SDK version.
+
1546 
+
1547 7.2 Third-Party Code
+
1548 We generally favor writing and maintaining our own code when the differences (in effort, quality, market acceptance, etc.) with an open-source one are small.
+
1549 
+
1550 The VP of Software must give his consent before any kind of third-party code is allowed to be used, as special care must be taken when dealing with this type of code. Specifically, content licensed to us under a "copyleft" license (GPL and other viral open-source licenses) must not be released, including in compiled form (such as a library or binary).
+
1551 
+
1552 New copyleft content should not be added. Existing copyleft released content must be audited against this rule, documented and flagged to the VP of Software for quick resolution. Whenever feasible and regardless of whether it is being released or is a documented exception, existing copyleft content should be replaced.
+
1553 
+
1554 Content that is "multi-licensed" (offered to us under our choice of more than one license) is not considered copyleft if at least one of the offered licenses is not copyleft.
+
1555 
+
1556 
+
1557 @endverbatim
+
1558 
+
1559 @}
+
1560  ******************************************************************************/
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/comm_plausibility_check.png b/docs/html/EFR32_ICE60730_Libraries/comm_plausibility_check.png new file mode 100644 index 00000000..4d6fca4f Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/comm_plausibility_check.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/cpu_registers_check_flowchart.png b/docs/html/EFR32_ICE60730_Libraries/cpu_registers_check_flowchart.png new file mode 100644 index 00000000..396a008f Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/cpu_registers_check_flowchart.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/dir_37618a71d99bdfed5979e976980d5eec.html b/docs/html/EFR32_ICE60730_Libraries/dir_37618a71d99bdfed5979e976980d5eec.html new file mode 100644 index 00000000..c44f9e96 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/dir_37618a71d99bdfed5979e976980d5eec.html @@ -0,0 +1,84 @@ + + + + + + + +IEC_60730: Test Directory Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
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+ + +
+
+
+
Test Directory Reference
+
+
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+Directories

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/dir_8f3de2ae926fecfe6abd5379fd2b6eb1.html b/docs/html/EFR32_ICE60730_Libraries/dir_8f3de2ae926fecfe6abd5379fd2b6eb1.html new file mode 100644 index 00000000..23e9c6bf --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/dir_8f3de2ae926fecfe6abd5379fd2b6eb1.html @@ -0,0 +1,84 @@ + + + + + + + +IEC_60730: Lib Directory Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
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+
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+
+
+
Lib Directory Reference
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+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/dir_b21a193dc64fec72e028d17b7206400a.html b/docs/html/EFR32_ICE60730_Libraries/dir_b21a193dc64fec72e028d17b7206400a.html new file mode 100644 index 00000000..d7614b47 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/dir_b21a193dc64fec72e028d17b7206400a.html @@ -0,0 +1,126 @@ + + + + + + + +IEC_60730: Lib/inc Directory Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
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inc Directory Reference
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+Files

file  efr32_iec60730_release_notes.h [code]
 Release Notes.
 
file  sl_iec60730.h [code]
 Library definitions.
 
file  sl_iec60730_comm.h [code]
 Comm check.
 
file  sl_iec60730_cpu_registers.h [code]
 CPU Registers check.
 
file  sl_iec60730_internal.h [code]
 Internal definitions.
 
file  sl_iec60730_invariable_memory.h [code]
 Invariable memory check.
 
file  sl_iec60730_irq.h [code]
 Interrupt check.
 
file  sl_iec60730_library_documentation.h [code]
 Library Documentation.
 
file  sl_iec60730_oem_documentation.h [code]
 OEM documentation.
 
file  iec60730_programme_counter.h [code]
 Program Counter check.
 
file  sl_iec60730_system_clock.h [code]
 Clock check.
 
file  sl_iec60730_variable_memory.h [code]
 Variable memory check.
 
file  sl_iec60730_watchdog.h [code]
 Watchdog check.
 
file  silabs_license_agreement.h [code]
 License Agreement.
 
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/dir_e290b47e7824d5e1639fbd9828a11747.html b/docs/html/EFR32_ICE60730_Libraries/dir_e290b47e7824d5e1639fbd9828a11747.html new file mode 100644 index 00000000..289dbcb2 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/dir_e290b47e7824d5e1639fbd9828a11747.html @@ -0,0 +1,80 @@ + + + + + + + +IEC_60730: Test/test_script Directory Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
test_script Directory Reference
+
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/doc.png b/docs/html/EFR32_ICE60730_Libraries/doc.png new file mode 100644 index 00000000..17edabff Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/doc.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/doxygen.css b/docs/html/EFR32_ICE60730_Libraries/doxygen.css new file mode 100644 index 00000000..73ecbb2c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/doxygen.css @@ -0,0 +1,1771 @@ +/* The standard CSS for doxygen 1.8.17 */ + +body, table, div, p, dl { + font: 400 14px/22px Roboto,sans-serif; +} + +p.reference, p.definition { + font: 400 14px/22px Roboto,sans-serif; +} + +/* @group Heading Levels */ + +h1.groupheader { + font-size: 150%; +} + +.title { + font: 400 14px/28px Roboto,sans-serif; + font-size: 150%; + font-weight: bold; + margin: 10px 2px; +} + +h2.groupheader { + border-bottom: 1px solid #879ECB; + color: #354C7B; + font-size: 150%; + font-weight: normal; + margin-top: 1.75em; + padding-top: 8px; + padding-bottom: 4px; + width: 100%; +} + +h3.groupheader { + font-size: 100%; +} + +h1, h2, h3, h4, h5, h6 { + -webkit-transition: text-shadow 0.5s linear; + -moz-transition: text-shadow 0.5s linear; + -ms-transition: text-shadow 0.5s linear; + -o-transition: text-shadow 0.5s linear; + transition: text-shadow 0.5s linear; + margin-right: 15px; +} + +h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow { + text-shadow: 0 0 15px cyan; +} + +dt { + font-weight: bold; +} + +ul.multicol { + -moz-column-gap: 1em; + -webkit-column-gap: 1em; + column-gap: 1em; + -moz-column-count: 3; + -webkit-column-count: 3; + column-count: 3; +} + +p.startli, p.startdd { + margin-top: 2px; +} + +th p.starttd, p.intertd, p.endtd { + font-size: 100%; + font-weight: 700; +} + +p.starttd { + margin-top: 0px; +} + +p.endli { + margin-bottom: 0px; +} + +p.enddd { + margin-bottom: 4px; +} + +p.endtd { + margin-bottom: 2px; +} + +p.interli { +} + +p.interdd { +} + +p.intertd { +} + +/* @end */ + +caption { + font-weight: bold; +} + +span.legend { + font-size: 70%; + text-align: center; +} + +h3.version { + font-size: 90%; + text-align: center; +} + +div.qindex, div.navtab{ + background-color: #EBEFF6; + border: 1px solid #A3B4D7; + text-align: center; +} + +div.qindex, div.navpath { + width: 100%; + line-height: 140%; +} + +div.navtab { + margin-right: 15px; +} + +/* @group Link Styling */ + +a { + color: #3D578C; + font-weight: normal; + text-decoration: none; +} + +.contents a:visited { + color: #4665A2; +} + +a:hover { + text-decoration: underline; +} + +a.qindex { + font-weight: bold; +} + +a.qindexHL { + font-weight: bold; + background-color: #9CAFD4; + color: #FFFFFF; + border: 1px double #869DCA; +} + +.contents a.qindexHL:visited { + color: #FFFFFF; +} + +a.el { + font-weight: bold; +} + +a.elRef { +} + +a.code, a.code:visited, a.line, a.line:visited { + color: #4665A2; +} + +a.codeRef, a.codeRef:visited, a.lineRef, a.lineRef:visited { + color: #4665A2; +} + +/* @end */ + +dl.el { + margin-left: -1cm; +} + +ul { + overflow: hidden; /*Fixed: list item bullets overlap floating elements*/ +} + +#side-nav ul { + overflow: visible; /* reset ul rule for scroll bar in GENERATE_TREEVIEW window */ +} + +#main-nav ul { + overflow: visible; /* reset ul rule for the navigation bar drop down lists */ +} + +.fragment { + text-align: left; + direction: ltr; + overflow-x: auto; /*Fixed: fragment lines overlap floating elements*/ + overflow-y: hidden; +} + +pre.fragment { + border: 1px solid #C4CFE5; + background-color: #FBFCFD; + padding: 4px 6px; + margin: 4px 8px 4px 2px; + overflow: auto; + word-wrap: break-word; + font-size: 9pt; + line-height: 125%; + font-family: monospace, fixed; + font-size: 105%; +} + +div.fragment { + padding: 0 0 1px 0; /*Fixed: last line underline overlap border*/ + margin: 4px 8px 4px 2px; + background-color: #FBFCFD; + border: 1px solid #C4CFE5; +} + +div.line { + font-family: monospace, fixed; + font-size: 13px; + min-height: 13px; + line-height: 1.0; + text-wrap: unrestricted; + white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +div.line:after { + content:"\000A"; + white-space: pre; +} + +div.line.glow { + background-color: cyan; + box-shadow: 0 0 10px cyan; +} + + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +.lineno { + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +div.ah, span.ah { + background-color: black; + font-weight: bold; + color: #FFFFFF; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000 110%); +} + +div.classindex ul { + list-style: none; + padding-left: 0; +} + +div.classindex span.ai { + display: inline-block; +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C4CFE5; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C4CFE5; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EEF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl, img.inline { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9CAFD4; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +blockquote.DocNodeRTL { + border-left: 0; + border-right: 2px solid #9CAFD4; + margin: 0 4px 0 24px; + padding: 0 16px 0 12px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; +} + +.dirtab { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A3B4D7; +} + +th.dirtab { + background: #EBEFF6; + font-weight: bold; +} + +hr { + height: 0px; + border: none; + border-top: 1px solid #4A6AAA; +} + +hr.footer { + height: 1px; +} + +/* @group Member Descriptions */ + +table.memberdecls { + border-spacing: 0px; + padding: 0px; +} + +.memberdecls td, .fieldtable tr { + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +.memberdecls td.glow, .fieldtable tr.glow { + background-color: cyan; + box-shadow: 0 0 15px cyan; +} + +.mdescLeft, .mdescRight, +.memItemLeft, .memItemRight, +.memTemplItemLeft, .memTemplItemRight, .memTemplParams { + background-color: #F9FAFC; + border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memSeparator { + border-bottom: 1px solid #DEE4F0; + line-height: 1px; + margin: 0px; + padding: 0px; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight, .memTemplItemRight { + width: 100%; +} + +.memTemplParams { + color: #4665A2; + white-space: nowrap; + font-size: 80%; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtitle { + padding: 8px; + border-top: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + border-top-right-radius: 4px; + border-top-left-radius: 4px; + margin-bottom: -1px; + background-image: url('nav_f.png'); + background-repeat: repeat-x; + background-color: #E2E8F2; + line-height: 1.25; + font-weight: 300; + float:left; +} + +.permalink +{ + font-size: 65%; + display: inline-block; + vertical-align: middle; +} + +.memtemplate { + font-size: 80%; + color: #4665A2; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A3B4D7; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; + display: table !important; + width: 100%; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: 400; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 0px 6px 0px; + color: #253555; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-color: #DFE5F1; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + +} + +.overload { + font-family: "courier new",courier,monospace; + font-size: 65%; +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} +.paramname code { + line-height: 14px; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname, .tparams .paramname, .exception .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype, .tparams .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir, .tparams .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #728DC1; + border-top:1px solid #5373B4; + border-left:1px solid #5373B4; + border-right:1px solid #C4CFE5; + border-bottom:1px solid #C4CFE5; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; + vertical-align: middle; +} + + + +/* @end */ + +/* these are for tree view inside a (index) page */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #9CAFD4; + border-bottom: 1px solid #9CAFD4; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; + padding-top: 3px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.entry a img { + border: none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + padding-top: 3px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3D578C; +} + +.arrow { + color: #9CAFD4; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; + cursor: pointer; + font-size: 80%; + display: inline-block; + width: 16px; + height: 22px; +} + +.icon { + font-family: Arial, Helvetica; + font-weight: bold; + font-size: 12px; + height: 14px; + width: 16px; + display: inline-block; + background-color: #728DC1; + color: white; + text-align: center; + border-radius: 4px; + margin-left: 2px; + margin-right: 2px; +} + +.icona { + width: 24px; + height: 22px; + display: inline-block; +} + +.iconfopen { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('folderopen.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +.iconfclosed { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('folderclosed.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +.icondoc { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('doc.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +table.directory { + font: 400 14px Roboto,sans-serif; +} + +/* @end */ + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #2A3D61; +} + +table.doxtable caption { + caption-side: top; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + /*width: 100%;*/ + margin-bottom: 10px; + border: 1px solid #A8B8D9; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + vertical-align: top; +} + +.fieldtable td.fieldname { + padding-top: 3px; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A8B8D9; + /*width: 100%;*/ +} + +.fieldtable td.fielddoc p:first-child { + margin-top: 0px; +} + +.fieldtable td.fielddoc p:last-child { + margin-bottom: 2px; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E8F2; + font-size: 90%; + color: #253555; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + font-weight: 400; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A8B8D9; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + background-position: 0 -5px; + height:30px; + line-height:30px; + color:#8AA0CC; + border:solid 1px #C2CDE4; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#364D7C; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; + color: #283A5D; + font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; +} + +.navpath li.navelem a:hover +{ + color:#6884BD; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#364D7C; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +table.classindex +{ + margin: 10px; + white-space: nowrap; + margin-left: 3%; + margin-right: 3%; + width: 94%; + border: 0; + border-spacing: 0; + padding: 0; +} + +div.ingroups +{ + font-size: 8pt; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C4CFE5; +} + +div.headertitle +{ + padding: 5px 5px 5px 10px; +} + +.PageDocRTL-title div.headertitle { + text-align: right; + direction: rtl; +} + +dl { + padding: 0 0 0 0; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug, dl.examples */ +dl.section { + margin-left: 0px; + padding-left: 0px; +} + +dl.section.DocNodeRTL { + margin-right: 0px; + padding-right: 0px; +} + +dl.note { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #D0C000; +} + +dl.note.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #FF0000; +} + +dl.warning.DocNodeRTL, dl.attention.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #00D000; +} + +dl.pre.DocNodeRTL, dl.post.DocNodeRTL, dl.invariant.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #00D000; +} + +dl.deprecated { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #505050; +} + +dl.deprecated.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #505050; +} + +dl.todo { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #00C0E0; +} + +dl.todo.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #00C0E0; +} + +dl.test { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #3030E0; +} + +dl.test.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #3030E0; +} + +dl.bug { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #C08050; +} + +dl.bug.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectalign +{ + vertical-align: middle; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5373B4; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.plantumlgraph +{ + text-align: center; +} + +.diagraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #90A5CE; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#334975; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D8DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 8px 10px 10px; + width: 200px; +} + +.PageDocRTL-title div.toc { + float: left !important; + text-align: right; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +.PageDocRTL-title div.toc li { + background-position-x: right !important; + padding-left: 0 !important; + padding-right: 10px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4665A2; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.PageDocRTL-title div.toc li.level1 { + margin-left: 0 !important; + margin-right: 0; +} + +.PageDocRTL-title div.toc li.level2 { + margin-left: 0 !important; + margin-right: 15px; +} + +.PageDocRTL-title div.toc li.level3 { + margin-left: 0 !important; + margin-right: 30px; +} + +.PageDocRTL-title div.toc li.level4 { + margin-left: 0 !important; + margin-right: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +/* tooltip related style info */ + +.ttc { + position: absolute; + display: none; +} + +#powerTip { + cursor: default; + white-space: nowrap; + background-color: white; + border: 1px solid gray; + border-radius: 4px 4px 4px 4px; + box-shadow: 1px 1px 7px gray; + display: none; + font-size: smaller; + max-width: 80%; + opacity: 0.9; + padding: 1ex 1em 1em; + position: absolute; + z-index: 2147483647; +} + +#powerTip div.ttdoc { + color: grey; + font-style: italic; +} + +#powerTip div.ttname a { + font-weight: bold; +} + +#powerTip div.ttname { + font-weight: bold; +} + +#powerTip div.ttdeci { + color: #006318; +} + +#powerTip div { + margin: 0px; + padding: 0px; + font: 12px/16px Roboto,sans-serif; +} + +#powerTip:before, #powerTip:after { + content: ""; + position: absolute; + margin: 0px; +} + +#powerTip.n:after, #powerTip.n:before, +#powerTip.s:after, #powerTip.s:before, +#powerTip.w:after, #powerTip.w:before, +#powerTip.e:after, #powerTip.e:before, +#powerTip.ne:after, #powerTip.ne:before, +#powerTip.se:after, #powerTip.se:before, +#powerTip.nw:after, #powerTip.nw:before, +#powerTip.sw:after, #powerTip.sw:before { + border: solid transparent; + content: " "; + height: 0; + width: 0; + position: absolute; +} + +#powerTip.n:after, #powerTip.s:after, +#powerTip.w:after, #powerTip.e:after, +#powerTip.nw:after, #powerTip.ne:after, +#powerTip.sw:after, #powerTip.se:after { + border-color: rgba(255, 255, 255, 0); +} + +#powerTip.n:before, #powerTip.s:before, +#powerTip.w:before, #powerTip.e:before, +#powerTip.nw:before, #powerTip.ne:before, +#powerTip.sw:before, #powerTip.se:before { + border-color: rgba(128, 128, 128, 0); +} + +#powerTip.n:after, #powerTip.n:before, +#powerTip.ne:after, #powerTip.ne:before, +#powerTip.nw:after, #powerTip.nw:before { + top: 100%; +} + +#powerTip.n:after, #powerTip.ne:after, #powerTip.nw:after { + border-top-color: #FFFFFF; + border-width: 10px; + margin: 0px -10px; +} +#powerTip.n:before { + border-top-color: #808080; + border-width: 11px; + margin: 0px -11px; +} +#powerTip.n:after, #powerTip.n:before { + left: 50%; +} + +#powerTip.nw:after, #powerTip.nw:before { + right: 14px; +} + +#powerTip.ne:after, #powerTip.ne:before { + left: 14px; +} + +#powerTip.s:after, #powerTip.s:before, +#powerTip.se:after, #powerTip.se:before, +#powerTip.sw:after, #powerTip.sw:before { + bottom: 100%; +} + +#powerTip.s:after, #powerTip.se:after, #powerTip.sw:after { + border-bottom-color: #FFFFFF; + border-width: 10px; + margin: 0px -10px; +} + +#powerTip.s:before, #powerTip.se:before, #powerTip.sw:before { + border-bottom-color: #808080; + border-width: 11px; + margin: 0px -11px; +} + +#powerTip.s:after, #powerTip.s:before { + left: 50%; +} + +#powerTip.sw:after, #powerTip.sw:before { + right: 14px; +} + +#powerTip.se:after, #powerTip.se:before { + left: 14px; +} + +#powerTip.e:after, #powerTip.e:before { + left: 100%; +} +#powerTip.e:after { + border-left-color: #FFFFFF; + border-width: 10px; + top: 50%; + margin-top: -10px; +} +#powerTip.e:before { + border-left-color: #808080; + border-width: 11px; + top: 50%; + margin-top: -11px; +} + +#powerTip.w:after, #powerTip.w:before { + right: 100%; +} +#powerTip.w:after { + border-right-color: #FFFFFF; + border-width: 10px; + top: 50%; + margin-top: -10px; +} +#powerTip.w:before { + border-right-color: #808080; + border-width: 11px; + top: 50%; + margin-top: -11px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + +/* @group Markdown */ + +/* +table.markdownTable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.markdownTable td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.markdownTableHead tr { +} + +table.markdownTableBodyLeft td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +th.markdownTableHeadLeft th.markdownTableHeadRight th.markdownTableHeadCenter th.markdownTableHeadNone { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +th.markdownTableHeadLeft { + text-align: left +} + +th.markdownTableHeadRight { + text-align: right +} + +th.markdownTableHeadCenter { + text-align: center +} +*/ + +table.markdownTable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.markdownTable td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.markdownTable tr { +} + +th.markdownTableHeadLeft, th.markdownTableHeadRight, th.markdownTableHeadCenter, th.markdownTableHeadNone { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +th.markdownTableHeadLeft, td.markdownTableBodyLeft { + text-align: left +} + +th.markdownTableHeadRight, td.markdownTableBodyRight { + text-align: right +} + +th.markdownTableHeadCenter, td.markdownTableBodyCenter { + text-align: center +} + +.DocNodeRTL { + text-align: right; + direction: rtl; +} + +.DocNodeLTR { + text-align: left; + direction: ltr; +} + +table.DocNodeRTL { + width: auto; + margin-right: 0; + margin-left: auto; +} + +table.DocNodeLTR { + width: auto; + margin-right: auto; + margin-left: 0; +} + +tt, code, kbd, samp +{ + display: inline-block; + direction:ltr; +} +/* @end */ + +u { + text-decoration: underline; +} + diff --git a/docs/html/EFR32_ICE60730_Libraries/doxygen.png b/docs/html/EFR32_ICE60730_Libraries/doxygen.png new file mode 100644 index 00000000..3ff17d80 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/doxygen.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/dynsections.js b/docs/html/EFR32_ICE60730_Libraries/dynsections.js new file mode 100644 index 00000000..ea0a7b39 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/dynsections.js @@ -0,0 +1,120 @@ +/* + @licstart The following is the entire license notice for the + JavaScript code in this file. + + Copyright (C) 1997-2017 by Dimitri van Heesch + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 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efr32_iec60730_release_notes.h File Reference
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Release Notes. +More...

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Detailed Description

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Release Notes.

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+License

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Copyright 2023 Silicon Laboratories Inc. www.silabs.com

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The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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 ▼ Lib
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 coding_standard.h
 efr32_iec60730_release_notes.hRelease Notes
 sl_iec60730.hLibrary definitions
 sl_iec60730_comm.hComm check
 sl_iec60730_cpu_registers.hCPU Registers check
 sl_iec60730_internal.hInternal definitions
 sl_iec60730_invariable_memory.hInvariable memory check
 sl_iec60730_irq.hInterrupt check
 sl_iec60730_library_documentation.hLibrary Documentation
 sl_iec60730_oem_documentation.hOEM documentation
 iec60730_programme_counter.hProgram Counter check
 sl_iec60730_system_clock.hClock check
 sl_iec60730_variable_memory.hVariable memory check
 sl_iec60730_watchdog.hWatchdog check
 silabs_license_agreement.hLicense Agreement
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/folderclosed.png b/docs/html/EFR32_ICE60730_Libraries/folderclosed.png new file mode 100644 index 00000000..bb8ab35e Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/folderclosed.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/folderopen.png b/docs/html/EFR32_ICE60730_Libraries/folderopen.png new file mode 100644 index 00000000..d6c7f676 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/folderopen.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/functions.html b/docs/html/EFR32_ICE60730_Libraries/functions.html new file mode 100644 index 00000000..6d56de1e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/functions.html @@ -0,0 +1,413 @@ + + + + + + + +IEC_60730: Class Members + + + + + + + + + +
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- h -

+ + +

- i -

+ + +

- m -

+ + +

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+ + +

- s -

+ + +

- t -

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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/functions_func.html b/docs/html/EFR32_ICE60730_Libraries/functions_func.html new file mode 100644 index 00000000..a7d8929d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/functions_func.html @@ -0,0 +1,365 @@ + + + + + + + +IEC_60730: Class Members - Functions + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+  + +

- _ -

+ + +

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- e -

+ + +

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+ + +

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+ + +

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+ + +

- w -

+
+ +
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/functions_vars.html b/docs/html/EFR32_ICE60730_Libraries/functions_vars.html new file mode 100644 index 00000000..71cea4cf --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/functions_vars.html @@ -0,0 +1,114 @@ + + + + + + + +IEC_60730: Class Members - Variables + + + + + + + + + +
+
+ + + + + + +
+
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+
+
+ + + + + + + +
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+  +
+ +
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/globals.html b/docs/html/EFR32_ICE60730_Libraries/globals.html new file mode 100644 index 00000000..7f1e348c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/globals.html @@ -0,0 +1,500 @@ + + + + + + + +IEC_60730: File Members + + + + + + + + + +
+
+ + + + + + +
+
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+ + +

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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/globals_defs.html b/docs/html/EFR32_ICE60730_Libraries/globals_defs.html new file mode 100644 index 00000000..1c5760f3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/globals_defs.html @@ -0,0 +1,266 @@ + + + + + + + +IEC_60730: File Members + + + + + + + + + +
+
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+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
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+ +
+  + +

- _ -

+ + +

- b -

+ + +

- c -

+ + +

- d -

+ + +

- e -

+ + +

- f -

+ + +

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+
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/globals_enum.html b/docs/html/EFR32_ICE60730_Libraries/globals_enum.html new file mode 100644 index 00000000..3ba056d0 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/globals_enum.html @@ -0,0 +1,86 @@ + + + + + + + +IEC_60730: File Members + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
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+ +
+ +
+  +
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/globals_eval.html b/docs/html/EFR32_ICE60730_Libraries/globals_eval.html new file mode 100644 index 00000000..1b27eb60 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/globals_eval.html @@ -0,0 +1,201 @@ + + + + + + + +IEC_60730: File Members + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
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+
+ + + + + + + +
+ +
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+
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/globals_func.html b/docs/html/EFR32_ICE60730_Libraries/globals_func.html new file mode 100644 index 00000000..fc2c443f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/globals_func.html @@ -0,0 +1,169 @@ + + + + + + + +IEC_60730: File Members + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
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+ +
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+
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/globals_type.html b/docs/html/EFR32_ICE60730_Libraries/globals_type.html new file mode 100644 index 00000000..aca8a158 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/globals_type.html @@ -0,0 +1,77 @@ + + + + + + + +IEC_60730: File Members + + + + + + + + + +
+
+ + + + + + +
+
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IEC_60730 +
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IEC_60730 +
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Graph Legend
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This page explains how to interpret the graphs that are generated by doxygen.

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Consider the following example:

/*! Invisible class because of truncation */
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class Invisible { };
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/*! Truncated class, inheritance relation is hidden */
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class Truncated : public Invisible { };
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/* Class not documented with doxygen comments */
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class Undocumented { };
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/*! Class that is inherited using public inheritance */
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class PublicBase : public Truncated { };
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/*! A template class */
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template<class T> class Templ { };
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/*! Class that is inherited using protected inheritance */
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class ProtectedBase { };
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/*! Class that is inherited using private inheritance */
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class PrivateBase { };
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/*! Class that is used by the Inherited class */
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class Used { };
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/*! Super class that inherits a number of other classes */
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class Inherited : public PublicBase,
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protected ProtectedBase,
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private PrivateBase,
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public Undocumented,
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public Templ<int>
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{
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private:
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Used *m_usedClass;
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};
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This will result in the following graph:

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The boxes in the above graph have the following meaning:

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  • +A filled gray box represents the struct or class for which the graph is generated.
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  • +A box with a black border denotes a documented struct or class.
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  • +A box with a red border denotes a documented struct or class forwhich not all inheritance/containment relations are shown. A graph is truncated if it does not fit within the specified boundaries.
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The arrows have the following meaning:

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+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__ADC__PLAUSIBILTY__Test.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__ADC__PLAUSIBILTY__Test.dot new file mode 100644 index 00000000..9e91016f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__ADC__PLAUSIBILTY__Test.dot @@ -0,0 +1,9 @@ +digraph "ADC Plausibility Test" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node1 [label="ADC Plausibility Test",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Verifies analog components work properly."]; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__ADC__PLAUSIBILTY__Test.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__ADC__PLAUSIBILTY__Test.html new file mode 100644 index 00000000..bd320905 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__ADC__PLAUSIBILTY__Test.html @@ -0,0 +1,86 @@ + + + + + + + +IEC_60730: ADC Plausibility Test + + + + + + + + + +
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ADC Plausibility Test
EFR32 IEC60730 Library
+
+
+ +

Verifies analog components work properly. +More...

+
+Collaboration diagram for ADC Plausibility Test:
+
+
+
+

Verifies analog components work properly.

+

A ADC/ADCMUX plausibility test example is not possible with the EFR32 STK. Details on functional safety with ADC will be included in the EFR32 IEC60730 application note.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__BIST.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__BIST.dot new file mode 100644 index 00000000..5eb5c9b0 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__BIST.dot @@ -0,0 +1,9 @@ +digraph "BIST" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node1 [label="BIST",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Built In Self Test - Executed periodically."]; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__BIST.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__BIST.html new file mode 100644 index 00000000..79369ec9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__BIST.html @@ -0,0 +1,162 @@ + + + + + + + +IEC_60730: BIST + + + + + + + + + +
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IEC_60730 +
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BIST
EFR32 IEC60730 Library
+
+
+ +

Built In Self Test - Executed periodically. +More...

+
+Collaboration diagram for BIST:
+
+
+
+ + + + + + +

+Functions

 SI_SEGMENT_VARIABLE (iec60730_SafetyCheck, iec60730_TestFailure_t, SI_SEG_DATA)
 
void iec60730_Bist (void)
 
+

Detailed Description

+

Built In Self Test - Executed periodically.

+

iec60730_Bist() confirms correct operation of the device during main loop execution. If a module validation fails, iec60730_SafeState() is called.

+

Longer functions such as variable and non-variable memory checks have critical sections that disable interrupts. To minimize disruption to interrupt service routines, these functions break up validation into smaller pieces. This allows pending interrupts to be serviced while validating.

+

OEM code must set #iec60730_SafetyCheck to one of the failure conditions in iec60730_TestFailure_t if the code determines a failure has occurred. This can be used for communications channels or to trigger SafeState entry due to a failure within an interrupt.

+

The validation time for the full memory varies between devices depending on the size of memory available, and how frequent iec60730_Bist() is called by the main loop. For details see BIST call frequency.

+

Periodic BIST execution is shown in Figure 1

+

+ +
+Figure 1 Flow chart of Periodic BIST execution
+

Function Documentation

+ +

◆ iec60730_Bist()

+ +
+
+ + + + + + + + +
void iec60730_Bist (void )
+
+

public IEC60730 Built In Self Test

+
Returns
None. If validation fails function never returns. If validation passes, function returns.
+

Each module is tested, and if a failure is detected iec60730_SafeState() is called. If a test failure occurs outside this function (such as comms), set #iec60730_SafetyCheck to iec60730_TestFailed.

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◆ SI_SEGMENT_VARIABLE()

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SI_SEGMENT_VARIABLE (iec60730_SafetyCheck ,
iec60730_TestFailure_t ,
SI_SEG_DATA  
)
+
+

Global variable used by OEM and interrupt check functions to relay status to IEC60730 safety code. When a failure is detected, set #iec60730_SafetyCheck to iec60730_TestFailed.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPUREG__Test.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPUREG__Test.dot new file mode 100644 index 00000000..a526a62c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPUREG__Test.dot @@ -0,0 +1,9 @@ +digraph "CPU Register Check" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node1 [label="CPU Register Check",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Verifies CPU registers are working correctly."]; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPUREG__Test.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPUREG__Test.html new file mode 100644 index 00000000..8f9f00dd --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPUREG__Test.html @@ -0,0 +1,354 @@ + + + + + + + +IEC_60730: CPU Register Check + + + + + + + + + +
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IEC_60730 +
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CPU Register Check
EFR32 IEC60730 Library
+
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+ +

Verifies CPU registers are working correctly. +More...

+
+Collaboration diagram for CPU Register Check:
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+Functions

iec60730_TestResult_t iec60730_CpuRegistersBist (void)
 
iec60730_TestResult_t iec60730_CpuRegistersPost (void)
 
iec60730_TestResult_t iec60730_CpuRegistersCore (void)
 
iec60730_TestResult_t iec60730_CpuRegistersMSP (void)
 
iec60730_TestResult_t iec60730_CpuRegistersPSP (void)
 
iec60730_TestResult_t iec60730_CpuRegistersControl (void)
 
iec60730_TestResult_t iec60730_CpuRegistersPriMask (void)
 
iec60730_TestResult_t iec60730_CpuRegistersBasePri (void)
 
iec60730_TestResult_t iec60730_CpuRegistersFaultMask (void)
 
+

Detailed Description

+

Verifies CPU registers are working correctly.

+

+Hardware Architecture

+

The CM33 CPU registers include the following registers: General-purpose registers: • R0-R12 Stack pointer registers: • MSP + MSPLIM (secure/non-secure) • PSP + PSPLIM (secure/non-secure) Special registers: • APSR • CONTROL (secure/non-secure) • PRIMASK (secure/non-secure) • FAULTMASK (secure/non-secure) • BASEPRI (secure/non-secure) Link register: • LR FPU registers: • FPSCR • S0 – S31 There is a set of tests performed once after the MCU reset and also during runtime.

+

+Failure Risks

+

The primary risks with the CPU registers are stuck bits and shorted bits. The CPU register tests will verify that bits can be set high and low, and adjacent bits are not shorted.

+

+Software Architecture

+

Because internal CPU registers are being tested, the code must be written using assembly language.

+

The identification of safety errors is ensured by the specific FAIL return if some registers have the stuck-at fault. Assess the return value of every function. If the value equals the FAIL return, then a jump into the safety error handling function should occur. The safety error handling function may be specific to the application and it is not a part of the library. The main purpose of this function is to put the application into a safe state.

+

In some special cases, the error is not reported by the FAIL return, because it would require the action of a corrupt register. In that case, the function waits for reset in an endless loop. The principle of the stuck-at error test of the CPU registers is to write and compare two test patterns in every register. The content of the register is compared with the constant or with the value written into another register that was tested before. Most of the time, R0, R1, and R2 are used as auxiliary registers. Patterns are defined to check the logical one and logical zero values in all register bits.

+

Due to the Arm TrustZone support, some core registers are banked between the security states. The Secure (S) or Non-Secure (NS) sets of the corresponding registers are accessible during execution (depending on the current security state). Both register versions are accessible during the S state, but not during the NS state. This is the reason why the NXP Safety Library must be executed in a secure mode. All of the banked registers are listed above.

+

For the EFR32 IEC60730 implementation, Figure 1 shows the logic flow chart of the CPU registers check during BIST and POST.

+
+ +
+Figure 1 CPU registers check flowchart
+

+

Function Documentation

+ +

◆ iec60730_CpuRegistersBasePri()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_CpuRegistersBasePri (void )
+
+

private IEC60730 CPU Register BasePri Non-Secure Check

+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the BASEPRI_NS (BasePri, Non-Secure) register. Test patterns: 0x000000A0, 0x00000040

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register BasePri Secure Check
+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the BASEPRI (BasePri, Secure) register. Test patterns: 0x000000A0, 0x00000040

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register BasePri Check
+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the BASEPRI register. Test patterns: 0x000000A0, 0x00000040

Warning
This function cannot be interrupted.
+ +
+
+ +

◆ iec60730_CpuRegistersBist()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_CpuRegistersBist (void )
+
+

public IEC60730 CPU Registers Built In Self Test

+
Returns
iec60730_TestResult_t
+
+iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function will do a test of all the CPU core registers.

+ +
+
+ +

◆ iec60730_CpuRegistersControl()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_CpuRegistersControl (void )
+
+

private IEC60730 CPU Register MSPLIM Non-Secure Check

+
Returns
iec60730_TestResult_t iec60730_TestPassed means test passed.
+

This function tests the MSPLIM_NS (Main Stack Pointer Limit, Non-Secure) register. If MSPLIM_NS is corrupted, the function stucks in an endless loop with interrupts disabled. This state must be observed by another safety mechanism (for example, watchdog). Test patterns: 0xAAAAAAA8, 0x55555550

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register MSPLIM Secure Check
+
Returns
iec60730_TestResult_t iec60730_TestPassed means test passed.
+

This function tests the MSPLIM_S (Main Stack Pointer Limit, Secure) register. If MSPLIM_S is corrupted, the function stucks in an endless loop with interrupts disabled. This state must be observed by another safety mechanism (for example, watchdog). Test patterns: 0xAAAAAAA8, 0x55555550

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register PSPLIM Non-Secure Check
+
Returns
iec60730_TestResult_t iec60730_TestPassed means test passed.
+

This function tests the PSPLIM_NS (Process Stack Pointer Limit, Non-Secure) register. If PSPLIM_NS is corrupted, the function stucks in an endless loop with interrupts disabled. This state must be observed by another safety mechanism (for example, watchdog). Test patterns: 0xAAAAAAA8, 0x55555550

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register PSPLIM Secure Check
+
Returns
iec60730_TestResult_t iec60730_TestPassed means test passed.
+

This function tests the PSPLIM_S (Process Stack Pointer Limit, Secure) register. If PSPLIM_S is corrupted, the function stucks in an endless loop with interrupts disabled. This state must be observed by another safety mechanism (for example, watchdog). Test patterns: 0xAAAAAAA8, 0x55555550

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register Control Non-Secure Check
+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the Control_NS (Control, Non-Secure) register. Test patterns: 0x00000002, 0x00000004

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register Control Secure Check
+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the Control_S (Control, Secure) register. Test patterns: 0x0000000A, 0x00000004

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register Control Check
+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the Control register. Test patterns: 0x00000002, 0x00000004

Warning
This function cannot be interrupted.
+ +
+
+ +

◆ iec60730_CpuRegistersCore()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_CpuRegistersCore (void )
+
+

private IEC60730 CPU Registers Core Check

+
Returns
iec60730_TestResult_t
+
+iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the following CPU registers in a sequence: APSR, R0-R12, LR Test patterns: R0–R12, LR: 0xAAAAAAAA, 0x55555555

+ +
+
+ +

◆ iec60730_CpuRegistersFaultMask()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_CpuRegistersFaultMask (void )
+
+

private IEC60730 CPU Register FaultMask Non-Secure Check

+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the FAULTMASK_NS (FaultMask, Non-Secure) register. Test patterns: 0x00000001, 0x00000000

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register FaultMask Secure Check
+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the FAULTMASK (FaultMask, Secure) register. Test patterns: 0x00000001, 0x00000000

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register FaultMask Check
+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the FAULTMASK register. Test patterns: 0x00000001, 0x00000000

Warning
This function cannot be interrupted.
+ +
+
+ +

◆ iec60730_CpuRegistersMSP()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_CpuRegistersMSP (void )
+
+

private IEC60730 CPU Register MSP Non-Secure Check

+
Returns
iec60730_TestResult_t iec60730_TestPassed means test passed.
+

This function tests the MSP_NS (Main Stack Pointer, Non-Secure) register. If MSP_NS is corrupted, the function stucks in an endless loop with interrupts disabled. This state must be observed by another safety mechanism (for example, watchdog). Test patterns: 0xAAAAAAA8, 0x55555554

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register MSP Secure Check
+
Returns
iec60730_TestResult_t iec60730_TestPassed means test passed.
+

This function tests the MSPS (Main Stack Pointer, Secure) register. If MSP_S is corrupted, the function stucks in an endless loop with interrupts disabled. This state must be observed by another safety mechanism (for example, watchdog). Test patterns: 0xAAAAAAA8, 0x55555554

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register MSP Check
+
Returns
iec60730_TestResult_t iec60730_TestPassed means test passed.
+

This function tests the MSP (Main Stack Pointer) register. If MSP is corrupted, the function stucks in an endless loop with interrupts disabled. This state must be observed by another safety mechanism (for example, watchdog). Test patterns: 0xAAAAAAA8, 0x55555554

Warning
This function cannot be interrupted.
+ +
+
+ +

◆ iec60730_CpuRegistersPost()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_CpuRegistersPost (void )
+
+

public IEC60730 CPU Registers Power On Self Test

+
Returns
iec60730_TestResult_t
+

This function simply calls the iec60730_CpuRegistersBist() function.

+ +
+
+ +

◆ iec60730_CpuRegistersPriMask()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_CpuRegistersPriMask (void )
+
+

private IEC60730 CPU Register PriMask Non-Secure Check

+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the PriMask_NS (PriMask, Non-Secure) register. Test patterns: 0x00000001, 0x00000000

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register PriMask Secure Check
+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the PriMask_S (PriMask, Secure) register. Test patterns: 0x00000001, 0x00000000

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register PriMask Check
+
Returns
iec60730_TestResult_t iec60730_TestFailed means test failed, iec60730_TestPassed means test passed.
+

This function tests the PriMask register. Test patterns: 0x00000001, 0x00000000

Warning
This function cannot be interrupted.
+ +
+
+ +

◆ iec60730_CpuRegistersPSP()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_CpuRegistersPSP (void )
+
+

private IEC60730 CPU Register PSP Non-Secure Check

+
Returns
iec60730_TestResult_t iec60730_TestPassed means test passed.
+

This function tests the PSP_NS (Process Stack Pointer, Non-Secure) register. If PSP_NS is corrupted, the function stucks in an endless loop with interrupts disabled. This state must be observed by another safety mechanism (for example, watchdog). Test patterns: 0xAAAAAAA8, 0x55555554

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register PSP Secure Check
+
Returns
iec60730_TestResult_t iec60730_TestPassed means test passed.
+

This function tests the PSP_S (Process Stack Pointer, Secure) register. If PSP_S is corrupted, the function stucks in an endless loop with interrupts disabled. This state must be observed by another safety mechanism (for example, watchdog). Test patterns: 0xAAAAAAA8, 0x55555554

Warning
This function cannot be interrupted. The core must be in the secure state. private IEC60730 CPU Register PSP Check
+
Returns
iec60730_TestResult_t iec60730_TestPassed means test passed.
+

This function tests the PSP (Process Stack Pointer) register. If PSP is corrupted, the function stucks in an endless loop with interrupts disabled. This state must be observed by another safety mechanism (for example, watchdog). Test patterns: 0xAAAAAAA8, 0x55555554

Warning
This function cannot be interrupted.
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPU__REGISTERS__VERIFICATION.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPU__REGISTERS__VERIFICATION.dot new file mode 100644 index 00000000..a93a460e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPU__REGISTERS__VERIFICATION.dot @@ -0,0 +1,9 @@ +digraph "CPU Register Check Automated Verification Tests" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node1 [label="CPU Register Check\l Automated Verification Tests",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Python script for the IEC60730 CPU Register Check Verification tests."]; + Node2 [label="IEC60730 Test Specification",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__VERIFICATION.html",tooltip="Automated tests for validating correct firmware operation."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPU__REGISTERS__VERIFICATION.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPU__REGISTERS__VERIFICATION.html new file mode 100644 index 00000000..946d8b5e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__CPU__REGISTERS__VERIFICATION.html @@ -0,0 +1,131 @@ + + + + + + + +IEC_60730: CPU Register Check Automated Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
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+Classes | +Functions | +Variables
+
+
CPU Register Check Automated Verification Tests
EFR32 IEC60730 Library » IEC60730 Test Specification
+
+
+ +

Python script for the IEC60730 CPU Register Check Verification tests. +More...

+
+Collaboration diagram for CPU Register Check Automated Verification Tests:
+
+
+
+ + + + + +

+Classes

class  iec60730_cpu_registers.iec60730_cpu_regs
 IEC60730 CPU Register Check Tests. More...
 
+ + + +

+Functions

+bytes iec60730_cpu_registers.int_to_bytes (int number)
 
+ + + + + + + + + + + + + + + +

+Variables

+ sl_iec60730_cpu_registers.chip_name = os.getenv('CHIP')
 
+ iec60730_cpu_registers.app_type = os.getenv('APP_TYPE')
 
+ iec60730_cpu_registers.lst_file_path = os.getenv('LST_PATH')
 
+ iec60730_cpu_registers.adapter_serial_no = os.getenv('ADAPTER_SN')
 
+ iec60730_cpu_registers.lib_path = os.getenv('JLINK_PATH')
 
+ iec60730_cpu_registers.line = sys.argv.pop()
 
+ sl_iec60730_cpu_registers.compiler = line
 
+

Detailed Description

+

Python script for the IEC60730 CPU Register Check Verification tests.

+

For details on the tests, see iec60730_cpu_registers.iec60730_cpu_regs.

+

+Test Results

+

EFR32 Device | Test Results ----------—|----------—

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__EXTRA.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__EXTRA.dot new file mode 100644 index 00000000..cff1a7b9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__EXTRA.dot @@ -0,0 +1,15 @@ +digraph "EFR32 IEC60730 Library Extra Files" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node3 [label="Silicon Labs Coding\l Standard",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__iec60730__coding__standard.html",tooltip="Silicon Labs Coding Standard."]; + Node1 [label="EFR32 IEC60730 Library\l Extra Files",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Extra files for the EFR32 IEC Library."]; + Node5 [label="Silicon Labs Software\l License Agreement",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__iec60730__license__agreement.html",tooltip="License Agreement for the IEC60730 Library."]; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node4 [label="Release Notes",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__iec60730__release__notes.html",tooltip="Release Notes for the IEC60730 Library."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; + Node1->Node3 [shape=plaintext, dir="back", style="solid"]; + Node1->Node4 [shape=plaintext, dir="back", style="solid"]; + Node1->Node5 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__EXTRA.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__EXTRA.html new file mode 100644 index 00000000..9c40cea0 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__EXTRA.html @@ -0,0 +1,101 @@ + + + + + + + +IEC_60730: EFR32 IEC60730 Library Extra Files + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
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+ +
+
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+Modules
+
+
EFR32 IEC60730 Library Extra Files
EFR32 IEC60730 Library
+
+
+ +

Extra files for the EFR32 IEC Library. +More...

+
+Collaboration diagram for EFR32 IEC60730 Library Extra Files:
+
+
+
+ + + + + + + + + + + +

+Modules

 Silicon Labs Coding Standard
 Silicon Labs Coding Standard.
 
 Release Notes
 Release Notes for the IEC60730 Library.
 
 Silicon Labs Software License Agreement
 License Agreement for the IEC60730 Library.
 
+

Detailed Description

+

Extra files for the EFR32 IEC Library.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__GPIO__PLAUSIBILTY__Test.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__GPIO__PLAUSIBILTY__Test.dot new file mode 100644 index 00000000..5e04bd9d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__GPIO__PLAUSIBILTY__Test.dot @@ -0,0 +1,9 @@ +digraph "GPIO Plausibility Test" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node1 [label="GPIO Plausibility Test",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Verifies GPIOs work properly."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__GPIO__PLAUSIBILTY__Test.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__GPIO__PLAUSIBILTY__Test.html new file mode 100644 index 00000000..21a5d059 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__GPIO__PLAUSIBILTY__Test.html @@ -0,0 +1,86 @@ + + + + + + + +IEC_60730: GPIO Plausibility Test + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+
GPIO Plausibility Test
EFR32 IEC60730 Library
+
+
+ +

Verifies GPIOs work properly. +More...

+
+Collaboration diagram for GPIO Plausibility Test:
+
+
+
+

Verifies GPIOs work properly.

+

A GPIO plausibility test example is not possible with the EFR32 STK. Details on functional safety with GPIOs will be included in the EFR32 IEC60730 application note.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__Test.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__Test.dot new file mode 100644 index 00000000..28a5dc5a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__Test.dot @@ -0,0 +1,9 @@ +digraph "Invariable Memory Check" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node1 [label="Invariable Memory Check",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Verifies contents of flash memory."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__Test.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__Test.html new file mode 100644 index 00000000..02969c9f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__Test.html @@ -0,0 +1,614 @@ + + + + + + + +IEC_60730: Invariable Memory Check + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Macros | +Typedefs | +Enumerations | +Functions | +Variables
+
+
Invariable Memory Check
EFR32 IEC60730 Library
+
+
+ +

Verifies contents of flash memory. +More...

+
+Collaboration diagram for Invariable Memory Check:
+
+
+
+ + + + + + + +

+Classes

struct  imcParams_t
 This structure is used as configuration for IMC testing, that holds GPCRC Register. More...
 
struct  updateCrcParams_t
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define FLASH_BLOCK   (64)
 
#define ROM_END   ((uint32_t *) (&check_sum))
 
#define ROM_SIZE   ((uint32_t) ROM_END - (uint32_t) ROM_START)
 
#define STEPS_NUMBER   ((uint32_t) ROM_SIZE / FLASH_BLOCK)
 
#define ROM_SIZE_INWORDS   ((uint32_t) ROM_SIZE / 4U)
 
#define FLASH_BLOCK_WORDS   ((uint32_t) (ROM_SIZE_INWORDS / STEPS_NUMBER))
 
#define REF_CRC   (check_sum)
 
+#define DEFAULT_GPRC   GPCRC
 
#define IMC_CRCBUFFER_SAMPLETEST   "123456789"
 
+#define IMC_CRCBUFFER_INIT_VALUE   (0xFFFF)
 
+#define IMC_CRCBUFFER_XOROUTPUT   (0x0000)
 
+#define IMC_CRCBUFFER_SAMPLERESULT   (0x29B1)
 
#define IMC_CRCBUFFER_INIT_DEFAULT
 
#define IMC_CRCBUFFER_UPDATE_DEFAULT
 
+#define IMC_INIT_VALUE   (0x0000)
 
+#define IMC_XOROUTPUT   (0x0000)
 
#define IMC_INIT_DEFAULT
 
+ + + + + + +

+Typedefs

+typedef uint16_t crc_t
 
+typedef uint8_t readType_t
 The way to read CRC value when using function iec60730_updateCRCWithDataBuffer.
 
+ + + +

+Enumerations

enum  { IMC_DATA_READ = 0, +IMC_DATA_READ_BIT_REVERSED, +IMC_DATA_READ_BYTE_REVERSED + }
 
+ + + + + + + + + +

+Functions

void iec60730_ImcInit (imcParams_t *params)
 
iec60730_TestResult_t iec60730_updateCRCWithDataBuffer (updateCrcParams_t *params, crc_t *crc, uint8_t *buffer, uint32_t size)
 
iec60730_TestResult_t iec60730_ImcPost (imcParams_t *params)
 
iec60730_TestResult_t iec60730_ImcBist (imcParams_t *params)
 
+ + + +

+Variables

crc_t check_sum
 
+

Detailed Description

+

Verifies contents of flash memory.

+

+Hardware Architecture

+

In the current version, the calculation of CRC for Flash is calculated starting from the starting address of the Flash (that value can be changed) to the end address whose value is specified by the address of the check_sum variable. Currently, the check_sum variable is set to the end address of user code that uses IEC Library.

+

To test the Flash memory, a Cyclic Redundancy Check (CRC) is computed and compared with a value stored in Flash. Any change in the Flash will cause the CRC not to match the stored value.

+

We support multiple calculation modes. These modes are selected by the user. User adds definitions to use these modes. Please reference to definitions #CRC_DEBUG, #CRC_USE_SW, and #USE_CRC_32 for more detail.

+

+Failure Risks

+

As electrically eraseable memories, the primary risk with Flash is losing charge. Normal memory concerns such as stuck-at, coupling, and address faults may also occur. All these faults will be detected by a CRC across the region. Another risk is the hardware CRC module operating incorrectly. In this case, the CRC comparison will fail and iec60730_SafeState() will begin.

+

+Software Architecture

+

The Invariable Memory Check (IMC) validates that the Flash memory storing the firmware and any persistent configuration information has not been corrupted. The IMC calculates a CRC across designated areas to verify their contents.

+

We support calculation CRC by using hardware and software. The default CRC is hardware calculation. User CAN use the #CRC_USE_SW definition in case using CRC software.

+

With case CRC software is chosen, the default is calculate CRC-table in initialization process. User CAN use the #SW_CRC_TABLE definition in case using pre-defined table.

+

We support both CRC-16 and CRC-32 mode. With CRC-16, the CRC engine is configured to use the CRC-16/XMODEM polynominal 0x1021. With CRC-32, the CRC engine is configured to use the CRC-32 polynominal 0x04C11DB7. The default is CRC-16 mode. In case using CRC-32, user SHOULD define the #USE_CRC_32 definition.

+

We also provide scripts named gcc_crc16.sh (for CRC-16 mode) and gcc_crc32.sh (for CRC-32 mode) which is used in Post Build process to calculate CRC value of the Flash and place this CRC value at the end of user code determined by address of check_sum variable. We WILL call these scripts with the common name gcc_crcXY. Don't worry about the gcc prefix, these scripts work for both GCC and IAR compiler. To use these scripts, user SHOULD install srecord that can be downloaded (.exe) file for Window OS or run command as below for Linux OS.

+
$sudo apt install srecord
+

Script gcc_crcXY requires the following parameters

Parameters
+ + + + + + + +
$1Name of your project.
$2Directory of building. This directory MUST contain *.hex file and *.map file. The *.map file MUST contains check_sum variable.
$3Path of srecord. With Linux OS, it SHOULD be blank. With Win OS, it SHOULD be the path to install folder of srecord. For example: 'C:\srecord-1.64-win32' in Win OS.
$4Compiler: GCC or IAR.
$5Start address of Flash.
$6True for non-secure. False otherwise.
+
+
+

The struct imcParams_t is used to manage hardware configuration of CRC. In case using CRC software (define #CRC_USE_SW), you can pass NULL pointer to function use this struct.

+

We use a pair of variables to check intergrity. Using the following macros in case you want to work with pair of variables need to be checked intergrity. These macros are defined in sl_iec60730.h file.

+ +

Some detail about implementing of IMC and using variables for testing purpose. These ariables are also used in the test cases (TC) of the IMC module.

+

    +
  • Variable refCrc is variable that is stored on (*.classb_ram*) section. In case user use definition #CRC_DEBUG for debug purpose, refCrc variable is useful for debug purpose. Value of refCrc is calculated in iec60730_ImcPost function. This value SHOULD be equal value that stored in address of check_sum.
    • +
+

    +
  • Variable curCrc is variable that stores on (*.classb_ram*) section. This variable is CRC calculated value after each function call iec60730_ImcBist. That means this value will be accumulated for each step of BIST. After checking all Flash, the final value of curCrc under normal conditions, no exception SHOULD be equal to the value stored in Flash.
    • +
+

+

To provide complete definitions of IMC modules, in #IEC_BOARD_HEADER file, user SHOULD pay attention to the #ROM_START definition. The STEPS_NUMBER, ROM_SIZE_INWORDS, and FLASH_BLOCK_WORDS definitions SHOULD use our default definitions. The FLASH_BLOCK, ROM_END, and REF_CRC definitions can be redefined by the user but SHOULD not be recommended unless the user has knowledge of linker and Flash configuration.

+

Figure 1 describes a Flash with multiple applications on that. These applications are named Application 1, Application 2, ..., Application N, and Application (N+1). Where Application N is a main application that uses the IEC library.

+

+ +
+Figure 1 Example of calculating CRC
+

The #ROM_START definition can be placed anywhere that guarantees the description of #ROM_START. As you can see in Figure 1, it is possible that #ROM_START is either #ROM_START (1) or #ROM_START (N).

+

The ROM_END definition as described at the address of the variable check_sum. As the linker files is used in our example will be at address the end of Application (N). The CRC calculation will go from address #ROM_START to ROM_END.

+

With #ROM_START (1) we calculate CRC (1) and with #ROM_START (N) we calculate CRC (N). The CRC value is calculated and placed at the location of the variable check_sum. Calculating and placing are implemented by script gcc_crcXY.

+

In this example you see that Application (N + 1) is an application that does not use the IEC library. Our reference solutions DO NOT support customizing check_sum anywhere in Flash. Therefore, the CRC calculation WILL not cover the Flash area of Application (N + 1).

+

In case the user edits their linker to let the check_sum variable go to any location (of course larger than #ROM_START), the IMC modules WILL still work normally. For example, the user adjust the address of check_sum to the end address of Flash of Application (N + 1), then the CRC calculation WILL completely cover Application (N + 1).

+

Function iec60730_ImcPost() checks for all the invariable memory areas have been configured.

+

On BIST, partial memory sections are tested to keep overall BIST test time reasonable. Global variables store the current location being tested and other information. Each call to iec60730_ImcBist() it checks #INVAR_BLOCKS_PER_BIST. If after the calculation, the CRC does not match the expected value iec60730_TestFailed is returned. If it does match, the global variables are configured for the next CRC entry. If all areas are complete, iec60730_TestPassed is returned. If all areas are not complete, iec60730_TestInProgress is returned.

+

+ +
+Figure 2 Flow chart of Invariable Memory Check BIST&POST
+

Macro Definition Documentation

+ +

◆ FLASH_BLOCK

+ +
+
+ + + + +
#define FLASH_BLOCK   (64)
+
+

The FLASH_BLOCK definition is size of block of Flash. The value of this definition SHOULD be a power of two. The minimal value SHOULD be 4 and maximum value SHOULD be the alignment value that is defined in linker (GCC compiler) or in configuration of IAR. Our example use alignment 64 for check_sum variable. So that in our example the FLASH_BLOCK definition is 64. User can refer to our example linker on how to provide check_sum variable with alignment 64.

+ +
+
+ +

◆ FLASH_BLOCK_WORDS

+ +
+
+ + + + +
#define FLASH_BLOCK_WORDS   ((uint32_t) (ROM_SIZE_INWORDS / STEPS_NUMBER))
+
+

The FLASH_BLOCK_WORDS definitionn WILL be defined base on ROM_SIZE_INWORDS and STEPS_NUMBER definitions. User SHOULD not change it.

+ +
+
+ +

◆ IMC_CRCBUFFER_INIT_DEFAULT

+ +
+
+ + + + +
#define IMC_CRCBUFFER_INIT_DEFAULT
+
+Value:
{ \
+
0x1021UL, \
+
IMC_CRCBUFFER_INIT_VALUE, \
+
false, \
+
true, \
+
false, \
+
false, \
+
true, \
+
}
+
+
+
+ +

◆ IMC_CRCBUFFER_SAMPLETEST

+ +
+
+ + + + +
#define IMC_CRCBUFFER_SAMPLETEST   "123456789"
+
+

This macro is the sample test buffer used for testing CRC algorithm. This value is used in development phase. User DOES NOT take care this definition.

+ +
+
+ +

◆ IMC_CRCBUFFER_UPDATE_DEFAULT

+ +
+
+ + + + +
#define IMC_CRCBUFFER_UPDATE_DEFAULT
+
+Value:
{{DEFAULT_GPRC}, \
+
IMC_CRCBUFFER_INIT_DEFAULT, \
+
IMC_DATA_READ_BIT_REVERSED, \
+
IMC_CRCBUFFER_XOROUTPUT}
+
+
+
+ +

◆ IMC_INIT_DEFAULT

+ +
+
+ + + + +
#define IMC_INIT_DEFAULT
+
+Value:
{ \
+
0x1021UL, \
+
IMC_INIT_VALUE, \
+
false, \
+
true, \
+
false, \
+
false, \
+
true, \
+
}
+
+
+
+ +

◆ REF_CRC

+ +
+
+ + + + +
#define REF_CRC   (check_sum)
+
+

The REF_CRC definition describes variable that address of this variable store CRC value that is calculated by gcc_crcXY in Post Build. We use check_sum so in our example REF_CRC definition is check_sum.

+ +
+
+ +

◆ ROM_END

+ +
+
+ + + + +
#define ROM_END   ((uint32_t *) (&check_sum))
+
+

The ROM_END definition describes the end address of Flash. It is the address of check_sum variables. In this version, users SHOULD not change this definition. Refer to the example in invariable_memory_check_example_flowchart, to better understand the #ROM_START, and ROM_END definitions.

+ +
+
+ +

◆ ROM_SIZE

+ +
+
+ + + + +
#define ROM_SIZE   ((uint32_t) ROM_END - (uint32_t) ROM_START)
+
+

The ROM_SIZE definition describes the size of Flash calculated CRC value. This calculation based on ROM_END, and #ROM_START definitions.

+ +
+
+ +

◆ ROM_SIZE_INWORDS

+ +
+
+ + + + +
#define ROM_SIZE_INWORDS   ((uint32_t) ROM_SIZE / 4U)
+
+

The ROM_SIZE_INWORDS definitionn WILL be defined base on ROM_SIZE definition. User SHOULD not change it.

+ +
+
+ +

◆ STEPS_NUMBER

+ +
+
+ + + + +
#define STEPS_NUMBER   ((uint32_t) ROM_SIZE / FLASH_BLOCK)
+
+

The STEPS_NUMBER definitionn WILL be defined base on ROM_SIZE and FLASH_BLOCK definition. User SHOULD not change it.

+ +
+
+

Enumeration Type Documentation

+ +

◆ anonymous enum

+ +
+
+ + + + +
anonymous enum
+
+ + + + +
Enumerator
IMC_DATA_READ 

use function GPCRC_DataRead to read CRC

+
IMC_DATA_READ_BIT_REVERSED 

use function GPCRC_DataReadBitReversed to read CRC

+
IMC_DATA_READ_BYTE_REVERSED 

use function GPCRC_DataReadByteReversed to read CRC

+
+ +
+
+

Function Documentation

+ +

◆ iec60730_ImcBist()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_ImcBist (imcParams_t * params)
+
+

public IEC60730 Invariable Memory Check BIST

+
Parameters
+ + +
paramsinput parameter of struct imcParams_t form
+
+
+
Returns
iec60730_TestResult_t. +
+

Performs a CRC check across all defined memory areas. For details how iec60730_ImcBist work, please refer to Software Architecture

+

Requires iec60730_ImcInit to be called first to setup global variables.

+ +
+
+ +

◆ iec60730_ImcInit()

+ +
+
+ + + + + + + + +
void iec60730_ImcInit (imcParams_t * params)
+
+

public IEC60730 Invariable Memory Check (IMC) Init

+
Parameters
+ + +
paramsinput parameter of struct imcParams_t form
+
+
+
Returns
void
+

Performs a initialization of global variables and hardware configuration in case hardware support.

+ +
+
+ +

◆ iec60730_ImcPost()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_ImcPost (imcParams_t * params)
+
+

public IEC60730 Invariable Memory Check POST

+
Parameters
+ + +
paramsinput parameter of struct imcParams_t form
+
+
+
Returns
iec60730_TestResult_t. +
+

Performs a CRC check across all defined memory areas.

+ +
+
+ +

◆ iec60730_updateCRCWithDataBuffer()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
iec60730_TestResult_t iec60730_updateCRCWithDataBuffer (updateCrcParams_t * params,
crc_t * crc,
uint8_t * buffer,
uint32_t size 
)
+
+

public IEC60730 Update CRC git pull with Data Buffer

+
Parameters
+ + + + + +
paramsinput parameter of struct updateCrcParams_t form
crcThe CRC to be updated. The initial value of crc is also initial value of CRC calculation.
bufferA contiguous array of 1-byte values to be used to update the CRC.
sizeThe number of bytes stored in the buffer.
+
+
+
Returns
iec60730_TestResult_t. +
+

This routine takes a CRC and updates it using a buffer of one or more bytes of data. For details on the CRC polynomial used, see Hardware Architecture

+ +
+
+

Variable Documentation

+ +

◆ check_sum

+ +
+
+ + + + +
crc_t check_sum
+
+

The end address of Flash is specified by the address of the check_sum variable. This variable is provided by linker in GCC or generated by configurations in IAR.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.dot new file mode 100644 index 00000000..dcf9e2e6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.dot @@ -0,0 +1,9 @@ +digraph "Invariable Memory Automated Verification Tests" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="IEC60730 Test Specification",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__VERIFICATION.html",tooltip="Automated tests for validating correct firmware operation."]; + Node1 [label="Invariable Memory Automated\l Verification Tests",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Python script for the IEC60730 Invariable Memory plausibility verification tests."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html new file mode 100644 index 00000000..2d3026ca --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html @@ -0,0 +1,309 @@ + + + + + + + +IEC_60730: Invariable Memory Automated Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions | +Variables
+
+
Invariable Memory Automated Verification Tests
EFR32 IEC60730 Library » IEC60730 Test Specification
+
+
+ +

Python script for the IEC60730 Invariable Memory plausibility verification tests. +More...

+
+Collaboration diagram for Invariable Memory Automated Verification Tests:
+
+
+
+ + + + + +

+Classes

class  iec60730_invariable_memory.iec60730_imc
 IEC60730 Invariable Memory Plausibility Verification Tests. More...
 
+ + + + + + + + + + + + + + + + + + + + + + +

+Functions

+def iec60730_invariable_memory.iec60730_imc.setUp (self)
 
+def iec60730_invariable_memory.iec60730_imc.set_breakpoint (self, label)
 
+def iec60730_invariable_memory.iec60730_imc.reach_to_breakpoint (self, label, setbkp, time)
 
def iec60730_invariable_memory.iec60730_imc.test_CalCRC_Full_Memory (self)
 Verify the DUT calculation of CRC value at POST. More...
 
def iec60730_invariable_memory.iec60730_imc.test_CorruptCRC_Full_Memory (self)
 Verify the DUT jump to iec60730_SafeState when flash faied at POST. More...
 
def iec60730_invariable_memory.iec60730_imc.test_CalCRC_Block_Memory (self)
 Verify the DUT calculation of CRC value at BIST. More...
 
def iec60730_invariable_memory.iec60730_imc.test_CorruptCRC_CalCRC_Block_Memory (self)
 Verify the DUT jump to iec60730_SafeState when flash faied at BIST. More...
 
def iec60730_invariable_memory.iec60730_imc.test_CorruptIntegrity_RunCRC_Block_Memory (self)
 Verify integrity of runCrc variable. More...
 
+ + + + + + + + + + + + + + + + + + + +

+Variables

+bool iec60730_invariable_memory.is_crc32 = False
 
+string iec60730_invariable_memory.iec60730_imc.TEST_SUITE_NAME = "IMC"
 
+ sl_iec60730_invariable_memory.chip_name = os.getenv('CHIP')
 
+ iec60730_invariable_memory.app_type = os.getenv('APP_TYPE')
 
+ iec60730_invariable_memory.lst_file_path = os.getenv('LST_PATH')
 
+ iec60730_invariable_memory.adapter_serial_no = os.getenv('ADAPTER_SN')
 
+ iec60730_invariable_memory.lib_path = os.getenv('JLINK_PATH')
 
+ iec60730_invariable_memory.line = sys.argv.pop()
 
+ sl_iec60730_invariable_memory.compiler = line
 
+

Detailed Description

+

Python script for the IEC60730 Invariable Memory plausibility verification tests.

+

For details on the tests, see iec60730_invariable_memory.iec60730_invariable_memory.

+

+Test Results

+

EFR32 Device| Test Results ---------—|----------—

+

Function Documentation

+ +

◆ test_CalCRC_Block_Memory()

+ +
+
+ + + + + + + + +
def iec60730_invariable_memory.iec60730_imc.test_CalCRC_Block_Memory ( self)
+
+ +

Verify the DUT calculation of CRC value at BIST.

+

This TC checks under normal conditions with no exceptions, firmware will calculate the CRC values for each step of BIST and accumulate these values. Finally, the calculated CRC value SHOULD be equal to the value stored in the flash.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reachs breakpoint at IEC60730_IMC_BIST_CRCBLOCK_BKPT
    • +
  • Loop with IEC60730_IMC_BIST_CALCRC_BKPT
    • +
  • Verify code reachs breakpoint at IEC60730_IMC_BIST_END_BKPT (success)
    • +
+
Returns
True
+ +
+
+ +

◆ test_CalCRC_Full_Memory()

+ +
+
+ + + + + + + + +
def iec60730_invariable_memory.iec60730_imc.test_CalCRC_Full_Memory ( self)
+
+ +

Verify the DUT calculation of CRC value at POST.

+

This test case (TC) checks under normal conditions with no exceptions, firmware will calculate the CRC of the entire flash, the calculated value SHOULD be equal to the calculated value stored in the flash.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reachs breakpoint at IEC60730_IMC_POST_START_BKPT
    • +
  • Verify code reachs breakpoint at IEC60730_IMC_POST_REFCRC_BKPT
    • +
  • Verify code reachs breakpoint at IEC60730_IMC_POST_END_BKPT
    • +
+
Returns
True
+ +
+
+ +

◆ test_CorruptCRC_CalCRC_Block_Memory()

+ +
+
+ + + + + + + + +
def iec60730_invariable_memory.iec60730_imc.test_CorruptCRC_CalCRC_Block_Memory ( self)
+
+ +

Verify the DUT jump to iec60730_SafeState when flash faied at BIST.

+

This TC simulates an abnormal situation that causes the variable curCrc to be changed, resulting in the calculated CRC value for the entire flash being different from the value stored in the flash. This leads to jump to break point at iec60730_SafeState.

+

In the IMC documentation there is a detailed description of the variable curCrc.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reachs breakpoint at IEC60730_IMC_BIST_CALCRC_BKPT +
    • +
+
Returns
True
+ +
+
+ +

◆ test_CorruptCRC_Full_Memory()

+ +
+
+ + + + + + + + +
def iec60730_invariable_memory.iec60730_imc.test_CorruptCRC_Full_Memory ( self)
+
+ +

Verify the DUT jump to iec60730_SafeState when flash faied at POST.

+

This TC simulates an abnormal situation that causes the variable refCrc to be changed, resulting in the calculated CRC value for the entire flash being different from the value stored in the flash. This leads to jump to break point at iec60730_SafeState.

+

In the IMC documentation there is a detailed description of the variable refCrc.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reachs breakpoint at IEC60730_IMC_POST_START_BKPT
    • +
  • Verify code reachs breakpoint at IEC60730_IMC_POST_REFCRC_BKPT +
    • +
+
Returns
True
+ +
+
+ +

◆ test_CorruptIntegrity_RunCRC_Block_Memory()

+ +
+
+ + + + + + + + +
def iec60730_invariable_memory.iec60730_imc.test_CorruptIntegrity_RunCRC_Block_Memory ( self)
+
+ +

Verify integrity of runCrc variable.

+

This TC simulates an abnormal situation that causes the variable runCrc to be changed, resulting in the calculated CRC value for the entire flash being different from the value stored in the flash. This leads to jump to break point at iec60730_SafeState.

+

In the IMC documentation there is a detailed description of the variable runCrc.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reachs breakpoint at IEC60730_IMC_BIST_CRCBLOCK_BKPT +
    • +
+
Returns
True
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__Test.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__Test.dot new file mode 100644 index 00000000..9aa59b6a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__Test.dot @@ -0,0 +1,9 @@ +digraph "IRQ Test" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node1 [label="IRQ Test",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Verifies interrupt frequency is within bounds."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__Test.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__Test.html new file mode 100644 index 00000000..637e1bda --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__Test.html @@ -0,0 +1,258 @@ + + + + + + + +IEC_60730: IRQ Test + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions
+
+
IRQ Test
EFR32 IEC60730 Library
+
+
+ +

Verifies interrupt frequency is within bounds. +More...

+
+Collaboration diagram for IRQ Test:
+
+
+
+ + + + +

+Classes

struct  iec60730_IRQExecutionBounds_t
 
+ + + + + + + + + +

+Functions

 SI_SEGMENT_VARIABLE (iec60730_IRQExecCount[], uint8_t, SI_SEG_DATA)
 
 SI_SEGMENT_CONST (iec60730_IRQFreqBounds[], iec60730_IRQExecutionBounds_t, SI_SEG_CODE)
 
 SI_SEGMENT_CONST (iec60730_IRQFreqBoundsSize, uint8_t, SI_SEG_CODE)
 
void iec60730_IRQCheck (void)
 
+

Detailed Description

+

Verifies interrupt frequency is within bounds.

+

The interrupt plausibility test checks that enabled interrupts are executing at a frequency that is within expected minimum and maximum bounds every test timer period.

+

OEM firmware is responsible for setting expected minimum and maximum bounds for each enabled interrupt in the #iec60730_IRQFreqBounds structure. The OEM is also responsible for incrementing the element in the #iec60730_IRQExecCount array inside each enabled interrupt. In iec60730_IRQCheck(), which executes as part of the test timer-driven tests of the BIST, this counter array is compared with the defined bounds to determine whether each interrupt is operating within safe parameters.

+

+Hardware Architecture

+

Most hardware-implemented peripherals in Silicon Labs EFR32 devices offer the ability to vector to an interrupt service routine in order to quickly respond peripheral-related events and state updates.

+

In order to vector to an interrupt from executing foreground code, hardware pushes the program counter to the stack and vectors to a hardware-defined entry in a vector table stored in non-volatile memory in a region of Flash. The code of the interrupt service routine is either stored directly within this table entry, or stored elsewhere in memory and accessed through a jump instruction placed in the vector table, depending on the size of the interrupt service routine.

+

Once the function body of the interrupt service routine has completed executing, the program counter is pop from the stack and returns to foreground code to continue execution.

+

Each interrupt has a flag in a register that must be cleared inside the interrupt service routine function to signal that the interrupt has been processed in firmware. Failure to clear this flag inside the function body will result in the hardware immediately vectoring back to the interrupt.

+

+Failure Risks

+

It is the OEM's responsibility to accurately estimate the frequency of each enabled interrupt in a firmware project. For interrupts that are asynchronous and may not execute at all within a test timer period, the lower bounds for the interrupt should be set to 0.

+

It is also the OEM's responsibility to increment values in #iec60730_IRQExecCount once and only once per interrupt execution. Failure to include this incrementing command will result in an interrupt that appears to be executing below minimum defined bounds, which will force safe state entry.

+

The OEM should also be mindful of all hardware-related constraints of each interrupt. Failure to clear an interrupt flag inside an interrupt service routine will cause the routine to execute repeatedly, which will increment an #iec60730_IRQExecCount entry beyond upper bounds and cause a safe state entry.

+

The OEM must also perform a bounds check on the element in #iec60730_IRQExecCount being incremented to ensure that the counter does not exceed the upper bounds defined by its data type and overflow back to 0. Failure to perform this bounds check could have the effect of creating a passing IRQ plausibility test when the interrupt is actually running outside of defined limits.

+

+Software Architecture

+

The interrupt plausibility test function relies on an array of counters called #iec60730_IRQExecCount, stored in volatile memory and an array of struct iec60730_IRQExecutionBounds_t found in non-volatile memory and called #iec60730_IRQFreqBounds. OEM firmware increments bytes in #iec60730_IRQExecCount during execution of each enabled interrupt service routine. When the test timer interrupt occurs, iec60730_IRQCheck() executes. Inside this function, firmware compares the count values to the bound values, and sets #iec60730_SafetyCheck to iec60730_InterruptFail if a count exceeds either the minimum or maximum bounds. The next execution of the BIST routine will detect the iec60730_TestFailed state and enter safe state. A flowchart of this functionality is shown in Figure 1.

+

For more information on configuration of the test timer, please see System clock plausibility test.

+

\

+ +
+Figure 1 Flow chart of interrupt plausibility check
+

Function Documentation

+ +

◆ iec60730_IRQCheck()

+ +
+
+ + + + + + + + +
void iec60730_IRQCheck (void )
+
+

public IEC60730 Interrupt plausibility check

+
Returns
None.
+

This function compares each entry in #iec60730_IRQExecCount with its corresponding bounds defined in #iec60730_IRQFreqBounds. If the entry is found to exceed the defined bounds, #iec60730_SafetyCheck is set to iec60730_InterruptFail. Otherwise no action is taken. The function ends by setting IEC60730_INTERRUPT_COMPLETE in #iec60730_programmeCounterCheck.

+ +
+
+ +

◆ SI_SEGMENT_CONST() [1/2]

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
SI_SEGMENT_CONST (iec60730_IRQFreqBounds [],
iec60730_IRQExecutionBounds_t ,
SI_SEG_CODE  
)
+
+

Defines expected interrupt min/max boundaries for plausibility testing

+

This OEM-defined structure defines the expected minimum and maximum number of executions for every test clock period. The interrupt plausibility test, which executes at the end of a test clock period, compares the number of ISR executions for each ISR as defined in the #iec60730_IRQExecCount array. A count outside the defined bounds results in a safe state entry.

+ +
+
+ +

◆ SI_SEGMENT_CONST() [2/2]

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
SI_SEGMENT_CONST (iec60730_IRQFreqBoundsSize ,
uint8_t ,
SI_SEG_CODE  
)
+
+

Defines number of interrupt entries in #iec60730_IRQFreqBounds

+

This count is used by the test to step through each entry in #iec60730_IRQFreqBounds to determine if the count for each interrupt exceeds expected min/max bounds.

+ +
+
+ +

◆ SI_SEGMENT_VARIABLE()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
SI_SEGMENT_VARIABLE (iec60730_IRQExecCount [],
uint8_t ,
SI_SEG_DATA  
)
+
+

Defines number of interrupt entries in #iec60730_IRQFreqBounds

+

This count is used by the test to step through each entry in #iec60730_IRQFreqBounds to determine if the count for each interrupt exceeds expected min/max bounds. OEM code is responsible for incrementing the element of this array corresponding to the IRQ described by the corresponding element in #iec60730_IRQFreqBounds. The incrementing instruction should only be placed inside the IRQ referred to by the element. The element will be reset to 0 by the interrupt plausibility check executing in iec60730_TestClockTick.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__VERIFICATION.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__VERIFICATION.dot new file mode 100644 index 00000000..74ddf013 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__VERIFICATION.dot @@ -0,0 +1,9 @@ +digraph "IRQ Automated Verification Tests" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node1 [label="IRQ Automated Verification\l Tests",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Python script for the IEC60730 IRQ plausibility verification tests."]; + Node2 [label="IEC60730 Test Specification",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__VERIFICATION.html",tooltip="Automated tests for validating correct firmware operation."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__VERIFICATION.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__VERIFICATION.html new file mode 100644 index 00000000..558f495d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__IRQ__VERIFICATION.html @@ -0,0 +1,131 @@ + + + + + + + +IEC_60730: IRQ Automated Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions | +Variables
+
+
IRQ Automated Verification Tests
EFR32 IEC60730 Library » IEC60730 Test Specification
+
+
+ +

Python script for the IEC60730 IRQ plausibility verification tests. +More...

+
+Collaboration diagram for IRQ Automated Verification Tests:
+
+
+
+ + + + + +

+Classes

class  iec60730_irq.iec60730_irq
 IEC60730 IRQ Plausibility Verification Tests. More...
 
+ + + +

+Functions

+bytes iec60730_irq.int_to_bytes (int number)
 
+ + + + + + + + + + + + + + + +

+Variables

+ sl_iec60730_irq.chip_name = os.getenv('CHIP')
 
+ iec60730_irq.app_type = os.getenv('APP_TYPE')
 
+ iec60730_irq.lst_file_path = os.getenv('LST_PATH')
 
+ iec60730_irq.adapter_serial_no = os.getenv('ADAPTER_SN')
 
+ iec60730_irq.lib_path = os.getenv('JLINK_PATH')
 
+ iec60730_irq.line = sys.argv.pop()
 
+ sl_iec60730_irq.compiler = line
 
+

Detailed Description

+

Python script for the IEC60730 IRQ plausibility verification tests.

+

For details on the tests, see iec60730_irq.iec60730_irq.

+

+Test Results

+

EFR32 Device| Test Results ---------—|----------—

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__OEM__COMM__Test.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__OEM__COMM__Test.dot new file mode 100644 index 00000000..f2dffebf --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__OEM__COMM__Test.dot @@ -0,0 +1,9 @@ +digraph "OEM External Communications Example using UART" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node1 [label="OEM External Communications\l Example using UART",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Verifies communication channel is operating as expected."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__OEM__COMM__Test.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__OEM__COMM__Test.html new file mode 100644 index 00000000..01bc50e6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__OEM__COMM__Test.html @@ -0,0 +1,112 @@ + + + + + + + +IEC_60730: OEM External Communications Example using UART + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+
OEM External Communications Example using UART
EFR32 IEC60730 Library
+
+
+ +

Verifies communication channel is operating as expected. +More...

+
+Collaboration diagram for OEM External Communications Example using UART:
+
+
+
+

Verifies communication channel is operating as expected.

+

+Hardware Architecture

+

For communications interfaces to be IEC compliant, they must meet the following conditions:

    +
  1. Provide address redundancy, transmitting the sender's unique address
    2. +
  2. CRC coverage of transmission bytes
    3. +
  3. Scheduled transmission
    4. +
+

Each type of hardware-implemented serial interface supported by a device must meet the three above communications requirements using a combination of hardware features and firmware-implemented support.

+

For I2C interfaces, the protocol requires that a transaction begin with a slave address identifying the intended recipient of the message, which meets requirement 1. Each message transferred must end with a 2-byte CRC covering all transmitted bytes. Hardware CRC generation is available on some devices and a buffer of bytes can generate a CRC using the iec60730_updateCRCWithDataBuffer provided, which meets requirement #2. Requirement #3 can be met by initiating a periodic transaction using the test timer allocated for the system clock plausibility check.

+

A SPI interface meets the requirements above in a way that is similar to the I2C interface, except that an address must be included through firmware, because the protocol and the hardware do not support a slave address inherently.

+

A UART interface meets requirements similar to a SPI interface, where the address must be transmitted through firmware implemented protocol.

+

+Failure Risks

+

A disruption of the serial interface signals/clocks could cause a bit error or a timing-related issue. This will result in a CRC mismatch when the receiver of the message processes the packet, and safe state entrance.

+

If the device sending status packets to a host gets somehow stuck in such a state where it is unable to transmit status packets, the receiver expecting periodic packets will enter safe state after a bounded amount of time, likely governed by a bist frequency check that determines no status packets have been received within a frequency check interval. Based on suggested configuration of the bist frequency check period, the upper limit for time between reception of a status packet would be 1 second. Based on suggested configuration of the test timer, typically the status packet will be transmitted once every 100 ms.

+

All serial interfaces require some amount of port configuration to ensure that correct pins are digital inputs and outputs, open drain or push-pull. Without these requirements being met, the device will be unable to transmit and receive data packets properly, which will result in a safe state entrance by one or both of the devices communicating across a serial interface.

+

+Software Architecture

+

The library provides a support function iec60730_updateCRCWithDataBuffer() to generate the CRC of a buffer being transmitted. OEM firmware is responsible for interfacing with serial communication hardware to send packets that begin with address information to identify the sender and end with a 2-byte CRC.

+

In order to transmit a status packet, the device needs to allocate an on-chip timer, or use the test timer already allocated for the system clock plausibility check.

+

Devices receiving status packets rely on a bist frequency check where one requirement for the comm plausibility test to have executed successfully is the reception of a valid status packet.

+

Figure 1 shows the main components of both a receiver and a transmitter of a compliant serial interface. Note that received packages are processed by checking for an address and a valid CRC. Additionally, a bist frequency check determines whether status packets are being received at an acceptable rate. For transmission, all data payloads go through firmware that adds required address and CRC information. Additionally, the test timer interrupt service routine initiates a periodic transmission of a status packet.

+
+ +
+Figure 1 comm plausibility check flowchart
+

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__POST.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__POST.dot new file mode 100644 index 00000000..6d684f68 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__POST.dot @@ -0,0 +1,9 @@ +digraph "POST" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node1 [label="POST",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Power On Self Test - Executed once during power up."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__POST.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__POST.html new file mode 100644 index 00000000..8fec4c84 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__POST.html @@ -0,0 +1,583 @@ + + + + + + + +IEC_60730: POST + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Macros | +Enumerations | +Functions | +Variables
+
+
POST
EFR32 IEC60730 Library
+
+
+ +

Power On Self Test - Executed once during power up. +More...

+
+Collaboration diagram for POST:
+
+
+
+ + + + +

+Classes

struct  iec60730_LibraryVersion_t
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

+#define IE60730_LIBRARY_VERSION   {1, 2, 0}
 IEC60370 library version. Modified by build jobs to correct version.
 
#define UNUSED_VAR(x)   (void) (x)
 
+#define __CONCAT(x, y)   x##y
 
+#define CONCAT(x, y)   __CONCAT(x, y)
 
+#define STR(x)   #x
 
+#define XSTR(x)   STR(x)
 
#define LABEL_DEF(NAME)   LB_ASM volatile(LB_XSTR(NAME))
 
#define __CLASSB_RAM   __attribute__((section(".classb_ram")))
 
#define __RT_BUF   __attribute__((section(".rt_buf")))
 
#define __OVERLAP   __attribute__((section(".overlap")))
 
#define DEC_CLASSB_VARS(vartype, name)
 
#define EXTERN_DEC_CLASSB_VARS(vartype, name)
 
#define sl_static_dec_classb_vars(vartype, name)
 
#define INV_CLASSB_VAR(vartype, name)   CONCAT(name, Inv) = (vartype) (~(vartype) name)
 
#define INV_CLASSB_PVAR(vartype, name)   CONCAT(name, Inv) = (vartype *) (~(vartype) name)
 
#define CHECK_INTEGRITY(vartype, x)   ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, Inv)))
 
+ + + + + + + +

+Enumerations

enum  iec60730_TestResult_t { iec60730_TestFailed = 0, +iec60730_TestPassed = 1, +iec60730_TestInProgress = 2 + }
 The result of a test. More...
 
enum  iec60730_TestFailure_t {
+  iec60730_NoFailure = 0, +iec60730_TestVerify, +iec60730_WatchdogPostFail = 2, +iec60730_VMCFail = 3, +
+  iec60730_IMCFail = 4, +iec60730_CpuRegistersFail = 5, +iec60730_ClockFail = 6, +iec60730_InterruptFail, +
+  iec60730_ProgrammeCounterFail, +iec60730_GpioFail = 9, +iec60730_AnalogFail = 10, +iec60730_Cs0Fail = 11, +
+  iec60730_LeSense0Fail = 12, +iec60730_RadioFail = 13, +iec60730_I2C0Fail = 14, +iec60730_I2C1Fail = 15, +
+  iec60730_Usart0Fail = 16, +iec60730_Usart1Fail = 17, +iec60730_Usart2Fail = 18, +iec60730_Usart3Fail = 19, +
+  iec60730_LeUart0Fail = 20, +iec60730_Euart0Fail = 21, +iec60730_Pdm0Fail = 22, +iec60730_OEMFail_1 = 23, +
+  iec60730_OEMFail_2 = 24, +iec60730_OEMFail_3 = 25, +iec60730_OEMFail_4 = 26 +
+ }
 Cause of failure passed to Safe State function. More...
 
+ + + +

+Functions

void iec60730_Post (void)
 
+ + + + +

+Variables

+const iec60730_LibraryVersion_t iec60730_LibraryVersion
 Global variable which holds the IEC60370 library version.
 
+

Detailed Description

+

Power On Self Test - Executed once during power up.

+

iec60730_Post() validates system health before starting execution of the main loop. It must be called first in the main() function. If the result of a test routine is a failure, iec60730_SafeState() is called.

+

Macro Definition Documentation

+ +

◆ __CLASSB_RAM

+ +
+
+ + + + +
#define __CLASSB_RAM   __attribute__((section(".classb_ram")))
+
+

The __CLASSB_RAM macro is used to define (.classb_ram) section.

+ +
+
+ +

◆ __OVERLAP

+ +
+
+ + + + +
#define __OVERLAP   __attribute__((section(".overlap")))
+
+

The __OVERLAP macro is used to define (.overlap) section.

+ +
+
+ +

◆ __RT_BUF

+ +
+
+ + + + +
#define __RT_BUF   __attribute__((section(".rt_buf")))
+
+

The __RT_BUF macro is used to define (.rt_buf) section.

+ +
+
+ +

◆ CHECK_INTEGRITY

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define CHECK_INTEGRITY( vartype,
 x 
)   ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, Inv)))
+
+

The CHECK_INTEGRITY definition used for checking integrity of pair of variables stored in *.classb_ram* section.

+ +
+
+ +

◆ DEC_CLASSB_VARS

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define DEC_CLASSB_VARS( vartype,
 name 
)
+
+Value:
__no_init vartype name __CLASSB_RAM; \
+
__no_init vartype CONCAT(name, Inv) __CLASSB_RAM
+

The DEC_CLASSB_VARS definition is used for declaring pair of classsb_ram variables.

+ +
+
+ +

◆ EXTERN_DEC_CLASSB_VARS

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define EXTERN_DEC_CLASSB_VARS( vartype,
 name 
)
+
+Value:
extern __no_init vartype name __CLASSB_RAM; \
+
extern __no_init vartype CONCAT(name, Inv) __CLASSB_RAM
+

The EXTERN_DEC_CLASSB_VARS definition is extern of pair of DEC_CLASSB_VARS

+ +
+
+ +

◆ INV_CLASSB_PVAR

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define INV_CLASSB_PVAR( vartype,
 name 
)   CONCAT(name, Inv) = (vartype *) (~(vartype) name)
+
+

The INV_CLASSB_PVAR macro is used to inverse a Inv value of pointer pair DEC_CLASSB_VARS

+ +
+
+ +

◆ INV_CLASSB_VAR

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define INV_CLASSB_VAR( vartype,
 name 
)   CONCAT(name, Inv) = (vartype) (~(vartype) name)
+
+

The INV_CLASSB_VAR macro is used to inverse a Inv value of pair DEC_CLASSB_VARS

+ +
+
+ +

◆ LABEL_DEF

+ +
+
+ + + + + + + + +
#define LABEL_DEF( NAME)   LB_ASM volatile(LB_XSTR(NAME))
+
+

The LABEL_DEF macro is used to generate label for break points. Using this macro avoids label removal by the compiler's optimize levels.

+ +
+
+ +

◆ sl_static_dec_classb_vars

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define sl_static_dec_classb_vars( vartype,
 name 
)
+
+Value:
static __no_init vartype name __CLASSB_RAM; \
+
static __no_init vartype CONCAT(name, Inv) __CLASSB_RAM
+

The sl_static_dec_classb_vars definition used for declaring static pair DEC_CLASSB_VARS

+ +
+
+ +

◆ UNUSED_VAR

+ +
+
+ + + + + + + + +
#define UNUSED_VAR( x)   (void) (x)
+
+

Useful macro for avoiding compiler warnings related to unused function arguments or unused variables.

+ +
+
+

Enumeration Type Documentation

+ +

◆ iec60730_TestFailure_t

+ +
+
+ + + + +
enum iec60730_TestFailure_t
+
+ +

Cause of failure passed to Safe State function.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Enumerator
iec60730_NoFailure 

No failure detected.

+
iec60730_TestVerify 

Special case used for automated verification testing.

+
iec60730_WatchdogPostFail 

Watchdog POST test failed.

+
iec60730_VMCFail 

Variable Memory Check detected a failure.

+
iec60730_IMCFail 

Invariable Memory Check detected a failure.

+
iec60730_CpuRegistersFail 

CPU Registers Check detected a failure.

+
iec60730_ClockFail 

System Clock Check detected a failure.

+
iec60730_InterruptFail 

Interrupt Plausibility Check detected a failure.

+
iec60730_ProgrammeCounterFail 

Program Counter Check detected a failure.

+
iec60730_GpioFail 

GPIO Plausibility Check detected a failure.

+
iec60730_AnalogFail 

Analog Plausibility Check detected a failure.

+
iec60730_Cs0Fail 

CSEN0 detected a failureLESENSE.

+
iec60730_LeSense0Fail 

LESENSE0 detected a failure.

+
iec60730_RadioFail 

Radio comms detected a failure.

+
iec60730_I2C0Fail 

I2C0 comms channel detected a failure.

+
iec60730_I2C1Fail 

I2C1 comms channel detected a failure.

+
iec60730_Usart0Fail 

USART0 comms channel detected a failure.

+
iec60730_Usart1Fail 

USART1 comms channel detected a failure.

+
iec60730_Usart2Fail 

USART2 comms channel detected a failure.

+
iec60730_Usart3Fail 

USART3 comms channel detected a failure.

+
iec60730_LeUart0Fail 

LEUART comms channel detected a failure.

+
iec60730_Euart0Fail 

EUART comms channel detected a failure.

+
iec60730_Pdm0Fail 

PDM comms channel detected a failure.

+
iec60730_OEMFail_1 

OEM defined failure.

+
iec60730_OEMFail_2 

OEM defined failure.

+
iec60730_OEMFail_3 

OEM defined failure.

+
iec60730_OEMFail_4 

OEM defined failure.

+
+ +
+
+ +

◆ iec60730_TestResult_t

+ +
+
+ + + + +
enum iec60730_TestResult_t
+
+ +

The result of a test.

+ + + + +
Enumerator
iec60730_TestFailed 

test result failed

+
iec60730_TestPassed 

test result passed

+
iec60730_TestInProgress 

test is still in progress

+
+ +
+
+

Function Documentation

+ +

◆ iec60730_Post()

+ +
+
+ + + + + + + + +
void iec60730_Post (void )
+
+

public IEC60730 Power On Self Test

+
Returns
None. If validation fails function never returns. If validation passes, function returns.
+

Each module is tested, and if a failure is detected iec60730_SafeState() is called.

+ +
+
+
+
__CLASSB_RAM
#define __CLASSB_RAM
Definition: sl_iec60730.h:331
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER.dot new file mode 100644 index 00000000..375c0430 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER.dot @@ -0,0 +1,9 @@ +digraph "Programme Counter Check" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node1 [label="Programme Counter Check",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Verifies all tests have completed on time."]; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER.html new file mode 100644 index 00000000..d65243d7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER.html @@ -0,0 +1,284 @@ + + + + + + + +IEC_60730: Programme Counter Check + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Macros | +Functions
+
+
Programme Counter Check
EFR32 IEC60730 Library
+
+
+ +

Verifies all tests have completed on time. +More...

+
+Collaboration diagram for Programme Counter Check:
+
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

+#define IEC60730_VMC_COMPLETE   (1 << 0)
 Mask bit used for Variable Memory Checks completed.
 
+#define IEC60730_IMC_COMPLETE   (1 << 1)
 Mask bit used for Invariable Memory Checks completed.
 
+#define IEC60730_CPU_CLOCKS_COMPLETE   (1 << 2)
 Mask bit used for CPU Clocks Checks completed.
 
+#define IEC60730_CPU_REGS_COMPLETE   (1 << 3)
 Mask bit used for CPU Register Checks completed.
 
+#define IEC60730_INTERRUPT_COMPLETE   (1 << 4)
 Mask bit used for Interrupt Checks completed.
 
+#define IEC60730_GPIO_COMPLETE   (1 << 5)
 Mask bit used for GPIO Plausibility Checks completed.
 
+#define IEC60730_ANALOG_COMPLETE   (1 << 6)
 Mask bit used for Analog Plausibility Checks completed.
 
+#define IEC60730_COMMS_COMPLETE   (1 << 7)
 Mask bit used for Communications Plausibility Checks completed.
 
+#define IEC60730_OEM0_COMPLETE   (1 << 8)
 Mask bit used for OEM Check 0 completed.
 
+#define IEC60730_OEM1_COMPLETE   (1 << 9)
 Mask bit used for OEM Check 1 completed.
 
+#define IEC60730_OEM2_COMPLETE   (1 << 10)
 Mask bit used for OEM Check 2 completed.
 
+#define IEC60730_OEM3_COMPLETE   (1 << 11)
 Mask bit used for OEM Check 3 completed.
 
+#define IEC60730_OEM4_COMPLETE   (1 << 12)
 Mask bit used for OEM Check 4 completed.
 
+#define IEC60730_OEM5_COMPLETE   (1 << 13)
 Mask bit used for OEM Check 5 completed.
 
+#define IEC60730_OEM6_COMPLETE   (1 << 14)
 Mask bit used for OEM Check 6 completed.
 
+#define IEC60730_OEM7_COMPLETE   (1 << 15)
 Mask bit used for OEM Check 7 completed.
 
#define IEC60730_ALL_COMPLETE_BITS
 Mask used for checking that all bits are set. More...
 
+ + + + + +

+Functions

 SI_SEGMENT_VARIABLE (iec60730_programmeCounterCheck, uint16_t, SI_SEG_DATA)
 
void iec60730_programmeCounterTest (void)
 
+

Detailed Description

+

Verifies all tests have completed on time.

+

The frequency of test execution must be checked to ensure that tests are being run in time.

+

+Hardware Architecture

+

The programme counter check requires that each BIST test set a bit in a bit array whenever an iteration of testing completes. The programme counter check uses the test clock timer configured in the system clock plausibility test to determine when to execute. See System clock plausibility test for system clock plausibility details. The programme counter test executes at 1/10 the frequency of the system clock plausibility test. Best practice recommendations and example OEM code configure the system clock plausibility test to run at 100 ms intervals, resulting in BIST frequency check intervals of 1s.

+

Bits within #iec60730_programmeCounterCheck are set as tests pass. OEMs can determine how fast their tests are running by checking this variable. If a bit is still clear, that test has not completed.

+

+Suggested OEM Configuration

+

OEM configuration of this test is dependent on system clock plausibility configuration. Please see System clock plausibility test for details.

+

+Failure Risks

+

The library's BIST execution frequency test will force entry into safe state if a period of time defined by 1/10 test clock test frequency passes without all BIST tests completing their test execution. It is the OEM's responsibility to call the BIST in the main() loop with enough frequency to execute all tests within the required time period.

+

If the system clock test's test timer is not configured as expected, so that 1/10 test clock frequency is unexpectedly fast, the system may fall into safe state because tests have not had enough time to execute to completion.

+

+Software Architecture

+

For the IEC60730 implementation, Figure 1

+
+ +
+Figure 1 Programme Counter Check Flowchart
+

+

Macro Definition Documentation

+ +

◆ IEC60730_ALL_COMPLETE_BITS

+ +
+
+ + + + +
#define IEC60730_ALL_COMPLETE_BITS
+
+Value:
(IEC60730_VMC_COMPLETE | IEC60730_IMC_COMPLETE \
+
| IEC60730_CPU_CLOCKS_COMPLETE | IEC60730_CPU_REGS_COMPLETE \
+
| IEC60730_INTERRUPT_COMPLETE | IEC60730_GPIO_COMPLETE \
+
| IEC60730_ANALOG_COMPLETE | IEC60730_COMMS_COMPLETE \
+
| IEC60730_OEM0_COMPLETE | IEC60730_OEM1_COMPLETE | IEC60730_OEM2_COMPLETE \
+
| IEC60730_OEM3_COMPLETE | IEC60730_OEM4_COMPLETE | IEC60730_OEM5_COMPLETE \
+
| IEC60730_OEM6_COMPLETE | IEC60730_OEM7_COMPLETE)
+
+

Mask used for checking that all bits are set.

+ +
+
+

Function Documentation

+ +

◆ iec60730_programmeCounterTest()

+ +
+
+ + + + + + + + +
void iec60730_programmeCounterTest (void )
+
+

private IEC60730 Programme Counter Test

+

Checks flags in #iec60730_programmeCounterCheck set by each BIST test to determine if BIST is executing within a specified period.

Returns
iec60730_TestResult_t. If test fails, returns iec60730_TestFailed; otherwise iec60730_TestPassed.
+ +
+
+ +

◆ SI_SEGMENT_VARIABLE()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
SI_SEGMENT_VARIABLE (iec60730_programmeCounterCheck ,
uint16_t ,
SI_SEG_DATA  
)
+
+

Global variable used by BIST to determine if modules are running frequently enough to meet maximum fault time.

+

iec60730_programmeCounterTest() resets all bits to 0. Each module then sets its assigned bit once it has completed testing. Before the maximum fault time, iec60730_programmeCounterTest() verifies that the value is IEC60730_ALL_COMPLETE_BITS.

+ +
+
+
+
IEC60730_INTERRUPT_COMPLETE
#define IEC60730_INTERRUPT_COMPLETE
Mask bit used for Interrupt Checks completed.
Definition: sl_iec60730.h:646
+
IEC60730_OEM0_COMPLETE
#define IEC60730_OEM0_COMPLETE
Mask bit used for OEM Check 0 completed.
Definition: sl_iec60730.h:654
+
IEC60730_OEM2_COMPLETE
#define IEC60730_OEM2_COMPLETE
Mask bit used for OEM Check 2 completed.
Definition: sl_iec60730.h:658
+
IEC60730_CPU_CLOCKS_COMPLETE
#define IEC60730_CPU_CLOCKS_COMPLETE
Mask bit used for CPU Clocks Checks completed.
Definition: sl_iec60730.h:642
+
IEC60730_OEM7_COMPLETE
#define IEC60730_OEM7_COMPLETE
Mask bit used for OEM Check 7 completed.
Definition: sl_iec60730.h:668
+
IEC60730_VMC_COMPLETE
#define IEC60730_VMC_COMPLETE
Mask bit used for Variable Memory Checks completed.
Definition: sl_iec60730.h:638
+
IEC60730_OEM1_COMPLETE
#define IEC60730_OEM1_COMPLETE
Mask bit used for OEM Check 1 completed.
Definition: sl_iec60730.h:656
+
IEC60730_OEM3_COMPLETE
#define IEC60730_OEM3_COMPLETE
Mask bit used for OEM Check 3 completed.
Definition: sl_iec60730.h:660
+
IEC60730_OEM6_COMPLETE
#define IEC60730_OEM6_COMPLETE
Mask bit used for OEM Check 6 completed.
Definition: sl_iec60730.h:666
+
IEC60730_ANALOG_COMPLETE
#define IEC60730_ANALOG_COMPLETE
Mask bit used for Analog Plausibility Checks completed.
Definition: sl_iec60730.h:650
+
IEC60730_GPIO_COMPLETE
#define IEC60730_GPIO_COMPLETE
Mask bit used for GPIO Plausibility Checks completed.
Definition: sl_iec60730.h:648
+
IEC60730_OEM4_COMPLETE
#define IEC60730_OEM4_COMPLETE
Mask bit used for OEM Check 4 completed.
Definition: sl_iec60730.h:662
+
IEC60730_OEM5_COMPLETE
#define IEC60730_OEM5_COMPLETE
Mask bit used for OEM Check 5 completed.
Definition: sl_iec60730.h:664
+
IEC60730_IMC_COMPLETE
#define IEC60730_IMC_COMPLETE
Mask bit used for Invariable Memory Checks completed.
Definition: sl_iec60730.h:640
+
IEC60730_COMMS_COMPLETE
#define IEC60730_COMMS_COMPLETE
Mask bit used for Communications Plausibility Checks completed.
Definition: sl_iec60730.h:652
+
IEC60730_CPU_REGS_COMPLETE
#define IEC60730_CPU_REGS_COMPLETE
Mask bit used for CPU Register Checks completed.
Definition: sl_iec60730.h:644
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.dot new file mode 100644 index 00000000..9471f3d2 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.dot @@ -0,0 +1,9 @@ +digraph "Programme Counter Verification Tests" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node1 [label="Programme Counter Verification\l Tests",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Python script for the IEC60730 Programme Counter Verification tests."]; + Node2 [label="IEC60730 Test Specification",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__VERIFICATION.html",tooltip="Automated tests for validating correct firmware operation."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html new file mode 100644 index 00000000..68efe1d5 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html @@ -0,0 +1,131 @@ + + + + + + + +IEC_60730: Programme Counter Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions | +Variables
+
+
Programme Counter Verification Tests
EFR32 IEC60730 Library » IEC60730 Test Specification
+
+
+ +

Python script for the IEC60730 Programme Counter Verification tests. +More...

+
+Collaboration diagram for Programme Counter Verification Tests:
+
+
+
+ + + + + +

+Classes

class  iec60730_programme_counter.iec60730_programme_counter
 IEC60730 CPU programme counter Tests. More...
 
+ + + +

+Functions

+bytes iec60730_programme_counter.int_to_bytes (int number)
 
+ + + + + + + + + + + + + + + +

+Variables

+ iec60730_programme_counter.chip_name = os.getenv('CHIP')
 
+ iec60730_programme_counter.app_type = os.getenv('APP_TYPE')
 
+ iec60730_programme_counter.lst_file_path = os.getenv('LST_PATH')
 
+ iec60730_programme_counter.adapter_serial_no = os.getenv('ADAPTER_SN')
 
+ iec60730_programme_counter.lib_path = os.getenv('JLINK_PATH')
 
+ iec60730_programme_counter.line = sys.argv.pop()
 
+ iec60730_programme_counter.compiler = line
 
+

Detailed Description

+

Python script for the IEC60730 Programme Counter Verification tests.

+

For details on the tests, see iec60730_programme_counter.iec60730_programme_counter.

+

+Test Results

+

EFR32 Device | Test Results ----------—|----------—

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SAFE__STATE.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SAFE__STATE.dot new file mode 100644 index 00000000..1585c827 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SAFE__STATE.dot @@ -0,0 +1,9 @@ +digraph "Safe State" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node1 [label="Safe State",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="When incorrect behavior is detected, this state prevents further execution."]; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SAFE__STATE.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SAFE__STATE.html new file mode 100644 index 00000000..c1199d87 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SAFE__STATE.html @@ -0,0 +1,124 @@ + + + + + + + +IEC_60730: Safe State + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Functions
+
+
Safe State
EFR32 IEC60730 Library
+
+
+ +

When incorrect behavior is detected, this state prevents further execution. +More...

+
+Collaboration diagram for Safe State:
+
+
+
+ + + + +

+Functions

void iec60730_SafeState (iec60730_TestFailure_t failure)
 
+

Detailed Description

+

When incorrect behavior is detected, this state prevents further execution.

+

The Safe State function must be written by the OEM to configure the system to prevent any potential negative effects from occurring. GPIOs and communications channels must be configured appropriately.

+

Once any configuration is complete, the function loops to restart the watchdog. This prevents any resets until the end-user power-cycles the device.

+

Function Documentation

+ +

◆ iec60730_SafeState()

+ +
+
+ + + + + + + + +
void iec60730_SafeState (iec60730_TestFailure_t failure)
+
+

public IEC60730 Safe State

+
Parameters
+ + +
failureEnum with the failing test, can be preserved for debug. See iec60730_TestFailure_t
+
+
+
Returns
Never.
+

When a validation failure is detected, the Safe State function is executed to prevent further system failures.

Note
This is an example; an OEM must fully implement this according to their system needs.
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__Test.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__Test.dot new file mode 100644 index 00000000..1c202c56 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__Test.dot @@ -0,0 +1,9 @@ +digraph "System clock plausibility test" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node1 [label="System clock plausibility test",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Verifies that system clocks are within expected frequencies."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__Test.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__Test.html new file mode 100644 index 00000000..4d7269da --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__Test.html @@ -0,0 +1,434 @@ + + + + + + + +IEC_60730: System clock plausibility test + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Macros | +Enumerations | +Functions
+
+
System clock plausibility test
EFR32 IEC60730 Library
+
+
+ +

Verifies that system clocks are within expected frequencies. +More...

+
+Collaboration diagram for System clock plausibility test:
+
+
+
+ + + + + +

+Macros

+#define TEST_CLOCK_MULTIPLIER   10
 Determines how many entrances into iec60730_TestClockTick() occur before bist frequency test executes.
 
+ + + + +

+Enumerations

enum  iec60730_TimerTestControl_t { iec60730_TimerTestDisable = 0, +iec60730_TimerTestEnable = 1 + }
 Enable/disable switch for system timer test. More...
 
+ + + + + + + + + + + + + + + + + + + + +

+Functions

+ SI_SEGMENT_VARIABLE (iec60730_clockTestTolerance, uint8_t, SI_SEG_DATA)
 Variable set by OEM to determine clock tolerance allowed.
 
 SI_SEGMENT_VARIABLE (iec60730_timerTestControl, uint8_t, SI_SEG_DATA)
 
 SI_SEGMENT_VARIABLE (iec60730_timerTick, uint16_t, SI_SEG_DATA)
 
 SI_SEGMENT_VARIABLE (iec60730_systemClockToTestClockFrequency, uint16_t, SI_SEG_DATA)
 
void iec60730_SystemClockTick (void)
 
void iec60730_TestClockTick (void)
 
void iec60730_TimersInit (void)
 
void iec60730_clockTicksReset (void)
 
 SI_SEGMENT_VARIABLE (iec60730_systemClockCounter, uint8_t, SI_SEG_DATA)
 
+

Detailed Description

+

Verifies that system clocks are within expected frequencies.

+

For IEC 60730, a plausibility check must be performed to check that the system clock is running at a frequency with an expected bounds. This check requires that the system clock frequency be compared against a second, independent clock's frequency (test clock).

+

+Hardware Architecture

+

EFR32 family devices provide a high frequency internal oscillator as well as a low frequency internal oscillator. The devices also provide timers modules that can be configured to use either oscillator as a clock source. These peripherals can be configured to vector code to interrupt service routines when the counter incremented by the peripheral and clocked by one of the clock sources meets certain criteria.

+

For timers, the criteria is a counter overflow event. The frequency of this overflow is defined by a reload value configured in firmware that hardware automatically loads into the timer's counter upon overflow.

+

Some timers offer a special mode where the timer's clock source is gated by a falling edge of the low frequency oscillator. In these cases, the system clock can be used as the clock source, and the number of timer counter ticks captured during the low frequency oscillator's logic low phase expresses the relationship between the two clocks.

+

The variable iec60730_systemClockToTestClockFrequency holds the ratio value between system clock timer interrupt period and test clock timer interrupt period, this value is used to compare with the system clock counter. The ratio value is divided by slow timer period (test clock timer interrupt period) and fast timer period (system clock timer interrupt period).

+

The tolerance of test (value of the variable iec60730_clockTestTolerance) is typical (+/-) 10%-49% of the iec60730_systemClockToTestClockFrequency.

+

+Suggested OEM Configuration

+

Not every EFR32 device offers the same types of timers and clock sources. For this reason, the optimal resource usage on each device family varies. The following chart offers a suggested configuration for each EFR32 family. Firmware examples configure system and test timers as in Table 1

+
Table 1 Suggested system and test timer configuration on EFR32 device families

+ + + + + + +
EFR32 device System timer Test timer
Series 1
    +
  • +TIMERn clocked by system clock HFCLK which is the master clock of the core and other peripherals.
    • +
  • +Special case: If the ADC module is clocked by AUXHFRCO then OEM could use IRQCheck to measure clock indirectly via sample rate interrupt.
    • +
+
    +
  • +LETIMER0 clocked by internal fixed clock (LFRCO or ULFRCO) with configurable prescaler.
    • +
+
Series 2
    +
  • +TIMERn clocked by one of the HFXO, HFRCODPLL, HFRCOEM23, FSRCO clock sources that could be used to test for CPU, high speed peripherals (SYSCLK), Radio module (HFXO) and IADC module (HFRCOEM23).
    • +
  • +WDOGn clocked by HCLK when system clock (SYSCLK) is selected as CLKIN0
    • +
+
    +
  • +LETIMERn clocked by internal fixed clock (LFRCO or ULFRCO).
    • +
+
+

+Failure Risks

+

The library's system clock plausibility test will force entry into safe state if the frequency relationship between the system clock and the test clock exceeds upper and lower bounds.

+

The library examines the relationship between the two clocks using calls that the OEM must place in OEM-defined timer interrupt service routines. Code examples for each EFR32 device provide drop-in firmware solutions for OEMs for timer initialization and ISR source code. OEMs must ensure that timer ISRs are able to be serviced promptly during operation.

+

Additionally, the OEM is responsible for leaving the system clock at a constant and defined operating frequency throughout all OEM firmware.

+

Finally, the OEM is responsible for setting iec60730_timerTestControl to iec60730_TimerTestDisable within safety-critical code. This value is only used in cases where the system is executing non-safety-critical code, where the BIST routine is also not being called. When returning to normal operation, clear all interrupt counters in iec60730_IRQExecCount, reset the timer clock tick and system clock tick timers, and set iec60730_timerTestControl to iec60730_TimerTestEnable.

+

+Software Architecture

+

Table 1

+

For the EFR32 IEC60730 implementation, Figure 1 shows the logic flow chart of the system clock frequency check during BIST. The test executes in the test timer interrupt, which runs as foreground calls to OEM functions and the foreground BIST test continuously execute.

+
+ +
+Figure 1 System clock frequency check flowchart
+

+

Enumeration Type Documentation

+ +

◆ iec60730_TimerTestControl_t

+ +
+
+ + + + +
enum iec60730_TimerTestControl_t
+
+ +

Enable/disable switch for system timer test.

+ + + +
Enumerator
iec60730_TimerTestDisable 

timer tests will not execute

+
iec60730_TimerTestEnable 

timer tests will execute

+
+ +
+
+

Function Documentation

+ +

◆ iec60730_clockTicksReset()

+ +
+
+ + + + + + + + +
void iec60730_clockTicksReset (void )
+
+

public IEC60730 Initialize iec60730 timer tick variables

+
Returns
None.
+

This function should be called within the iec60730_TestClockTick callback. During the initialization of the test clock timers, this function resets the internal test clock and system clock tick variables to known reset states.

+ +
+
+ +

◆ iec60730_SystemClockTick()

+ +
+
+ + + + + + + + +
void iec60730_SystemClockTick (void )
+
+

public IEC60730 System Clock Tick

+
Returns
None.
+

This function increments a system clock counter, which is compared to a test clock counter as part of the system clock frequency check. It should be called in the timer interrupt service routine designated as the system clock timer in oem_iec60730_timer.c.

+ +
+
+ +

◆ iec60730_TestClockTick()

+ +
+
+ + + + + + + + +
void iec60730_TestClockTick (void )
+
+

public IEC60730 Test Clock Tick

+
Returns
None.
+

This function increments a test clock counter. The function executes all interrupt service routine-based IEC60730 tests, including the system clock frequency check. It should be called in the timer interrupt service routine designated as the test clock timer in oem_iec60730_timer.c.

+ +
+
+ +

◆ iec60730_TimersInit()

+ +
+
+ + + + + + + + +
void iec60730_TimersInit (void )
+
+

public IEC60730 Initialize iec60730 timers and timer interrupts

+
Returns
None.
+

This routine configures the test timer and both test timer and system timer interrupts. iec60730_SystemClockTick should execute at a period of 10 ms and iec60730_TestClockTick should execute at a period of 100 ms.

+ +
+
+ +

◆ SI_SEGMENT_VARIABLE() [1/4]

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
SI_SEGMENT_VARIABLE (iec60730_systemClockCounter ,
uint8_t ,
SI_SEG_DATA  
)
+
+

Incremented when iec60730_SystemClockTick() is called, cleared in iec60730_TestClockTick.

+ +
+
+ +

◆ SI_SEGMENT_VARIABLE() [2/4]

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
SI_SEGMENT_VARIABLE (iec60730_systemClockToTestClockFrequency ,
uint16_t ,
SI_SEG_DATA  
)
+
+

Provides the expected ratio of system clock to test clock ticks

+

Must be defined as system clock (faster clock) / test clock (slower clock). The ratio value cannot exceed 0xFFFF.

+ +
+
+ +

◆ SI_SEGMENT_VARIABLE() [3/4]

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
SI_SEGMENT_VARIABLE (iec60730_timerTestControl ,
uint8_t ,
SI_SEG_DATA  
)
+
+

Allows OEM code to disable ISR-based timer test execution when in safe states.

+

This switch allows customers to stop ISR-based tests when code enters a safe state where BIST is not being called because the code is not safety critical. Tests whose execution is gated by this value are the system clock test, the interrupt plausibility test, and the BIST execution frequency test.

+ +
+
+ +

◆ SI_SEGMENT_VARIABLE() [4/4]

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
SI_SEGMENT_VARIABLE (iec60730_timerTick ,
uint16_t ,
SI_SEG_DATA  
)
+
+

Allows OEM code to run tests using timer tick.

+

This global variable allows OEM code to test when events occur.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.dot new file mode 100644 index 00000000..4633f030 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.dot @@ -0,0 +1,9 @@ +digraph "System Clock Automated Verification Tests" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node1 [label="System Clock Automated\l Verification Tests",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Python script for the IEC60730 system clock Verification tests."]; + Node2 [label="IEC60730 Test Specification",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__VERIFICATION.html",tooltip="Automated tests for validating correct firmware operation."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html new file mode 100644 index 00000000..581a8e93 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html @@ -0,0 +1,152 @@ + + + + + + + +IEC_60730: System Clock Automated Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions | +Variables
+
+
System Clock Automated Verification Tests
EFR32 IEC60730 Library » IEC60730 Test Specification
+
+
+ +

Python script for the IEC60730 system clock Verification tests. +More...

+
+Collaboration diagram for System Clock Automated Verification Tests:
+
+
+
+ + + + + +

+Classes

class  iec60730_system_clock.iec60730_system_clock
 IEC60730 System Clock Verification Tests. More...
 
+ + + +

+Functions

+bytes iec60730_system_clock.int_to_bytes (int number)
 
+ + + + + + + + + + + + + + + + + +

+Variables

dictionary iec60730_system_clock.t_top_dict
 
+ sl_iec60730_system_clock.chip_name = os.getenv('CHIP')
 
+ iec60730_system_clock.app_type = os.getenv('APP_TYPE')
 
+ iec60730_system_clock.lst_file_path = os.getenv('LST_PATH')
 
+ iec60730_system_clock.adapter_serial_no = os.getenv('ADAPTER_SN')
 
+ iec60730_system_clock.lib_path = os.getenv('JLINK_PATH')
 
+ iec60730_system_clock.line = sys.argv.pop()
 
+ sl_iec60730_system_clock.compiler = line
 
+

Detailed Description

+

Python script for the IEC60730 system clock Verification tests.

+

For details on the tests, see iec60730_system_clock.iec60730_system_clock.

+

+Test Results

+

EFR32 Device | Test Results ----------—|----------—

+

Variable Documentation

+ +

◆ t_top_dict

+ +
+
+ + + + +
dictionary iec60730_system_clock.t_top_dict
+
+Initial value:
1 = {
+
2 "EFR32XG2XXX": {"address": 0x4004801C,"mask": 0xFFFFFFFF, "value": 0},
+
3 "EFR32XG1XXX": {"address": 0x4001801C,"mask": 0xFFFFFFFF, "value": 0}
+
4 }
+
+
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__Test.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__Test.dot new file mode 100644 index 00000000..77567c8b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__Test.dot @@ -0,0 +1,9 @@ +digraph "Variable Memory Check" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node1 [label="Variable Memory Check",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Verifies RAM is working correctly."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__Test.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__Test.html new file mode 100644 index 00000000..22a59e39 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__Test.html @@ -0,0 +1,363 @@ + + + + + + + +IEC_60730: Variable Memory Check + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Macros | +Functions
+
+
Variable Memory Check
EFR32 IEC60730 Library
+
+
+ +

Verifies RAM is working correctly. +More...

+
+Collaboration diagram for Variable Memory Check:
+
+
+
+ + + + + +

+Classes

struct  vmcParams_t
 This structure is used as configuration for VMC testing. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define BLOCKSIZE   (4)
 
#define RT_BLOCK_OVERLAP   (1)
 
#define RT_BLOCKSIZE   (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
 
#define BACKGROUND   ((uint32_t) 0x00000000uL)
 
+#define STACK_OVERFLOW_CONST_GUARD_VALUE_0   (0xEEEEEEEEuL)
 Pattern 0 is used for stack overflow.
 
+#define STACK_OVERFLOW_CONST_GUARD_VALUE_1   (0xCCCCCCCCuL)
 Pattern 1 is used for stack overflow.
 
+#define STACK_OVERFLOW_CONST_GUARD_VALUE_2   (0xBBBBBBBBuL)
 Pattern 2 is used for stack overflow.
 
+#define STACK_OVERFLOW_CONST_GUARD_VALUE_3   (0xDDDDDDDDuL)
 Pattern 3 is used for stack overflow.
 
#define __STACK_BOTTOM   __attribute__((section(".stack_bottom")))
 
+ + + + + + + +

+Functions

void iec60730_VmcInit (vmcParams_t *params)
 
iec60730_TestResult_t iec60730_VmcPost (vmcParams_t *params)
 
iec60730_TestResult_t iec60730_VmcBist (vmcParams_t *params)
 
+

Detailed Description

+

Verifies RAM is working correctly.

+

+Hardware Architecture

+

Depending on using the definitation, the testing process takes place through different steps and different region RAM memory.

+

+Failure Risks

+

There are several potential sources of failure in the variable memory hardware

    +
  • Stuck bits that do not change (either 0 or 1)
    • +
  • Coupled bits that change based on a neighbor
    • +
  • Address lines that couple or disconnect, activating an incorrect location
    • +
  • Single Event Upset (SEU) that toggle a bit or bits without permanent damage to the memory hardware
    • +
+

The variable memory check can detect the first three types of errors using the March-X algorithm. The VMC is based on a word-oriented March-X algorithm from http://www.ece.uc.edu/~wjone/Memory.pdf.

+

SEU failures are not detected in a class B control, and would require class C level of validation to detect - data duplication, error- detecting-and-correcting memory, etc. A failure of this type will be detected once it causes a secondary failure such as missing a watchdog restart or incorrect clock frequency.

+

+Software Architecture

+

As show in Software Architecture, there are 3 test processes happen. In the case POST testing, the algorithm used is March-C. In the BIST testing, the algorithm used is March-X by default. If user DOES NOT use the #USE_MARCHX definition, the algorithm used is March-C. March-X algorithm is faster than March-C because March-X algorithm is only March-C algorithm that omits some steps (Step 3, 4). The March-C algorithm (van de Goor,1991) is described as below steps

+
    +
  • STEP 1: Write all zeros to array
    • +
  • STEP 2: Starting at lowest address, read zeros, write ones, increment up array
    • +
  • STEP 3: Starting at lowest address, read ones, write zeros, increment up array.
    • +
  • STEP 4: Starting at highest address, read zeros, write ones, decrement down array.
    • +
  • STEP 5: Starting at highest address, read ones, write zeros, decrement down array.
    • +
  • STEP 6: Read all zeros from array.
    • +
+

Some detail about implementing of Variable Memory Check (VMC) and used variables. These ariables are also used in the test cases (TC) of the VMC module.

+

To make sure the VMC module as well as the IMC module work properly, it is necessary to ensure the location of the ram area for these modules. The sections SHOULD be placed in the correct order: (*.rt_buf*) -> (*.overlap*). DO NOT change this order. Please refer to our example linker for more details.

+

User need declare a variable of struct vmcParams_t. In the initialization step, We need to assign the start address and end address to this variable for executing the VMC. We will call the starting address #RAMTEST_START and the ending address #RAMTEST_END to make it easier to describe later.

+

    +
  • Variable bkBuf is a buffer used to backup data during testing process and is placed at (*.rt_buf*) section. The size of this variable is defined in #IEC_BOARD_HEADER (i.e RT_BLOCKSIZE definition). The RT_BLOCKSIZE definition will be mentioned later.
    • +
+

    +
  • Variable ramTestOverLap is a buffer used to ensure that the algorithm runs at iec60730_VmcBist function is correct. This variable is placed at (*.overlap*) section.
    • +
+

    +
  • Variable rtCheck is pointer that point to start address of testing process and is placed at (*.classb_ram*) section. In case rtCheck is less than #RAMTEST_END, every time function iec60730_VmcBist is invoked and test is done, then the value of rtCheck increases by BLOCKSIZE. The BLOCKSIZE definition is defined in #IEC_BOARD_HEADER and will be mentioned later. Otherwise, we test the backup buffer (i.e the bkBuf variable is mentioned above).
    • +
+

Before performing the RAM test, we provide a callback function named #Vmc_PreRunMarchXC_Step. After performing the RAM test, we also provide a callback function named #Vmc_PostRunMarchXC_Step, and the user decides what to do after the RAM test is over.

+

As mentioned about #IEC_BOARD_HEADER in Invariable Memory Check module, the definition #IEC_BOARD_HEADER also has the necessary information for VMC module to run. The #RAMTEST_START and #RAMTEST_END definitions are used to assigned to start, and end member of a variable of type vmcParams_t. Two definitions are optional because the user can directly assign values to the start and end member of a variable as long as these values satisfy the conditions describled of the #RAMTEST_START, and #RAMTEST_END definitions. The BACKGROUND, BLOCKSIZE, RT_BLOCK_OVERLAP, and RT_BLOCKSIZE SHOULD use our default definitions.

+

Currently we also support stack test to check for stack overflow using pattern (here is an array with 4 elements) placed at the bottom of the stack. You can refer to the (*.stack_bottom*) section in our linker example. The initialization values of this array are initialized when calling the function iec60730_VmcInit. Every time when executing iec60730_VmcBist will check the value of this array and based on the check results will return iec60730_TestFailed nor not.

+

+

iec60730_VmcPost()

+

+ +
+Figure 1 Flow chart of Variable Memory Check POST
+

iec60730_VmcBist()

+

+ +
+Figure 2 Flow chart of Variable Memory Check BIST
+

Figure 3 shows two examples of RAM configurations. The figure on the left can be found in our examples. The figure on the right is a possible scenario. We will analyze these cases as below.

+

+ +
+Figure 3 Example of RAM memory configuration
+

With the figure on the left, as mentioned above (*.rt_buf*) and (*.overlap*) are placed in fixed order, namely Ram Backup and Overlap as shown in the Figure. The #RAMTEST_START can start the next Overlap. This figure also describes the algorithm of testing. The RAM area under test is defined starting from #RAMTEST_START to #RAMTEST_END, and split into multiple BLOCKs. Each block has a size determined by BLOCKSIZE. In the first test step, the BLOCK (1) and Overlap are tested. The Ram Backup is used to back up the data in the BLOCK being tested, and will restore it after the test in BLOCKs competletey. In the second test step, BLOCK (2) is tested and a part of BLOCK (1) is also tested. There is an area in BLOCK (1), also called overlap, which will be tested twice. This makes the test even more secure. Continue like this until the test reaches BLOCK (N), the last block, then return to test the Ram Backup.

+

The image on the right is slightly different when, the tested area (from #RAMTEST_START to #RAMTEST_END) contains RamBackup and Overlap. In order to ensure the algorithm works properly, in the case like the figure on the right at the starting position (#RAMTEST_START) it is necessary to create an overlap area. As mentioned above this overlap is also tested so user DOES NOT need to worry. Next, the test process is the same as said, will test the BLOCKs (from BLOCK (1) to BLOCK (N)). Here is a point to note when testing to Ram Backup, it will be ignored because this Ram Backup WILL be tested after the test of the last block (BLOCK (N)).

+

In case the tested area has the address of #RAMTEST_START smaller than the address of RamBackup, the test process is similar to the figure on the right.

+

Macro Definition Documentation

+ +

◆ __STACK_BOTTOM

+ +
+
+ + + + +
#define __STACK_BOTTOM   __attribute__((section(".stack_bottom")))
+
+

The __STACK_BOTTOM macro is used to define (.stack_bottom) section.

+ +
+
+ +

◆ BACKGROUND

+ +
+
+ + + + +
#define BACKGROUND   ((uint32_t) 0x00000000uL)
+
+

The BACKGROUND definition is background used to testing. In our sample, value 0x00000000uL is used value for background. Of course, we can define another value. We recommend using definition like ours (0x00000000uL) because it accurately describes the steps of the March-X/March-C algorithm described above.

+ +
+
+ +

◆ BLOCKSIZE

+ +
+
+ + + + +
#define BLOCKSIZE   (4)
+
+

The BLOCKSIZE definition MUST be 4 as our example for the algorithm to work properly.

+ +
+
+ +

◆ RT_BLOCK_OVERLAP

+ +
+
+ + + + +
#define RT_BLOCK_OVERLAP   (1)
+
+

The RT_BLOCK_OVERLAP definition is used to present the size of #ramTestOverLap buffer. The variable #ramTestOverLap has a size of (2 * RT_BLOCK_OVERLAP). For the algorithm (March-X/March-C) to work properly this definition MUST take the value 1 as in our example.

+ +
+
+ +

◆ RT_BLOCKSIZE

+ +
+
+ + + + +
#define RT_BLOCKSIZE   (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
+
+

The definition of RT_BLOCKSIZE is taken from the definition of BLOCKSIZE and RT_BLOCK_OVERLAP.

+ +
+
+

Function Documentation

+ +

◆ iec60730_VmcBist()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_VmcBist (vmcParams_t * params)
+
+

public IEC60730 Variable Memory Check (VMC) BIST

+
Parameters
+ + +
paramsinput parameter of struct vmcParams_t form
+
+
+
Returns
iec60730_TestResult_t. +
+

Performs a variable memory check in defined area. For details how iec60730_VmcBist work, please refer to Software Architecture

+

Requires iec60730_VmcInit to be called first to setup global variables.

+ +
+
+ +

◆ iec60730_VmcInit()

+ +
+
+ + + + + + + + +
void iec60730_VmcInit (vmcParams_t * params)
+
+

public IEC60730 Variable Memory Check (VMC) Initialize

+
Parameters
+ + +
paramsinput parameter of struct vmcParams_t form
+
+
+
Returns
void
+

Performs a initialization of global variables. This function SHOULD call before calling iec60730_VmcBist

+ +
+
+ +

◆ iec60730_VmcPost()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_VmcPost (vmcParams_t * params)
+
+

public IEC60730 Variable Memory Check (VMC) POST

+
Parameters
+ + +
paramsinput parameter of struct vmcParams_t form
+
+
+
Returns
iec60730_TestResult_t. +
+

Performs a variable memory check in defined area. For details how iec60730_VmcBist work, please refer to Software Architecture

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.dot new file mode 100644 index 00000000..6e64c691 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.dot @@ -0,0 +1,9 @@ +digraph "Variable Memory Automated Verification Tests" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="IEC60730 Test Specification",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__VERIFICATION.html",tooltip="Automated tests for validating correct firmware operation."]; + Node1 [label="Variable Memory Automated\l Verification Tests",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Python script for the IEC60730 Variable Memory plausibility verification tests."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html new file mode 100644 index 00000000..1a769f3f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html @@ -0,0 +1,494 @@ + + + + + + + +IEC_60730: Variable Memory Automated Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions | +Variables
+
+
Variable Memory Automated Verification Tests
EFR32 IEC60730 Library » IEC60730 Test Specification
+
+
+ +

Python script for the IEC60730 Variable Memory plausibility verification tests. +More...

+
+Collaboration diagram for Variable Memory Automated Verification Tests:
+
+
+
+ + + + + +

+Classes

class  iec60730_variable_memory.iec60730_vmc
 IEC60730 Variable Memory Plausibility Verification Tests. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

+def iec60730_variable_memory.iec60730_vmc.setUp (self)
 
+def iec60730_variable_memory.iec60730_vmc.set_breakpoint (self, label)
 
+def iec60730_variable_memory.iec60730_vmc.reach_to_breakpoint (self, label, setbkp, time)
 
+def iec60730_variable_memory.iec60730_vmc.corruption (self, address=0, value=0, time=1, label='', label_pass='iec60730_SafeState')
 
def iec60730_variable_memory.iec60730_vmc.test_CorrectBackGround_FullRamClassB (self)
 Verify the DUT run step by step when testing full ram at POST. More...
 
def iec60730_variable_memory.iec60730_vmc.test_DetectCorruption_FullRamClassB (self)
 Verify the DUT jump to iec60730_SafeState when testing ram failed at post. More...
 
def iec60730_variable_memory.iec60730_vmc.test_CorrectBackGround_StepRamClassB (self)
 Verify the DUT run step by step when testing full ram at BIST. More...
 
def iec60730_variable_memory.iec60730_vmc.test_DetectCorruption_StepRamClassB (self)
 Verify the DUT jump to iec60730_SafeState when testing ram failed at BIST. More...
 
def iec60730_variable_memory.iec60730_vmc.test_WorkNormally_StackTest (self)
 Verify the DUT run to check RAM and not failed at BIST. More...
 
def iec60730_variable_memory.iec60730_vmc.test_DetectFailed_StackTest (self)
 Verify the DUT jump to iec60730_SafeState when stack test failed at BIST. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + +

+Variables

+bool iec60730_variable_memory.is_enableMatchX = True
 
+bool iec60730_variable_memory.is_nonSecure = False
 
+int iec60730_variable_memory.RAMTEST_END = 0x20000080
 
+string iec60730_variable_memory.iec60730_vmc.TEST_SUITE_NAME = "VMC"
 
+ sl_iec60730_variable_memory.chip_name = os.getenv('CHIP')
 
+ iec60730_variable_memory.app_type = os.getenv('APP_TYPE')
 
+ iec60730_variable_memory.lst_file_path = os.getenv('LST_PATH')
 
+ iec60730_variable_memory.adapter_serial_no = os.getenv('ADAPTER_SN')
 
+ iec60730_variable_memory.lib_path = os.getenv('JLINK_PATH')
 
+ iec60730_variable_memory.line = sys.argv.pop()
 
+ sl_iec60730_variable_memory.compiler = line
 
+

Detailed Description

+

Python script for the IEC60730 Variable Memory plausibility verification tests.

+

For details on the tests, see iec60730_variable_memory.iec60730_variable_memory.

+

+Test Results

+

EFR32 Device| Test Results ---------—|----------—

+

Function Documentation

+ +

◆ test_CorrectBackGround_FullRamClassB()

+ +
+
+ + + + + + + + +
def iec60730_variable_memory.iec60730_vmc.test_CorrectBackGround_FullRamClassB ( self)
+
+ +

Verify the DUT run step by step when testing full ram at POST.

+

This test case (TC) checks under normal conditions with no exceptions, VMC module DOES NOT raise issue.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_SAVE
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_STEP1
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_STEP2
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_STEP3
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_STEP4
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_STEP5
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_STEP6
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_RESTORE
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_MARCH_RET
    • +
  • Verify code reachs breakpoint at IEC60730_VMC_POST_MARCHC_STEP_BKPT
    • +
+

This process in loop with coditon rtCheck < #RAMTEST_END. In case this condition is not satisfied, clear all break point and verify

+
    +
  • Verify code reachs breakpoint at IEC60730_VMC_POST_CHECKBKBUF_BKPT
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_BUFF1
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_BUFF2
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_BUFF3
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_BUFF4
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_BUFF5
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_BUFF6
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_MARCH_RET
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_RET
    • +
+
Returns
True
+ +
+
+ +

◆ test_CorrectBackGround_StepRamClassB()

+ +
+
+ + + + + + + + +
def iec60730_variable_memory.iec60730_vmc.test_CorrectBackGround_StepRamClassB ( self)
+
+ +

Verify the DUT run step by step when testing full ram at BIST.

+

This TC checks under normal conditions with no exceptions, vmc module DOES NOT raise issue.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reachs breakpoint at IEC60730_VMC_BIST_START_BKPT
    • +
+

The loop with coditon rtCheck < #RAMTEST_END

    +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_SAVE
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_STEP1
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_STEP2
    • +
  • if not enable MatchX
      +
    • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_STEP3
      • +
    • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_STEP4
      • +
    +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_STEP5
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_STEP6
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_RESTORE
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_MARCH_RET
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_RET
    • +
  • Verify code reachs breakpoint at IEC60730_VMC_BIST_MARCHC_STEP_BKPT
    • +
+

In case condition is not satisfied, clear all break point and verify

+
    +
  • Verify code reachs breakpoint at IEC60730_IMC_BIST_CHECKBKBUF_BKPT
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_BUFF1
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_BUFF2
    • +
  • if not enable MatchX
      +
    • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_BUFF3
      • +
    • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_BUFF4
      • +
    +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_BUFF5
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_BUFF6
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_MARCH_RET
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_RET
    • +
+
Returns
True
+ +
+
+ +

◆ test_DetectCorruption_FullRamClassB()

+ +
+
+ + + + + + + + +
def iec60730_variable_memory.iec60730_vmc.test_DetectCorruption_FullRamClassB ( self)
+
+ +

Verify the DUT jump to iec60730_SafeState when testing ram failed at post.

+

This TC simulates an abnormal situation that causes the rtCheck, and bkBuf variables to be changed. This leads to jump to break point at iec60730_SafeState.

+

In the VMC documentation there is a detailed description of the rtCheck, and bkBuf variables.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_STEP2. We don't reach IEC60730_MARCHC_STEP_STEP1 because this step only write (W1) +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_STEP3 +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_STEP4 +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_STEP5 +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_STEP6 +
    • +
  • Verify code reachs breakpoint at IEC60730_VMC_POST_CHECKBKBUF_BKPT
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_BUFF2. We don't reach IEC60730_MARCHC_STEP_BUFF1 because this step only write (W1) +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_BUFF3 +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_BUFF4 +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_BUFF5 +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHC_STEP_BUFF6 +
    • +
+
Returns
True
+ +
+
+ +

◆ test_DetectCorruption_StepRamClassB()

+ +
+
+ + + + + + + + +
def iec60730_variable_memory.iec60730_vmc.test_DetectCorruption_StepRamClassB ( self)
+
+ +

Verify the DUT jump to iec60730_SafeState when testing ram failed at BIST.

+

This TC simulates an abnormal situation that causes the variable rtCheck, bkBuf to be changed. This leads to jump to break point at iec60730_SafeState.

+

In the VMC documentation there is a detailed description of the rtCheck, and bkBuf variables.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reachs breakpoint at IEC60730_VMC_BIST_START_BKPT
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_STEP2. We don't reach IEC60730_MARCHCX_STEP_STEP1 because this step only write (W1) +
    • +
  • if not enable MatchX
      +
    • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_STEP3 +
      • +
    • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_STEP4 +
      • +
    +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_STEP5 +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_STEP6 +
    • +
  • Verify code reachs breakpoint at IEC60730_IMC_BIST_CHECKBKBUF_BKPT
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_BUFF2. We don't reach IEC60730_MARCHCX_STEP_BUFF1 because this step only write (W1) +
    • +
  • if not enable MatchX
      +
    • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_BUFF3 +
      • +
    • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_BUFF4 +
      • +
    +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_BUFF6 +
    • +
  • Verify code reachs breakpoint at IEC60730_MARCHCX_STEP_BUFF6 +
    • +
+
Returns
True
+ +
+
+ +

◆ test_DetectFailed_StackTest()

+ +
+
+ + + + + + + + +
def iec60730_variable_memory.iec60730_vmc.test_DetectFailed_StackTest ( self)
+
+ +

Verify the DUT jump to iec60730_SafeState when stack test failed at BIST.

+

This TC simulates an abnormal situation that causes the variable stackTestOverFlow to be changed. This leads to jump to break point at iec60730_SafeState.

+

In the VMC documentation there is a detailed description of the variable stackTestOverFlow.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reachs breakpoint at IEC60730_VMC_BIST_START_BKPT +
    • +
+
Returns
True
+ +
+
+ +

◆ test_WorkNormally_StackTest()

+ +
+
+ + + + + + + + +
def iec60730_variable_memory.iec60730_vmc.test_WorkNormally_StackTest ( self)
+
+ +

Verify the DUT run to check RAM and not failed at BIST.

+

This TC checks under normal conditions with no exceptions, vmc module DOES NOT raise issue.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reachs breakpoint at IEC60730_VMC_BIST_START_BKPT
    • +
  • Verify code reachs breakpoint at IEC60730_VMC_BIST_STACK_TEST_OK_BKPT
    • +
+
Returns
True
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VERIFICATION.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VERIFICATION.dot new file mode 100644 index 00000000..7129c40b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VERIFICATION.dot @@ -0,0 +1,23 @@ +digraph "IEC60730 Test Specification" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node7 [label="System Clock Automated\l Verification Tests",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html",tooltip="Python script for the IEC60730 system clock Verification tests."]; + Node3 [label="CPU Register Check\l Automated Verification Tests",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__CPU__REGISTERS__VERIFICATION.html",tooltip="Python script for the IEC60730 CPU Register Check Verification tests."]; + Node6 [label="Programme Counter Verification\l Tests",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html",tooltip="Python script for the IEC60730 Programme Counter Verification tests."]; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node5 [label="IRQ Automated Verification\l Tests",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__IRQ__VERIFICATION.html",tooltip="Python script for the IEC60730 IRQ plausibility verification tests."]; + Node1 [label="IEC60730 Test Specification",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Automated tests for validating correct firmware operation."]; + Node8 [label="Variable Memory Automated\l Verification Tests",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html",tooltip="Python script for the IEC60730 Variable Memory plausibility verification tests."]; + Node4 [label="Invariable Memory Automated\l Verification Tests",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html",tooltip="Python script for the IEC60730 Invariable Memory plausibility verification tests."]; + Node9 [label="Watchdog Automated\l Verification Tests",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__WATCHDOG__VERIFICATION.html",tooltip="Python script for the IEC60730 Watchdog timer Verification tests."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; + Node1->Node3 [shape=plaintext, dir="back", style="solid"]; + Node1->Node4 [shape=plaintext, dir="back", style="solid"]; + Node1->Node5 [shape=plaintext, dir="back", style="solid"]; + Node1->Node6 [shape=plaintext, dir="back", style="solid"]; + Node1->Node7 [shape=plaintext, dir="back", style="solid"]; + Node1->Node8 [shape=plaintext, dir="back", style="solid"]; + Node1->Node9 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VERIFICATION.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VERIFICATION.html new file mode 100644 index 00000000..ec17295c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__VERIFICATION.html @@ -0,0 +1,113 @@ + + + + + + + +IEC_60730: IEC60730 Test Specification + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Modules
+
+
IEC60730 Test Specification
EFR32 IEC60730 Library
+
+
+ +

Automated tests for validating correct firmware operation. +More...

+
+Collaboration diagram for IEC60730 Test Specification:
+
+
+
+ + + + + + + + + + + + + + + + + + + + + + + +

+Modules

 CPU Register Check Automated Verification Tests
 Python script for the IEC60730 CPU Register Check Verification tests.
 
 Invariable Memory Automated Verification Tests
 Python script for the IEC60730 Invariable Memory plausibility verification tests.
 
 IRQ Automated Verification Tests
 Python script for the IEC60730 IRQ plausibility verification tests.
 
 Programme Counter Verification Tests
 Python script for the IEC60730 Programme Counter Verification tests.
 
 System Clock Automated Verification Tests
 Python script for the IEC60730 system clock Verification tests.
 
 Variable Memory Automated Verification Tests
 Python script for the IEC60730 Variable Memory plausibility verification tests.
 
 Watchdog Automated Verification Tests
 Python script for the IEC60730 Watchdog timer Verification tests.
 
+

Detailed Description

+

Automated tests for validating correct firmware operation.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WATCHDOG__VERIFICATION.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WATCHDOG__VERIFICATION.dot new file mode 100644 index 00000000..8d6422ec --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WATCHDOG__VERIFICATION.dot @@ -0,0 +1,9 @@ +digraph "Watchdog Automated Verification Tests" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="IEC60730 Test Specification",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__VERIFICATION.html",tooltip="Automated tests for validating correct firmware operation."]; + Node1 [label="Watchdog Automated\l Verification Tests",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Python script for the IEC60730 Watchdog timer Verification tests."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WATCHDOG__VERIFICATION.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WATCHDOG__VERIFICATION.html new file mode 100644 index 00000000..49cf02c4 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WATCHDOG__VERIFICATION.html @@ -0,0 +1,161 @@ + + + + + + + +IEC_60730: Watchdog Automated Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions | +Variables
+
+
Watchdog Automated Verification Tests
EFR32 IEC60730 Library » IEC60730 Test Specification
+
+
+ +

Python script for the IEC60730 Watchdog timer Verification tests. +More...

+
+Collaboration diagram for Watchdog Automated Verification Tests:
+
+
+
+ + + + + +

+Classes

class  iec60730_watchdog.iec60730_watchdog
 IEC60730 Watchdog Verification Tests. More...
 
+ + + +

+Functions

+bytes iec60730_watchdog.int_to_bytes (int number)
 
+ + + + + + + + + + + + + + + + + + + + + + + +

+Variables

dictionary iec60730_watchdog.buram_dict
 
+int iec60730_watchdog.buram_addr = 0x40080000
 
+ sl_iec60730_watchdog.hostIP = os.getenv('HOST_IP')
 
+ sl_iec60730_watchdog.chip_name = os.getenv('CHIP')
 
+ iec60730_watchdog.app_type = os.getenv('APP_TYPE')
 
+ iec60730_watchdog.lst_file_path = os.getenv('LST_PATH')
 
+ iec60730_watchdog.adapter_serial_no = os.getenv('ADAPTER_SN')
 
+ iec60730_watchdog.lib_path = os.getenv('JLINK_PATH')
 
+ iec60730_watchdog.wdog1_present = os.getenv('TEST_WDOG1')
 
+ iec60730_watchdog.line = sys.argv.pop()
 
+ sl_iec60730_watchdog.compiler = line
 
+

Detailed Description

+

Python script for the IEC60730 Watchdog timer Verification tests.

+

For details on the tests, see iec60730_watchdog.iec60730_watchdog.

+

+Test Results

+

EFR32 Device | Test Results ----------—|----------—

+

Variable Documentation

+ +

◆ buram_dict

+ +
+
+ + + + +
dictionary iec60730_watchdog.buram_dict
+
+Initial value:
1 = {
+
2 "EFR32XG2XXX": {"address": 0x40008120,"mask": 0x07, "value": 0x02},
+
3 "EFR32XG1XXX": {"address": 0x400E410C,"mask": 0xFF, "value": 0x01}
+
4 }
+
+
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WDOG__Test.dot b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WDOG__Test.dot new file mode 100644 index 00000000..d10f298e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WDOG__Test.dot @@ -0,0 +1,9 @@ +digraph "Watchdog Test" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__efr32__sl_iec60730.html",tooltip="EFR32 IEC60730 Library."]; + Node1 [label="Watchdog Test",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Monitors CPU execution."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WDOG__Test.html b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WDOG__Test.html new file mode 100644 index 00000000..2c4504c9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__IEC60730__WDOG__Test.html @@ -0,0 +1,440 @@ + + + + + + + +IEC_60730: Watchdog Test + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Macros | +Enumerations | +Functions
+
+
Watchdog Test
EFR32 IEC60730 Library
+
+
+ +

Monitors CPU execution. +More...

+
+Collaboration diagram for Watchdog Test:
+
+
+
+ + + + + +

+Classes

struct  iec60730_WatchDog_t
 Watchdog component configuration structure. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

+#define IEC60730_WDOGINST_NUMB   1
 
+#define IEC60730_ENABLE_WDOG0
 
+#define IEC60730_WDOG_WAIT_TIMEOUT   (uint32_t) 0x0000FFFFUL
 
#define WDG_INST_DEF()
 
+#define IEC60730_WDOG(numb)   iec60730_WdogInst_arr[numb].wdog
 
+#define IEC60730_WDOG_INST(n)   WDOG##n
 
+#define IEC60730_RST   RMU
 
+#define IEC60730_RSTCAUSE_POR   RMU_RSTCAUSE_PORST
 
+#define IEC60730_RSTCAUSE_EM4   RMU_RSTCAUSE_EM4RST
 
+#define IEC60730_RSTCAUSE_WDOG0   RMU_RSTCAUSE_WDOGRST
 
+#define IEC60730_RSTCAUSE_WDOG1   RMU_RSTCAUSE_WDOGRST
 
#define IEC60730_RSTCAUSES_CLEAR()
 
+#define IEC60730_RSTCAUSE   (IEC60730_RST->RSTCAUSE)
 
+#define IEC60730_RST_POR   (IEC60730_RSTCAUSE & IEC60730_RSTCAUSE_POR)
 
+#define IEC60730_RST_EM4   (IEC60730_RSTCAUSE & IEC60730_RSTCAUSE_EM4)
 
+#define IEC60730_RST_WDOG0   (IEC60730_RSTCAUSE & IEC60730_RSTCAUSE_WDOG0)
 
+#define IEC60730_RST_WDOG1   0
 
+#define IEC60730_RST_WDOGS   (IEC60730_RST_WDOG0 || IEC60730_RST_WDOG1)
 
+#define IEC60730_RST_WDOG(numb)   (IEC60730_RSTCAUSE & iec60730_WdogInst_arr[numb].rst)
 
#define IEC60730_RST_WDOG_CHECK(numb)
 
+#define IEC60730_WDOG_CONFIG(n)   {.wdog = IEC60730_WDOG_INST(n), .rst = IEC60730_RSTCAUSE_WDOG##n},
 
+#define IEC60730_CFG_WDOG0   IEC60730_WDOG_CONFIG(0)
 
+#define IEC60730_CFG_WDOG1
 
#define IEC60730_WDOG_CFGSET
 
+#define IEC60730_WDOG_EN_WAIT_DISABLING(numb)
 
#define IEC60730_SETWATCHDOGTIMEOUTMIN(numb)
 
+#define IEC60730_BURAM   BURAM
 
+#define IEC60730_BURAM_IDX   0UL
 
+#define IEC60730_BURAM_STATE_SHIFT   8UL
 
+#define IEC60730_BURAM_MASK   0xFFUL
 
+ + + + +

+Enumerations

enum  iec60730_TestWatchdog_t { iec60730_WatchdogInvalid = 0, +iec60730_WatchdogTesting = 1, +iec60730_WatchdogValid = 2 + }
 State of watchdog testing. More...
 
+ + + + + + + +

+Functions

void iec60730_RestartWatchdogs (void)
 
volatile SI_SEGMENT_VARIABLE (iec60730_WatchdogState, iec60730_TestWatchdog_t, SI_SEG_DATA_RETAINED_NO_CLEAR)
 
iec60730_TestResult_t iec60730_WatchdogPost (void)
 
+

Detailed Description

+

Monitors CPU execution.

+

For IEC 60730, a watchdog timer must be enabled to validate proper operation of the Program Counter. A watchdog timer resets the device if it has not been restarted.

+

+Hardware Architecture

+

The second implementation has a dedicated watchdog peripheral WDOG0, WDOG1 watchdog timers in the EFR32 family.

+
Warning
- The watchdog timer must be disabled during flash page erase.
+

+Failure Risks

+

The watchdog timer will force entry into Safe State if the firmware program execution does not return to the BIST quick enough. This will detect a failure that causes the CPU to halt or enter an infinite loop. The watchdog timer POST verifies that a watchdog timer reset is possible.

+

OEMs must ensure that their system works reliably in all modes of operation using the watchdog timeout. Insufficient testing may allow for firmware states that inadvertently trigger a watchdog reset.

+

+Software Architecture

+

For the EFR32 IEC60730 implementation, Figure 1 shows the logic flow chart of the Watchdog Timer during POST. The POST test determines if the reset source was a power-on, and if so, validates that a watchdog reset can occur. If the reset source was a watchdog reset, it determines if the watchdog reset was expected as part of POST testing, or unexpected. An unexpected reset causes immediate iec60730_SafeState() entry. Otherwise normal operation continues.

+
+ +
+Figure 1 Flow chart of Watchdog Timer POST validation
+

The main loop must execute iec60730_Bist() faster than the nominal timeout, or call iec60730_RestartWatchdogs(). After iec60730_Bist() has confirmed all modules are operating correctly it restarts the Watchdog Timer with iec60730_RestartWatchdogs(). If a module is not operating correctly, iec60730_Bist() calls iec60730_SafeState(). iec60730_SafeState() will call iec60730_RestartWatchdogs() continuously. The system must be powered down and restarted to resume normal operation.

+

The function iec60730_WatchdogPost will set the timeout period (PERSEL) to minimum when check watchdog units to avoid wasting time.

+

+Software Configuration

+

The number of Watchdog units which are tested by lib should be defined by user code by defining the macros "IEC60730_WDOGINST_NUMB" and IEC60730_ENABLE_WDOGx (x = 0, 1). The number of Watchdog unit depends on target EFR32 series. Example for series 1: #define IEC60730_WDOGINST_NUMB 1 #define IEC60730_ENABLE_WDOG0

+

User can define macro IEC60730_WDOG_INST(n) to select appropriate Watchdog peripheral. User can define macro IEC60730_RST to select appropriate Reset peripheral.

+

If these macros are not defined then the default configuration will be used.

+

To clear reset cause flags in the RSTCASUES register after watchdog testing completed -> Add the definition of macro "#define IEC60730_RSTCAUSES_CLEAR_ENABLE" to user code. By default this feature is disabled.

+

If the Watchdog module is build in non-secure mode then the macro "IEC60730_NON_SECURE_EN" must be defined to enable the lib using non-secure address of the Watchdog peripheral.

+
Warning
- The static variable iec60730_WatchdogCount must be located at memory location that is not cleared when system startup (section ".ram_no_clear").
    +
  • The global variable iec60730_WatchdogState must be located at memory location that is not cleared when system startup. And it should be located at retention RAM block that is available on EFR32 Series 1 devices (section ".ram_ret_no_clear"). This will avoid the missing contain of the variable when device returns from the power saving mode EM4.
    • +
+
+

There's no retention RAM on EFR32 Series 2 devices but they have backup RAM (BURAM) that could be used to save value of the variable. To enable saving iec60730_WatchdogState to backup RAM on Series 2, add the macro "#define IEC60730_SAVE_STAGE_ENABLE" to user code. By default it will be disabled. Define macro "IEC60730_BURAM_IDX" to select which register of the BURAM will be used. The default value is 0x0.

+

Macro Definition Documentation

+ +

◆ IEC60730_RST_WDOG_CHECK

+ +
+
+ + + + + + + + +
#define IEC60730_RST_WDOG_CHECK( numb)
+
+Value:
(IEC60730_RSTCAUSE & iec60730_WdogInst_arr[numb].rst) \
+
== iec60730_WdogInst_arr[numb].rst
+
+
+
+ +

◆ IEC60730_RSTCAUSES_CLEAR

+ +
+
+ + + + + + + +
#define IEC60730_RSTCAUSES_CLEAR()
+
+Value:
do { \
+
IEC60730_RST->CMD |= RMU_CMD_RCCLR; \
+
} while (0)
+
+
+
+ +

◆ IEC60730_SETWATCHDOGTIMEOUTMIN

+ +
+
+ + + + + + + + +
#define IEC60730_SETWATCHDOGTIMEOUTMIN( numb)
+
+Value:
do { \
+
while ((iec60730_WdogInst_arr[numb].wdog->SYNCBUSY & WDOG_SYNCBUSY_CTRL) \
+
!= 0U) {} \
+
iec60730_WdogInst_arr[numb].wdog->CTRL &= \
+
~(uint32_t) _WDOG_CTRL_PERSEL_MASK; \
+
} while (0)
+
+
+
+ +

◆ IEC60730_WDOG_CFGSET

+ +
+
+ + + + +
#define IEC60730_WDOG_CFGSET
+
+Value:
IEC60730_CFG_WDOG0 \
+
IEC60730_CFG_WDOG1
+
+
+
+ +

◆ WDG_INST_DEF

+ +
+
+ + + + + + + +
#define WDG_INST_DEF()
+
+Value:
const iec60730_WatchDog_t iec60730_WdogInst_arr[IEC60730_WDOGINST_NUMB] = { \
+
IEC60730_WDOG_CFGSET}
+
+
+
+

Enumeration Type Documentation

+ +

◆ iec60730_TestWatchdog_t

+ +
+
+ + + + +
enum iec60730_TestWatchdog_t
+
+ +

State of watchdog testing.

+ + + + +
Enumerator
iec60730_WatchdogInvalid 

Watchdog POST test not done.

+
iec60730_WatchdogTesting 

Watchdog POST testing in progress.

+
iec60730_WatchdogValid 

Watchdog POST test complete, watchdog valid.

+
+ +
+
+

Function Documentation

+ +

◆ iec60730_RestartWatchdogs()

+ +
+
+ + + + + + + + +
void iec60730_RestartWatchdogs (void )
+
+

public IEC60730 Watchdog Restart

+
Returns
None.
+

This function abstracts the differences between the EFR32 family watchdog timers. OEMs can call it during long duration executions to restart the watchdog timer.

+ +
+
+ +

◆ iec60730_WatchdogPost()

+ +
+
+ + + + + + + + +
iec60730_TestResult_t iec60730_WatchdogPost (void )
+
+

public IEC60730 Watchdog Power On Self Test

+
Returns
iec60730_TestResult_t If a non-watchdog reset occurred, test watchdog (will not return). Otherwise determine if watchdog reset was planned or unplanned. Unplanned watchdog resets result in failure and entry to Safe State. Planned watchdog resets return iec60730_TestPassed.
+

This function will test the watchdog timer by forcing a watchdog reset on the first power-up. Any subsequent watchdog reset forces entry into iec60730_SafeState().

+
Warning
Remove all accesses to Watchdog Timer hardware from InitDevice. Reset state of pins must be safe for the device. During POST test, device pins will be kept in reset state while validating watchdog reset.
+ +
+
+ +

◆ SI_SEGMENT_VARIABLE()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
volatile SI_SEGMENT_VARIABLE (iec60730_WatchdogState ,
iec60730_TestWatchdog_t ,
SI_SEG_DATA_RETAINED_NO_CLEAR  
)
+
+

Global variable used to track watchdog testing state.

+
Warning
Must be placed in a memory area not cleared to 0x0 on start!
+ +
+
+
+
iec60730_WatchDog_t
Watchdog component configuration structure.
Definition: sl_iec60730_watchdog.h:111
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__efr32__iec60730.dot b/docs/html/EFR32_ICE60730_Libraries/group__efr32__iec60730.dot new file mode 100644 index 00000000..07b59abf --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__efr32__iec60730.dot @@ -0,0 +1,37 @@ +digraph "EFR32 IEC60730 Library" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node12 [label="CPU Register Check",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__CPUREG__Test.html",tooltip="Verifies CPU registers are working correctly."]; + Node5 [label="Programme Counter Check",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__PROGRAMME__COUNTER.html",tooltip="Verifies all tests have completed on time."]; + Node2 [label="EFR32 IEC60730 Library\l Extra Files",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__EXTRA.html",tooltip="Extra files for the EFR32 IEC Library."]; + Node4 [label="BIST",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__BIST.html",tooltip="Built In Self Test - Executed periodically."]; + Node15 [label="Safe State",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__SAFE__STATE.html",tooltip="When incorrect behavior is detected, this state prevents further execution."]; + Node9 [label="ADC Plausibility Test",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__ADC__PLAUSIBILTY__Test.html",tooltip="Verifies analog components work properly."]; + Node1 [label="EFR32 IEC60730 Library",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="EFR32 IEC60730 Library."]; + Node11 [label="Variable Memory Check",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__VARIABLE__MEMORY__Test.html",tooltip="Verifies RAM is working correctly."]; + Node7 [label="IRQ Test",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__IRQ__Test.html",tooltip="Verifies interrupt frequency is within bounds."]; + Node10 [label="Invariable Memory Check",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__INVARIABLE__MEMORY__Test.html",tooltip="Verifies contents of flash memory."]; + Node14 [label="OEM External Communications\l Example using UART",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__OEM__COMM__Test.html",tooltip="Verifies communication channel is operating as expected."]; + Node3 [label="POST",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__POST.html",tooltip="Power On Self Test - Executed once during power up."]; + Node16 [label="IEC60730 Test Specification",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__VERIFICATION.html",tooltip="Automated tests for validating correct firmware operation."]; + Node6 [label="Watchdog Test",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__WDOG__Test.html",tooltip="Monitors CPU execution."]; + Node13 [label="System clock plausibility test",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__SYSTEM__CLOCK__Test.html",tooltip="Verifies that system clocks are within expected frequencies."]; + Node8 [label="GPIO Plausibility Test",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__GPIO__PLAUSIBILTY__Test.html",tooltip="Verifies GPIOs work properly."]; + Node1->Node2 [shape=plaintext, dir="back", style="solid"]; + Node1->Node3 [shape=plaintext, dir="back", style="solid"]; + Node1->Node4 [shape=plaintext, dir="back", style="solid"]; + Node1->Node5 [shape=plaintext, dir="back", style="solid"]; + Node1->Node6 [shape=plaintext, dir="back", style="solid"]; + Node1->Node7 [shape=plaintext, dir="back", style="solid"]; + Node1->Node8 [shape=plaintext, dir="back", style="solid"]; + Node1->Node9 [shape=plaintext, dir="back", style="solid"]; + Node1->Node10 [shape=plaintext, dir="back", style="solid"]; + Node1->Node11 [shape=plaintext, dir="back", style="solid"]; + Node1->Node12 [shape=plaintext, dir="back", style="solid"]; + Node1->Node13 [shape=plaintext, dir="back", style="solid"]; + Node1->Node14 [shape=plaintext, dir="back", style="solid"]; + Node1->Node15 [shape=plaintext, dir="back", style="solid"]; + Node1->Node16 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__efr32__iec60730.html b/docs/html/EFR32_ICE60730_Libraries/group__efr32__iec60730.html new file mode 100644 index 00000000..21c4cfe2 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__efr32__iec60730.html @@ -0,0 +1,437 @@ + + + + + + + +IEC_60730: EFR32 IEC60730 Library + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Modules
+
+
EFR32 IEC60730 Library
+
+
+ +

EFR32 IEC60730 Library. +More...

+
+Collaboration diagram for EFR32 IEC60730 Library:
+
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Modules

 EFR32 IEC60730 Library Extra Files
 Extra files for the EFR32 IEC Library.
 
 POST
 Power On Self Test - Executed once during power up.
 
 BIST
 Built In Self Test - Executed periodically.
 
 Programme Counter Check
 Verifies all tests have completed on time.
 
 Watchdog Test
 Monitors CPU execution.
 
 IRQ Test
 Verifies interrupt frequency is within bounds.
 
 GPIO Plausibility Test
 Verifies GPIOs work properly.
 
 ADC Plausibility Test
 Verifies analog components work properly.
 
 Invariable Memory Check
 Verifies contents of flash memory.
 
 Variable Memory Check
 Verifies RAM is working correctly.
 
 CPU Register Check
 Verifies CPU registers are working correctly.
 
 System clock plausibility test
 Verifies that system clocks are within expected frequencies.
 
 OEM External Communications Example using UART
 Verifies communication channel is operating as expected.
 
 Safe State
 When incorrect behavior is detected, this state prevents further execution.
 
 IEC60730 Test Specification
 Automated tests for validating correct firmware operation.
 
+

Detailed Description

+

EFR32 IEC60730 Library.

+

+Introduction

+

The IEC60730 library for EFR32 provides a basic implementation required to support the necessary requirements found in Table H.1 in the IEC60730 specification. It includes all the Power On Self Test (POST) functions executed when a device is first powered on, as well as Built In Self Test (BIST) functions that are called periodically to ensure correct operation. Certain portions of the requirements require a detailed understanding of the system under development. Callback functions must be completed by the developer to guarantee meeting the full specification. These include a Safe State function used when validation detects an anomaly, properly implemented communications channels (redundancy, error detection, periodic communications), and Plausibility functions to validate system state (internal variables and inputs/outputs).

+

+License

+

Silicon Labs Software License Agreement

+

+Release Notes

+

Release Notes

+

+IEC60730 Certificate

+

The final certificate and detailed report shall be provided for the specific devices.

+

+OEM Testing

+

Once OEMs have completed integrating their system with the IEC60730 Library, they will need to certify their device with a qualified certification house.

+

+Supported Families

+

This library supports all EFR32 devices listed in the Selector Guide.

+

+Software Requirements

+

The IEC 60730 library dependencies:

    +
  1. CMSIS package.
    2. +
  2. Silicon Labs Devices header files.
    3. +
+

User could get dependency source files from the GSDK suite (platform) or from <repository>/Lib/Device/<...>/Include. The dependency source files on IEC60730 project repository supports only version GSDK V3.x. To get the latest version of GSDK, please refer Gecko SDK.

+
Note
The IEC 60730 library support extension for GSDK using Simplicity Studio 5.
+

Details on the validation test setup used internally by Silicon Labs can be found at IEC60730 Test Specification. Test results can be found inside each module.

+

Currently tested on Windows and Linux platforms.

+

+Building the IEC60730 Demo

+

To use Simplicity Studio to generate and build a demo IEC60730 and OEM Customization, refer to the IEC60730 Safety Library Integration Manual in the Doc folder for more details.

+

See OEM Customization for details on customizing the project and adding custom code.

+
Warning
While source code is provided for the IEC60730 library, Silicon Labs recommends using the certified library file. When applying for certification, the certified library file will reduce the certification time.
+
Note
The Simplicity Studio debugger will allow breakpoints and code tracing into the IEC60730 library, except for iec60730_CpuRegistersBist(), since that test requires special compiler commands. To set breakpoints or trace inside iec60730_CpuRegistersBist(), set a breakpoint inside iec60730_Bist() at the line with iec60730_CpuRegistersBist(), and single-step into the function.
+

+Generate document

+

Using Doxygen to generate HTML documentation, the documents will be generated in Doc/html/EFR32_ICE60730_Libraries

+
$ sudo apt-get install doxygen
+
$ doxygen qat.doxygen
+

+Coding convention tool

+

+Features

+
    +
  • Automatically fixes end-of-file issues.
    • +
  • Removes trailing whitespace from lines.
    • +
  • Identifies and suggests fixes for common spelling errors using codespell.
    • +
  • Formats code according to specified clang-format rules base on Silabs's coding standard.
    • +
  • Checks code for potential errors and style issues using cppcheck.
    • +
+

+Installation

+
$ pip install pre-commit
+
$ sudo apt install clang-format clang-tidy cppcheck
+

+Run

+
$ pre-commit install
+
$ pre-commit run --all-files
+

+Compiler specifications

+

The C compilers:

    +
  1. GNU GCC V12.2
    2. +
  2. IAR EW for ARM V9.2
    3. +
+

+Tools specification

+

Test frame work tools:

    +
  1. Python V3.11
    2. +
+

Simplicity Studio Commander

    +
  1. Simplicity Commander version 1v16p8b1613
    2. +
+

Support check coding convention by pre-commit

    +
  1. pre-commit 3.5.0
    2. +
  2. clang-format version 19.0.0
    3. +
  3. Cppcheck 1.90
    4. +
+

Source code control:

    +
  1. GIT V2.39
    2. +
  2. JIRA V8.22.2
    3. +
+

+System Architecture

+

This library has two primary components. The POST component is run immediately after power on, validating system state before entering the main execution loop.

+

The BIST component is run periodically in the main execution loop.

+

Validation for IEC 60730 also requires external communications validation. Every OEM application has unique external communications requirements. This library provides an example UART communications library that meets IEC 60730 requirements. OEMs must adapt their communications to IEC60730 requirements.

+

oem_iec60730_functions.c includes functions and variables that OEMs must modify for their system.

+

This EFR32 IEC60730 library fulfills the requirements for a Class B device. Table 1 lists the firmware requirements that must be met by controls. This is taken from Table 1 in IEC 60730, including new entries from Annex H.

+

Table 2 lists the firmware-specific requirements for software based controls taken from Table H.1 in IEC 60730.

+
Table 1 Requirements that must be met by controls

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Information Clause Method [1] Notes specific to this library [2]
36 Limits of activating quantity 11.3.2 H.11.4.15 H.17.14 H.18.1.5 H.27.1.1 H.28 X Not Applicable
52 Minimum parameters of any heat dissipator 14 X Not Applicable
53 Type of output waveform if other than sinusoidal H.25 X Not Applicable
54 Details of the leakage current waveform produced after failure of the basic insulation H.27 X Not Applicable
55 Relevant parameters of electronic devices unlikely to fail H.27 X Not Applicable
56 Type of output waveform produced after failure of an electronic device H.27 X Not Applicable
57 The effect on controlled outputs after electronic circuit component failure H.27 X To be provided by OEM
58b The effect on controlled outputs after a failure to operate as a result of tests H.26.2 H.26.15 X Not Applicable
66 Software sequence documentation H.11.12.2.9 D Covered by this documentation
67 Program documentation H.11.12.2.9 H.11.12.2.12 D Covered by this documentation
68 Software fault analysis H.11.12 H.27.1.1.4 D Covered by this documentation
69 Software class(es) and structure H.11.12.2 H.11.12.3 H.27.1.2.2.1 H.27.1.2.3.1 D Covered by this documentation
70 Analytical measure and fault/error control techniques employed H.11.12.1.2 D Covered by this documentation
71 Software fault/error detection times for controls H.2.17.10 X Provided by OEM timer ticks. Example uses 1 second.
72 Control responses in case of detected fault/error H.11.12.2.7 X Must be provided by OEM
73 Controls subjected to a second fault analysis and declared condition as a result of the second fault H.27.1.2.3 X Must be provided by OEM
74. External load and emission control measures to be used for test purposes H.23.1.1 X Not Applicable
91 Fault reaction time H.2.23.2 H.27.1.2.2.2 H.27.1.2.2.3 H.27.1.2.3.2 H.27.1.2.3.3 H.27.1.2.4.2 H.27.1.2.4.3 X Provided by OEM timer ticks. Example uses 1 second.
92 Class or classes of control functions H.6.18 H.27.1.2.2 H.27.1.2.3 D This library is for Class B control functions
93 Maximum number of reset actions within a time period H.11.12.4.3.6 H.11.12.4.3.4 X Not Applicable
94 Number of remote reset actions H.17.1.4.3 X Not Applicable
+
    +
  1. Methods (See IEC60730 documentation for additional details):
      +
    • C - Marking
      • +
    • D - Hard copy
      • +
    • E - Documentation on electronic media, internal or external
      • +
    • X - Declaration on materials provided to certification body
      • +
    +
    2. +
  2. OEMs are still responsible for providing any documentation for software outside the IEC60730 library.
    3. +
+
Table 2 Measures to address software fault/errors

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Component Measure Used Notes
1.1 Registers Periodic self-test using a Static memory test Provided by library
1.2 Instruction decoding and execution None Not required for Class B
1.3 Program counter / Watchdog Logical monitoring of the program sequence. Code execution sets flag that is periodically checked. Watchdog timer prevents runaway program execution. Provided by library, see example for integration sample
1.4 Addressing None Not required for Class B
1.5 Data paths Instruction decoding None Not required for Class B
2 Interrupt handling and execution Time-slot monitoring(upper and lower limit) Provided by library, see example for integration sample
3 Clock Reciprocal Comparison. Use separate oscillator to monitor SYSCLK - Calculate ratio and determine range based on accuracy Provided by library, see example for integration sample
4.1 Invariable memory Periodic 16 bit CRC Provided by library, see example for integration sample
4.2 Variable memory Periodic static memory test using March-C & stack guard. Provided by library, see example for integration sample
4.3 Addressing (variable and invariable memory) 4.1 and 4.2 provide coverage for this component
5.1 Internal data path 4.1 and 4.2 provide coverage for this component
5.2 Internal addressing 4.1 and 4.2 provide coverage for this component
6 External Communication Provided by OEM, UART example in library
6.1 External Communications - Data 16 bit CRC CRC check provided by library
6.2 External Communications - Addressing 16 bit CRC including the address OEM must include in protocol proper address verification - see UART example in library
6.3 External Communications - Timing (UART example) Scheduled transmission OEM must include in protocol proper timing measures - see UART example in library
7 Input/output periphery / 7.1 Digital I/O Plausibility check Provided by OEM
7.2 Analog I/O / 7.2.1 A/D and D/A converter Plausibility check Provided by OEM
7.2.2 Analog multiplexer Plausibility check Provided by OEM
8 Monitoring device and comparators None Not needed for class B
9 Custom chips None Not Applicable
+

+Test Specifications

+

Test Specifications provide detailed specifications for verification testing.

+

+Coding Standard

+

The IEC60730 library follows Silicon Labs Coding Standard

+

+Support

+

Customers with support questions can begin with the Silicon Labs support page. Customers can also post their questions to the Silicon Labs Community Forums for help from other Silicon Labs customers.

+

If a customer needs help with a complex issue, create a Support Request on the support page and the Silicon Labs MCU Applications Engineering team will assist with duplicating the issue, and understanding the root cause.

+

+Change Control and Update process

+

The IEC60730 library is a complex software project, and will need support and updates in the future. This section provides details on how Silicon Labs will help customers with their implementation, and release updates to the IEC60730 library.

+

Once an issue is confirmed to be a problem with the IEC60730 Library, a JIRA ticket must be filed within the Developer Services Team project (DS) with a title starting with "IEC60730: ". Each issue is assessed by the IEC60730 team lead and given a severity, with the options being:

    +
  • Blocker (Customer cannot move forward/is lines-down)
    • +
  • Critical (Customer can proceed, but with major inconvenience/no workaround)
    • +
  • High (Customer can proceed with minor inconvenience/workaround)
    • +
  • Low (Customer can proceed with no inconvenience, no workaround necessary). Information about the impact of the change on the library is also added to the ticket, along with an estimated schedule to implement the change.
    • +
+

The issue is assigned to the Developer Services Team manager. At their discretion, they will call a meeting with the IEC60730 Change Control Board (DS team lead) to discuss open JIRA tickets against the IEC60730 Library. At the conclusion of the meeting, each JIRA ticket will be voted on to fix or no-fix. Each ticket will be updated to reflect its status. Work will be assigned to appropriate Firmware team members. Work will be placed in a separate branch from Main within the Git Version Control System.

+

Once the updated firmware is complete, the developer will check in that firmware into the Silicon Labs Git version control system and create a Code Review JIRA ticket. The review developer will review the code and ensure it follows the Coding Standard. If possible, a Git Pull Request will be created between the two revisions of the source code. Any comments from the review developer will be added to a Git branch of the IEC60730 project. The Git commit ID will be attached to the Code Review JIRA ticket. The developer will address the comments from the code review, noting any declined changes with reasons behind the decline.

+

The IEC60730 library version will be incremented. Any issues fixed will have an automated test created to duplicate the issue with the previous library, and prove the issue is no longer present in the new library. The developer must also verify the Python code is operating correctly when the original tests are run.

+

If an issue cannot be validated using the automated testing infrastructure, a special waiver must be granted by the Change Control Board and instructions for manual testing included in documentation for the affected module. A full automated and manual validation cycle must pass before the updated library is ready for release. This is done by kicking off a Daily Firmware build job in the Jenkins build & test environment using the Git branch as the source.

+

Once the Daily Firmware build job and any necessary manual tests verify correct firmware operation, the branch will be merged back into the master branch. A Release Build is kicked off in Jenkins using the new release version and the master branch.

+

The MCU FW Team Manager must sign off on the validation results via JIRA.

+

Once the library completes validation, the updated library with a change list is submitted to the certification house for re-certification. After the library completes re-certification, an Errata document listing all the issues will be created/updated with the new fix/no-fix issues, and any workarounds.

+

The new library, along with the Errata document and updated Readme file with the new version number, will be uploaded to the Silicon Labs downloads site and available through Simplicity Studio.

+

+OEM Customization and Integration

+

An OEM must be aware of these items when integrating the IEC60730 library into their final product.

+
Warning
Any certification image must use the Release source files of the IEC60730 library.
+

+Safe state

+

OEMs must customize the iec60730_SafeState() function according to their system configuration . Safe State must configure any external signals and communications channels such that the system will not cause damage or unexpected operation. The function may attempt external notification, however it must be done cautiously to prevent further deterioration of the system.

+

+POST

+

iec60730_Post() is normally called after system initialization is complete, but before beginning primary operating mode. It includes a Watchdog test that resets the system to verify Watchdog operation. OEMs must expect initialization code before iec60730_Post() to execute twice. Initialization code execution time must be short enough that the watchdog can be refreshed in iec60730_Post() before expiration.

+

+BIST

+

iec60730_Bist() is executed as part of the main system loop., typically at the end. Systems with long execution times will require manual watchdog refresh, and adjustment of iec60730_TestClockTick() frequency to ensure iec60730_programmeCounterTest() passes, or calling iec60730_Bist() at multiple locations in the main system loop.

+

When in safety-critical code where POST and BIST are executing, interrupts should remain globally enabled. If interrupts must be disabled for a critical section of firmware, the critical section should follow best practices and be as short as possible. The time in the critical section must be shorter than the fastest clock timer interrupt (usually 10ms), or #iec60730_timerTestControl must be used to disable the timer tests.

+

+Program counter

+

IEC60730_GPIO_COMPLETE and IEC60730_ANALOG_COMPLETE must be set by OEM validation code. Usage examples are provided.

+

OEMs can use IEC60730_OEM0_COMPLETE - IEC60730_OEM7_COMPLETE OR'ed into #iec60730_programmeCounterCheck to verify their own test algorithms are executing at least once per every call to iec60730_programmeCounterTest(). Unused flags must be set to 1.

+
Warning
iec60730_Bist() can take several ms to execute, see Execution Time for details. If the execution time is longer than the system can tolerate, customize the iec60730_Bist() routine or split it up into individual calls in the main system loop.
+

+Watchdog

+

User should setup the internal watchdog as user's design expectation.

+

When in a long latency loop, use iec60730_RestartWatchdogs() to prevent a watchdog reset. Minimize the time in the loop as much as possible.

+
Warning
Call iec60730_RestartWatchdogs() to re-enable the watchdog once the flash erase has completed. During the flash erase time, any control signals must remain in a safe configuration. Watchdog Test provides details.
+

+IRQ

+

OEMs must update #iec60730_IRQFreqBounds for their system use. Interrupt service routines must include code for incrementing #iec60730_IRQExecCount; for an example, see oem_iec60730_timer.c. OEMs must choose and enumerate the index values for #iec60730_IRQExecCount.

+
Warning
Interrupts are disabled during portions of the Invariable Memory Test and Variable Memory Test . Interrupts must be tolerant of the latency times these tests introduce to servicing an interrupt.
+

+Clock

+

OEMs can modify the default System Clock and Timer Clock configurations in oem_iec60730_timer.c according to their system requirements.

+

+Invariable memory

+

OEMs must modify the #iec60730_Invariable structure to align with their memory usage. #iec60730_Invar_Crc or similar must be modified to store the CRC values.

+

During the CRC generation for a block of memory, the CPU is halted and unable to respond to interrupt requests.

+

For a typical system, the amount of invariable memory checked will determine the fault reaction time.

+

+Variable memory

+

More safety critical variables should be placed in IDATA, since IDATA is fully validated every call to iec60730_VmcBist().

+

If not all of XDATA is used, #iec60730_XdataNumPartitions can be decreased to cover only the used portions of memory. This will decrease the time to check the used XDATA space.

+

+External communications

+

OEMs must write their safety-related communications protocol according to the IEC60730 requirements. The demo provides an example protocol test for UART 0.

+

+GPIO

+

iec60730_GpioInit() must be replaced by OEMs with GPIO configuration for their system usage.

+

iec60730_GpioCheck() must be customized by OEMs to reflect their system usage, and expected/plausible values for their configuration.

+

OEMs must manually add this check to their main system loop where appropriate. It is not run as part of iec60730_Bist().

+

+ADC

+

iec60730_AnalogCheck() must be customized by OEMs to reflect their system usage, and expected/plausible values for their configuration.

+

OEMs must manually add this check to their main system loop where appropriate. It is not run as part of iec60730_Bist().

+

+ADC mux

+

OEMs must manually add this check to their main system loop where appropriate. It is not run as part of iec60730_Bist(). For more details see iec60730_AnalogCheck().

+

+Additional OEM safety checks

+

OEMs can implement additional safety checks and call iec60730_SafeState() with custom iec60730_OEMFail_1 settings.

+

+Resources Used

+

The sizes given below are for the example programs demo provided by extension with the SDK.

+

OEM devices that do not use a communications channel(~400 bytes), or have simple plausilbity functions (~200 bytes), will use less space.

+

OEMs can use these numbers for planning purposes, but must verify against their implementation.

+

+BIST call frequency

+

All tests must complete execution before iec60730_programmeCounterTest() is called. The example code calls iec60730_programmeCounterTest() once per second.

+

The test requiring the most iterations to complete is the Invariable Memory Test. With large memories, it may require frequent calls to iec60730_Bist() to guarantee all the invariable memory areas are checked before iec60730_programmeCounterTest() is called. This table assumes the largest invariable memory size for each device, and a check across the whole memory area.

+

The number of blocks per BIST call #INVAR_BLOCKS_PER_BIST is chosen to get the time between BIST calls close to the watchdog timeout.

+

Number of iec60730_Bist() calls/second = Size of memory / (Size of CRC block * number of blocks per BIST call)

+

Maximum time between BIST calls= 1 / (Number of iec60730_Bist calls)

+

Checking against smaller areas increase the time between BIST calls.

+

+Fault Reaction Time

+

The default Fault Reaction Time for the IEC60730 library is 1 second. Because of the BIST call frequency configuration above, a full invariable memory test can take 1 second to run on the largest memory EFR32 devices. The Program counter check runs once per second by default, and all completion bits must be set. OEMs can modify the Clock according to their needs to increase the Fault Reaction Time.

+

+OEM time

+

BIST execution time will vary depending upon the state of the invariable memory tests. These numbers are measured assuming the invariable memory test is working on an area with the maximum remainder.

+

The lower of watchdog timeout or BIST call frequency determine how much available processing time is left for OEM functions.

+

OEM processing time = lowest( watchdog time, time between BIST calls) - measured BIST execution time

+

OEM time % = OEM processing time / (lowest( watchdog time, time between BIST calls)

+

These numbers assume a full invariable memory check against a maximum size EFR32 device.

+

OEM time is the maximum time for non-IEC60730 functions in the main while(1) loop.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__iec60730__coding__standard.dot b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__coding__standard.dot new file mode 100644 index 00000000..ab2cc88c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__coding__standard.dot @@ -0,0 +1,9 @@ +digraph "Silicon Labs Coding Standard" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node1 [label="Silicon Labs Coding\l Standard",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Silicon Labs Coding Standard."]; + Node2 [label="EFR32 IEC60730 Library\l Extra Files",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__EXTRA.html",tooltip="Extra files for the EFR32 IEC Library."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__iec60730__coding__standard.html b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__coding__standard.html new file mode 100644 index 00000000..8b7040a2 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__coding__standard.html @@ -0,0 +1,1620 @@ + + + + + + + +IEC_60730: Silicon Labs Coding Standard + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
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Silicon Labs Coding Standard
EFR32 IEC60730 Library » EFR32 IEC60730 Library Extra Files
+
+
+ +

Silicon Labs Coding Standard. +More...

+
+Collaboration diagram for Silicon Labs Coding Standard:
+
+
+
+

Silicon Labs Coding Standard.

+
Silicon Labs IoT Firmware Coding Standard
+=========================================
+1 Introduction
+1.1 Purpose of this document
+The purpose of this document is to describe the coding standard used by Silicon Labs IoT customer facing firmware. A unified coding standard is necessary to provide a professional look & feel in the source code that we provide to our customers. Furthermore, it reduces cognitive load, when you need to work with another group's code. Coding style and preferences differ from person to person, which means that there will be rules in this document that you will disagree with. However, please adhere to the rules described here, as having a coding standard that you (somewhat) disagree with is better than having no coding standard.
+
+1.2 Latest version of this document
+This document is version 1.0.
+
+The latest version of this document can always be found in Stash:
+
+https://stash.silabs.com/projects/WMN_DOCS/repos/docs_misc/browse/software/standards/coding-standard.md
+
+Note: The reason why this document is in git is so that we can use pull- requests for changes and make it easier for people to track changes to the standard.
+
+1.3 Changing this document
+Any change made to this document must comply with following procedure.
+
+Note: This includes adding yourself to this list!
+
+Additionally, please make sure that your commit has a good commit message.
+
+1.4 Structure and wording of this document
+This document contains three separate parts: Coding guidelines, coding style and documentation. The coding guidelines deal with the structure of your code. This part is split into a general and a C specific part. The coding style guide details how your code should look, e.g. brace style, comment style etc. Documentation deals with how you should document your code to make it easy for other people to use and modify the code.
+
+1.4.1 Source Code
+In this document, Source code is used as a common name for any C, C++ or header file from Silicon Labs that is being provided to customers. It applies to both manually created as well as autogenerated code.
+
+1.4.2 Required
+Some of the coding standards are required and some are recommendations. All required coding standards are tagged with Required.
+
+1.4.3 Recommended
+Recommended rules should generally be followed. However, recommended rules can be broken in special circumstances. All recommended coding standards are tagged Recommended.
+
+1.4.4 Should
+The word "should" is used throughout this document. In this context, "should" is used to indicate best practice. You should strive to meet these guidelines. However, it is possible to break these rules, if that results in a better end result.
+
+1.5 Application of this standard
+1.5.1 New modules
+This standard applies unconditionally to new modules.
+
+Please note that a new software module does not need to be a new full stack. This could be only a new part in an existing stack.
+
+1.5.2 Existing modules
+Existing components will continue to use the coding standard they are already using (there is still some differences between the various stacks).
+
+Planning for updating existing components to the new coding standard will be done independently for each stack/module. The timing for these updates should be strategically chosen for each module as to minimize effort and impact to the customers, but the goal is to be completely done for the 20Q4 release.
+
+When updating to the new coding standard, especially from a naming convention perspective, it will be required to provide a compatibility layer. Exceptions will only be made for stack/modules with a valid, documented justification as well as agreement from the various stakeholders. An exception could be made either to have a partial compatibility layer or none at all.
+
+Some modules left in 'maintenance mode' or currently deprecated (exact list to be provided) might never be updated, and that is acceptable. Examples of this would include the SLEEP Driver, RTCDRV, several parts of Base, etc.
+
+2 General Guidelines
+2.1 General Guidelines
+We can't put everything into these guidelines, for things not covered in the guidelines, try to make your code blend in with the code you are editing. Use your best judgment!
+
+2.1.1 Use peer review
+A coworker should review all code. In practice, pull requests are encouraged as it allows people to comment on your work easily and it makes it possible to have good discussions about specific lines of code.
+
+2.1.2 Fix what you break
+If your changes break anything, then you are responsible for correcting the problem. This means that if you break an automated or manual testing job by committing something, you should strive to fix it as soon as possible. Other people depend on being able to build!
+
+2.1.3 Be a Boy Scout
+Leave the source code in a better condition than you found it!
+
+2.1.4 Avoid reinventing the Wheel
+If somebody has implemented some functionality before, you should use that rather than developing it again from scratch. This could be a function in a standard library, or a module that was internally developed. Silicon Labs is a large company with many different groups developing software for various use. What you need might already exist! If the existing code doesn't suit your needs exactly but is close, consider whether the required changes would make it more generally useful. If so, change it.
+
+2.1.5 Refactor code
+Try to refactor code instead of duplicating it. Extract common functionality into functions, parameterize or abstract differences, etc.
+
+2.2 Testing
+2.2.1 Testability
+Design the code in a modular fashion that allows functional testing. If possible, create unit tests for your software.
+
+2.2.2 Regression Test
+It is encouraged to add a decent level of automated regression tests.
+
+2.3 Embedded Coding
+2.3.1 Write energy friendly code
+The code should be energy friendly. This means taking advantage of hardware features available and always going down to the lowest energy mode possible. Try to always keep this in mind when writing energy aware code:
+
+Make sure all hardware modules or functions that are not needed by the application are disabled or shut down as often as possible
+Use DMA whenever possible and put the device in the lowest possible sleep mode
+Faster code = more time to sleep
+Avoid busy waiting unless absolutely necessary!
+Remember: everything matters!
+Energy aware code can get complicated and difficult to debug. That is why it adds more value!
+Use Simplicity Studio or similar tool to profile the energy usage of your code. The results are often surprising.
+2.3.2 Interrupts
+Interrupts shall have as minimal processing as possible. If possible it should just send an event to a task for later processing. Having long interrupt processing times might cause problems when other time-critical pieces of code are blocked from executing (radio protocols being a prime example).
+
+3 C Specific Guidelines
+3.1 Compilers
+3.1.1 C standards version (Required)
+For 32-bit MCUs and Wireless SoCs (Cortex-Mx), we use C99.
+
+For 8-bit MCUs (8051), we use C90. Since the Keil PK51 development tool is the default build tool for our 8051 devices, we have to make sure that we comply with the C90 exceptions Keil implemented in their PK51. These exceptions can be found here:
+
+[http://www.keil.com/support/man/docs/c51/c51_xa.htm] keil
+
+Even though we are restricted to C90 code for 8051 MCUs, we still use C99 standard integer types (uint8_t, etc). We provide our own stdint.h and stdbool.h in our SDK.
+
+If a project is intended to run on both 8-bit and 32-bit platforms, use the lowest common denominator (i.e. C90 with compatible extensions).
+
+3.1.2 Support mixing C++ and C (Recommended)
+C++ is increasing in popularity. To make sure that our libraries and code are compatible with C++ code, functions in header files should be defined inside an extern "C" block. This makes it possible to call C functions from C++.
+
+Example
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void foo(void);
+
+// other functions ...
+
+#ifdef __cplusplus
+}
+#endif
+Comment: Do not add an extra layer of indentation between the opening and closing braces in this case. This is also an exception to the rule that requires braces to be on line by themselves.
+
+3.1.3 Multiple build tool support (Recommended)
+Most of our 8051 and Cortex-M source code can be built with more than one build tool chain. To make the porting job easier between toolchains we will use header files that define macros/functions for how to access register, intrinsic functions and other parts of the device that differs between the different tool chains.
+
+For Cortex-M, this is defined by CMSIS and located in cmsis_compiler.h. For 8051 MCUs we use the si_toolchain.h file.
+
+3.1.4 Compile with warnings (Required)
+Compiler warnings often indicate bugs that will only be seen at runtime and that may be very difficult to find during testing. For example, the compiler may warn you about using an uninitialized variable. This can be difficult to find during testing.
+
+Use the compiler option -Wall to enable all warnings.
+
+3.1.5 Treat warnings as errors (Required)
+Warnings should be treated as errors so that the build does not complete until the warning if fixed. Having a zero tolerance for warnings will help keep our code cleaner and contain fewer bugs.
+
+Use the compiler option -Werror to treat warnings as errors. This applies to builds that are part of "make test". It does not apply to build mechanisms passed through to customer projects.
+
+Exceptions to Werror have to be approved by the module owner and have their rationale documented. Exceptions should disable errors, but leave warning intact (-wno-error=some-kind-of-warning) unless the warning is so noisy as flood build output. In that case it should be disabled entirely. (-wno-some-kind-of-warning)
+
+3.2 Preprocessor
+3.2.1 Use header file guards (Required)
+A header file guard must cover all header files unless they are intended to be included multiple times from the same source file (which should be rare and justified). The name of the guard is of the form:
+
+upper case file name
+
+where characters in the file name other than alphanumerics are replaced with underscores and leading underscores are stripped. Guards should guard all other code in the file except comment headers. In particular, they should guard extern declarations and #include statements.
+
+Example
+
+#ifndef MY_FILE_H
+#define MY_FILE_H
+
+#include <stdint.h>
+
+extern volatile uint64_t jiffies;
+
+// ...
+
+#endif  // MY_FILE_H
+3.2.2 Preprocessor conditional compilation (Recommended)
+Limit the use of preprocessor conditional compile statements like #if and #ifdef. If used, avoid using preprocessor conditions inside functions.
+
+Example
+
+#if !defined(LINUX_DBG)
+#define sl_enable_interrupts()   __restore_interrupt()
+#define sl_disable_interrupts()  __disable_interrupt()
+#else
+#define sl_enable_interrupts()   (void)0
+#define sl_disable_interrupts()  (void)0
+#endif
+
+void sl_do_something(void)
+{
+  sl_enable_interrupts();
+  sl_do_atomic_operation();
+  sl_disable_interrupts();
+}
+Comment: The above is a cleaner way to write code that in this example has more than one way to enable/disable interrupts. Below is the original, not so clean, code from the example above.
+
+void sl_do_something(void)
+{
+#if !defined(LINUX_DBG)
+  __disable_interrupt();
+#endif
+  sl_do_atomic_operation();
+#ifndef LINUX_DBG
+  __restore_interrupt();
+#endif
+}
+3.2.3 Use of preprocessor directive #error (Recommended)
+Use #error when #defines can only be set to certain values, or other configuration problems.
+
+Example
+
+#if (DEFAULT_SAMPLE_RATE8 == 44)
+#define DEFAULT_SAMPLE_FREQ 44100
+#elif (DEFAULT_SAMPLE_RATE8 == 48)
+#define DEFAULT_SAMPLE_FREQ 48000
+#else
+#error Invalid value: DEFAULT_SAMPLE_RATE8
+#endif
+3.2.4 Use of preprocessor directive #include (Recommended)
+Header files should generally list their dependencies explicitly. The preferred way is to #include prerequisite header files. Alternatively, the header file may validate that an appropriate macro is defined.
+
+Preferred
+
+#include "sl_foo.h"
+
+void sl_bar(sl_foo_t baz);     // sl_foo_t is defined in sl_foo.h
+Alternative
+
+// sl_foo_t is defined in sl_foo.h
+#ifndef FOO_T_DEFINED
+#error This source file needs to #include sl_foo.h
+#endif
+
+void sl_bar(sl_foo_t baz);     // sl_foo_t is defined in sl_foo.h
+You should strive to not include more header files than you really require in a given C file. Having more than you need increases compilation time and increases the chance of unintended side effects. <> and "" are used by the compiler to change the search path for included files. In general, <> should only be used for C standard libraries. #include should generally not be used for C files.
+
+Example
+
+#include <stdlib.h>
+#include "SI_C8051F850_Register_Enums.h"
+#include "SI_Bluetooth_Init.h"
+3.2.5 Use of preprocessor directive #undef (Recommended)
+Using #undef should be avoided as it can lead to weird behaviors that are often fairly difficult to detect and solve. For example, errors can occur only when compiling files in a certain order.
+
+3.2.6 Use of preprocessor 'stringify' and concatenation (Recommended)
+Use of the preprocessor 'stringify' or string concatenation operations should be avoided or kept to a minimum. Manipulations such as these can quickly become quite complex to understand, maintain or debug and should be avoided whenever possible.
+
+3.2.7 General use of preprocessor (Recommended)
+The preprocessor should be used reasonably, mostly for usual operations such as doing conditional compilation including that described in section 3.2.2, including files, reporting an error, etc. Using the preprocessor to do complex or unusual operations should normally be avoided.
+
+3.3 Standard Libraries
+3.3.1 Use of stdint.h and stdbool.h (Required)
+Use stdint.h and stdbool.h types whenever possible. This makes types unambiguous, more portable and opens up compiler optimizations.
+
+This means that you should always use C99 types like uint8_t. Do not use other types such as U8 or UINT8 unless needed to maintain compatibility with older code or third party library.
+
+3.3.2 Use of stdlib (Recommended)
+You can use the stdlib functions memset, memcpy, memmove, memcmp, strcmp, etc. instead of writing your own for-loops. In code bases where these functions have been abstracted (e.g., by MEMSET, MEMCMP, and friends in the base repo), it is recommended to use those abstractions. Otherwise, for Cortex-M class devices it is recommended to use the stdlib versions as they are often heavily optimized.
+
+3.3.3 Use of dynamic memory / the heap (Recommended)
+Dynamic memory allocation with malloc() and free() should generally not be used. Some of our customers have strict rules in their QA procedures that dictate that malloc() cannot be used in embedded software. If we use it, then our libraries become unusable for them. The problem with malloc()/free() is fragmentation. Because our micros are memory constrained and have no virtual memory, malloc() can over time fragment memory, which in turn can cause a malloc() to fail down the road.
+
+3.3.4 Do not use the standard C assert() (Required)
+It is strongly recommended to not use the assert() function that comes with the standard C/C++ library. If the Silicon Labs libraries used in your project contains assert function(s), then use them. If no Silicon Labs specific assert function is available, then use the code from the example below. The rationale for this rule is that a number of toolchains will bring in their standard library versions of printf and friends in order to implement assert. This can bring in unwanted side effects, such as code size increases.
+
+Example
+
+// void user_assert (int file, int line);                   /* declaration */
+// #define USER_ASSERT(file, line) user_assert(file, line)  /* definition  */
+
+void sl_assert(const char *file, int line)
+{
+  (void)file;  // Unused parameter
+  (void)line;  // Unused parameter
+  // Wait forever until the watchdog fires
+  while (1);
+}
+
+#if defined(NDEBUG)
+#define SL_ASSERT(expr)
+#else
+#if defined(USER_ASSERT)
+#define SL_ASSERT(expr)   ((expr) ? ((void)0) : USER_ASSERT(__FILE__, __LINE__))
+#else
+#define SL_ASSERT(expr)   ((expr) ? ((void)0) : sl_assert(__FILE__, __LINE__))
+#endif
+#endif
+Comment: Below are the steps to overwrite Silicon Labs assert function with a user defined assert.
+
+Define a void user_assert(const char *, int) function
+Uncomment the two lines below (marked "declaration" and "definition").
+assert() is a void function and never return any value. If you like a function to return a value depending on the evaluation of an expression, then feel free to create a new function for that purpose.
+
+3.4 Keywords
+3.4.1 The "volatile" keyword (Recommended)
+Be careful using the volatile keyword. Access to a volatile variable/constant can never be optimized away. Only variable/constants that can have side effects and/or that can change value from outside the embedded application should be declared volatile. Typically Special Function Registers (SFRs) are volatile.
+
+Delay loops using volatile are usually a bad idea since they consume both CPU time and energy. It is better to implement delays with for example timer/counter interrupts. But there are exceptions when using a volatile variable may be favorable, such as:
+
+Very short delays when timer setup and interrupt handling is time consuming, especially when the latency is longer than the delay period itself.
+Applications that are constrained on timer resources.
+As an example, the Gecko "udelay.c" file in kits/common/drivers is a good example of a "busy wait" delay loop, and is used successfully in the Sharp Memory LCD device driver where we need delays of down to 2 microseconds.
+
+3.4.2 The "inline" keyword (Recommended)
+The inline keyword is supported in C99, which is the language standard use for our 32-bit MCUs and Wireless SoCs, but behaves differently compared to inline in C++. Inline was also added/used by some C89/C90 compilers and those implementations might also differ compared to the C99 standard.
+
+So adding inline to your code is usually not a problem. Moving code that uses inline and was built with a C++ or C89/C90 compiler might change the behavior of your application.
+
+For Cortex-Mx devices, use the CMSIS __INLINE macro since this will expand to whatever keyword is used by the supported set of build tools.
+
+3.4.3 The "static" keyword (Recommended)
+For file global variables (variables that are global to a file but not visible outside the file) should always use the static keyword. This should also apply to any functions that are used only within a single file.
+
+Keep in mind the difference between a static variable at the file scope level, and a static variable declared within a function.
+
+Example
+
+// A variable that is only visible within a file
+static uint32_t my_local_variable = 0xFF;
+
+// A function that is used only within a file
+static void do_something(void)
+{
+  // ...
+}
+For Cortex-Mx devices, use the CMSIS __STATIC_INLINE macro if you need something to be both static and inline.
+
+3.5 Data Types
+3.5.1 Avoid enums in arrays, structures, or unions (Required)
+This is especially important for aggregate types shared between pre-built libraries (e.g. RAIL) and customer-compiled code (e.g. emlib). The problem is that the size of enums is not standardized, but is compiler-defined. Even within the same compiler, there could be options to select one style vs. another. Libraries built with one compiler or options will not interface properly to non-library code built with a different compiler or options -- field offsets and structure / array sizes could mismatch.
+
+Example
+
+// sl_lib.h include file:
+
+typedef enum {
+  SL_LIB_OPTION_A, // 0
+  SL_LIB_OPTION_B, // 1
+  SL_LIB_OPTION_C, // 2
+} sl_lib_option_t;
+
+typedef struct {
+  sl_lib_option_t default_option;
+  uint8_t some_other_field;
+} sl_lib_config_t;
+
+extern void sl_lib_init(sl_lib_config_t *config);
+extern void sl_lib_set_options(sl_lib_option_t *option_list, uint32_t option_count);
+
+// sl_lib.c implementation:
+//
+// Built with compiler or options where enums are the smallest type
+// able to represent all of its defined values, so:
+// sizeof(sl_lib_option_t) == 1 (int8_t can represent 0..2)
+// sizeof(sl_lib_config_t) == 2, offsetof(some_other_field) == 1
+
+// Customer application code:
+//
+// This code might be built with compiler or options where enums are
+// of type int (i.e. int32_t on an I32 platform).
+
+#include "sl_lib.h"
+
+const sl_lib_config_t SL_LIB_CONFIG = {
+  .default_option = SL_LIB_OPTION_A,
+  .some_other_field = 10,
+}
+
+void sl_lib_use_lib(void)
+{
+  sl_lib_option_t lib_options[] = { SL_LIB_OPTION_B, SL_LIB_OPTION_C };
+
+  // sizeof(SL_LIB_CONFIG) == 8, offsetof(some_other_field) == 4
+  sl_lib_init(&SL_LIB_CONFIG);
+
+  // sizeof(lib_options) == 8, sizeof(*lib_options) == 4
+  sl_lib_set_options(lib_options, sizeof(lib_options)/sizeof(*lib_options));
+}
+3.5.2 Avoid bitfields in structures/unions (Required)
+This is also especially important for aggregate types shared between libraries and customer-compiled code. As with enums, the size and bit layout of bitfields is not standardized, but is compiler-defined or subject to compiler options. Libraries built with one compiler or options will not interface properly to non-library code built with a different compiler or options.
+
+Example
+
+// sl_lib.h include file:
+
+typedef struct {
+  bool    ena          : 1;
+  uint8_t some_setting : 5;
+} sl_lib_struct_t;
+
+// Library could be built such that this structure is laid out in a byte:
+//   7   6   5   4   3   2   1   0
+// [ x | x |     some_setting  |ena]
+// while application could be built such that this structure is laid out
+// across two bytes, or in different endian order:
+//   7   6   5   4   3   2   1   0
+// [ena| x | x | x | x | x | x | x ]
+// [   some_setting    | x | x | x ]
+3.6 Variables
+3.6.1 Using global variables (Recommended)
+Minimize use of global variables. It is hard for a compiler to optimize code using them. The compiler (usually) only sees one C file at the time and does not know if the global has been changed between accesses.
+
+A way around this might be to copy the global to a static/auto variable and use the copy in your code.
+
+Global variables can also easily become a source for confusion and errors in the application code as time goes on. As different developers work on the code they might use the global in slightly different ways and accidentally break something in parts of the code they are not working on. This recommendation should be evaluated at an architecture/project level to determine if it applies.
+
+8051 Note: The 8051 compiler will often produce more efficient code when using a project global instead of sharing global data through a handle pointer or other mechanism. This trade-off should be taken into account when writing code targeted for 8051. As much as possible, steps should still be taken to minimize the use of global variables.
+
+3.7 Functions
+3.7.1 Prototype functions (Required)
+Make sure either the full implementation or a prototype precedes any call to a function. For external functions, this should be done by with a #include of the appropriate header.
+
+3.7.2 Functions return data types (Required)
+All functions that can fail should return sl_status_t. The idea is to be as consistent and predictable throughout all of our code base to make it easier for customers to know what to expect from our functions.
+
+There will be functions that will not return sl_status_t. For example, functions returning void; simple "getter" functions that cannot fail or that we don't need to differentiate between error cases; a function checking if a condition is true or false could return a bool; a function adding data to a string or buffer could return the number of bytes added to the string or buffer; or a callback function could return an indicator to let the stack know how to act. Other examples may exist but all of these exceptions should be used sparingly and with good reason. Please check with your team and/or manager before doing so.
+
+In any case, the following requirements must be complied with:
+
+if a function can fail, there must be a clear indication as to how to detect a failure. This is preferrably done through returning sl_status, but having a special 'invalid' value returned in case of failure is also allowed. No matter how this is achieved, it must be documented in the doxygen function header.
+bool must not be returned to indicate success or failure. bool should only be used to indicate if a given condition is true or false. Even then, using an enum should be considered for future-proofing the function, should it need to return more than a true/false value in the future.
+Example
+
+// Don't do:
+bool sl_do_something(sl_type_t *var)
+{
+  sl_status_t my_status;
+  // [...]
+  my_status = sli_do_anything(var);
+  // [...]
+  if (my_status == SL_STATUS_OK) {
+    return true;
+  } else {
+    return false;
+  }
+}
+
+sl_status_t sl_net_is_link_up(bool *is_up)
+{
+  // [...]
+  *is_up = true;
+}
+
+// Instead do:
+sl_status_t sl_do_something(sl_type_t *var)
+{
+  sl_status_t my_status;
+  // [...]
+  my_status = sli_do_anything(var);
+  // [...]
+  return my_status;
+}
+
+bool sl_net_is_link_up(void)
+{
+  // [...]
+  return true;
+}
+
+sl_usbh_action_t sl_usbh_on_device_connection(void)
+{
+  // [...]
+  return SL_USBH_ACTION_ACCEPT;
+}
+
+sl_usbd_handle_t sl_usbd_get_handle(uint8_t id)
+{
+  // [...]
+  if (id < max_id) {
+    return sli_usbd_handle_table[id];
+  } else {
+    return SL_USBD_HANDLE_INVALID; //defined to something invalid and properly documented
+  }
+}
+3.7.3 Return values should always be checked and propagated (Recommended)
+Values returned by any function should always be checked to see if an error occurred. Such return values should normally be propagated up the callers tree up to the application or to a function that can react to it.
+
+3.7.4 Functions replicating a standard API can follow that API (Recommended)
+If a function aims to replicate a standard API (like strcpy or printf), our version of the function can replicate that standard function's API. These functions do not need to follow our coding standards' directives relating to data types, return values or status. It should still follow our naming convention.
+
+3.8 Macros
+3.8.1 Macros with side-effects (Recommended)
+Macros that may have have side-effects should be function-like and named appropriately.
+
+Example
+
+#define sl_lock()     do {__acquire_mutex(&sl_top_level_mutex);} while(0)
+#define sl_unlock()   do {__release_mutex(&sl_top_level_mutex);} while(0)
+3.8.2 Macros with statement(s) (Required)
+If a macro expands into one or more full statements, make sure it consumes a subsequent semicolon. Furthermore, multiple-statement macros must be wrapped in a block. These rules ensure that the expanded macro will have the same syntax as a non-compound statement. Otherwise, it may cause undesirable parsing if a customer uses it without braces in a selection (if (...) FOO();) or iteration (while (...) FOO();) statement.
+
+Example
+
+#define SLI_FOO(x, y)         \
+          do {                \
+            ga = (x);         \
+            gb = (y);         \
+            gc = ga + gb;     \
+          } while (0)
+
+#define sli_do_nothing()   (void)0
+
+void sl_bar(int baz)
+{
+  if (baz) {
+    SLI_FOO(123, 321);
+  } else {
+    sli_do_nothing();
+  }
+}
+3.8.3 Functional macros with argument(s) (Required)
+Uses of arguments within macros, and the macro body itself, if it is an expression, should be wrapped in parentheses. This avoids problems stemming from unintended precedence groupings. Arguments should be used only once if possible to avoid problems when a statement or expression with side effects is passed.
+
+Note: In general, static inline functions are preferred to macros as they have less weird side-effects and are easier to read.
+
+Example
+
+#define sl_bar(x, y, z) (0xFFFF | ((x) & ((y) | (z))))
+3.9 goto statements
+3.9.1 goto statements should only be used for cleanup purposes or early exit in case of an error, when there is no simple workaround (Required)
+gotos should never be used, except when needing to cleanup (free resources, release a lock, exit a critical section, etc.) in the case an error occurred in the function. If a simple workaround can be used instead of goto, the workaround should be used instead.
+
+Example
+
+// Using goto, if no simple workaround available
+void sli_usb_function(void)
+{
+  // Acquire lock
+  // [...]
+  if (!ok) {
+    goto release;
+  }
+  // [...]
+release:
+  // Release lock
+}
+
+// Workaround, whenever possible
+void sli_usb_function(void)
+{
+  // Acquire lock
+  // [...]
+  if (ok) {
+    // [...]
+  }
+  // Release lock
+}
+3.9.2 gotos should only refer to a label declared after them (Required)
+A goto statement should only refer to a label declared after (below) them, in the code.
+
+No goto shall ever cause the code to go back "up", it should always jump "down", towards the end of the function.
+
+Example
+
+// Don't do:
+void sli_usb_function(void)
+{
+  // [...]
+loop_start:
+  // [...]
+  if (loop) {
+    goto loop_start;
+  }
+}
+
+// Instead do:
+void sli_usb_function(void)
+{
+  // Acquire lock
+  // [...]
+  if (!ok) {
+    goto release;
+  }
+  // [...]
+release:
+  // Release lock
+}
+3.9.3 gotos should only refer to a static label located in the same function (Required)
+No computed goto statement (as available in some GCC extensions) shall be used. setjmp and longjmp should never be used. The label referred to by a goto statement needs to be in the same function as the goto statement itself.
+
+3.9.4 Any label referenced by a goto need to be declared in the same block or a block enclosing the goto (Required)
+goto statements and labels should not be used to jump between blocks, as it can easily lead to unstructured code. goto should not be used either to jump between cases of a switch.
+
+Example
+
+// Don't do:
+void sli_usb_function(uint8_t bar)
+{
+  if (bar > 0) {
+    goto label;
+  }
+  // [...]
+  goto label;
+  // [...]
+  if (foo > 0) {
+label:
+    // [...]
+  }
+}
+
+// Instead do:
+void sli_usb_function(uint8_t bar)
+{
+  // [...]
+  goto label;
+  // [...]
+  if (bar > 0) {
+    goto label;
+  }
+  // [...]
+label:
+  // [...]
+}
+
+// Don't do:
+void sli_usb_function(uint8_t bar)
+{
+  switch(bar) {
+    case 1:
+      if (x == y) {
+        goto label;
+      }
+      break;
+
+    case 2:
+      doThat();
+label:
+      doTheOtherThing();
+      break;
+
+    default:
+      break;
+  }
+}
+3.10 Libraries
+3.10.1 Dependencies (Required)
+Be conscious about what code the library depends on. To avoid excessive code footprint, we must be aware of what external functions each library pulls in. E.g. the printf and sprintf functions are better avoided within a library as they require a large footprint
+
+Exception: They can be used for generating debug information as long as they are conditionally compiled in with a flag that defaults to false).
+
+3.10.2 Including third party code (Required)
+For all open source or third party software that we include in our software releases, we need to have an acceptable license that allows us to do so. That means we need to send an email to our legal department (DL.Legal) and ask for permission before introducing new open source software into our distributions. Consult the Software Manager before including any third party software code intended to be released.
+
+3.10.3 Configuring libraries in source form (Required)
+The customer should never have to change the original source files to configure the library (this creates problems when upgrading the library to a newer version, and also makes it impossible to have two projects with different configuration settings using the same instance of the library). Instead, it should be possible to set all configurations settings from the customer's application project. Normally this can be done with macros that allow a customer to configure library settings from within the application.
+
+Example
+
+#if !defined(EM_SETTING)                   // If EM_SETTING is not defined by user,
+#define EM_SETTING default_value_for_em    // then we set our default value/function.
+#endif
+3.10.4 Configuring libraries in binary form (Recommended)
+If a library is provided in binary form, then macros cannot be used for configuration settings.
+
+A good alternative is to use callback functions or static variables. Callbacks might not be appropriate for 8-bit code, so use your judgment.
+
+Example
+
+// We call sl_custom_configuration_callback() from our library to get the
+// user defined configuration.
+//
+int configuration = sl_custom_configuration_callback();
+
+// The user have to define sl_custom_configuration_callback() and return a
+// valid configuration for the application.
+//
+int sl_custom_configuration_callback(void)
+{
+  return OPT_SIZE | MAX_BUF_SIZE;
+}
+Comment: sl_custom_configuration_callback is defined in user application and returns different values depending on the user implementation.
+
+Example
+
+// We initialize configuration with a sensible default that is suitable
+// for the largest number of applications
+//
+int configuration = SL_DEFAULT_CONFIGURATION;
+
+// The user application can customize the behavior by calling
+// sl_set_configuration
+//
+void sl_set_configuration(int user_config)
+{
+  configuration = user_config;
+}
+3.11 Misc
+3.11.1 Avoid embedding assignments in expressions (Recommended)
+Embedding assignments in expressions makes for all kinds of wacky bugs. When scanning some code it is easy to miss that a complicated expression contains an assignment deep inside.
+
+Example
+
+++ceiling;
+*handle = ceiling;
+Comment: The above is easy to understand, hard to get wrong and most compilers today will generate the same optimized code that that example as it will for the below code;
+
+*handle = ++ceiling;
+4 Coding style and formatting
+4.1 General formatting
+4.1.1 Use spaces, not tabs (Required)
+For indenting files, use spaces and never tabs. A mix of tabs and spaces is never acceptable.
+
+4.1.2 Indents are 2 spaces per level (Required)
+Indent each nested level with 2 spaces of indent.
+
+4.1.2.1 Preprocessor indentation (Recommended)
+Preprocessor directives historically have not been indented, but they may be indented to make them less distracting to the module's code flow (though the technique described in the section 3.2.2 offers an even cleaner alternative where it makes sense). When indented, the # should remain attached to the directive and not remain in the first column -- no modern preprocessor still requires the # be in the first column. When an #if or #ifdef is indented, its #else, #elif, and #endif shall also be identically indented. The code between the preprocessor directives may also be indented.
+
+Example
+
+void sl_set_xyz_option(xyz_option_t xyz_option)
+{
+  #if defined( _XYZ_LFCCLKEN0_MASK ) // XYZ supports LFC clock
+    if (xyz_option == xyz_clock_lfc) {
+      xyz_clock_set_lfc();
+      return;
+    }
+  #endif
+  #if defined( _XYZ_LFECLKSEL_MASK ) // XYZ supports LFE clock
+    if (xyz_option == xyz_clock_lfe) {
+      xyz_clock_set_lfe();
+      return;
+    }
+  #endif
+}
+4.1.3 Lines should not be longer than 80 characters (Recommended)
+We enforce an 80 characters limit per line of source code. This lets people set up their editors such that they can have multiple editors side-by-side. Although 80 characters are little by modern standards, it mixes well with existing code.
+
+4.1.4 Line endings (Required)
+We use line ending normalization in our repositories. This means that all text files are converted to '\n' line endings when they are stored in git. However most customers are using Windows operating system which expects a CRLF line ending. Therefore, with rare exception, all source code delivered to customers should have CRLF (DOS) line endings. There are two ways to accomplish this. First, if you are using a Windows host operating system, set your git autocrlf setting as follows:
+
+core.autocrlf true
+This will ensure all text files have DOS line endings when checked out from the repository.
+
+The second method is to use a release script that forces all text file line endings to CRLF when a source code release package is built by the release script.
+
+Exceptions: if the source code is intended for a system that >use normal line endings, for example a OS X or Linux system, then >the source line endings can be left as '\n'.
+
+Note: All repositories should include a .gitattributes file to explicitly specify file types for line endings.
+
+4.1.5 Use only plain ASCII or UTF-8 (Required)
+Text files should almost always contain only plain ASCII. Specifically, avoid characters outside the usual whitespace and printable ones (0x9-0xD and 0x20-0x7E, inclusive). Internationalized strings, when used, are best placed in a resource file.
+
+In the rare case that other characters are needed in a text file and cannot be escaped, the file should be UTF-8 encoded with no byte-order mark.
+
+4.1.6 Use ISO8601 formatting for dates (Required)
+If you use a date in the comments or elsewhere, specify it using the unambiguous ISO8601 format, i.e. 2013-11-26.
+
+4.1.7 Inserting empty and blank lines (Required)
+There should never be consecutive blank rows.
+
+Use two slashes (C++ comment) and 77 dashes to separate logical parts of the code. Use 2 slashes and 32 dashes for minor sections. Use of section separators as shown here is optional.
+
+Example
+
+// -----------------------------------------------------------------------------
+// Here we start a new logical part in this source/header file...
+
+// -------------------------------
+// And here comes a new minor section...
+4.1.8 Use parentheses liberally (Required)
+Add parentheses if you have any doubt at all about precedence, not doing so has led to some very obscure bugs. This is especially true of the bitwise binary operators {&, |, ^} and Boolean operators {&&, ||}.
+
+4.1.9 Break up long expressions (Required)
+Whenever there are long expressions, it should be broken into multiple lines. When a line is broken into multiple lines, each line should start with the operator that operates on that full line (single element or a group of elements within parentheses). The operator must be the first thing on the line, and it should be indented appropriately.
+
+Example
+
+int bitmask = (OPTION_1
+               | OPTION_2
+               | (IS_THIS_SET
+                  ? OPTION_3
+                  : OPTION_4));
+
+int bitmask = (OPTION_1
+               | OPTION_2
+               | (IS_THIS_SET ? OPTION_3 : OPTION_4));
+
+int bitmask = (OPTION_1
+               | OPTION_2
+               | (OPTION_3 & OPTION_4));
+Comment: All the above are examples of nicely formatted long expressions.
+
+Below is an example how you should not format long and complex expressions.
+
+// Avoid this...
+int no_good_formatting = (OPTION_1
+                         | OPTION_2
+                         | OPTION_3 & OPTION_4);
+4.1.10 goto labels should be on column 1 (Required)
+Labels referred to by gotos need to be located at column 1, disregarding any indentation.
+
+Example
+
+// Don't do:
+void sli_usb_function(void)
+{
+  // Acquire lock
+  // [...]
+  if (!ok) {
+    goto release;
+  }
+  // [...]
+  release:
+  // Release lock
+}
+
+// Instead do:
+void sli_usb_function(void)
+{
+  // Acquire lock
+  // [...]
+  if (!ok) {
+    goto release;
+  }
+  // [...]
+release:
+  // Release lock
+}
+4.2 Commenting code (Required)
+4.2.1 Use C++ style comments ("//")
+All inline code comments should use the C++ style //. However there are two exceptions to this rule. First, function and file documentation blocks use a different style (see documentation section below).
+
+Second, for multi-line macros using #define, C style comments /* ... */ should be used for embedded comments (see example below).
+
+For both kinds of comments, there should be a space following the opening comment marker. For example // My comment.
+
+Make sure constant values in the code are explained. Function calls with raw constants should be labeled based on the parameter that is being passed in.
+
+Example
+
+// Example for the exception
+// This type is needed because using // would swallow the line continuation marker.
+#define MY_CLI_COMMANDS \
+  /* This command takes 3 arguments: */           \
+  /*  Node ID - a 2-byte node ID destination */   \
+  /*  Endpoint - a 1-byte node ID */              \
+  /*  Cluster  - a 2-byte cluster ID */           \
+  { "my_command", my_command_function, "vuv" },
+
+// Example of how to comment constant values.
+// For the function declaration below
+void function(int seconds, boolean print_output);
+
+// we add comments after each parameter (OPTIONAL)
+function(0,        // seconds
+         FALSE);   // print_output
+4.3 Bracing style (Required)
+Use the so called "One True Brace Style" (see [https://en.wikipedia.org/wiki/Indent_style#Variant:_1TBS]) Indent increases one level after an opening brace, and decreases one level before a closing brace. Opening braces do not go on their own separate line, except for free standing blocks and function definitions. Closing braces are on their own separate line with nothing else on these lines.
+
+All if/else/while/for/do-while blocks must be enclosed by braces, even if there is only one statement in the block.
+
+Exceptions for the above rule are;
+
+The typedef alias for a composite (struct/union) or enum type is on the same line as the closing brace.
+In a do-while loop the condition (while (...);) is on the same line as the closing brace.
+else and else if are on the same line as the closing brace.
+Example
+
+void sl_do_something(uint8_t bar)
+{
+  if (foo > bar) { // The preceding brace is *required*
+    do_this();
+  } else if (for < bar) {
+    do_that();
+  } else {
+    do_another_thing();
+  }
+
+  if (foo > bar) {
+    do_this();
+  }
+
+  while (1) {
+  }
+
+  do {
+    sli_do_work();
+  } while (foo);
+}
+
+typedef enum {
+  SL_CARD_SPADE,
+  SL_CARD_HEART,
+  SL_CARD_CLUB,
+  SL_CARD_DIAMOND
+} sl_card_suit_t;
+4.4 Switch statements and labels
+4.4.1 Using labels (Required)
+Switch-case labels should be indented as any other line of code would be.
+
+Example
+
+if (foo) {
+  sl_bsp_set_leds(0xff00);
+
+  testing:
+
+  sl_bsp_set_leds(0x00ff);
+}
+4.4.2 Labels with block (Required)
+If a block is desired after a label, then the opening brace should be by itself on the line following the label, at the same indentation.
+
+The closing brace should be on a line by itself after the last statement in the block, at the same indent level as the opening brace.
+
+Example
+
+if (foo) {
+  sl_bsp_set_leds(0xff00);
+
+  testing:
+  {
+    sl_bsp_set_leds(0x00ff);
+    sl_bsp_set_leds(0x0000);
+  }
+}
+4.4.3 Switch statements (Required)
+The cases in switch statements should be indented one level from the enclosing braces. Separate case blocks with a blank line after each break;. All switch statements should include a default block unless there is a good reason not to. The default block can collapse into one of the other cases but it should clearly show what happens when there is no matching case. Finally, if a case block does not end with an unconditional jump, there should be a comment clearly stating that the code is intentionally meant to fall through.
+
+Example
+
+switch(baz) {
+  case 1:
+    sli_do_this();
+    break;
+
+  case 2:
+    sli_do_that();
+    // This case is meant to fall through to the next
+
+  case 3: {
+    sli_do_the_other_thing();
+    break;
+  }
+
+  case 0:
+  default:
+    sli_do_what();
+    break;
+}
+4.5 Functions, operators and C keywords
+4.5.1 Listing function parameters (Required)
+Whenever there is a list of function parameters, they should all fit on a single line or be listed one parameter per line. If listed on separate lines, each parameter has the same indent level as the first parameter.
+
+Example
+
+void sl_do_something(int a,
+                     int b,
+                     int c,
+                     const char *string1,
+                     const char *string2)
+{
+  // ...
+}
+
+void sl_do_something2(int a, int b, int c)
+{
+  // ...
+}
+4.5.2 Using function parentheses (Required)
+For function declarations, definitions and calls, there shall be no spaces before or after the opening parentheses, or before the closing parentheses.
+
+Example
+
+int sl_foo(int days, int seconds);
+// ...
+ret = sl_foo(days, seconds);
+4.5.3 Binary and ternary operators (Required)
+Use spaces around binary & ternary operators in expressions. C expressions are hard enough to parse without running them altogether.
+
+Example
+
+for (j = 0; j < parameter_sizes[i]; j++) {
+4.5.4 Use a single space after C keywords (Required)
+C keywords (ex. for, switch, while, if, do) – should have a single space after the keyword.
+
+Example
+
+while (counter < UART_MAX_IO_BUFFER) {
+4.5.5 Additional space within expressions
+Use of additional whitespace within expressions to improve readability is permitted as long as it doesn't interfere with appropriate multi-line expression indentation. Such style should be consistent within the module.
+
+4.5.6 Identify do-nothing code (Recommended)
+Avoid loops that do not make it obvious that they do nothing. Add a comment to explain the reason for the do-nothing loop. This applies to any code that does not do anything.
+
+Example
+
+// Don't do:
+while (waiting_for_something);
+
+// Instead do:
+// Useful comment explaining why you are waiting
+while (waiting_for_something);
+4.5.7 Pointer asterisk position (Required)
+When declaring a pointer to a variable, the pointer asterisk should be placed together with the variable name, not together with the type.
+
+Example
+
+// Don't do:
+char* c = (char*)a;
+void sl_foo(uint32_t* bar);
+
+// Instead do:
+char *c = (char *)a;
+void sl_foo(uint32_t *bar);
+4.5.8 Don't mix pointer and value type declarations (Required)
+Don't mix declarations of pointer type variables and value type variables on the same line.
+
+Example
+
+// Don't do:
+uint32_t *a, b;
+
+// Instead do:
+uint32_t *a;
+uint32_t b;
+4.6 Naming
+4.6.1 General Considerations
+4.6.1.1 Use meaningful names (Required)
+Special care should be taken when naming anything. The name should convey the purpose of the construct as clearly as possible.
+
+4.6.1.2 Avoid abbreviations (Required)
+In general, use long names and avoid unclear abbreviations and other cryptic notations.
+
+Prefixes such as sl_ and sli_ are exceptions to this rule and therefore can and need to be used where appropriate.
+
+4.6.2 Namespaces (Required)
+All constructs will have a prefix, with the exception of function parameters, variables local to a function and structure fields.
+
+The purpose of using namespace prefixes is to prevent namespace collisions and not necessarily for branding.
+
+The prefix will be the same for all constructs, it will only change based on whether that construct is public (can be used by end users), internal (can only be used from within Silicon Labs code) or static (local to a file).
+
+If a construct is public, it should be prefixed by sl_.
+
+If a construct is internal, it should be prefixed by sli_.
+
+For example, this means that no public function would refer to either a private or internal type in one of their parameters.
+
+Those constructs' names should then be followed by a <module>_ prefix, that can consists of either one or two words, separated by an underscore. For example, this could be uart_ or usbd_msc_. The <module>_ prefix can be omitted if the code is intended to be common code used by any other module and is placed in platform/common or a similar common location.
+
+Constants and macros will use capitalized version of these prefixes (SL_, SLI_ and <MODULE>_).
+
+As previously stated, function parameters, variables local to a function and structure fields will be prefixed by neither the sl[i]/SL[I] nor the _/ prefix.
+
+If a construct is static or in any way local to a single file, it is not required to have any prefix at all. If it has some kind of prefix, it should not use anything starting with sl.
+
+Example
+
+// File-local
+#define SLI_READY 0x0020
+
+static uint8_t next_transmit;
+
+static urb_t transmit_buffer(uint8_t *buffer);
+
+typedef struct {
+    uint8_t  urb_size; // Struct fields do not have any prefix.
+    uint8_t  *urb_list_next;
+    uint16_t array[10];
+} urb_t;
+
+// Internal-only
+#define SLI_UNUSED_PARAMETER(param)   (void)(param)
+
+const unsigned int SLI_MAX_UART_CONNECTIONS = 3;
+
+sl_usbd_endpoint sli_usbd_msc_endpoint; // Internal variable using public type.
+
+typedef struct {
+  uint8_t time_ms;
+  uint8_t *longer_blah_ptr;
+} sli_usbd_msc_cnt_t;
+
+void sli_usbd_msc_tx_endpoint(sli_usbd_msc_cnt_t *buffer,
+                              uint8_t            count);
+
+void sli_usbd_msc_tx_endpoint(sli_usbd_msc_cnt_t *buffer,
+                              uint8_t            count)
+{
+  uint8_t flag; // Local variable does not have any prefix.
+  urb_t urb; // Referring to static type from within public function is ok.
+}
+
+// Public
+
+#define SL_CREATE_HANDLE(node, id) (node).flag = ((id) | 0xFF00)
+
+const unsigned int SL_USBD_VERSION = 20200;
+
+sl_uart_channel_t sl_uart_channels_list[10];
+
+sl_time_t sl_get_time(void);
+
+typedef struct {
+    uint32_t hour;
+    uint32_t minute;
+    uint32_t second;
+} sl_time_t;
+4.6.3 Naming (Required)
+The following section (4.6.3.*) contains information on how to name anything. This acts as a default, if nothing more specific exists for a particular construct. In general, construct-specific standards should be avoided.
+
+4.6.3.1 Casing (Required)
+Every construct's name needs to be all lower-case, with each word or abbreviation separated by an underscore. This is also known as snake case.
+
+Example
+
+// Global variable
+uint8_t sl_uart_char; // Publicly available
+uint8_t sli_usbd_endpoint_buffer[32]; // Internal use only
+
+// File-local variable
+static sl_usbd_urb_t *urb_list_head;
+
+// Functions
+void sl_led_turn_on(void);
+void sli_nvic_set_priority(ADC_IRQ);
+
+// Data types
+typedef uint32_t sli_kernel_flags_t;
+typedef struct {
+  uint8_t *data_start;
+} sl_usbd_urb_t;
+4.6.3.2 Casing and acronyms (Required)
+Acronyms and abbreviations are treated like any other word. Do not put in lower-case or upper-case some or all letters of an abbreviation, even if it is normally written that way. Instead, comply with the standard about that particular construct and treat acronyms as a regular word.
+
+Example
+
+static sl_usbd_urb_t *urb_list_head;
+
+sl_led_turn_on();
+
+sl_irq_priority_t irq_priority = sl_nvic_get_priority(ADC_IRQ);
+4.6.4 Naming functions and variables
+4.6.4.1 Functions and variables names have the form verb_noun (Required)
+When a verb and a noun the verb acts on are in a function name, the verb should come first (xxxx_get_power, not xxxx_power_get). It should feel natural to read the name. Most functions should contain both a verb and a noun and therefore need to follow this rule. Notable exceptions are functions that are callbacks, interrupt handlers and tasks, which typically do not have a verb. These functions follow their own naming convention, as stated in 4.6.4.5, 4.6.4.6 and 4.6.4.7, respectively.
+
+Variables and functions of boolean type should use a naming style indicating the sense of the boolean. For example sl_usbd_device_is_connected.
+
+Example
+
+// This is for legacy EM code and does not apply to 8051
+// code base.
+
+sl_get_power();    // Call to a new-style API function.
+
+// Below is an example of how to redefine old style API calls to the new syntax.
+#if (SLAB_OLD_API == SLAB_REPLACE_OLD_API_CALLS)
+#define power_get sl_get_power
+#define power_set sl_set_power
+#endif
+4.6.4.2 Function parameters should not have any prefix (Required)
+Do not prefix any function parameter with any sl_, sli_ or <module>_ prefix.
+
+4.6.4.3 Function-local variables should not have any prefix (Required)
+Do not prefix any function-local variable with any sl_, sli_ or <module>_ prefix.
+
+4.6.4.4 Variable and Function Names Indicate Units for Time (Required)
+When a variable is used for time, it must include the units in the name. When a function returns a value that is used for time it must include units in the name. This is important to prevent problems with accidentally utilizing one unit of time in a function or variable that takes a different unit of time.
+
+Variables and function names may either use abbreviations or spell out the units. If abbreviations are used, the following shall be the abbreviations:
+
+Full Name   Abbreviation (if applicable)
+Years   Years
+Days    Days
+Hours   Hours
+Minutes Minutes
+Seconds Sec
+Milliseconds    Ms
+Microseconds    Us
+Nanoseconds Ns
+Example
+
+#define SLI_JITTER_DELAY_MS 100
+
+static void restart_discovery_after_delay(uint8_t delay_ms);
+
+uint8_t sli_get_discovery_time_remaining_ms(void);
+
+4.6.4.5 Functions/stubs called on specific events/callbacks should start 'on' in their name (Required)
+Whenever a function is called to indicate an event occurred, or is called in 'reaction' to an event happenning, this function should have on in its name, directly after the <module>_ prefix. This also applies to callbacks or function stubs shipped to the user.
+
+Example void sl_usb_on_device_connection(void);
+
+void sl_kernel_on_task_deletion(void);
+
+static void on_transmit_completed(void);
+4.6.4.6 Interrupt handlers should be suffixed by 'IRQHandler' or 'irq_handler' (Required)
+If a function is an interrupt handler, it should either be suffixed by IRQHandler if it needs to follow CMSIS' format or by irq_handler if it doesn't (for example, if an interrupt source is shared and multiplexed) between several handlers.
+
+Example void RTCC_IRQHandler(void);
+
+void sl_gpio_irq_handler(void);
+4.6.4.7 Non-blocking functions executed periodically in a main loop should be suffixed by 'step' (Required)
+If a non-blocking function (a function that doesn't pend or delay before returning) needs to be called periodically in order to check if it has something to process and then process what it can, this function needs to be suffixed with step, to indicate it executes a single round of processing. It should not be called tick, since tick can lead to confusion with timer or OS ticks.
+
+Example void sl_cli_step(void);
+
+void sli_usb_msc_step(void);
+4.6.4.8 Functions that are tasks should be suffixed by 'task' (Required)
+If a function is a task (in an OS environment), this function needs to be suffixed with task, to indicate it is a task and needs to loop indefinitely and never return.
+
+Example void sl_cli_task(void *task_argument);
+
+void sli_usb_task(void *task_argument);
+4.6.5 Naming constants
+4.6.5.1 Constants should use upper case (Required)
+All constants should be named and use upper case letters. Avoid raw numbers in code. This includes #defines constants, const variables and enum values.
+
+All #defines that are intended to be used by applications (customers) and part of the API need to be prefixed by SL_. This includes #defines in configuration files.
+
+All #defines that are local to a C file or private to our products (not intended to be used by applications; present in a private header file) need to be prefixed by SLI_. This is to prevent name clashes with compiler defines (with -D) that could be specified by the user when building our source files.
+
+Example
+
+#define SLI_NET_ARP_FLAG 0x0040
+const unsigned int SL_MAX_UART_CONNECTIONS = 3;
+
+typedef enum {
+    SL_USBH_HC_TYPE_LIST,
+    SL_USBH_HC_TYPE_PIPE
+} sl_usbh_hc_type_t;
+4.6.6 Naming function-like macros
+4.6.6.1 Follow the naming convention for regular functions (Required)
+Functional macros that can be used in the same way as functions follow the same naming conventions as regular functions.
+
+4.6.6.2 Use all caps for macros that can't be functions (Required)
+All caps with underscores are used for macros that cannot be made into semantically equivalent functions.
+
+Example
+
+// This is a macro function that can be used as a regular function.
+#define sl_uart_init_default_uart(x) init_uart(UART0, (x))
+
+// This is a macro function that cannot be used as a function.
+#define SL_SOME_NUMBERS(x) {(x), ((x)+(x)), ((x)*(x))}
+4.6.7 Naming types
+4.6.7.1 Public typedefs (Required)
+Each typedef must end with a '_t' suffix and cannot start with 'int', 'uint' or 'unicode'.
+
+4.6.7.2 Structure fields should be snake_case, without any prefixes (Required)
+There should not be any prefix (no sl_ and no <module>_) in the name of any structure field.
+
+Example
+
+// Don't do
+typedef struct
+{
+  uint32_t sl_nvm_page_header_offset;
+  uint32_t sl_nvm_page_header_size;
+} sl_nvm_page_header_t;
+
+// Instead do:
+typedef struct
+{
+  uint32_t offset;
+  uint32_t size;
+} sl_nvm_page_header_t;
+4.6.7.3 Type from typedef (Optional)
+If the type is a typedef, you can optionally add a type name if there is a reason the anonymous type does not work. In this case use the same name as the typedef name, without the '_t'.
+
+Example
+
+// Anonymous structure name ...
+// Use this style in most cases.
+typedef struct
+{
+  // ...
+} sl_nvm_page_header_t;
+
+// You can use this style if the struct needs a name.
+typedef struct sl_nvm_page_header
+{
+  // ...
+} sl_nvm_page_header_t;
+4.6.8 Files and directory structure
+4.6.8.1 Filenames and directories use lower case (Required)
+All file names are lower case and multiple words are separated with one underscore '_'.
+
+Example
+
+sl_packet_buffer.c
+4.6.8.2 Avoid duplicate filenames
+Avoid using the same file name for source files.
+
+Note: Among our entire source code there will be files with the same name. This cannot be avoided. But files with the same name should never be used in the same project/build.
+
+4.6.8.3 File names (Required)
+File names (both for library and source) should include the namespace prefix of the module as well as the sl_ (no distinction made with sli for internal files) prefix. This includes configuration files.
+
+Example
+
+sl_simple_mpu.c
+sl_status.h
+sl_sleeptimer_config.h
+4.6.8.4 Directory names (Required)
+Directories use lower case names and underscores as word separators. Subfolder names do not need to be unique.
+
+4.6.9 UC-Instantiable components
+The following section (4.6.9.*) defines naming format for UC-Instantiable component related information (configuration files, macros and handles)
+
+4.6.9.1 Configuration file names (Required)
+The configuration files for every instance of an instantiable component must have the following format: sl_<module>_<type>_<instance_name>_config.h
+
+Example
+
+// instance_name - vcom
+sl_iostream_usart_vcom_config.h
+// instance_name - btn0
+sl_simple_button_btn0_config.h
+4.6.9.2 Configuration macros (Required)
+The configuration macros for the instantiable components must have the following format: SL_<module>_<type>_<instance_name>_CFG_VAL
+
+Example
+
+// instance_name - vcom
+#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200
+// instance_name - btn0
+#define SL_SIMPLE_BUTTON_BTN0_POLARITY 0
+4.6.9.3 Instance handles (Required)
+The handles for the instantiable components must have the following format: sl_<module>_<instance_name>
+
+Example
+
+sl_iostream_vcom
+sl_button_btn0
+5 Documentation
+5.1 General
+Write documentation so that others can easily pick up the code. It makes life easier for everyone. In particular, it makes supports job a lot easier as it will generate less support requests.
+
+5.2 Comments should answer the question "Why?" (Required)
+Write comments that say why the code is the way it is. What the code does, and how it does it, can usually be figured out from the code itself. Why it does it, and why it does it the way that it does, cannot. If you write it the obvious way, and it doesn't work, explain in a comment why it didn't. Otherwise the next person to come along is going to convert it back to the obvious method and have to learn the same painful lesson (or even worse, force you to relearn it).
+
+There needs to be enough documentation that a peer can read and understand the code without having to ask the author for explanations. If a code reviewer feels the need to ask for explanations about how stuff works, then the code author should add this additional information as comments in the code.
+
+Comments should use correct grammar and full sentences.
+
+6 Doxygen Coding Style Guide
+Doxygen is used to document all code that is released to customers, with a focus on functions that are part of an API. For code that is only used internally it is still strongly recommended to use Doxygen commenting as internal users will find it useful.
+
+For file and function comment blocks, the Javadoc style is used:
+
+/**************************************************************************//**
+ * doc comments ...
+ *****************************************************************************/
+For all other doc comments, the C++ style /// is used.
+
+Note: The reason we are using C style doxygen for this is that Eclipse (which Simplicity Studio is based on) can do correct code folding of this type of blocks.
+
+6.1 File comment header (Required)
+All source files should have a file comment header that looks similar to the following. The actual license text will depend on the project. See section 7 for details about licenses.
+
+6.2 Grouping modules (@addtogroup) (Recommended)
+Use the Doxygen command @addtogroup to group together source code that belongs to the same module, for example UART and SPI and so on. This will make it easier for customers to find the API documentation for the modules they are interested in.
+
+It is also possible to create groups hierarchies, for example to have an ADC group in the EM_Library group.
+
+Example
+
+/**************************************************************************//**
+ * @addtogroup EM_Library
+ * @{
+ *****************************************************************************/
+
+/// variable, constants and code belonging to EM_Library
+/// (but not in the ADC module).
+uint32_t sl_some_global_variable;
+
+/**************************************************************************//**
+ * @addtogroup ADC
+ * @brief Analog to Digital Converter (ADC) Peripheral API
+ * @{
+ *****************************************************************************/
+
+/// variable, constants and code belonging to EM_Library and ADC module
+bool sl_is_adc_configured;
+
+/** @} (end addtogroup ADC) */
+
+/** @} (end addtogroup EM_Library) */
+
+/// @} (end groupName)
+6.3 File/module level documentation (Recommended)
+If a file is part of a module, it may be desirable to include file-level documentation. For example, the file level documentation may provide an overview of how to use an API. To provide file-level documentation, a Javadoc style Doxygen comment block should follow the file include statements.
+
+Example
+
+/**************************************************************************//**
+ *
+ * @addtogroup adc_group ADC API
+ *
+ * @brief Brief one-sentence description of ADC module.
+ *
+ * The rest of this section can be multi paragraph explanation of the
+ * module. It can include tables and code examples. End the description
+ * as shown below and this will collect the remaining API documentation
+ * into this group.
+ *
+ * @{
+ *
+ *****************************************************************************/
+If a group is created as shown above, it needs to be closed at the end of the file using one of the two methods shown below:
+
+// The following is used if there is only one group in a file or
+// groups are not nested.
+
+/// @} end adc_group
+
+// The following is used when groups are nested. This is needed so
+// that doxygen does not pick up the "end adc_group" as part of a doc
+// comment for a following or enclosing group.
+
+/** @} end adc_group */
+Comment: The method used is optional. If in doubt about whether the second method is needed, run Doxygen on your file and see if the "end" comment is being picked up in the documentation.
+
+6.4 Function documentation (Required)
+This is required for any library or module code that will be customer facing. It is also highly recommended to document any other code in the same way, even if it is not expected to be customer-facing. Often times non-customer-facing code ends up being delivered to a customer anyway.
+
+Normally, functions that are part of an example (like main) or other simple functions that are part of the application and not library or module functions are not documented with Doxygen. It may still be useful to use Doxygen to provide documentation for complex examples.
+
+Each function definition contains at least a function brief statement and list of parameters and return value if any. Doxygen will pick up a single sentence at the start of the comment block as the brief description, so the @brief tag is not necessary.
+
+If the function contains parameters and a return value, then these parameters and return value must also be documented in Doxygen.
+
+Optionally the @note command can be used to highlight anything that the user should pay extra attention to when using this function.
+
+It is useful to read the Doxygen documentation about how you can write good documentation for your functions. Besides @note, there are other tags that can also be used. For example @sa (see also) can be used to create a link to another documented section. If you put a full function name or variable name that Doxygen knows about, it will automatically create a link to the documentation for that other function or variable. For macros you can add the @ref tag before the item name and a link will be generated.
+
+Example
+
+/**************************************************************************//**
+ * Brief description of function.
+ *
+ * @param myParam1 is a parameter that is most excellent
+ * @param myParam2 is not such a good parameter
+ * @returns Returns true on Tuesdays or whenever it is raining.
+ *
+ * Detailed description here. Can be multiple sentences. Can
+ * contain markdown (tables, code examples, bulleted lists)
+ *
+ * Can add as many additional paragraphs as needed.
+ *
+ * @note A note if the API needs a note.
+ *****************************************************************************/
+ uint8_t sl_my_public_function(uint8_t my_param1, uint16_t my_param2)
+ {
+   // ...
+ }
+6.5 Variable documentation (Required)
+All public variables that are part of an API must be documented. It is also recommended to document all file-level global variables even if they are not public.
+
+Note: It is not necessary to document local (automatic) variables.
+
+Many variable will only require a single line or brief comment. In this case you should use a C++ style doxygen comment ///. You can use this same style even for several lines of a documenting comment. However, if the variable requires a large documentation block or needs to be visually separated from other sections of the source code file, then use the Javadoc style blocks as used for functions.
+
+Example
+
+/// A brief description of this variable.
+uint8_t sl_meaningful_variable_name;
+
+/// This variable has a brief line of documentation.
+/// Then it also has some additional lines of documentation.
+uint32_t sl_another_variable;
+
+/**************************************************************************//**
+ * Brief description of complicated variable.
+ * Additional extra documentation for this complicated variable that
+ * needs a bigger explanation. Or perhaps I just want this variable to
+ * stand out in my source file so I use the large comment blocks.
+ *****************************************************************************/
+For fields of a structure, or a list of constants or anything that requires just a brief comment, there is another style (post) that can be used. In this case you put the doc comment on the same line as the item (instead of before it). To do this the comment needs to start like this: ///< Brief comment.
+
+Example
+
+/// A brief comment about this data type.
+/// I can follow with additional explanation as needed, perhaps how
+/// it is used or allowed values or constraints.
+typedef struct
+{
+    uint8_t r;    ///< Brief comment about this field.
+    uint8_t g;    ///< Green pixel value.
+    uint8_t b;    ///< Blue pixel value.
+} sl_pixel_t;
+6.6 Header file vs. implementation file (Recommended)
+To keep a simple distinction between public documentation and internal documentation, all public documentation comments should be placed into the library or module header (.h) file. This allows us to just pull in header files when generating public-facing documentation and not need to worry about separation of public or private content.
+
+The implementation file (.c) should also be documented if there additional non- public functions or variables that are not part of the public documentation. The .c doc comments can be used for generating internal documentation.
+
+If a function in a .c file is already documented in the header file, then it is not necessary to repeat the documentation. However, a comment block should be used with the brief description to visually mark the function in the source file.
+
+Example
+
+/**************************************************************************//**
+ * Brief description of function.
+ *****************************************************************************/
+ uint8_t sl_do_something(uint8_t my_param1, uint16_t my_param2)
+If the function is a private (static) function then it should use a normal comment block (same as public function in a header file). Private variables should also be documented.
+
+6.7 Do not document sections (Recommended)
+The Doxygen configuration file for the project should be configured to exclude undocumented objects. Therefore it is not necessary to add extra statements to exclude Doxygen processing. Simply do not add Doxygen comments to the code you do not want documented.
+
+Example
+
+/// The following variable will be picked as part of the
+/// documentation.
+uint8_t sl_my_public_variable;
+
+// This variable should also have a comment to explain it,
+// but by using only double-slash, it will not get picked
+// up by Doxygen.
+static uint8_t my_private_variable;
+
+/******************************************************************************
+ * This is a function that will not be documented.
+ *
+ * Note the lack of the double slash at the end of the top line. That
+ * means this is not a true Javadoc comment block and Doxygen will not
+ * see it.
+ *****************************************************************************/
+void sli_do_something_secret(void)
+{
+  // ...
+}
+6.8 Do not release sections (Recommended)
+There may be instances where there are source files which contain sections that should not be released, for example references to an emulator or todo comments. In some build systems, you may use commented double square brackets (//[[...]] or //[[and//]]`) to hide such code. You must make sure that the build system used on said source runs the codestripper before relying on this functionality.
+
+Example
+
+//[[
+// Don't release this define
+#define SL_EMULATOR_CONFIG 1
+//]]
+7 Licensing
+7.1 Silicon Labs Licenses
+All of our released source files (.c, .h, others; generated and manually written) should fall under one of the few licenses approved by our legal team. All source files are therefore required to have a file comment header containing the correct license type.
+
+The default license text must be used unless otherwise specified.
+The Open-Source/zlib license text is used for select software such as our CMSIS-Device header files and emlib, but can also be applied to other parts of the code. Only use this license text if the module already uses it, or with permission from the VP of Software.
+The Apache 2.0 license text is used for select software, but can also be applied to other parts of the code. Only use this license text if the module already uses it, or with permission from the VP of Software.
+The third-party license text is added on top of any third-party code. It does not remove the existing text. If we include any third party software, we need a way to clearly identify it as such. Yes, this is extra work, but is required by our legal team. Using and releasing third-party code has more constraints, see section 7.2 for the details.
+The Micrium license text is used for any code that we charge for (i.e. the Micrium software stacks, with the exception of the kernel).
+Please note that the version field in these headers is optional. If used, the version field should be used to denote the component version, not the Gecko SDK version.
+
+7.2 Third-Party Code
+We generally favor writing and maintaining our own code when the differences (in effort, quality, market acceptance, etc.) with an open-source one are small.
+
+The VP of Software must give his consent before any kind of third-party code is allowed to be used, as special care must be taken when dealing with this type of code. Specifically, content licensed to us under a "copyleft" license (GPL and other viral open-source licenses) must not be released, including in compiled form (such as a library or binary).
+
+New copyleft content should not be added. Existing copyleft released content must be audited against this rule, documented and flagged to the VP of Software for quick resolution. Whenever feasible and regardless of whether it is being released or is a documented exception, existing copyleft content should be replaced.
+
+Content that is "multi-licensed" (offered to us under our choice of more than one license) is not considered copyleft if at least one of the offered licenses is not copyleft.
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__iec60730__license__agreement.dot b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__license__agreement.dot new file mode 100644 index 00000000..624e5f50 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__license__agreement.dot @@ -0,0 +1,9 @@ +digraph "Silicon Labs Software License Agreement" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="EFR32 IEC60730 Library\l Extra Files",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__EXTRA.html",tooltip="Extra files for the EFR32 IEC Library."]; + Node1 [label="Silicon Labs Software\l License Agreement",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="License Agreement for the IEC60730 Library."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__iec60730__license__agreement.html b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__license__agreement.html new file mode 100644 index 00000000..ff23b3ea --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__license__agreement.html @@ -0,0 +1,413 @@ + + + + + + + +IEC_60730: Silicon Labs Software License Agreement + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+
Silicon Labs Software License Agreement
EFR32 IEC60730 Library » EFR32 IEC60730 Library Extra Files
+
+
+ +

License Agreement for the IEC60730 Library. +More...

+
+Collaboration diagram for Silicon Labs Software License Agreement:
+
+
+
+

License Agreement for the IEC60730 Library.

+
END-USER LICENSE AGREEMENT
+IMPORTANT:  READ CAREFULLY
+BEFORE AGREEING TO TERMS
+
+THIS MASTER SOFTWARE LICENSE AGREEMENT (“AGREEMENT”) GOVERNS YOUR USE OF THE LICENSED MATERIALS. INSTALLING, COPYING OR OTHERWISE USING THE SOFTWARE, INDICATES YOUR ACCEPTANCE OF THE TERMS OF THIS AGREEMENT REGARDLESS OF WHETHER YOU CLICK THE “ACCEPT” BUTTON. IF YOU DO NOT AGREE WITH THESE TERMS AND CONDITIONS OR IF YOU ARE NOT AUTHORIZED TO ACCEPT THE TERMS OF THIS LICENSE ON BEHALF OF YOUR EMPLOYER, DECLINE THE LICENSE TERMS AND DO NOT USE THE SOFTWARE OR DOCUMENTATION. THESE TERMS GOVERN YOUR CONTINUED USE OF THE LICENSED MATERIALS THAT YOU DOWNLOAD NOW OR IN THE FUTURE, INCLUDING SUCH ADDITIONAL SOFTWARE MADE AVAILABLE TO YOU THROUGH THE LICENSED MATERIALS YOU HAVE SELECTED, AND ALL UPDATES AND VERSIONS OF SUCH SOFTWARE.
+
+1. Definitions.
+“Application” means a product developed by Licensee, or for Licensee by a third party, that contains Licensed Programs.
+
+“Authorized Application” means an Application that contains, integrates, is packaged with, or functions with a Silicon Labs Device in Licensee’s Application. This includes a Licensed Program embedded in a network co-processor or host processor that operates in conjunction with a Silicon Labs Device.
+
+“Authorized Subcontractor” means a third-party subcontractor that you engage to design or manufacture Authorized Applications and has executed an agreement that is consistent with the terms of this Agreement, including its confidentiality provisions. At all times, you shall remain responsible for the actions or non-actions of you Authorized Subcontractors the same as if the action on non-action was committed by you.
+
+“Beta Software” means Software, including Software included within an SDK, that is undergoing testing or further development, and has not reached the generally available (GA) stage of development.
+
+“Commercial License” means an executed, in effect, software license agreement between Licensee and Silicon Labs that governs Licensee’s rights and obligations with respect to Licensee’s use of Micrium Software.
+
+"Commercial Purpose” means embedding Micrium Software in any Application that you sell or license to End Users or plan to do so.
+
+“Derivative Works” means a work based upon the Source Code version of the Software, such as a revision, modification, translation, abridgment, condensation, expansion or any other form in which such Software may be recast, transformed or adapted, and that, if prepared without authorization from Silicon Labs, would constitute copyright infringement.
+
+“Development Tool” means a software provided by Silicon Labs to enable development of Authorized Applications, configuration of Silicon Labs Devices and Software.
+
+“Documentation” means Silicon Labs technical documentation related to the Software, excluding advertising or marketing materials.
+
+“Embedded Stacks” means Software (other than Micrium Software) that is stack libraries, application layers, and example code.
+
+“End User” means a purchaser, sublicensee, recipient and/or user of an Application obtained directly or indirectly from Licensee.
+
+“External Manufacturers” means a third-party manufacturer, including such manufacturer's subcontractors and agents, which is authorized by Licensee to design and/or manufacture the Applications and to use, install, and test the Applications and the Licensed Programs.
+
+“Firmware” means executable or binary code that is embedded in the Silicon Labs Device in ROM or flash memory and cannot be modified by Licensee.
+
+“Licensee” or “you” means the acquirer of the license rights granted by this Agreement. If you are an individual working solely on your own behalf, then you are the Licensee. If you are an employee working on behalf of your employer, then your employer is the Licensee and you confirm that you are authorized to accept the terms of this Agreement on behalf of your Employer.
+
+“Licensed Programs” means Software in Object Code form that was either originally in Object Code form or was compiled from the Software or Derivative Works and is designed to operate in Applications in Authorized Applications.
+
+“Licensed Materials” means Software and the related Documentation including all updates and upgrades of the foregoing.
+
+“Micrium Software” means the Micrium real time kernel within the Micrium real time operating system (Micrium OS).
+
+“Modified Open Source Software” means Silicon Labs' modifications to Open Source Software that was created by a third party.
+“Object Code” means computer programming code in binary form suitable for machine execution by a processor without the intervening steps of interpretation or compilation.
+
+“Open Source Software” means the Source Code version of software that may be freely used, modified or distributed without payment of a license fee or royalties subject to the terms of a publicly available software license, excluding Modified Open Source Software, the use of which is subject to the terms of this Agreement.
+
+“Personal Information” means data concerning an individual user, including but not limited to a user’s activity on a Silicon Labs website, location, IP address, mobile device ID, name, or biometric data collected, stored or transmitted by a Silicon Lab Device or Software.
+
+“SDK” means software development kit (other than Micrium Software).
+
+“Silicon Labs” means Silicon Laboratories Inc., a Delaware corporation located at 400 W. Cesar Chavez, Austin, TX 78701 if you are physically located within the United States. If you are physically located outside of the United States, Silicon Labs means Silicon Laboratories International Pte Ltd., a Singapore corporation located at No. 18 Tai Seng Street, #05-01, 18 Tai Seng, Singapore 539775.
+
+"Silicon Labs Devices” means Silicon Labs branded integrated circuit chips purchased from Silicon Labs or one of its authorized distributors.
+
+“Silicon Labs Open Source Code” means Software created by Silicon Labs and which is (a) delivered to Licensee in Source Code format, (b) is identified as open source code and (c) states that use of the software is subject to the terms of this Agreement.
+
+“Software” means the computer programming code that was downloaded or otherwise distributed to Licensee and which is the subject of this Agreement. Software may be in Object Code or Source Code form or may be embedded as Firmware in a Silicon Labs Device. Software includes Embedded Stacks, SDKs and Development Tools. Your rights are different depending on whether the Software is delivered to you in Object Code, Source Code or Firmware. Software that is Micrium Software is subject to specific terms and conditions defined in Section 2.
+
+“Source Code” means the computer programming code in an uncompiled form readable by humans which cannot be executed by a processor unless it is compiled into binary form.
+
+“Third Party Software” means any software that Silicon Labs has licensed from a third party.
+
+“Warranty Period” means the period of time ending thirty (30) days after the first delivery of the Software to the Licensee, whether such delivery is in the form of a download or actual physical delivery.
+
+“Unauthorized Use” means use or inclusion of the Licensed Materials in (a) life support, aeronautical, aerospace, medical, military or nuclear applications; (b) FDA Class III or other devices for which FDA premarket approval is required; (c) implantable devices; (d) life support or life endangering applications where failure or inaccuracy might cause death or personal injury; and (e) automotive or transportation applications or environments unless the specific Silicon Labs Device has been designated by Silicon Labs as compliant with ISO/TS 16949 requirements.
+
+
+2. Micrium Software.
+The terms and conditions in this Section 2 apply only to Micrium Software and take precedence over any other conflicting terms of this Agreement.
+
+2.1. Grant of Micrium Software License. Upon accepting this Agreement and downloading the Micrium Software, subject to your compliance with the terms of this Agreement, Silicon Labs hereby grants you a limited, non-exclusive, nontransferable license for the Term (as described in Section 23), as follows:
+
+2.1.1. You and your Authorized Subcontractors may modify the Source Code version of Micrium Software for the sole purpose of adapting the Micrium Software to your application.
+
+2.1.2. You may embed the Micrium Software exclusively in products developed by you or by your Authorized Subcontractors on your behalf during the Term that embed the Micrium Software into Silicon Labs Devices (the “End Products”).
+
+2.1.3. You may distribute copies of the Object Code version of the Micrium Software solely to the extent that such copies are embedded in End Products.
+
+2.2. Micrium Software License Restrictions. Your use of the Micrium Software is subject to the following restrictions:
+
+2.2.1. You may allow Authorized Subcontractors to access and use the Micrium Software solely to the extent necessary to adapt the Micrium Software to your application.
+
+2.2.2. Except as provided in this Agreement, neither you, your Authorized Subcontractors, nor any of your downstream customers may sell, transfer, sublicense, distribute, or disseminate in any way the Object Code or executable code of the Micrium Software in any written or electronic manner.
+
+2.2.3. Neither you, your Authorized Subcontractors, nor any of your downstream customers may distribute the Source Code version of Micrium Software to any third party under any circumstances. You shall ensure that each of your employees and Authorized Subcontractors that work with Micrium Software are aware of this restriction.
+
+2.2.4. Except as permitted in this Agreement, neither you, your Authorized Subcontractors, nor any of your downstream customer may embed the Micrium Software in any integrated circuit device that is not a Silicon Labs Device.
+
+2.3. End User Support. You agree to be fully responsible for all End User support services and warranty costs for all End Products.
+
+2.4. Commercial Purpose. You are permitted to use the Micrium Software for a Commercial Purpose only if you embed the Micrium Software into a Silicon Labs Device. You may not embed the Micrium Software in a non-Silicon Labs Device unless you and Silicon Labs execute a separate Commercial License Agreement expressly permitting such use.
+
+2.5. Ownership. Silicon Labs is and shall remain the sole and exclusive owner of the Micrium Software and all Documentation, media, manuals, specifications, instructions and printed materials, and any copies or portions thereof, furnished by Silicon Labs for use with the Micrium Software. You own any improvements or modifications to the Micrium Software made by you or your Authorized Subcontractor on your behalf to adapt Micrium Software for use in your End Products.
+
+2.6. Maintenance and Support. Standard maintenance and technical support, such as bug fixes, correction of failures, updates and maintenance patches is provided to you at no cost for one year from date that you download the Micrium Software. Silicon Labs may use a variety of methods, including but not limited to telephone, Internet and/or e-mail, to provide such maintenance and support.
+
+
+3. 8051 SDK.
+The terms and condition in this Section 3 apply only to the 8051 SDK and take precedence over any other conflicting terms of this Agreement.
+
+3.1. 8051 SDK. The 8051 SDK consists of the following items:
+
+3.1.1. Drivers;
+
+3.1.2. Peripheral libraries (excluding CSLIB); and
+
+3.1.3. Example application code.
+
+3.2. Installation and Use Rights.
+
+3.2.1. You may download and install the 8051 SDK on one or more computers and make any number of copies.
+
+3.2.2. You may internally evaluate the 8051 SDK. If you elect to use the 8051 SDK for any other purpose, including modification and distribution, then the following additional terms apply to you.
+
+3.2.3. You may modify any files for your own use.
+
+3.2.4. You may redistribute to your customers applications that you develop using the 8051 SDK. Your redistribution may be in any form, including executable binary code, source code, physical media and Internet downloads.
+
+3.3. Restrictions.
+
+3.3.1. You may not use the 8051 SDK with any integrated circuit products other than those designed and manufactured by Silicon Labs.
+
+3.3.2. Except as provided above, you may not redistribute, sublicense, assign, rent or lease any portion of the 8051 SDK to any third party.
+
+3.3.3. You may not modify or distribute the 8051 SDK so that all or any part of it becomes Open Source Software.
+
+3.3.4. You may not obscure or remove any product identification, copyright or other notices that appear on or in the 8051 SDK, including any notices from third parties.
+
+3.3.5. You may not redistribute any modified or unmodified version of the 8051 SDK to any third party as a standalone product.
+
+3.4. Ownership. Silicon Labs is and shall remain the owner of the 8051 SDK at all times. Applications that you develop using the 8051 SDK shall belong to you.
+
+
+4. License Grant.
+Silicon Labs hereby grants Licensee a limited, non-transferable, non-exclusive, perpetual license to use the Licensed Materials solely under the following terms and condition:
+
+4.1. Object Code. With respect to Software (other than Micrium Software) that is delivered to Licensee by Silicon Labs in Object Code format, Licensee may:
+
+4.1.1. (a) if the Software is an Embedded Stack, you may install one copy of the Software and its components all together on a single computer, and if the Software is copied onto another computer, the original copy must be deleted or otherwise made irreversibly inoperable; (b) if the Software is an SDK or a Development Tool, you may make multiple copies of the Software for your own internal use;
+
+4.1.2. store one copy of the Software for archival (non-operational) purposes only, so long as access to such copy is restricted;
+
+4.1.3. use the Licensed Materials to develop applications to be used to program Silicon Labs Devices;
+
+4.1.4. incorporate the Licensed Materials into Authorized Applications;
+
+4.1.5. facilitate the integration of the Licensed Materials and Silicon Labs Devices into Authorized Applications; and
+
+4.1.6. distribute copies of the Licensed Materials to Licensee’s end-user customers, to the extent such copies are in Object Code form only and are incorporated into Authorized Applications.
+
+4.2. Source Code. With respect to Software (other than Micrium Software and Silicon Labs Open Source Software) that is delivered to Licensee by Silicon Labs in Source Code format, Licensee may:
+
+4.2.1. use the sample application software in Source Code format to develop and compile applications for use in Authorized Applications;
+
+4.2.2. copy, prepare Derivative Works of, compile and modify Source Code of the Silicon Labs Software, solely to enable Licensee to design, develop, modify, test, support and/or debug Derivative Works and/or Licensed Programs that are intended to operate in Authorized Applications;
+
+4.2.3. reproduce and distribute Derivative Works to Authorized Subcontractors under agreements consistent with Licensee’s rights and obligations under this Agreement solely (a) to modify for Licensee’s use in developing and maintaining the Licensed Programs; and (b) to enable Licensee to distribute Licensed Programs externally to End Users in accordance with Section 4.2.5 below;
+
+4.2.4. reproduce and distribute Licensed Programs internally and to Licensee’s External Manufacturers under agreements consistent with Licensee’s rights and obligations under this Agreement, solely (a) for Licensee’s use in developing and maintaining the Licensed Programs; and (b) to enable Licensee to distribute Licensed Programs externally to End Users in accordance with Section 4.2.5 below; and
+
+4.2.5. distribute Licensed Programs externally to Licensee’s End Users, either directly or through Licensee’s distribution channels and methods, but only for use with Authorized Applications and not on a standalone basis.
+
+
+5. License Restrictions.
+The Licensed Materials shall only be used as permitted by this Agreement. Any use of the Licensed Materials not specifically authorized by this Agreement is prohibited.
+
+5.1. Without limiting the foregoing restriction, and except as authorized by this Agreement, Licensee shall not:
+
+5.1.1. assign, sublicense, or otherwise transfer the Licensed Materials to any third party;
+
+5.1.2. reverse compile, disassemble, alter, add to, delete from, or otherwise modify Software delivered to Licensee in Object Code form or in libraries in the Licensed Materials;
+
+5.1.3. publish the Licensed Materials in any manner that would cause it to become part of the public domain or otherwise become subject to the terms of an Open Source Software license;
+
+5.1.4. use the Licensed Materials except in conjunction with Silicon Labs Devices;
+
+5.1.5. distribute the Source Code form of Software to any third party, in whole or in part; or
+
+5.1.6. remove any copyright, trademark, patent or other proprietary notices from the Licensed Materials or any portion thereof.
+
+5.2. Licensee shall not use the Licensed Materials in any way to further the development or improvement of any product that does or would compete with any Silicon Labs Device.
+
+5.3. If the Software is provided to demonstrate the capability of Silicon Labs Devices, it shall be used only for this purpose. Incorporation of the demonstration version of Silicon Labs Software into Applications is solely at Licensee’s risk and liability.
+
+5.4. Any subsequent distribution or transfer of the Licensed Programs to End Users shall remain subject to the terms and conditions of this Agreement. Whether by execution of an end-user license agreement or other commercially reasonable means, Licensee shall ensure that its End Users’ use of the Licensed Programs shall only be permitted if they are incorporated into Authorized Applications. Licensee shall prohibit any further sublicensing, distribution, sale, marketing, reproduction, modification, reverse engineering or decompiling of the Licensed Programs.
+
+5.5. Licensor may include features in the Software to restrict use of the Software that does not comply with the terms of this Agreement.
+
+
+6. Unauthorized Use.
+The Licensed Materials are not licensed, designed, intended, authorized, or warranted for Unauthorized Use. Licensee shall be solely and exclusively responsible for any Unauthorized Uses by Licensee, Licensee’s Authorized Subcontractors, Licensee’s End Users or other sublicensees, and any Unauthorized Use by such Authorized Subcontractors, End Users or sublicensees, with or without the knowledge of Licensee, shall be attributed to Licensee. Licensee agrees to defend and indemnify Silicon Labs for all third-party claims and for all damages, costs and fees, including Silicon Labs’ attorneys’ fees, arising from any such Unauthorized Use of the Licensed Materials.
+
+
+7. Open Source Software.
+7.1. If the Software includes any Open Source Software, such Software and the relevant Open Source Software license under which such Software is licensed are disclosed at www.silabs.com. All use of such Open Source Software by Licensee is subject to the terms of the relevant open source software license and Licensee’s use of such Software is expressly conditioned upon Licensee’s compliance with the term of such license.
+
+7.2. If the Software is Silicon Labs Open Source Code, then the following provisions apply:
+
+7.2.1. Silicon Labs hereby grants to Licensee a perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable copyright license to reproduce, prepare Derivative Works of, publicly display, publicly perform, sublicense, and distribute Silicon Labs Open Source Code and such Derivative Works in Source Code or Object Code form.
+
+7.2.2. Silicon Labs hereby grants to Licensee a perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable (except as stated in this section) patent license to make, have made, use, offer to sell, sell, import, and otherwise transfer the Silicon Labs Open Source Code, where such license applies only to those patent claims licensable by Silicon Labs that are necessarily infringed by Licensee’s use of the Silicon Labs Open Source Code or by combination with any other device or software.
+
+7.2.3. Licensee may add Licensee’s own copyright statement to Licensee’s modifications of Silicon Labs Open Source Software and may provide additional or different license terms and conditions for use, reproduction, or distribution of such modifications, or for any such Derivative Works as a whole, provided Licensee’s use, reproduction, and distribution of the Silicon Labs Open Source Software otherwise complies with the conditions stated in this License.
+
+7.2.4. Licensee may reproduce and distribute copies of the Silicon Labs Open Source Code or Derivative Works thereof in any medium, with or without modifications, and in Source Code or Object Code form, provided that Licensee meets the following conditions: (a) Licensee must give any other recipients of the Silicon Labs Open Source Code or Derivative Works a copy of this License; and (b) Licensee must cause any modified files to carry prominent notices stating that Licensee changed the files; and (c) Licensee must retain, in the Source Code form of any Derivative Works that Licensee distributes, all copyright, patent, trademark, and attribution notices from the Source Code form of the Silicon Labs Open Source Code, excluding those notices that do not pertain to any part of the Derivative Works; and (d) If the Silicon Labs Open Source Code includes a "NOTICE" text file as part of its distribution, then any Derivative Works that Licensee distributes must include a readable copy of the attribution notices contained within such NOTICE file, excluding those notices that do not pertain to any part of the Derivative Works, in at least one of the following places: within a NOTICE text file distributed as part of the Derivative Works; within the Source Code form or documentation, if provided along with the Derivative Works; or, within a display generated by the Derivative Works, if and wherever such third-party notices normally appear. The contents of the NOTICE file are for informational purposes only and do not modify the License. Licensee may add Licensee’s own attribution notices within Derivative Works that Licensee distributes, alongside or as an addendum to the NOTICE text from the Silicon Labs Open Source Code, provided that such additional attribution notices cannot be construed as modifying the License.
+
+7.3. With respect to Software that is not Open Source Software, Licensee shall not:
+
+7.3.1. cause the Software to become subject to any Open Source Software license, including but limited to the general public license (GPL) or the lesser general public license (LGPL);
+
+7.3.2. cause the Software to be disclosed into the public domain or to any third party except for those third parties to whom License is authorized to distribute Licensed Programs under Sections 4.1.6 or 4.2.5; or
+
+7.3.3. cause any part of the Software to become a derivative of any Open Source Software.
+
+7.4. Licensee shall not enable or permit any of its End Users to breach the provisions of this Section 7, and shall include similar restrictive provisions in its end user license agreement with such End Users. If Licensee breaches this Section 7, Licensee shall indemnify and hold Silicon Labs harmless from all costs, claims, settlements and judgments incurred by Silicon Labs, including attorneys’ fees, in the process of defending, challenging and/or settling any demand, claim or order that the Software is subject to an Open Source Software license or must be disclosed into the public domain or to any third party.
+
+
+8. Modified Open Source Software.
+Notwithstanding the terms of the Open Source Software license under which the Open Source Software is licensed, the following terms apply to modifications to such Open Source Software that constitute Modified Open Source Software, as defined in this Agreement. The following terms apply regardless of how the Modified Open Source Software was delivered to you.
+
+8.1.1. You may not use Modified Open Source Software except for use with Licensed Programs that are intended to operate in Authorized Applications.
+
+8.1.2. You may not obscure, modify or remove copyright notices, files or statements concerning ownership by Silicon Labs or reference to the terms of this Agreement.
+
+8.1.3. Subject to Sections 8.1.1 and 8.1.2:
+
+8.1.3.1. You may copy and compile the Source Code of the Modified Open Source Software.
+
+8.1.3.2. You may reproduce the Object Code and Source Code versions of Modified Open Source Software and distribute the same through multiple levels of distributions, including to your External Manufacturers.
+
+8.1.3.3. You may modify Modified Open Source Software and create Derivative Works of Modified Open Source Software.
+
+
+9. Third Party Software.
+9.1. If the Software contains any Third Party Software, all use of such Third Party Software shall be subject to the terms of the license from such third party to Silicon Labs or a separate end user license agreement, if available, which may be set forth in the header files of the Third Party Software. You agree to comply with all terms and conditions for use of Third Party Software.
+
+9.2. Silicon Labs has licensed the BLE Homekit from Apple. You may not download or use the BLE Homekit software unless you have executed a MFi License with Apple.
+
+9.3. Silicon Labs has licensed emWin software, including libraries and executables and related documentation (collectively “emWin Library”) from Segger Microcontroller GmbH.  You are entitled to use the emWin Library free of charge, subject to the following conditions, which you accept by virtue of accepting the terms of this Agreement: (a) you may use the emWin library exclusively with EFM 32-bit microcontrollers and EFR radios; (b) you may not use the emWin Library to create or develop software that is similar to or competitive with the emWin Library; and (c) you may not modify the documentation that accompanies the emWin Library.
+
+9.4. Silicon Labs does not make any endorsements or representations concerning Third Party Software and disclaims all implied warranties concerning Third Party Software. Third Party Software is offered “AS IS.”
+
+
+10. Inspection Rights.
+Silicon Labs shall have the right, upon reasonable advance notice, to inspect Licensee's records and facilities with respect to the manufacture of Applications and to receive sample units of Applications in order to verify that such manufacturing is within the scope of this Agreement, that there are appropriate security procedures to protect Silicon Labs’ Confidential Information, and that Licensee is in compliance with its other obligations under this Agreement.
+
+
+11. No Other Licenses.
+The licenses granted under this Agreement are specifically set forth herein, and no licenses are granted by Silicon Labs to Licensee by implication or estoppel, and no licenses shall be granted by the parties’ course of doing business.
+
+
+12. Beta Software.
+Beta Software, whether Object Code or Source Code (a) can only be used for internal development, demonstration or testing purposes; (b) cannot be included within Licensee’s or End-Users’ products that are intended for general release or high-volume production; and (c) cannot be used to support Z-Wave certification of Silicon Labs Devices. Silicon Labs does not offer any warranties on Beta Software and disclaims all implied warranties including, but not limited to merchantability, fitness for use and noninfringement. Beta Software is offered “AS IS.” Under no circumstances will Silicon Labs incur any liability or obligation to you related to your use of Beta Software. Any use of Beta Software by you in violation of the terms of this Agreement shall automatically terminate your right to use Beta Software for any purpose whatsoever.
+
+
+13. Upgrades, Updates, New Versions.
+Although it has no obligation to do so, Silicon Labs may introduce updates, upgrades or new versions of the Software from time to time. Licensee is under no obligation to download or use the updates, upgrade or new version of Software; however, if Licensee elects to do so, the licenses granted to Licensee pursuant to this Agreement shall be deemed to include such updates, upgrades and new versions. In the case of any bug fix, improvement, work-around, or correction made to the Software by Licensee, Licensee agrees to provide to Silicon Labs, at no cost, the source code and any documentation reasonably required for Silicon Labs to be able to incorporate such changes into the Silicon Labs Software.
+
+
+14. Regulatory Compliance.
+Silicon Labs does not warrant that Software or any Application will comply with the regulatory requirements of the United States or any other country. Licensee is solely responsible for complying with such requirements and for obtaining necessary government certifications, if any.
+
+
+15. License Fee and Royalties.
+Unless Licensee has executed a Commercial License with Silicon Labs, Licensee is not obligated to pay any license fees or royalties to Silicon Labs so long as Licensee complies with the terms of the licenses set forth herein. If Licensee has executed a Commercial License, Licensee agree to pay all license fees, maintenance fees and subscription fees described in such Commercial License.
+
+
+16. No Resale Fees.
+Licensee may not directly or indirectly charge any fee or otherwise require or accept any type of monetary compensation solely for redistributing the Licensed Materials which is in excess of any amount paid to Silicon Labs for the same Licensed Materials. This does not apply to the sale of hardware products having the Licensed Materials in object code form embedded within.
+
+
+17. Proprietary Rights.
+All rights and title in and to the Licensed Materials, including without limitation, patents, copyrights, moral rights, trademarks and trade secret rights, belong to Silicon Labs or its licensors. Except for the rights expressly granted herein, no other rights are granted to Licensee with respect to the Licensed Materials.
+
+
+18. Confidential Information.
+You agree that the Licensed Materials contain confidential information, including trade secrets, know-how and other information, that comprise the exclusive property of Silicon Labs or its licensors. During the period this Agreement is in effect and at all times after its termination, you shall maintain the confidentiality of this information and shall not sell, license, sublicense, publish, display, distribute, disclose or otherwise make available this information to any third party nor use such information except as authorized by this Agreement.
+
+
+19. Limited Warranty and Remedies.
+Silicon Labs warrants that, during the Warranty Period, the Software will function substantially in accordance with the Documentation when used with Silicon Labs Devices and that the media on which the Software is furnished will be free from defects in material and workmanship, under normal use and service, when correctly installed and maintained. Silicon Labs does not warrant that the functions in the Licensed Materials will meet Licensee’s specific requirements or that the operation of the Software will be uninterrupted or error free. Silicon Labs does not warrant that the Software does not contain any viruses or bugs. If Licensee notifies Silicon Labs, during the Warranty Period, of a failure of the Software to conform to the limited warranty stated in this section, Silicon Labs’ sole obligation, and Licensee’s sole remedy, will be, at Silicon Labs’ sole discretion: (i) replacement of the Software, or part thereof, with a functionally equivalent software product or part, or (ii) repair of the Software. Without limiting any term or condition stated in this Agreement, this warranty does not apply to any nonconformance caused by (A) improper or inadequate maintenance or calibration, or (B) software or interfacing equipment, parts or supplies not supplied by Silicon Labs or its authorized distributor, (C) modifications to the Software or (D) Unauthorized Use of the Software.
+
+
+20. WARRANTY DISCLAIMER.
+EXCEPT AS PROVIDED ABOVE IN SECTION 19, THE LICENSED MATERIALS ARE PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT AND THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE LICENSED MATERIALS IS WITH LICENSEE. SILICON LABS DOES NOT WARRANT THAT THE LICENSED MATERIALS ARE FREE FROM DEFECTS THAT COULD CAUSE VULNERABILITY TO CYBER-ATTACK, DATA BREACH OR PRIVACY VIOLATIONS. SILICON LABS DISCLAIMS ALL LIABILITY RELATED TO LICENSEE’S DATA THAT MAY BE RECEIVED, STORED OR USED BY SILICON LABS DEVICES OR SOFTWARE OR INTERCEPTED BY THIRD PARTIES. SILICON LABS DISCLAIMS ALL LIABILITY FOR DAMAGES CAUSED BY THIRD PARTIES, INCLUDING MACILICOUS USE OF, OR INTERFERENCE WITH TRANSMISSION OF, LICENSEE’S DATA.
+
+
+21. LIMITATION OF LIABILITY.
+SILICON LABS’ SOLE OBLIGATION OR LIABILITY UNDER THIS AGREEMENT IS THE REPAIR OR REPLACEMENT OF THE LICENSED MATERIALS ACCORDING TO THE LIMITED WARRANTY ABOVE. IN NO EVENT SHALL SILICON LABS OR ANY OF ITS AFFILIATES OR SUPPLIERS BE LIABLE FOR CONSEQUENTIAL, SPECIAL, INCIDENTAL OR SIMILAR DAMAGES, SUCH AS (BUT NOT LIMITED TO) LOSS OF BUSINESS REVENUES, PROFITS OR SAVINGS OR LOSS OF DATA RESULTING FROM THE USE OR INABILITY TO USE THE LICENSED MATERIALS, EVEN IF SILICON LABS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES, OR FOR ANY CLAIM BY ANY THIRD PARTY. THIS INCLUDES, BUT IS NOT LIMITED TO, DAMAGES ARISING FROM THE FAILURE OF THE SILICON LABS DEVICE TO TRANSMIT DATA ARISING FROM A FAILURE OF THE SOFTWARE TO PERFORM IN SUBSTANTIAL ACCORDANCE WITH THE DOCUMENTATION. IN NO EVENT SHALL THE TOTAL CUMULATIVE LIABILITY OF SILICON LABS TO LICENSEE FOR ALL MATTERS RELATED TO THE LICENSED MATERIALS EXCEED THE AMOUNT PAID BY LICENSEE TO SILICON LABS FOR SUCH LICENSED MATERIALS OR ONE UNITED STATES DOLLAR ($1.00 USD). YOU ACKNOWLEDGE THAT THE AMOUNT PAID BY YOU FOR THE LICENSED MATERIALS REFLECTS THIS ALLOCATION OF RISK.
+
+
+22. Data Collection.
+To the extent that Silicon Labs Devices collect, store or transfer Personal Information, Silicon Labs may use such Personal Information for its own internal purposes, including marketing Silicon Labs Devices to the user. Silicon Labs will not sell Personal Information to third parties. Silicon Labs Devices will not transfer Personal Information to other devices in a network or to third parties except to the extent necessary to perform the intended function of the Silicon Labs Device. Silicon Labs will not be liable to Licensee or Licensee’s customers for (a) any intended transfer of Personal Information described in the Documentation for the Silicon Labs Device; (b) any unintended transfer of Personal Information or loss of data caused by any third parties or third party devices or software, including hacking, malware, eavesdropping, man-in-the-middle attacks or other intentional acts; or (c) unauthorized access to or misuse of Personal Information by third parties.
+
+
+23. Term and Termination.
+This Agreement will take effect on the date the Licensed Materials are acquired by or delivered to Licensee, and will remain in effect unless terminated as provided below. If you breach any of your obligations under this Agreement, this Agreement will immediately and automatically terminate. You may terminate this Agreement at any time by destroying all copies of the Licensed Materials. Upon termination of this Agreement, you shall immediately discontinue the use of the Licensed Materials and shall return or provide certification to Silicon Labs of the destruction of all copies of the Licensed Materials. You many keep one copy of the Licensed Materials for archival (non-operational) purposes only, so long as access to such copies is restricted. If the Agreement is terminated by Silicon Labs, you may continue to distribute copies of the Software already installed in finished inventory, but you may not make any additional copies or install the Software in additional products. All provisions of this Agreement relating to disclaimers of warranties, limitation of liability, remedies or damages, and Silicon Labs’ proprietary rights, shall survive any termination of this Agreement for any reason.
+
+
+24. Termination of License.
+If you institute patent litigation against Silicon Labs or any of its Affiliates (including a cross-claim or counterclaim in a lawsuit) alleging that the Licensed Programs directly or indirectly infringe a patent of Licensee, then any patent licenses granted to you under this Agreement for that Licensed Program shall terminate as of the date such litigation is filed.
+
+
+25. Export Restrictions.
+You may not export or re-export the Software or any Licensed Programs, or any copy thereof, in violation of any applicable laws or regulations.
+
+
+26. Amendments.
+This Agreement may be amended unilaterally by Silicon Labs at any time. The most recent version of this Agreement supersedes and replaces all prior versions. In the event of any conflicting terms, the terms of the most recent version of this Agreement shall control.
+
+
+27. Miscellaneous.
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+29. Injunctive Relief.
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+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/group__iec60730__release__notes.dot b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__release__notes.dot new file mode 100644 index 00000000..67b056b6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__release__notes.dot @@ -0,0 +1,9 @@ +digraph "Release Notes" +{ + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=box]; + rankdir=LR; + Node2 [label="EFR32 IEC60730 Library\l Extra Files",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$group__IEC60730__EXTRA.html",tooltip="Extra files for the EFR32 IEC Library."]; + Node1 [label="Release Notes",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Release Notes for the IEC60730 Library."]; + Node2->Node1 [shape=plaintext, dir="back", style="solid"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/group__iec60730__release__notes.html b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__release__notes.html new file mode 100644 index 00000000..78281b0f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/group__iec60730__release__notes.html @@ -0,0 +1,125 @@ + + + + + + + +IEC_60730: Release Notes + + + + + + + + + +
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IEC_60730 +
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Release Notes
EFR32 IEC60730 Library » EFR32 IEC60730 Library Extra Files
+
+
+ +

Release Notes for the IEC60730 Library. +More...

+
+Collaboration diagram for Release Notes:
+
+
+
+

Release Notes for the IEC60730 Library.

+
Silicon Laboratories EFR32 IEC60730 Library Release Notes
+Copyright (C) 2023 Silicon Laboratories, Inc.
+
+This release contains the following components:
+-----------------------------------------------
+* Library (source files)
+  - <repo>/Releases/src
+  - <repo>/Releases/inc
+  - <repo>/Releases/asm
+* Library Dependencies (header files)
+  - <repo>/Lib/CMSIS
+  - <repo>/Lib/Device/<device>/Include
+Note: Refer to the Silabs GSDK package for the latest version of
+  the dependencies files.
+
+* Examples
+* Documentation
+* SDK extension files
+
+Revision History
+----------------
+1.2.0 Release
+
+- Supported Devices: EFR32xG24, EFM32xG12
+- Supported Compilers: GCC, IAR
+- Added GSDK extension for the IEC60730 Library.
+- Integrated demo app to the GSDK extension.
+
+----------------
+1.1.0 Release
+
+- Supported IEC60730 standard
+- Supported Devices: EFR32xG22, EFM32PG22
+- Supported Compilers: GCC, IAR
+
+----------------
+1.0.0 Release
+
+- Supported IEC60730 standard
+- Supported Devices: EFR32xG21, EFR32xG23
+- Supported Compilers: GCC, IAR
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/hierarchy.html b/docs/html/EFR32_ICE60730_Libraries/hierarchy.html new file mode 100644 index 00000000..cd4125aa --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/hierarchy.html @@ -0,0 +1,163 @@ + + + + + + + +IEC_60730: Class Hierarchy + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+
Class Hierarchy
+
+
+
+

Go to the graphical class hierarchy

+This inheritance list is sorted roughly, but not completely, alphabetically:
+
[detail level 1234]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
 ▼CException
 ▼Cerrors.JLinkException
 Cerrors.JLinkDataException
 Cerrors.JLinkEraseException
 Cerrors.JLinkFlashException
 Cerrors.JLinkReadException
 Cerrors.JLinkRTTException
 Cerrors.JLinkWriteException
 Ciec60730_IRQExecutionBounds_t
 Ciec60730_LibraryVersion_t
 Ciec60730_WatchDog_tWatchdog component configuration structure
 ▼Ciec60730_test_base.iec60730TestBase
 Ciec60730_cpu_registers.iec60730_cpu_regsIEC60730 CPU Register Check Tests
 Ciec60730_invariable_memory.iec60730_imcIEC60730 Invariable Memory Plausibility Verification Tests
 Ciec60730_irq.iec60730_irqIEC60730 IRQ Plausibility Verification Tests
 Ciec60730_programme_counter.iec60730_programme_counterIEC60730 CPU programme counter Tests
 Ciec60730_system_clock.iec60730_system_clockIEC60730 System Clock Verification Tests
 Ciec60730_variable_memory.iec60730_vmcIEC60730 Variable Memory Plausibility Verification Tests
 Ciec60730_watchdog.iec60730_watchdogIEC60730 Watchdog Verification Tests
 CimcParams_tThis structure is used as configuration for IMC testing, that holds GPCRC Register
 Cjlink.JLinkDll
 ▼Cobject
 Cenums.JLinkAccessFlags
 Cenums.JLinkAccessMaskFlags
 Cenums.JLinkBreakpoint
 Cenums.JLinkBreakpointImplementation
 Cenums.JLinkCore
 Cenums.JLinkCPUCapabilities
 Cenums.JLinkDeviceFamily
 Cenums.JLinkEventTypes
 Cenums.JLinkFlags
 Cenums.JLinkFunctions
 ▼Cenums.JLinkGlobalErrors
 ▼Cenums.JLinkDataErrors
 Cerrors.JLinkDataException
 ▼Cenums.JLinkEraseErrors
 Cerrors.JLinkEraseException
 ▼Cenums.JLinkFlashErrors
 Cerrors.JLinkFlashException
 ▼Cenums.JLinkReadErrors
 Cerrors.JLinkReadException
 ▼Cenums.JLinkRTTErrors
 Cerrors.JLinkRTTException
 ▼Cenums.JLinkWriteErrors
 Cerrors.JLinkWriteException
 Cerrors.JLinkException
 Cenums.JLinkHaltReasons
 Cenums.JLinkHost
 Cenums.JLinkInterfaces
 Cenums.JLinkResetStrategyCortexM3
 Cenums.JLinkROMTable
 Cenums.JLinkRTTCommand
 Cenums.JLinkRTTDirection
 Cenums.JLinkStraceCommand
 Cenums.JLinkStraceEvent
 Cenums.JLinkStraceOperation
 Cenums.JLinkSWOCommands
 Cenums.JLinkSWOInterfaces
 Cenums.JLinkTraceCommand
 Cenums.JLinkTraceFormat
 Cenums.JLinkTraceSource
 Cenums.JLinkVectorCatchCortexM3
 Cutil.PyTestSuites
 Cutil.TimeStampUtil
 ▼CStructure
 Cjlink_constants.JlinkArm_Speed_Info_CStruct
 Cjlink_constants.JLinkArmEmuConnectInfo_CStruct
 Cjlink_constants.JLinkJtagIdData_CStruct
 ▼CTelnet
 ▼Cutil.TelnetHostUtil
 Cutil.TelnetDeviceUtil
 ▼CTestCase
 Ciec60730_cpu_registers.iec60730_cpu_regsIEC60730 CPU Register Check Tests
 Ciec60730_invariable_memory.iec60730_imcIEC60730 Invariable Memory Plausibility Verification Tests
 Ciec60730_irq.iec60730_irqIEC60730 IRQ Plausibility Verification Tests
 Ciec60730_programme_counter.iec60730_programme_counterIEC60730 CPU programme counter Tests
 Ciec60730_system_clock.iec60730_system_clockIEC60730 System Clock Verification Tests
 Ciec60730_variable_memory.iec60730_vmcIEC60730 Variable Memory Plausibility Verification Tests
 Ciec60730_watchdog.iec60730_watchdogIEC60730 Watchdog Verification Tests
 CupdateCrcParams_t
 CvmcParams_tThis structure is used as configuration for VMC testing
+
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+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730_8h.html b/docs/html/EFR32_ICE60730_Libraries/iec60730_8h.html new file mode 100644 index 00000000..c578c5f3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730_8h.html @@ -0,0 +1,422 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730.h File Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Classes | +Macros | +Typedefs | +Enumerations | +Functions | +Variables
+
+
sl_iec60730.h File Reference
+
+
+ +

Library definitions. +More...

+
#include "si_toolchain.h"
+#include "oem_iec60730.h"
+
+Include dependency graph for sl_iec60730.h:
+
+
+
+
+This graph shows which files directly or indirectly include this file:
+
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Go to the source code of this file.

+ + + + + + + + + + + + + + +

+Classes

struct  iec60730_LibraryVersion_t
 
struct  iec60730_IRQExecutionBounds_t
 
struct  imcParams_t
 This structure is used as configuration for IMC testing, that holds GPCRC Register. More...
 
struct  updateCrcParams_t
 
struct  vmcParams_t
 This structure is used as configuration for VMC testing. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

+#define SFRPAGING   0
 
+#define IEC60370_CM4   0
 
+#define IEC60370_CM33   1
 
+#define IE60730_LIBRARY_VERSION   {1, 2, 0}
 IEC60370 library version. Modified by build jobs to correct version.
 
#define UNUSED_VAR(x)   (void) (x)
 
+#define __CONCAT(x, y)   x##y
 
+#define CONCAT(x, y)   __CONCAT(x, y)
 
+#define STR(x)   #x
 
+#define XSTR(x)   STR(x)
 
#define LABEL_DEF(NAME)   LB_ASM volatile(LB_XSTR(NAME))
 
#define __CLASSB_RAM   __attribute__((section(".classb_ram")))
 
#define __RT_BUF   __attribute__((section(".rt_buf")))
 
#define __OVERLAP   __attribute__((section(".overlap")))
 
#define DEC_CLASSB_VARS(vartype, name)
 
#define EXTERN_DEC_CLASSB_VARS(vartype, name)
 
#define sl_static_dec_classb_vars(vartype, name)
 
#define INV_CLASSB_VAR(vartype, name)   CONCAT(name, Inv) = (vartype) (~(vartype) name)
 
#define INV_CLASSB_PVAR(vartype, name)   CONCAT(name, Inv) = (vartype *) (~(vartype) name)
 
#define CHECK_INTEGRITY(vartype, x)   ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, Inv)))
 
#define FLASH_BLOCK   (64)
 
#define ROM_END   ((uint32_t *) (&check_sum))
 
#define ROM_SIZE   ((uint32_t) ROM_END - (uint32_t) ROM_START)
 
#define STEPS_NUMBER   ((uint32_t) ROM_SIZE / FLASH_BLOCK)
 
#define ROM_SIZE_INWORDS   ((uint32_t) ROM_SIZE / 4U)
 
#define FLASH_BLOCK_WORDS   ((uint32_t) (ROM_SIZE_INWORDS / STEPS_NUMBER))
 
#define REF_CRC   (check_sum)
 
#define BLOCKSIZE   (4)
 
#define RT_BLOCK_OVERLAP   (1)
 
#define RT_BLOCKSIZE   (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
 
#define BACKGROUND   ((uint32_t) 0x00000000uL)
 
+#define STACK_OVERFLOW_CONST_GUARD_VALUE_0   (0xEEEEEEEEuL)
 Pattern 0 is used for stack overflow.
 
+#define STACK_OVERFLOW_CONST_GUARD_VALUE_1   (0xCCCCCCCCuL)
 Pattern 1 is used for stack overflow.
 
+#define STACK_OVERFLOW_CONST_GUARD_VALUE_2   (0xBBBBBBBBuL)
 Pattern 2 is used for stack overflow.
 
+#define STACK_OVERFLOW_CONST_GUARD_VALUE_3   (0xDDDDDDDDuL)
 Pattern 3 is used for stack overflow.
 
#define __STACK_BOTTOM   __attribute__((section(".stack_bottom")))
 
+#define IEC60730_VMC_COMPLETE   (1 << 0)
 Mask bit used for Variable Memory Checks completed.
 
+#define IEC60730_IMC_COMPLETE   (1 << 1)
 Mask bit used for Invariable Memory Checks completed.
 
+#define IEC60730_CPU_CLOCKS_COMPLETE   (1 << 2)
 Mask bit used for CPU Clocks Checks completed.
 
+#define IEC60730_CPU_REGS_COMPLETE   (1 << 3)
 Mask bit used for CPU Register Checks completed.
 
+#define IEC60730_INTERRUPT_COMPLETE   (1 << 4)
 Mask bit used for Interrupt Checks completed.
 
+#define IEC60730_GPIO_COMPLETE   (1 << 5)
 Mask bit used for GPIO Plausibility Checks completed.
 
+#define IEC60730_ANALOG_COMPLETE   (1 << 6)
 Mask bit used for Analog Plausibility Checks completed.
 
+#define IEC60730_COMMS_COMPLETE   (1 << 7)
 Mask bit used for Communications Plausibility Checks completed.
 
+#define IEC60730_OEM0_COMPLETE   (1 << 8)
 Mask bit used for OEM Check 0 completed.
 
+#define IEC60730_OEM1_COMPLETE   (1 << 9)
 Mask bit used for OEM Check 1 completed.
 
+#define IEC60730_OEM2_COMPLETE   (1 << 10)
 Mask bit used for OEM Check 2 completed.
 
+#define IEC60730_OEM3_COMPLETE   (1 << 11)
 Mask bit used for OEM Check 3 completed.
 
+#define IEC60730_OEM4_COMPLETE   (1 << 12)
 Mask bit used for OEM Check 4 completed.
 
+#define IEC60730_OEM5_COMPLETE   (1 << 13)
 Mask bit used for OEM Check 5 completed.
 
+#define IEC60730_OEM6_COMPLETE   (1 << 14)
 Mask bit used for OEM Check 6 completed.
 
+#define IEC60730_OEM7_COMPLETE   (1 << 15)
 Mask bit used for OEM Check 7 completed.
 
#define IEC60730_ALL_COMPLETE_BITS
 Mask used for checking that all bits are set. More...
 
+#define DEFAULT_GPRC   GPCRC
 
#define IMC_CRCBUFFER_SAMPLETEST   "123456789"
 
+#define IMC_CRCBUFFER_INIT_VALUE   (0xFFFF)
 
+#define IMC_CRCBUFFER_XOROUTPUT   (0x0000)
 
+#define IMC_CRCBUFFER_SAMPLERESULT   (0x29B1)
 
#define IMC_CRCBUFFER_INIT_DEFAULT
 
#define IMC_CRCBUFFER_UPDATE_DEFAULT
 
+ + + + + + +

+Typedefs

+typedef uint16_t crc_t
 
+typedef uint8_t readType_t
 The way to read CRC value when using function iec60730_updateCRCWithDataBuffer.
 
+ + + + + + + + + + + + +

+Enumerations

enum  iec60730_TestResult_t { iec60730_TestFailed = 0, +iec60730_TestPassed = 1, +iec60730_TestInProgress = 2 + }
 The result of a test. More...
 
enum  iec60730_TestFailure_t {
+  iec60730_NoFailure = 0, +iec60730_TestVerify, +iec60730_WatchdogPostFail = 2, +iec60730_VMCFail = 3, +
+  iec60730_IMCFail = 4, +iec60730_CpuRegistersFail = 5, +iec60730_ClockFail = 6, +iec60730_InterruptFail, +
+  iec60730_ProgrammeCounterFail, +iec60730_GpioFail = 9, +iec60730_AnalogFail = 10, +iec60730_Cs0Fail = 11, +
+  iec60730_LeSense0Fail = 12, +iec60730_RadioFail = 13, +iec60730_I2C0Fail = 14, +iec60730_I2C1Fail = 15, +
+  iec60730_Usart0Fail = 16, +iec60730_Usart1Fail = 17, +iec60730_Usart2Fail = 18, +iec60730_Usart3Fail = 19, +
+  iec60730_LeUart0Fail = 20, +iec60730_Euart0Fail = 21, +iec60730_Pdm0Fail = 22, +iec60730_OEMFail_1 = 23, +
+  iec60730_OEMFail_2 = 24, +iec60730_OEMFail_3 = 25, +iec60730_OEMFail_4 = 26 +
+ }
 Cause of failure passed to Safe State function. More...
 
enum  iec60730_TimerTestControl_t { iec60730_TimerTestDisable = 0, +iec60730_TimerTestEnable = 1 + }
 Enable/disable switch for system timer test. More...
 
enum  { IMC_DATA_READ = 0, +IMC_DATA_READ_BIT_REVERSED, +IMC_DATA_READ_BYTE_REVERSED + }
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

void iec60730_SafeState (iec60730_TestFailure_t failure)
 
 SI_SEGMENT_VARIABLE (iec60730_SafetyCheck, iec60730_TestFailure_t, SI_SEG_DATA)
 
void iec60730_Bist (void)
 
 SI_SEGMENT_VARIABLE (iec60730_programmeCounterCheck, uint16_t, SI_SEG_DATA)
 
void iec60730_Post (void)
 
void iec60730_RestartWatchdogs (void)
 
+ SI_SEGMENT_VARIABLE (iec60730_clockTestTolerance, uint8_t, SI_SEG_DATA)
 Variable set by OEM to determine clock tolerance allowed.
 
 SI_SEGMENT_VARIABLE (iec60730_timerTestControl, uint8_t, SI_SEG_DATA)
 
 SI_SEGMENT_VARIABLE (iec60730_timerTick, uint16_t, SI_SEG_DATA)
 
 SI_SEGMENT_VARIABLE (iec60730_systemClockToTestClockFrequency, uint16_t, SI_SEG_DATA)
 
void iec60730_SystemClockTick (void)
 
void iec60730_TestClockTick (void)
 
void iec60730_TimersInit (void)
 
void iec60730_clockTicksReset (void)
 
 SI_SEGMENT_VARIABLE (iec60730_IRQExecCount[], uint8_t, SI_SEG_DATA)
 
 SI_SEGMENT_CONST (iec60730_IRQFreqBounds[], iec60730_IRQExecutionBounds_t, SI_SEG_CODE)
 
 SI_SEGMENT_CONST (iec60730_IRQFreqBoundsSize, uint8_t, SI_SEG_CODE)
 
void iec60730_ImcInit (imcParams_t *params)
 
iec60730_TestResult_t iec60730_updateCRCWithDataBuffer (updateCrcParams_t *params, crc_t *crc, uint8_t *buffer, uint32_t size)
 
void iec60730_VmcInit (vmcParams_t *params)
 
+ + + + + + +

+Variables

+const iec60730_LibraryVersion_t iec60730_LibraryVersion
 Global variable which holds the IEC60370 library version.
 
crc_t check_sum
 
+

Detailed Description

+

Library definitions.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730_8h__dep__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730_8h__dep__incl.dot new file mode 100644 index 00000000..42705a0a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730_8h__dep__incl.dot @@ -0,0 +1,18 @@ +digraph "Lib/inc/sl_iec60730.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/sl_iec60730.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Library definitions."]; + Node1 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Lib/inc/sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__internal_8h.html",tooltip="Internal definitions."]; + Node2 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="Lib/inc/iec60730_cpu\l_registers.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__cpu__registers_8h.html",tooltip="CPU Registers check."]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="Lib/inc/iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__programme__counter_8h.html",tooltip="Program Counter check."]; + Node4 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node1 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="Lib/inc/iec60730_invariable\l_memory.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__invariable__memory_8h.html",tooltip="Invariable memory check."]; + Node5 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730_8h__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730_8h__incl.dot new file mode 100644 index 00000000..0e874fe6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730_8h__incl.dot @@ -0,0 +1,11 @@ +digraph "Lib/inc/sl_iec60730.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/sl_iec60730.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Library definitions."]; + Node1 -> Node2 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="si_toolchain.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node3 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="oem_iec60730.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/iec60730_8h_source.html new file mode 100644 index 00000000..8e24ac86 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730_8h_source.html @@ -0,0 +1,782 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730.h Source File + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 #ifndef __IEC60730_H__
+
19 #define __IEC60730_H__
+
20 
+
21 #ifdef __cplusplus
+
22 extern "C" {
+
23 #endif /* __cplusplus */
+
24 
+
25 #include "si_toolchain.h"
+
26 #include "oem_iec60730.h"
+
27 #include IEC_BOARD_HEADER
+
28 
+
29 #ifdef DOXYGEN
+
30 #define IEC_BOARD_HEADER
+
37 
+
38 #else
+
39 
+
40 #define SFRPAGING 0
+
41 
+
42 #ifdef EFR32MG21_DEVICE
+
43 #include "em_device.h"
+
44 #define DEVICE_FOUND 1
+
45 #ifndef INVAR_BLOCKS_PER_BIST
+
46 #define INVAR_BLOCKS_PER_BIST 512
+
47 #endif
+
48 #ifndef VAR_BLOCKS_PER_BIST
+
49 #define VAR_BLOCKS_PER_BIST 256
+
50 #endif
+
51 
+
52 #ifndef IEC60730_NON_SECURE_EN
+
53 #ifndef ROM_START
+
54 #define ROM_START ((uint32_t *) 0x00000000uL)
+
55 #endif // ROM_START
+
56 #else
+
57 #ifndef ROM_START
+
58 #define ROM_START ((uint32_t *) 0x00028000uL)
+
59 #endif
+
60 #endif // IEC60730_NON_SECURE_EN
+
61 
+
62 #endif // EFR32MG21_DEVICE
+
63 
+
64 #ifdef EFR32MG12P_DEVICE
+
65 #include "em_device.h"
+
66 #define DEVICE_FOUND 1
+
67 #ifndef INVAR_BLOCKS_PER_BIST
+
68 #define INVAR_BLOCKS_PER_BIST 512
+
69 #endif
+
70 #ifndef VAR_BLOCKS_PER_BIST
+
71 #define VAR_BLOCKS_PER_BIST 256
+
72 #endif
+
73 
+
74 #ifndef ROM_START
+
75 #define ROM_START ((uint32_t *) 0x00000000uL)
+
76 #endif // ROM_START
+
77 
+
78 #endif // EFR32MG12P_DEVICE
+
79 
+
80 #ifdef EFR32FG23_DEVICE
+
81 #include "em_device.h"
+
82 #define DEVICE_FOUND 1
+
83 #ifndef INVAR_BLOCKS_PER_BIST
+
84 #define INVAR_BLOCKS_PER_BIST 1024
+
85 #endif
+
86 #ifndef VAR_BLOCKS_PER_BIST
+
87 #define VAR_BLOCKS_PER_BIST 256
+
88 #endif
+
89 
+
90 #ifndef IEC60730_NON_SECURE_EN
+
91 #ifndef ROM_START
+
92 #define ROM_START ((uint32_t *) 0x08000000uL)
+
93 #endif // ROM_START
+
94 #else
+
95 #ifndef ROM_START
+
96 #define ROM_START ((uint32_t *) 0x08028000uL)
+
97 #endif
+
98 #endif // IEC60730_NON_SECURE_EN
+
99 
+
100 #endif // EFR32FG23_DEVICE
+
101 
+
102 #ifdef EFR32ZG23_DEVICE
+
103 #include "em_device.h"
+
104 #define DEVICE_FOUND 1
+
105 #ifndef INVAR_BLOCKS_PER_BIST
+
106 #define INVAR_BLOCKS_PER_BIST 1024
+
107 #endif
+
108 #ifndef VAR_BLOCKS_PER_BIST
+
109 #define VAR_BLOCKS_PER_BIST 256
+
110 #endif
+
111 
+
112 #ifndef IEC60730_NON_SECURE_EN
+
113 #ifndef ROM_START
+
114 #define ROM_START ((uint32_t *) 0x08000000uL)
+
115 #endif // ROM_START
+
116 #else
+
117 #ifndef ROM_START
+
118 #define ROM_START ((uint32_t *) 0x08028000uL)
+
119 #endif
+
120 #endif // IEC60730_NON_SECURE_EN
+
121 
+
122 #endif // EFR32ZG23_DEVICE
+
123 
+
124 #ifdef EFR32BG22_DEVICE
+
125 #include "em_device.h"
+
126 #define DEVICE_FOUND 1
+
127 #ifndef INVAR_BLOCKS_PER_BIST
+
128 #define INVAR_BLOCKS_PER_BIST 512
+
129 #endif
+
130 #ifndef VAR_BLOCKS_PER_BIST
+
131 #define VAR_BLOCKS_PER_BIST 256
+
132 #endif
+
133 
+
134 #ifndef IEC60730_NON_SECURE_EN
+
135 #ifndef ROM_START
+
136 #define ROM_START ((uint32_t *) 0x00000000uL)
+
137 #endif // ROM_START
+
138 #else
+
139 #ifndef ROM_START
+
140 #define ROM_START ((uint32_t *) 0x00028000uL)
+
141 #endif
+
142 #endif // IEC60730_NON_SECURE_EN
+
143 
+
144 #endif // EFR32BG22_DEVICE
+
145 
+
146 #ifdef EFR32FG22_DEVICE
+
147 #include "em_device.h"
+
148 #define DEVICE_FOUND 1
+
149 #ifndef INVAR_BLOCKS_PER_BIST
+
150 #define INVAR_BLOCKS_PER_BIST 512
+
151 #endif
+
152 #ifndef VAR_BLOCKS_PER_BIST
+
153 #define VAR_BLOCKS_PER_BIST 256
+
154 #endif
+
155 
+
156 #ifndef IEC60730_NON_SECURE_EN
+
157 #ifndef ROM_START
+
158 #define ROM_START ((uint32_t *) 0x00000000uL)
+
159 #endif // ROM_START
+
160 #else
+
161 #ifndef ROM_START
+
162 #define ROM_START ((uint32_t *) 0x00028000uL)
+
163 #endif
+
164 #endif // IEC60730_NON_SECURE_EN
+
165 
+
166 #endif // EFR32FG22_DEVICE
+
167 
+
168 #ifdef EFM32PG22_DEVICE
+
169 #include "em_device.h"
+
170 #define DEVICE_FOUND 1
+
171 #ifndef INVAR_BLOCKS_PER_BIST
+
172 #define INVAR_BLOCKS_PER_BIST 512
+
173 #endif
+
174 #ifndef VAR_BLOCKS_PER_BIST
+
175 #define VAR_BLOCKS_PER_BIST 256
+
176 #endif
+
177 
+
178 #ifndef IEC60730_NON_SECURE_EN
+
179 #ifndef ROM_START
+
180 #define ROM_START ((uint32_t *) 0x00000000uL)
+
181 #endif // ROM_START
+
182 #else
+
183 #ifndef ROM_START
+
184 #define ROM_START ((uint32_t *) 0x00028000uL)
+
185 #endif
+
186 #endif // IEC60730_NON_SECURE_EN
+
187 
+
188 #endif // EFM32PG22_DEVICE
+
189 
+
190 #ifdef EFR32MG24_DEVICE
+
191 #include "em_device.h"
+
192 #define DEVICE_FOUND 1
+
193 #ifndef INVAR_BLOCKS_PER_BIST
+
194 #define INVAR_BLOCKS_PER_BIST 512
+
195 #endif
+
196 #ifndef VAR_BLOCKS_PER_BIST
+
197 #define VAR_BLOCKS_PER_BIST 256
+
198 #endif
+
199 
+
200 #ifndef IEC60730_NON_SECURE_EN
+
201 #ifndef ROM_START
+
202 #define ROM_START ((uint32_t *) 0x00000000uL)
+
203 #endif // ROM_START
+
204 #else
+
205 #ifndef ROM_START
+
206 #define ROM_START ((uint32_t *) 0x00028000uL)
+
207 #endif
+
208 #endif // IEC60730_NON_SECURE_EN
+
209 
+
210 #endif // EFR32MG24_DEVICE
+
211 
+
212 #ifndef DEVICE_FOUND
+
213 #error "Unknown EFR32 device! Set EFR32xxx_DEVICE in build configuration!"
+
214 #endif
+
215 
+
216 #define IEC60370_CM4 0
+
217 #define IEC60370_CM33 1
+
218 
+
219 #if defined(__CM4_REV)
+
220 #define IEC60370_CPU IEC60370_CM4
+
221 #elif defined(__CM33_REV)
+
222 #define IEC60370_CPU IEC60370_CM33
+
223 #else
+
224 #error "Unknown Core type!"
+
225 #endif
+
226 
+
227 #endif /* DOXYGEN */
+
228 
+
229 /**************************************************************************/
+
236 #ifdef DOXYGEN
+
237 typedef struct {
+
240  uint8_t major;
+
241  uint8_t minor;
+
242  uint8_t revision;
+
243 } iec60730_LibraryVersion_t;
+
244 #else
+
245 typedef struct {
+
246  uint8_t major;
+
247  uint8_t minor;
+
248  uint8_t revision;
+
249 } iec60730_LibraryVersion_t;
+
250 #endif
+
251 
+
253 #define IE60730_LIBRARY_VERSION {1, 2, 0}
+
254 
+
256 extern const iec60730_LibraryVersion_t iec60730_LibraryVersion;
+
257 
+
259 typedef enum {
+
260  iec60730_TestFailed = 0,
+
261  iec60730_TestPassed = 1,
+
262  iec60730_TestInProgress = 2,
+
263 } iec60730_TestResult_t;
+
264 
+
266 typedef enum {
+
267  iec60730_NoFailure = 0,
+
268  iec60730_TestVerify =
+
269  1,
+
270  iec60730_WatchdogPostFail = 2,
+
271  iec60730_VMCFail = 3,
+
272  iec60730_IMCFail = 4,
+
273  iec60730_CpuRegistersFail = 5,
+
274  iec60730_ClockFail = 6,
+
275  iec60730_InterruptFail =
+
276  7,
+
277  iec60730_ProgrammeCounterFail =
+
278  8,
+
279  iec60730_GpioFail = 9,
+
280  iec60730_AnalogFail = 10,
+
281  iec60730_Cs0Fail = 11,
+
282  iec60730_LeSense0Fail = 12,
+
283  iec60730_RadioFail = 13,
+
284  iec60730_I2C0Fail = 14,
+
285  iec60730_I2C1Fail = 15,
+
286  iec60730_Usart0Fail = 16,
+
287  iec60730_Usart1Fail = 17,
+
288  iec60730_Usart2Fail = 18,
+
289  iec60730_Usart3Fail = 19,
+
290  iec60730_LeUart0Fail = 20,
+
291  iec60730_Euart0Fail = 21,
+
292  iec60730_Pdm0Fail = 22,
+
293  iec60730_OEMFail_1 = 23,
+
294  iec60730_OEMFail_2 = 24,
+
295  iec60730_OEMFail_3 = 25,
+
296  iec60730_OEMFail_4 = 26,
+
297 } iec60730_TestFailure_t;
+
298 
+
301 #ifndef UNUSED_VAR
+
302 #define UNUSED_VAR(x) (void) (x)
+
303 #endif /* UNUSED_VAR */
+
304 
+
305 #ifndef __CONCAT
+
306 #define __CONCAT(x, y) x##y
+
307 #endif
+
308 
+
309 #define CONCAT(x, y) __CONCAT(x, y)
+
310 
+
311 #define STR(x) #x
+
312 #define XSTR(x) STR(x)
+
313 
+
314 #ifdef __GNUC__ /* GCC */
+
315 #define LB_ASM __asm__
+
316 #define LB_XSTR(x) XSTR(x:)
+
317 #elif defined(__ICCARM__)
+
318 #define LB_ASM __asm
+
319 #define LB_XSTR(x) XSTR(x::)
+
320 #endif
+
321 
+
324 #ifndef LABEL_DEF
+
325 #define LABEL_DEF(NAME) LB_ASM volatile(LB_XSTR(NAME))
+
326 #endif /* LABEL_DEF */
+
327 
+
330 #ifndef __CLASSB_RAM
+
331 #define __CLASSB_RAM __attribute__((section(".classb_ram")))
+
332 #endif /* __CLASSB_RAM */
+
333 
+
336 #ifndef __RT_BUF
+
337 #define __RT_BUF __attribute__((section(".rt_buf")))
+
338 #endif /* __RT_BUF */
+
339 
+
342 #ifndef __OVERLAP
+
343 #define __OVERLAP __attribute__((section(".overlap")))
+
344 #endif /* __OVERLAP */
+
345 
+
346 #ifdef DOXYGEN
+
347 #define __no_init
+
350 #else // !DOXYGEN
+
351 #ifdef __GNUC__
+
352 #ifndef __no_init
+
353 #define __no_init
+
354 #endif /* __no_init */
+
355 #endif
+
356 #endif // DOXYGEN
+
357 
+
360 #define DEC_CLASSB_VARS(vartype, name) \
+
361  __no_init vartype name __CLASSB_RAM; \
+
362  __no_init vartype CONCAT(name, Inv) __CLASSB_RAM
+
363 
+
366 #define EXTERN_DEC_CLASSB_VARS(vartype, name) \
+
367  extern __no_init vartype name __CLASSB_RAM; \
+
368  extern __no_init vartype CONCAT(name, Inv) __CLASSB_RAM
+
369 
+
372 #define sl_static_dec_classb_vars(vartype, name) \
+
373  static __no_init vartype name __CLASSB_RAM; \
+
374  static __no_init vartype CONCAT(name, Inv) __CLASSB_RAM
+
375 
+
378 #define INV_CLASSB_VAR(vartype, name) \
+
379  CONCAT(name, Inv) = (vartype) (~(vartype) name)
+
380 
+
383 #define INV_CLASSB_PVAR(vartype, name) \
+
384  CONCAT(name, Inv) = (vartype *) (~(vartype) name)
+
385 
+
388 #define CHECK_INTEGRITY(vartype, x) \
+
389  ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, Inv)))
+
390 
+
393 /**************************************************************************/
+
398 #ifdef DOXYGEN
+
399 #define crc_t
+
403 
+
407 #define INVAR_BLOCKS_PER_BIST
+
408 
+
425 #define ROM_START
+
426 
+
427 #else // !DOXYGEN
+
428 
+
429 #ifdef USE_CRC_32
+
430 typedef uint32_t crc_t;
+
431 #else /* !USE_CRC_32 */
+
432 typedef uint16_t crc_t;
+
433 #endif /* USE_CRC_32 */
+
434 
+
435 #endif // DOXYGEN
+
436 
+
440 extern crc_t check_sum;
+
441 
+
449 #ifndef FLASH_BLOCK
+
450 #define FLASH_BLOCK (64)
+
451 #endif
+
452 
+
458 #ifndef ROM_END
+
459 #define ROM_END ((uint32_t *) (&check_sum))
+
460 #endif
+
461 
+
464 #define ROM_SIZE ((uint32_t) ROM_END - (uint32_t) ROM_START)
+
465 
+
468 #define STEPS_NUMBER ((uint32_t) ROM_SIZE / FLASH_BLOCK)
+
469 
+
472 #define ROM_SIZE_INWORDS ((uint32_t) ROM_SIZE / 4U)
+
473 
+
476 #define FLASH_BLOCK_WORDS ((uint32_t) (ROM_SIZE_INWORDS / STEPS_NUMBER))
+
477 
+
481 #ifndef REF_CRC
+
482 #define REF_CRC (check_sum)
+
483 #endif
+
484 
+
487 /**************************************************************************/
+
492 #define BLOCKSIZE (4)
+
495 
+
500 #define RT_BLOCK_OVERLAP (1)
+
501 
+
504 #define RT_BLOCKSIZE (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
+
505 
+
511 #ifndef BACKGROUND
+
512 #define BACKGROUND ((uint32_t) 0x00000000uL)
+
513 #endif
+
514 
+
516 #ifndef STACK_OVERFLOW_CONST_GUARD_VALUE_0
+
517 #define STACK_OVERFLOW_CONST_GUARD_VALUE_0 (0xEEEEEEEEuL)
+
518 #endif /* STACK_OVERFLOW_CONST_GUARD_VALUE_0 */
+
519 
+
521 #ifndef STACK_OVERFLOW_CONST_GUARD_VALUE_1
+
522 #define STACK_OVERFLOW_CONST_GUARD_VALUE_1 (0xCCCCCCCCuL)
+
523 #endif /* STACK_OVERFLOW_CONST_GUARD_VALUE_1 */
+
524 
+
526 #ifndef STACK_OVERFLOW_CONST_GUARD_VALUE_2
+
527 #define STACK_OVERFLOW_CONST_GUARD_VALUE_2 (0xBBBBBBBBuL)
+
528 #endif /* STACK_OVERFLOW_CONST_GUARD_VALUE_2 */
+
529 
+
531 #ifndef STACK_OVERFLOW_CONST_GUARD_VALUE_3
+
532 #define STACK_OVERFLOW_CONST_GUARD_VALUE_3 (0xDDDDDDDDuL)
+
533 #endif /* STACK_OVERFLOW_CONST_GUARD_VALUE_3 */
+
534 
+
537 #ifndef __STACK_BOTTOM
+
538 #define __STACK_BOTTOM __attribute__((section(".stack_bottom")))
+
539 #endif /* __STACK_BOTTOM */
+
540 
+
543 /**************************************************************************/
+
555 /**************************************************************************/
+
568 void iec60730_SafeState(iec60730_TestFailure_t failure);
+
571 /**************************************************************************/
+
600 extern SI_SEGMENT_VARIABLE(iec60730_SafetyCheck,
+
604  iec60730_TestFailure_t,
+
605  SI_SEG_DATA);
+
606 
+
607 /**************************************************************************/
+
618 void iec60730_Bist(void);
+
621 /**************************************************************************/
+
626 extern SI_SEGMENT_VARIABLE(iec60730_programmeCounterCheck,
+
634  uint16_t,
+
635  SI_SEG_DATA);
+
636 
+
638 #define IEC60730_VMC_COMPLETE (1 << 0)
+
639 #define IEC60730_IMC_COMPLETE (1 << 1)
+
641 #define IEC60730_CPU_CLOCKS_COMPLETE (1 << 2)
+
643 #define IEC60730_CPU_REGS_COMPLETE (1 << 3)
+
645 #define IEC60730_INTERRUPT_COMPLETE (1 << 4)
+
647 #define IEC60730_GPIO_COMPLETE (1 << 5)
+
649 #define IEC60730_ANALOG_COMPLETE (1 << 6)
+
651 #define IEC60730_COMMS_COMPLETE (1 << 7)
+
653 #define IEC60730_OEM0_COMPLETE (1 << 8)
+
655 #define IEC60730_OEM1_COMPLETE (1 << 9)
+
657 #define IEC60730_OEM2_COMPLETE (1 << 10)
+
659 #define IEC60730_OEM3_COMPLETE (1 << 11)
+
661 #define IEC60730_OEM4_COMPLETE (1 << 12)
+
663 #define IEC60730_OEM5_COMPLETE (1 << 13)
+
665 #define IEC60730_OEM6_COMPLETE (1 << 14)
+
667 #define IEC60730_OEM7_COMPLETE (1 << 15)
+
669 #define IEC60730_ALL_COMPLETE_BITS \
+
671  (IEC60730_VMC_COMPLETE | IEC60730_IMC_COMPLETE \
+
672  | IEC60730_CPU_CLOCKS_COMPLETE | IEC60730_CPU_REGS_COMPLETE \
+
673  | IEC60730_INTERRUPT_COMPLETE | IEC60730_GPIO_COMPLETE \
+
674  | IEC60730_ANALOG_COMPLETE | IEC60730_COMMS_COMPLETE \
+
675  | IEC60730_OEM0_COMPLETE | IEC60730_OEM1_COMPLETE | IEC60730_OEM2_COMPLETE \
+
676  | IEC60730_OEM3_COMPLETE | IEC60730_OEM4_COMPLETE | IEC60730_OEM5_COMPLETE \
+
677  | IEC60730_OEM6_COMPLETE | IEC60730_OEM7_COMPLETE)
+
678 
+
680 /**************************************************************************/
+
689 /**************************************************************************/
+
698 void iec60730_Post(void);
+
701 /**************************************************************************/
+
706 /**************************************************************************/
+
715 void iec60730_RestartWatchdogs(void);
+
716 
+
719 /**************************************************************************/
+
724 typedef enum {
+
726  iec60730_TimerTestDisable = 0,
+
727  iec60730_TimerTestEnable = 1,
+
728 } iec60730_TimerTestControl_t;
+
729 
+
731 extern SI_SEGMENT_VARIABLE(iec60730_clockTestTolerance, uint8_t, SI_SEG_DATA);
+
740 extern SI_SEGMENT_VARIABLE(iec60730_timerTestControl, uint8_t, SI_SEG_DATA);
+
744 extern SI_SEGMENT_VARIABLE(iec60730_timerTick, uint16_t, SI_SEG_DATA);
+
749 extern SI_SEGMENT_VARIABLE(iec60730_systemClockToTestClockFrequency,
+
750  uint16_t,
+
751  SI_SEG_DATA);
+
752 
+
753 /**************************************************************************/
+
763 void iec60730_SystemClockTick(void);
+
764 
+
765 /**************************************************************************/
+
775 void iec60730_TestClockTick(void);
+
776 
+
777 /**************************************************************************/
+
786 void iec60730_TimersInit(void);
+
787 
+
788 /**************************************************************************/
+
798 void iec60730_clockTicksReset(void);
+
799 
+
802 /**************************************************************************/
+
807 typedef struct {
+
810  uint8_t
+
811  min;
+
812  uint8_t
+
813  max;
+
814 } iec60730_IRQExecutionBounds_t;
+
815 
+
826 extern SI_SEGMENT_VARIABLE(iec60730_IRQExecCount[], uint8_t, SI_SEG_DATA);
+
835 extern SI_SEGMENT_CONST(iec60730_IRQFreqBounds[],
+
836  iec60730_IRQExecutionBounds_t,
+
837  SI_SEG_CODE);
+
843 extern SI_SEGMENT_CONST(iec60730_IRQFreqBoundsSize, uint8_t, SI_SEG_CODE);
+
844 
+
847 /**************************************************************************/
+
852 typedef uint8_t readType_t;
+
854 enum {
+
855  IMC_DATA_READ = 0,
+
856  IMC_DATA_READ_BIT_REVERSED =
+
857  1,
+
858  IMC_DATA_READ_BYTE_REVERSED =
+
859  2,
+
860 };
+
861 
+
863 typedef struct {
+
864  CRC_TypeDef *gpcrc;
+
865 } imcParams_t;
+
866 
+
870 typedef struct {
+
871 #ifndef CRC_USE_SW
+
872  imcParams_t hal;
+
873  CRC_INIT_TypeDef init;
+
874  readType_t readType;
+
875 #endif /* CRC_USE_SW */
+
876  crc_t xorOut;
+
877 } updateCrcParams_t;
+
878 
+
879 #ifdef DOXYGEN
+
880 #define DEFAULT_GPRC
+
884 #else
+
885 #ifndef DEFAULT_GPRC
+
886 #ifndef IEC60730_NON_SECURE_EN
+
887 #define DEFAULT_GPRC GPCRC
+
888 #else
+
889 #define DEFAULT_GPRC GPCRC_NS
+
890 #endif
+
891 #endif // DEFAULT_GPRC
+
892 #endif // DOXYGEN
+
893 
+
896 #define IMC_CRCBUFFER_SAMPLETEST "123456789"
+
897 
+
898 #ifdef DOXYGEN
+
899 #define IMC_CRCBUFFER_INIT_VALUE
+
904 
+
909 #define IMC_CRCBUFFER_XOROUTPUT
+
910 
+
915 #define IMC_CRCBUFFER_SAMPLERESULT
+
916 
+
919 #define IMC_CRCBUFFER_UPDATE_DEFAULT
+
920 
+
921 #else
+
922 
+
923 #ifdef CRC_USE_SW
+
924 #ifdef USE_CRC_32
+
925 #define IMC_CRCBUFFER_INIT_VALUE (0xFFFFFFFFuL)
+
926 #define IMC_CRCBUFFER_XOROUTPUT (0xFFFFFFFFuL)
+
927 #define IMC_CRCBUFFER_SAMPLERESULT (0xCBF43926)
+
928 #define IMC_CRCBUFFER_UPDATE_DEFAULT {IMC_CRCBUFFER_XOROUTPUT}
+
929 #else /* !USE_CRC_32 */
+
930 #define IMC_CRCBUFFER_INIT_VALUE (0x0000)
+
931 #define IMC_CRCBUFFER_XOROUTPUT (0x0000)
+
932 #define IMC_CRCBUFFER_SAMPLERESULT (0x29B1)
+
933 #define IMC_CRCBUFFER_UPDATE_DEFAULT {IMC_CRCBUFFER_XOROUTPUT}
+
934 #endif /* USE_CRC_32 */
+
935 #else /* !CRC_USE_SW */
+
936 #ifdef USE_CRC_32
+
937 #define IMC_CRCBUFFER_INIT_VALUE (0xFFFFFFFFuL)
+
938 #define IMC_CRCBUFFER_XOROUTPUT (0xFFFFFFFFuL)
+
939 #define IMC_CRCBUFFER_SAMPLERESULT (0xCBF43926)
+
940 #define IMC_CRCBUFFER_INIT_DEFAULT \
+
941  { \
+
942  0x04C11DB7UL, \
+
943  IMC_CRCBUFFER_INIT_VALUE, \
+
944  false, \
+
945  false, \
+
946  false, \
+
947  false, \
+
948  true, \
+
949  }
+
950 
+
951 #define IMC_CRCBUFFER_UPDATE_DEFAULT \
+
952  {{DEFAULT_GPRC}, \
+
953  IMC_CRCBUFFER_INIT_DEFAULT, \
+
954  IMC_DATA_READ, \
+
955  IMC_CRCBUFFER_XOROUTPUT}
+
956 #else /* !USE_CRC_32 */
+
957 #define IMC_CRCBUFFER_INIT_VALUE (0xFFFF)
+
958 #define IMC_CRCBUFFER_XOROUTPUT (0x0000)
+
959 #define IMC_CRCBUFFER_SAMPLERESULT (0x29B1)
+
960 #define IMC_CRCBUFFER_INIT_DEFAULT \
+
961  { \
+
962  0x1021UL, \
+
963  IMC_CRCBUFFER_INIT_VALUE, \
+
964  false, \
+
965  true, \
+
966  false, \
+
967  false, \
+
968  true, \
+
969  }
+
970 #define IMC_CRCBUFFER_UPDATE_DEFAULT \
+
971  {{DEFAULT_GPRC}, \
+
972  IMC_CRCBUFFER_INIT_DEFAULT, \
+
973  IMC_DATA_READ_BIT_REVERSED, \
+
974  IMC_CRCBUFFER_XOROUTPUT}
+
975 #endif /* USE_CRC_32 */
+
976 #endif /* CRC_USE_SW */
+
977 
+
978 #endif // DOXYGEN
+
979 
+
980 /**************************************************************************/
+
990 void iec60730_ImcInit(imcParams_t *params);
+
991 
+
992 /**************************************************************************/
+
1009 iec60730_TestResult_t
+
1010  iec60730_updateCRCWithDataBuffer(updateCrcParams_t *params,
+
1011  crc_t *crc,
+
1012  uint8_t *buffer,
+
1013  uint32_t size);
+
1014 
+
1017 /**************************************************************************/
+
1022 typedef struct {
+
1024  uint32_t *start;
+
1025  uint32_t *end;
+
1026 } vmcParams_t;
+
1027 
+
1028 /**************************************************************************/
+
1038 void iec60730_VmcInit(vmcParams_t *params);
+
1039 
+
1042 #if (_SILICON_LABS_32B_SERIES == 2)
+
1043 // Write to backup ram module
+
1044 // buram_inst: Pointer to BURAM instance
+
1045 // idx: BURAM Reg index
+
1046 // val: write value
+
1047 #define IEC60730_BURAM_WRITE(buram_inst, idx, val) \
+
1048  do { \
+
1049  buram_inst->RET[idx].REG = val; \
+
1050  } while (0)
+
1051 
+
1052 // Read from backup ram module
+
1053 // buram_inst: Pointer to BURAM instance
+
1054 // idx: BURAM Reg index
+
1055 #define IEC60730_BURAM_READ(buram_inst, idx) (buram_inst->RET[idx].REG)
+
1056 #endif
+
1057 
+
1060 #ifdef __cplusplus
+
1061 }
+
1062 #endif /* __cplusplus */
+
1063 
+
1064 #endif /* __IEC60730_H__ */
+
+
SI_SEGMENT_VARIABLE
SI_SEGMENT_VARIABLE(iec60730_SafetyCheck, iec60730_TestFailure_t, SI_SEG_DATA)
+
iec60730_LibraryVersion
const iec60730_LibraryVersion_t iec60730_LibraryVersion
Global variable which holds the IEC60370 library version.
+
iec60730_TimerTestEnable
@ iec60730_TimerTestEnable
timer tests will execute
Definition: sl_iec60730.h:727
+
readType_t
uint8_t readType_t
The way to read CRC value when using function iec60730_updateCRCWithDataBuffer.
Definition: sl_iec60730.h:853
+
vmcParams_t::end
uint32_t * end
End address of RAM to check.
Definition: sl_iec60730.h:1025
+
vmcParams_t::start
uint32_t * start
Start address of RAM to check.
Definition: sl_iec60730.h:1024
+
iec60730_clockTicksReset
void iec60730_clockTicksReset(void)
+
SI_SEGMENT_CONST
SI_SEGMENT_CONST(iec60730_IRQFreqBounds[], iec60730_IRQExecutionBounds_t, SI_SEG_CODE)
+
iec60730_Bist
void iec60730_Bist(void)
+
iec60730_RestartWatchdogs
void iec60730_RestartWatchdogs(void)
+
iec60730_Usart1Fail
@ iec60730_Usart1Fail
USART1 comms channel detected a failure.
Definition: sl_iec60730.h:287
+
iec60730_SafeState
void iec60730_SafeState(iec60730_TestFailure_t failure)
+
iec60730_IMCFail
@ iec60730_IMCFail
Invariable Memory Check detected a failure.
Definition: sl_iec60730.h:272
+
iec60730_TimersInit
void iec60730_TimersInit(void)
+
iec60730_updateCRCWithDataBuffer
iec60730_TestResult_t iec60730_updateCRCWithDataBuffer(updateCrcParams_t *params, crc_t *crc, uint8_t *buffer, uint32_t size)
+
iec60730_Euart0Fail
@ iec60730_Euart0Fail
EUART comms channel detected a failure.
Definition: sl_iec60730.h:291
+
iec60730_I2C0Fail
@ iec60730_I2C0Fail
I2C0 comms channel detected a failure.
Definition: sl_iec60730.h:284
+
iec60730_TimerTestControl_t
iec60730_TimerTestControl_t
Enable/disable switch for system timer test.
Definition: sl_iec60730.h:725
+
iec60730_ClockFail
@ iec60730_ClockFail
System Clock Check detected a failure.
Definition: sl_iec60730.h:274
+
SL_IEC60730_IMC_DATA_READ_BIT_REVERSED
@ SL_IEC60730_IMC_DATA_READ_BIT_REVERSED
use function GPCRC_DataReadBitReversed to read CRC
Definition: sl_iec60730.h:856
+
iec60730_OEMFail_2
@ iec60730_OEMFail_2
OEM defined failure.
Definition: sl_iec60730.h:294
+
iec60730_RadioFail
@ iec60730_RadioFail
Radio comms detected a failure.
Definition: sl_iec60730.h:283
+
iec60730_AnalogFail
@ iec60730_AnalogFail
Analog Plausibility Check detected a failure.
Definition: sl_iec60730.h:280
+
iec60730_OEMFail_1
@ iec60730_OEMFail_1
OEM defined failure.
Definition: sl_iec60730.h:293
+
iec60730_IRQExecutionBounds_t
Definition: sl_iec60730.h:809
+
SL_IEC60730_IMC_DATA_READ
@ SL_IEC60730_IMC_DATA_READ
use function GPCRC_DataRead to read CRC
Definition: sl_iec60730.h:855
+
iec60730_Usart2Fail
@ iec60730_Usart2Fail
USART2 comms channel detected a failure.
Definition: sl_iec60730.h:288
+
iec60730_Usart0Fail
@ iec60730_Usart0Fail
USART0 comms channel detected a failure.
Definition: sl_iec60730.h:286
+
imcParams_t
This structure is used as configuration for IMC testing, that holds GPCRC Register.
Definition: sl_iec60730.h:863
+
updateCrcParams_t::readType
readType_t readType
The way to read calculated CRC value.
Definition: sl_iec60730.h:874
+
iec60730_Post
void iec60730_Post(void)
+
iec60730_IRQExecutionBounds_t::max
uint8_t max
Maximum executed executions of ISR. Can be 0-255, must be greater than or equal to min.
Definition: sl_iec60730.h:813
+
iec60730_TestInProgress
@ iec60730_TestInProgress
test is still in progress
Definition: sl_iec60730.h:262
+
updateCrcParams_t::xorOut
crc_t xorOut
XOR with calculated CRC value.
Definition: sl_iec60730.h:876
+
iec60730_WatchdogPostFail
@ iec60730_WatchdogPostFail
Watchdog POST test failed.
Definition: sl_iec60730.h:270
+
SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED
@ SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED
use function GPCRC_DataReadByteReversed to read CRC
Definition: sl_iec60730.h:858
+
updateCrcParams_t::hal
imcParams_t hal
struct imcParams_t that contain GPCRC Register
Definition: sl_iec60730.h:872
+
iec60730_VMCFail
@ iec60730_VMCFail
Variable Memory Check detected a failure.
Definition: sl_iec60730.h:271
+
iec60730_TimerTestDisable
@ iec60730_TimerTestDisable
timer tests will not execute
Definition: sl_iec60730.h:726
+
iec60730_TestVerify
@ iec60730_TestVerify
Special case used for automated verification testing.
Definition: sl_iec60730.h:268
+
iec60730_LeUart0Fail
@ iec60730_LeUart0Fail
LEUART comms channel detected a failure.
Definition: sl_iec60730.h:290
+
iec60730_Cs0Fail
@ iec60730_Cs0Fail
CSEN0 detected a failureLESENSE.
Definition: sl_iec60730.h:281
+
iec60730_ProgrammeCounterFail
@ iec60730_ProgrammeCounterFail
Program Counter Check detected a failure.
Definition: sl_iec60730.h:277
+
iec60730_IRQExecutionBounds_t::min
uint8_t min
Minimum expected executions of ISR. Can be 0-255, must be less than or equal to max.
Definition: sl_iec60730.h:811
+
iec60730_I2C1Fail
@ iec60730_I2C1Fail
I2C1 comms channel detected a failure.
Definition: sl_iec60730.h:285
+
iec60730_Usart3Fail
@ iec60730_Usart3Fail
USART3 comms channel detected a failure.
Definition: sl_iec60730.h:289
+
iec60730_TestFailed
@ iec60730_TestFailed
test result failed
Definition: sl_iec60730.h:260
+
iec60730_InterruptFail
@ iec60730_InterruptFail
Interrupt Plausibility Check detected a failure.
Definition: sl_iec60730.h:275
+
imcParams_t::gpcrc
CRC_TypeDef * gpcrc
GPCRC Register.
Definition: sl_iec60730.h:864
+
iec60730_SystemClockTick
void iec60730_SystemClockTick(void)
+
iec60730_NoFailure
@ iec60730_NoFailure
No failure detected.
Definition: sl_iec60730.h:267
+
iec60730_CpuRegistersFail
@ iec60730_CpuRegistersFail
CPU Registers Check detected a failure.
Definition: sl_iec60730.h:273
+
iec60730_OEMFail_4
@ iec60730_OEMFail_4
OEM defined failure.
Definition: sl_iec60730.h:296
+
iec60730_TestClockTick
void iec60730_TestClockTick(void)
+
iec60730_GpioFail
@ iec60730_GpioFail
GPIO Plausibility Check detected a failure.
Definition: sl_iec60730.h:279
+
iec60730_LibraryVersion_t
Definition: sl_iec60730.h:245
+
updateCrcParams_t
Definition: sl_iec60730.h:870
+
iec60730_Pdm0Fail
@ iec60730_Pdm0Fail
PDM comms channel detected a failure.
Definition: sl_iec60730.h:292
+
updateCrcParams_t::init
CRC_INIT_TypeDef init
CRC initialization structure.
Definition: sl_iec60730.h:873
+
iec60730_ImcInit
void iec60730_ImcInit(imcParams_t *params)
+
check_sum
crc_t check_sum
+
iec60730_TestPassed
@ iec60730_TestPassed
test result passed
Definition: sl_iec60730.h:261
+
vmcParams_t
This structure is used as configuration for VMC testing.
Definition: sl_iec60730.h:1023
+
iec60730_LeSense0Fail
@ iec60730_LeSense0Fail
LESENSE0 detected a failure.
Definition: sl_iec60730.h:282
+
iec60730_TestResult_t
iec60730_TestResult_t
The result of a test.
Definition: sl_iec60730.h:259
+
iec60730_TestFailure_t
iec60730_TestFailure_t
Cause of failure passed to Safe State function.
Definition: sl_iec60730.h:266
+
iec60730_VmcInit
void iec60730_VmcInit(vmcParams_t *params)
+
iec60730_OEMFail_3
@ iec60730_OEMFail_3
OEM defined failure.
Definition: sl_iec60730.h:295
+ +
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IEC_60730 +
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sl_iec60730_comm.h File Reference
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Comm check. +More...

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Go to the source code of this file.

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Detailed Description

+

Comm check.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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sl_iec60730_comm.h
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1 /***************************************************************************/
+
18 #ifndef __IEC60730_COMM_H__
+
19 #define __IEC60730_COMM_H__
+
20 
+
21 #ifdef __cplusplus
+
22 extern "C" {
+
23 #endif /* __cplusplus */
+
24 
+
25 /**************************************************************************/
+
109 #ifdef __cplusplus
+
110 }
+
111 #endif /* __cplusplus */
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112 
+
113 #endif /* __IEC60730_COMM_H__ */
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sl_iec60730_cpu_registers.h File Reference
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CPU Registers check. +More...

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#include "sl_iec60730_internal.h"
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+Functions

iec60730_TestResult_t iec60730_CpuRegistersBist (void)
 
iec60730_TestResult_t iec60730_CpuRegistersPost (void)
 
iec60730_TestResult_t iec60730_CpuRegistersCore (void)
 
iec60730_TestResult_t iec60730_CpuRegistersMSP (void)
 
iec60730_TestResult_t iec60730_CpuRegistersPSP (void)
 
iec60730_TestResult_t iec60730_CpuRegistersControl (void)
 
iec60730_TestResult_t iec60730_CpuRegistersPriMask (void)
 
iec60730_TestResult_t iec60730_CpuRegistersBasePri (void)
 
iec60730_TestResult_t iec60730_CpuRegistersFaultMask (void)
 
+

Detailed Description

+

CPU Registers check.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__cpu__registers_8h__dep__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__cpu__registers_8h__dep__incl.dot new file mode 100644 index 00000000..1c653f8f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__cpu__registers_8h__dep__incl.dot @@ -0,0 +1,13 @@ +digraph "Lib/inc/sl_iec60730_cpu_registers.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/iec60730_cpu\l_registers.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="CPU Registers check."]; + Node1 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Lib/inc/sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__internal_8h.html",tooltip="Internal definitions."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="Lib/inc/iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__programme__counter_8h.html",tooltip="Program Counter check."]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__cpu__registers_8h__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__cpu__registers_8h__incl.dot new file mode 100644 index 00000000..4e50de5b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__cpu__registers_8h__incl.dot @@ -0,0 +1,37 @@ +digraph "Lib/inc/sl_iec60730_cpu_registers.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/iec60730_cpu\l_registers.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="CPU Registers check."]; + Node1 -> Node2 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__internal_8h.html",tooltip="Internal definitions."]; + Node2 -> Node3 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="stdbool.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node2 -> Node4 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="stdint.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node2 -> Node5 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="sl_iec60730.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730_8h.html",tooltip="Library definitions."]; + Node5 -> Node6 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="si_toolchain.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node7 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node7 [label="oem_iec60730.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node2 -> Node8 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node8 [label="sl_iec60730_watchdog.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__watchdog_8h.html",tooltip="Watchdog check."]; + Node2 -> Node9 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node9 [label="iec60730_invariable\l_memory.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__invariable__memory_8h.html",tooltip="Invariable memory check."]; + Node9 -> Node5 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node10 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node10 [label="sl_iec60730_variable_memory.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__variable__memory_8h.html",tooltip="Variable memory check."]; + Node2 -> Node1 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node11 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node11 [label="sl_iec60730_system_clock.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__system__clock_8h.html",tooltip="Clock check."]; + Node11 -> Node6 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node12 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node12 [label="iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__programme__counter_8h.html",tooltip="Program Counter check."]; + Node12 -> Node2 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node13 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node13 [label="sl_iec60730_irq.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__irq_8h.html",tooltip="Interrupt check."]; + Node13 -> Node6 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node7 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__cpu__registers_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__cpu__registers_8h_source.html new file mode 100644 index 00000000..b97d0fc0 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__cpu__registers_8h_source.html @@ -0,0 +1,267 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_cpu_registers.h Source File + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_cpu_registers.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 #ifndef IEC60730_CPU_REGISTERS_H_
+
19 #define IEC60730_CPU_REGISTERS_H_
+
20 
+
21 #ifdef __cplusplus
+
22 extern "C" {
+
23 #endif /* __cplusplus */
+
24 
+
25 #include "sl_iec60730_internal.h"
+
26 
+
27 /**************************************************************************/
+
91 /**************************************************************************/
+
100 iec60730_TestResult_t iec60730_CpuRegistersBist(void);
+
101 
+
102 /**************************************************************************/
+
109 iec60730_TestResult_t iec60730_CpuRegistersPost(void);
+
110 
+
111 /**************************************************************************/
+
122 iec60730_TestResult_t iec60730_CpuRegistersCore(void);
+
123 
+
124 /**************************************************************************/
+
138 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
139  && (__TZ_PRESENT == 1)) \
+
140  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
141 iec60730_TestResult_t iec60730_CpuRegistersMSP_NS(void);
+
142 #endif
+
143 
+
144 /**************************************************************************/
+
158 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
159  && (__TZ_PRESENT == 1)) \
+
160  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
161 iec60730_TestResult_t iec60730_CpuRegistersMSP_S(void);
+
162 #endif
+
163 
+
164 /**************************************************************************/
+
177 #if (IEC60370_CPU == IEC60370_CM4)
+
178 iec60730_TestResult_t iec60730_CpuRegistersMSP(void);
+
179 #endif
+
180 
+
181 /**************************************************************************/
+
195 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
196  && (__TZ_PRESENT == 1)) \
+
197  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
198 iec60730_TestResult_t iec60730_CpuRegistersPSP_NS(void);
+
199 #endif
+
200 
+
201 /**************************************************************************/
+
215 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
216  && (__TZ_PRESENT == 1)) \
+
217  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
218 iec60730_TestResult_t iec60730_CpuRegistersPSP_S(void);
+
219 #endif
+
220 
+
221 /**************************************************************************/
+
234 #if (IEC60370_CPU == IEC60370_CM4)
+
235 iec60730_TestResult_t iec60730_CpuRegistersPSP(void);
+
236 #endif
+
237 
+
238 /**************************************************************************/
+
252 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
253  && (__TZ_PRESENT == 1)) \
+
254  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
255 iec60730_TestResult_t iec60730_CpuRegistersMSPLim_NS(void);
+
256 #endif
+
257 
+
258 /**************************************************************************/
+
272 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
273  && (__TZ_PRESENT == 1)) \
+
274  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
275 iec60730_TestResult_t iec60730_CpuRegistersMSPLim_S(void);
+
276 #endif
+
277 
+
278 /**************************************************************************/
+
292 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
293  && (__TZ_PRESENT == 1)) \
+
294  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
295 iec60730_TestResult_t iec60730_CpuRegistersPSPLim_NS(void);
+
296 #endif
+
297 
+
298 /**************************************************************************/
+
312 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
313  && (__TZ_PRESENT == 1)) \
+
314  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
315 iec60730_TestResult_t iec60730_CpuRegistersPSPLim_S(void);
+
316 #endif
+
317 
+
318 /**************************************************************************/
+
330 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
331  && (__TZ_PRESENT == 1)) \
+
332  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
333 iec60730_TestResult_t iec60730_CpuRegistersControl_NS(void);
+
334 #endif
+
335 
+
336 /**************************************************************************/
+
348 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
349  && (__TZ_PRESENT == 1)) \
+
350  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
351 iec60730_TestResult_t iec60730_CpuRegistersControl_S(void);
+
352 #endif
+
353 
+
354 /**************************************************************************/
+
365 #if (IEC60370_CPU == IEC60370_CM4)
+
366 iec60730_TestResult_t iec60730_CpuRegistersControl(void);
+
367 #endif
+
368 
+
369 /**************************************************************************/
+
381 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
382  && (__TZ_PRESENT == 1)) \
+
383  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
384 iec60730_TestResult_t iec60730_CpuRegistersPriMask_NS(void);
+
385 #endif
+
386 
+
387 /**************************************************************************/
+
399 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
400  && (__TZ_PRESENT == 1)) \
+
401  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
402 iec60730_TestResult_t iec60730_CpuRegistersPriMask_S(void);
+
403 #endif
+
404 
+
405 /**************************************************************************/
+
416 #if (IEC60370_CPU == IEC60370_CM4)
+
417 iec60730_TestResult_t iec60730_CpuRegistersPriMask(void);
+
418 #endif
+
419 
+
420 /**************************************************************************/
+
432 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
433  && (__TZ_PRESENT == 1)) \
+
434  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
435 iec60730_TestResult_t iec60730_CpuRegistersBasePri_NS(void);
+
436 #endif
+
437 
+
438 /**************************************************************************/
+
450 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
451  && (__TZ_PRESENT == 1)) \
+
452  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
453 iec60730_TestResult_t iec60730_CpuRegistersBasePri_S(void);
+
454 #endif
+
455 
+
456 /**************************************************************************/
+
467 #if (IEC60370_CPU == IEC60370_CM4)
+
468 iec60730_TestResult_t iec60730_CpuRegistersBasePri(void);
+
469 #endif
+
470 
+
471 /**************************************************************************/
+
483 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
484  && (__TZ_PRESENT == 1)) \
+
485  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
486 iec60730_TestResult_t iec60730_CpuRegistersFaultMask_NS(void);
+
487 #endif
+
488 
+
489 /**************************************************************************/
+
501 #if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \
+
502  && (__TZ_PRESENT == 1)) \
+
503  && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
504 iec60730_TestResult_t iec60730_CpuRegistersFaultMask_S(void);
+
505 #endif
+
506 
+
507 /**************************************************************************/
+
518 #if (IEC60370_CPU == IEC60370_CM4)
+
519 iec60730_TestResult_t iec60730_CpuRegistersFaultMask(void);
+
520 #endif
+
521 
+
522 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) \
+
523  && (defined(__FPU_USED) && (__FPU_USED == 1U)))
+
524 /**************************************************************************/
+
536 iec60730_TestResult_t iec60730_CpuRegistersFPU_FPSCR(void);
+
537 
+
538 /**************************************************************************/
+
550 iec60730_TestResult_t iec60730_CpuRegistersFPU_FPSx(void);
+
551 #endif // ((defined (__FPU_PRESENT) && (__FPU_USED == 1U))
+
552 
+
556 #ifdef __cplusplus
+
557 }
+
558 #endif /* __cplusplus */
+
559 
+
560 #endif /* IEC60730_CPU_REGISTERS_H_ */
+
+
iec60730_CpuRegistersBasePri
iec60730_TestResult_t iec60730_CpuRegistersBasePri(void)
+
iec60730_CpuRegistersMSP
iec60730_TestResult_t iec60730_CpuRegistersMSP(void)
+
iec60730_CpuRegistersPSP
iec60730_TestResult_t iec60730_CpuRegistersPSP(void)
+
iec60730_CpuRegistersBist
iec60730_TestResult_t iec60730_CpuRegistersBist(void)
+
iec60730_CpuRegistersPriMask
iec60730_TestResult_t iec60730_CpuRegistersPriMask(void)
+
iec60730_CpuRegistersCore
iec60730_TestResult_t iec60730_CpuRegistersCore(void)
+
iec60730_CpuRegistersControl
iec60730_TestResult_t iec60730_CpuRegistersControl(void)
+
sl_iec60730_internal.h
Internal definitions.
+
iec60730_CpuRegistersFaultMask
iec60730_TestResult_t iec60730_CpuRegistersFaultMask(void)
+
iec60730_TestResult_t
iec60730_TestResult_t
The result of a test.
Definition: sl_iec60730.h:259
+
iec60730_CpuRegistersPost
iec60730_TestResult_t iec60730_CpuRegistersPost(void)
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h.html new file mode 100644 index 00000000..20f0afbc --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h.html @@ -0,0 +1,112 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_internal.h File Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_internal.h File Reference
+
+
+ +

Internal definitions. +More...

+
#include <stdbool.h>
+#include <stdint.h>
+#include "sl_iec60730.h"
+#include "sl_iec60730_watchdog.h"
+#include "sl_iec60730_invariable_memory.h"
+#include "sl_iec60730_variable_memory.h"
+#include "sl_iec60730_cpu_registers.h"
+#include "sl_iec60730_system_clock.h"
+#include "iec60730_programme_counter.h"
+#include "sl_iec60730_irq.h"
+#include "oem_iec60730.h"
+
+Include dependency graph for sl_iec60730_internal.h:
+
+
+
+
+This graph shows which files directly or indirectly include this file:
+
+
+
+
+

Go to the source code of this file.

+

Detailed Description

+

Internal definitions.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h__dep__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h__dep__incl.dot new file mode 100644 index 00000000..ad25595c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h__dep__incl.dot @@ -0,0 +1,13 @@ +digraph "Lib/inc/sl_iec60730_internal.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Internal definitions."]; + Node1 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Lib/inc/iec60730_cpu\l_registers.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__cpu__registers_8h.html",tooltip="CPU Registers check."]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node1 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="Lib/inc/iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__programme__counter_8h.html",tooltip="Program Counter check."]; + Node3 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h__incl.dot new file mode 100644 index 00000000..64df035b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h__incl.dot @@ -0,0 +1,37 @@ +digraph "Lib/inc/sl_iec60730_internal.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Internal definitions."]; + Node1 -> Node2 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="stdbool.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node3 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="stdint.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node4 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="sl_iec60730.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730_8h.html",tooltip="Library definitions."]; + Node4 -> Node5 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="si_toolchain.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node4 -> Node6 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="oem_iec60730.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node1 -> Node7 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node7 [label="sl_iec60730_watchdog.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__watchdog_8h.html",tooltip="Watchdog check."]; + Node1 -> Node8 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node8 [label="iec60730_invariable\l_memory.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__invariable__memory_8h.html",tooltip="Invariable memory check."]; + Node8 -> Node4 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node1 -> Node9 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node9 [label="sl_iec60730_variable_memory.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__variable__memory_8h.html",tooltip="Variable memory check."]; + Node1 -> Node10 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node10 [label="sl_iec60730_cpu_registers.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__cpu__registers_8h.html",tooltip="CPU Registers check."]; + Node10 -> Node1 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node1 -> Node11 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node11 [label="sl_iec60730_system_clock.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__system__clock_8h.html",tooltip="Clock check."]; + Node11 -> Node5 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node1 -> Node12 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node12 [label="iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__programme__counter_8h.html",tooltip="Program Counter check."]; + Node12 -> Node1 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node1 -> Node13 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node13 [label="sl_iec60730_irq.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__irq_8h.html",tooltip="Interrupt check."]; + Node13 -> Node5 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node1 -> Node6 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h_source.html new file mode 100644 index 00000000..2cb0a609 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h_source.html @@ -0,0 +1,131 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_internal.h Source File + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_internal.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 #ifndef __IEC60730_INTERNAL_H__
+
19 #define __IEC60730_INTERNAL_H__
+
20 
+
21 // Standard libraries
+
22 #include <stdbool.h>
+
23 #include <stdint.h>
+
24 
+
25 // Header files needed for publics
+
26 #include "sl_iec60730.h"
+
27 
+
28 // Header files needed for privates
+
29 #include "sl_iec60730_watchdog.h"
+
30 #include "sl_iec60730_invariable_memory.h"
+
31 #include "sl_iec60730_variable_memory.h"
+
32 #include "sl_iec60730_cpu_registers.h"
+
33 #include "sl_iec60730_system_clock.h"
+
34 #include "iec60730_programme_counter.h"
+
35 #include "sl_iec60730_irq.h"
+
36 #include "oem_iec60730.h"
+
37 
+<<<<<<< HEAD:docs/html/EFR32_ICE60730_Libraries/iec60730__internal_8h_source.html +
38 // These macros should be defined in oem_iec60730.h by OEM, otherwise default definition will be used.
+
39 #if (!defined(SL_IEC60370_ENTER_ATOMIC) || !defined(SL_IEC60370_EXIT_ATOMIC))
+
40 #define SL_IEC60370_ENTER_ATOMIC() __disable_irq()
+
41 #define SL_IEC60370_EXIT_ATOMIC() __enable_irq()
+
42 #define SL_IEC60370_DECLARE_IRQ_STATE
+======= +
38 // These macros should be defined in iec60730_oem.h by OEM, otherwise default definition will be used.
+
39 #if (!defined(IEC60370_ENTER_ATOMIC) || !defined(IEC60370_EXIT_ATOMIC))
+
40 #define IEC60370_ENTER_ATOMIC() __disable_irq()
+
41 #define IEC60370_EXIT_ATOMIC() __enable_irq()
+
42 #define IEC60370_DECLARE_IRQ_STATE
+>>>>>>> develop:Doc/html/EFR32_ICE60730_Libraries/iec60730__internal_8h_source.html +
43 #endif
+
44 
+
45 // Disable warnings on unused labels. Labels are used to set breakpoints for
+
46 // automated testing.
+
47 #if defined(__GNUC__)
+
48 #pragma GCC diagnostic ignored "-Wunused-label"
+
49 #endif
+
50 
+
51 #endif /* __IEC60730_INTERNAL_H__ */
+
+
sl_iec60730_cpu_registers.h
CPU Registers check.
+
sl_iec60730_irq.h
Interrupt check.
+
sl_iec60730_watchdog.h
Watchdog check.
+
iec60730_programme_counter.h
Program Counter check.
+
sl_iec60730_variable_memory.h
Variable memory check.
+
sl_iec60730_system_clock.h
Clock check.
+
sl_iec60730_invariable_memory.h
Invariable memory check.
+
sl_iec60730.h
Library definitions.
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h.html new file mode 100644 index 00000000..01ca746e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h.html @@ -0,0 +1,124 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_invariable_memory.h File Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Macros | +Functions
+
+
sl_iec60730_invariable_memory.h File Reference
+
+
+ +

Invariable memory check. +More...

+
#include "sl_iec60730.h"
+
+Include dependency graph for sl_iec60730_invariable_memory.h:
+
+
+
+
+This graph shows which files directly or indirectly include this file:
+
+
+
+
+

Go to the source code of this file.

+ + + + + + + + +

+Macros

+#define IMC_INIT_VALUE   (0x0000)
 
+#define IMC_XOROUTPUT   (0x0000)
 
#define IMC_INIT_DEFAULT
 
+ + + + + +

+Functions

iec60730_TestResult_t iec60730_ImcPost (imcParams_t *params)
 
iec60730_TestResult_t iec60730_ImcBist (imcParams_t *params)
 
+

Detailed Description

+

Invariable memory check.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h__dep__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h__dep__incl.dot new file mode 100644 index 00000000..e74f14d7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h__dep__incl.dot @@ -0,0 +1,15 @@ +digraph "Lib/inc/sl_iec60730_invariable_memory.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/iec60730_invariable\l_memory.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Invariable memory check."]; + Node1 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Lib/inc/sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__internal_8h.html",tooltip="Internal definitions."]; + Node2 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="Lib/inc/iec60730_cpu\l_registers.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__cpu__registers_8h.html",tooltip="CPU Registers check."]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="Lib/inc/iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__programme__counter_8h.html",tooltip="Program Counter check."]; + Node4 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h__incl.dot new file mode 100644 index 00000000..b5d3f680 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h__incl.dot @@ -0,0 +1,13 @@ +digraph "Lib/inc/sl_iec60730_invariable_memory.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/iec60730_invariable\l_memory.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Invariable memory check."]; + Node1 -> Node2 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="sl_iec60730.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730_8h.html",tooltip="Library definitions."]; + Node2 -> Node3 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="si_toolchain.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node2 -> Node4 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="oem_iec60730.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h_source.html new file mode 100644 index 00000000..14d2b8f7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__invariable__memory_8h_source.html @@ -0,0 +1,155 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_invariable_memory.h Source File + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_invariable_memory.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 #ifndef IEC60730_INVARIABLE_MEMORY_H_
+
19 #define IEC60730_INVARIABLE_MEMORY_H_
+
20 
+
21 #ifdef __cplusplus
+
22 extern "C" {
+
23 #endif /* __cplusplus */
+
24 
+
25 #include "sl_iec60730.h"
+
26 #include IEC_BOARD_HEADER
+
27 
+
28 /**************************************************************************/
+
198 #ifdef DOXYGEN
+
199 
+
201 #define CRC_DEBUG
+
202 
+
205 #define CRC_USE_SW
+
206 
+
209 #define SW_CRC_TABLE
+
210 
+
213 #define USE_CRC_32
+
214 
+
219 #define IMC_INIT_VALUE
+
220 
+
226 #define IMC_XOROUTPUT
+
227 
+
231 #define IMC_INIT_DEFAULT
+
232 
+
233 #else
+
234 
+
235 #ifdef USE_CRC_32
+
236 #define IMC_INIT_VALUE (0xFFFFFFFFuL)
+
237 #define IMC_XOROUTPUT (0xFFFFFFFFuL)
+
238 #define IMC_INIT_DEFAULT \
+
239  { \
+
240  0x04C11DB7UL, /* CRC32 Polynomial value. */ \
+
241  IMC_INIT_VALUE, /* Initialization value. */ \
+
242  false, /* Byte order is normal. */ \
+
243  false, /* Bit order is not reversed on output. */ \
+
244  false, /* Disable byte mode. */ \
+
245  false, /* Disable automatic initialization on data read. */ \
+
246  true, /* Enable GPCRC. */ \
+
247  }
+
248 #else /* !USE_CRC_32 */
+
249 #define IMC_INIT_VALUE (0x0000)
+
250 #define IMC_XOROUTPUT (0x0000)
+
251 #define IMC_INIT_DEFAULT \
+
252  { \
+
253  0x1021UL, \
+
254  IMC_INIT_VALUE, \
+
255  false, \
+
256  true, \
+
257  false, \
+
258  false, \
+
259  true, \
+
260  }
+
261 #endif /* USE_CRC_32 */
+
262 #endif // DOXYGEN
+
263 
+
264 /**************************************************************************/
+
275 iec60730_TestResult_t iec60730_ImcPost(imcParams_t *params);
+
276 
+
277 /**************************************************************************/
+
292 iec60730_TestResult_t iec60730_ImcBist(imcParams_t *params);
+
293 
+
296 #ifdef __cplusplus
+
297 }
+
298 #endif /* __cplusplus */
+
299 
+
300 #endif /* IEC60730_INVARIABLE_MEMORY_H_ */
+
+
iec60730_ImcBist
iec60730_TestResult_t iec60730_ImcBist(imcParams_t *params)
+
iec60730_ImcPost
iec60730_TestResult_t iec60730_ImcPost(imcParams_t *params)
+
imcParams_t
This structure is used as configuration for IMC testing, that holds GPCRC Register.
Definition: sl_iec60730.h:863
+
sl_iec60730.h
Library definitions.
+
iec60730_TestResult_t
iec60730_TestResult_t
The result of a test.
Definition: sl_iec60730.h:259
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h.html new file mode 100644 index 00000000..7a04009c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h.html @@ -0,0 +1,110 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_irq.h File Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Functions
+
+
sl_iec60730_irq.h File Reference
+
+
+ +

Interrupt check. +More...

+
#include <si_toolchain.h>
+
+Include dependency graph for sl_iec60730_irq.h:
+
+
+
+
+This graph shows which files directly or indirectly include this file:
+
+
+
+
+

Go to the source code of this file.

+ + + + +

+Functions

void iec60730_IRQCheck (void)
 
+

Detailed Description

+

Interrupt check.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h__dep__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h__dep__incl.dot new file mode 100644 index 00000000..31f30a5e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h__dep__incl.dot @@ -0,0 +1,15 @@ +digraph "Lib/inc/sl_iec60730_irq.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/sl_iec60730_irq.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Interrupt check."]; + Node1 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Lib/inc/sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__internal_8h.html",tooltip="Internal definitions."]; + Node2 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="Lib/inc/iec60730_cpu\l_registers.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__cpu__registers_8h.html",tooltip="CPU Registers check."]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="Lib/inc/iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__programme__counter_8h.html",tooltip="Program Counter check."]; + Node4 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h__incl.dot new file mode 100644 index 00000000..f4ac37e8 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h__incl.dot @@ -0,0 +1,9 @@ +digraph "Lib/inc/sl_iec60730_irq.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/sl_iec60730_irq.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Interrupt check."]; + Node1 -> Node2 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="si_toolchain.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h_source.html new file mode 100644 index 00000000..d840d680 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__irq_8h_source.html @@ -0,0 +1,100 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_irq.h Source File + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_irq.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 #ifndef __IEC60730_IRQ_H__
+
19 #define __IEC60730_IRQ_H__
+
20 
+
21 #include <si_toolchain.h>
+
22 
+
23 #ifdef __cplusplus
+
24 extern "C" {
+
25 #endif /* __cplusplus */
+
26 
+
27 /**************************************************************************/
+
114 /**************************************************************************/
+
126 void iec60730_IRQCheck(void);
+
127 
+
131 #ifdef __cplusplus
+
132 }
+
133 #endif /* __cplusplus */
+
134 
+
135 #endif /* __IEC60730_IRQ_H__ */
+
+
iec60730_IRQCheck
void iec60730_IRQCheck(void)
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__library__documentation_8h.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__library__documentation_8h.html new file mode 100644 index 00000000..007daa10 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__library__documentation_8h.html @@ -0,0 +1,91 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_library_documentation.h File Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_library_documentation.h File Reference
+
+
+ +

Library Documentation. +More...

+ +

Go to the source code of this file.

+

Detailed Description

+

Library Documentation.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__library__documentation_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__library__documentation_8h_source.html new file mode 100644 index 00000000..e726a6ce --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__library__documentation_8h_source.html @@ -0,0 +1,102 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_library_documentation.h Source File + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_library_documentation.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 // This file is a centralized location for documentation on OEM functions.
+
19 // It contains no source.
+
20 
+
21 /**************************************************************************/
+
514 /**************************************************************************/
+
519 /**************************************************************************/
+
526 /**************************************************************************/
+
544 /**************************************************************************/
+
551 /**************************************************************************/
+
558 /**************************************************************************/
+
565 /**************************************************************************/
+
572 /**************************************************************************/
+
579 /**************************************************************************/
+
586 /**************************************************************************/
+
593 /**************************************************************************/
+
600 /**************************************************************************/
+
607 /**************************************************************************/
+
614 /**************************************************************************/
+
621 /**************************************************************************/
+
628 /**************************************************************************/
+
635 /**************************************************************************/
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__oem__documentation_8h.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__oem__documentation_8h.html new file mode 100644 index 00000000..55cf3a51 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__oem__documentation_8h.html @@ -0,0 +1,91 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_oem_documentation.h File Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_oem_documentation.h File Reference
+
+
+ +

OEM documentation. +More...

+ +

Go to the source code of this file.

+

Detailed Description

+

OEM documentation.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__oem__documentation_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__oem__documentation_8h_source.html new file mode 100644 index 00000000..9e73e60e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__oem__documentation_8h_source.html @@ -0,0 +1,101 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_oem_documentation.h Source File + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_oem_documentation.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 // This file is a centralized location for documentation on OEM functions.
+
19 // It contains no source.
+
20 
+
21 /**************************************************************************/
+
32 /**************************************************************************/
+
42 /**************************************************************************/
+
57 /**************************************************************************/
+
66 /**************************************************************************/
+
80 /**************************************************************************/
+
84 #ifdef DOXYGEN
+
85 #define TESTCLK
+
86 #define SYSCLK
+
87 #define IEC_TEST_TIMER_OVERFLOW_FREQUENCY
+
88 #define IEC_SYSTEM_TIMER_OVERFLOW_FREQUENCY
+
89 #define IEC_TEST_TIMER_OVERFLOW
+
90 #define IEC_SYSTEM_TIMER_OVERFLOW
+
91 #else
+
92 // Actual definitions for macros are in device-specific demo files.
+
93 #endif
+
94 
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h.html new file mode 100644 index 00000000..63843170 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h.html @@ -0,0 +1,110 @@ + + + + + + + +IEC_60730: Lib/inc/iec60730_programme_counter.h File Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Functions
+
+
iec60730_programme_counter.h File Reference
+
+
+ +

Program Counter check. +More...

+
#include "sl_iec60730_internal.h"
+
+Include dependency graph for iec60730_programme_counter.h:
+
+
+
+
+This graph shows which files directly or indirectly include this file:
+
+
+
+
+

Go to the source code of this file.

+ + + + +

+Functions

void iec60730_programmeCounterTest (void)
 
+

Detailed Description

+

Program Counter check.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h__dep__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h__dep__incl.dot new file mode 100644 index 00000000..c4a17330 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h__dep__incl.dot @@ -0,0 +1,13 @@ +digraph "Lib/inc/iec60730_programme_counter.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Program Counter check."]; + Node1 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Lib/inc/sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__internal_8h.html",tooltip="Internal definitions."]; + Node2 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="Lib/inc/iec60730_cpu\l_registers.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__cpu__registers_8h.html",tooltip="CPU Registers check."]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h__incl.dot new file mode 100644 index 00000000..65bd0a08 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h__incl.dot @@ -0,0 +1,37 @@ +digraph "Lib/inc/iec60730_programme_counter.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Program Counter check."]; + Node1 -> Node2 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__internal_8h.html",tooltip="Internal definitions."]; + Node2 -> Node3 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="stdbool.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node2 -> Node4 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="stdint.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node2 -> Node5 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="sl_iec60730.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730_8h.html",tooltip="Library definitions."]; + Node5 -> Node6 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="si_toolchain.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node5 -> Node7 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node7 [label="oem_iec60730.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node2 -> Node8 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node8 [label="sl_iec60730_watchdog.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__watchdog_8h.html",tooltip="Watchdog check."]; + Node2 -> Node9 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node9 [label="iec60730_invariable\l_memory.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__invariable__memory_8h.html",tooltip="Invariable memory check."]; + Node9 -> Node5 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node10 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node10 [label="sl_iec60730_variable_memory.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__variable__memory_8h.html",tooltip="Variable memory check."]; + Node2 -> Node11 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node11 [label="sl_iec60730_cpu_registers.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__cpu__registers_8h.html",tooltip="CPU Registers check."]; + Node11 -> Node2 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node12 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node12 [label="sl_iec60730_system_clock.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__system__clock_8h.html",tooltip="Clock check."]; + Node12 -> Node6 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node1 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node13 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node13 [label="sl_iec60730_irq.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__irq_8h.html",tooltip="Interrupt check."]; + Node13 -> Node6 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node7 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h_source.html new file mode 100644 index 00000000..e97e2665 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__programme__counter_8h_source.html @@ -0,0 +1,100 @@ + + + + + + + +IEC_60730: Lib/inc/iec60730_programme_counter.h Source File + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
iec60730_programme_counter.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 #ifndef __IEC60730_PROGRAMME_COUNTER_H__
+
19 #define __IEC60730_PROGRAMME_COUNTER_H__
+
20 
+
21 #ifdef __cplusplus
+
22 extern "C" {
+
23 #endif /* __cplusplus */
+
24 
+
25 #include "sl_iec60730_internal.h"
+
26 
+
27 /**************************************************************************/
+
74 void iec60730_programmeCounterTest(void);
+
81 
+
85 #ifdef __cplusplus
+
86 }
+
87 #endif /* __cplusplus */
+
88 
+
89 #endif /* __IEC60730_PROGRAMME_COUNTER_H__ */
+
+
sl_iec60730_internal.h
Internal definitions.
+
iec60730_programmeCounterTest
void iec60730_programmeCounterTest(void)
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h.html new file mode 100644 index 00000000..5c8698b8 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h.html @@ -0,0 +1,118 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_system_clock.h File Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Macros | +Functions
+
+
sl_iec60730_system_clock.h File Reference
+
+
+ +

Clock check. +More...

+
#include <si_toolchain.h>
+
+Include dependency graph for sl_iec60730_system_clock.h:
+
+
+
+
+This graph shows which files directly or indirectly include this file:
+
+
+
+
+

Go to the source code of this file.

+ + + + + +

+Macros

+#define TEST_CLOCK_MULTIPLIER   10
 Determines how many entrances into iec60730_TestClockTick() occur before bist frequency test executes.
 
+ + + +

+Functions

 SI_SEGMENT_VARIABLE (iec60730_systemClockCounter, uint8_t, SI_SEG_DATA)
 
+

Detailed Description

+

Clock check.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h__dep__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h__dep__incl.dot new file mode 100644 index 00000000..a30df45e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h__dep__incl.dot @@ -0,0 +1,15 @@ +digraph "Lib/inc/sl_iec60730_system_clock.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/iec60730_system\l_clock.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Clock check."]; + Node1 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Lib/inc/sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__internal_8h.html",tooltip="Internal definitions."]; + Node2 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="Lib/inc/iec60730_cpu\l_registers.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__cpu__registers_8h.html",tooltip="CPU Registers check."]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="Lib/inc/iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__programme__counter_8h.html",tooltip="Program Counter check."]; + Node4 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h__incl.dot new file mode 100644 index 00000000..01f72907 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h__incl.dot @@ -0,0 +1,9 @@ +digraph "Lib/inc/sl_iec60730_system_clock.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/iec60730_system\l_clock.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Clock check."]; + Node1 -> Node2 [color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="si_toolchain.h",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h_source.html new file mode 100644 index 00000000..57e7972e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__system__clock_8h_source.html @@ -0,0 +1,101 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_system_clock.h Source File + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_system_clock.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 #ifndef __IEC60730_SYSTEM_CLOCK_H__
+
19 #define __IEC60730_SYSTEM_CLOCK_H__
+
20 
+
21 #include <si_toolchain.h>
+
22 
+
23 #ifdef __cplusplus
+
24 extern "C" {
+
25 #endif /* __cplusplus */
+
26 
+
27 /**************************************************************************/
+
119 extern SI_SEGMENT_VARIABLE(iec60730_systemClockCounter, uint8_t, SI_SEG_DATA);
+
122 
+
124 #define TEST_CLOCK_MULTIPLIER 10
+
125 
+
129 #ifdef __cplusplus
+
130 }
+
131 #endif /* __cplusplus */
+
132 
+
133 #endif /* __IEC60730_SYSTEM_CLOCK_H__ */
+
+
SI_SEGMENT_VARIABLE
SI_SEGMENT_VARIABLE(iec60730_systemClockCounter, uint8_t, SI_SEG_DATA)
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__variable__memory_8h.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__variable__memory_8h.html new file mode 100644 index 00000000..2b59fcea --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__variable__memory_8h.html @@ -0,0 +1,106 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_variable_memory.h File Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
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+
+
+Functions
+
+
sl_iec60730_variable_memory.h File Reference
+
+
+ +

Variable memory check. +More...

+
+This graph shows which files directly or indirectly include this file:
+
+
+
+
+

Go to the source code of this file.

+ + + + + + +

+Functions

iec60730_TestResult_t iec60730_VmcPost (vmcParams_t *params)
 
iec60730_TestResult_t iec60730_VmcBist (vmcParams_t *params)
 
+

Detailed Description

+

Variable memory check.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__variable__memory_8h__dep__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__variable__memory_8h__dep__incl.dot new file mode 100644 index 00000000..7f0aae8b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__variable__memory_8h__dep__incl.dot @@ -0,0 +1,15 @@ +digraph "Lib/inc/sl_iec60730_variable_memory.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/iec60730_variable\l_memory.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Variable memory check."]; + Node1 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Lib/inc/sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__internal_8h.html",tooltip="Internal definitions."]; + Node2 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="Lib/inc/iec60730_cpu\l_registers.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__cpu__registers_8h.html",tooltip="CPU Registers check."]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="Lib/inc/iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__programme__counter_8h.html",tooltip="Program Counter check."]; + Node4 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__variable__memory_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__variable__memory_8h_source.html new file mode 100644 index 00000000..f7fbac9a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__variable__memory_8h_source.html @@ -0,0 +1,123 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_variable_memory.h Source File + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_variable_memory.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 #ifndef IEC60730_VARIABLE_MEMORY_H_
+
19 #define IEC60730_VARIABLE_MEMORY_H_
+
20 
+
21 #ifdef __cplusplus
+
22 extern "C" {
+
23 #endif /* __cplusplus */
+
24 
+
25 #include IEC_BOARD_HEADER
+
26 
+
27 /**************************************************************************/
+
183 /**************************************************************************/
+
196 iec60730_TestResult_t iec60730_VmcPost(vmcParams_t *params);
+
197 
+
198 /**************************************************************************/
+
215 iec60730_TestResult_t iec60730_VmcBist(vmcParams_t *params);
+
216 
+
219 /**************************************************************************/
+
223 #ifdef DOXYGEN
+
224 
+
226 #define USE_MARCHX
+
227 
+
230 #define RAMTEST_START
+
231 
+
236 #define RAMTEST_END
+
237 
+
238 /**************************************************************************/
+
251 bool Vmc_PreRunMarchXC_Step(uint32_t *addr, uint32_t size);
+
252 
+
253 /**************************************************************************/
+
262 void Vmc_PostRunMarchXC_Step(uint32_t *addr, uint32_t size);
+
263 
+
264 #endif // DOXYGEN
+
265 
+
267 #ifdef __cplusplus
+
268 }
+
269 #endif /* __cplusplus */
+
270 
+
271 #endif /* IEC60730_VARIABLE_MEMORY_H_ */
+
+
iec60730_VmcBist
iec60730_TestResult_t iec60730_VmcBist(vmcParams_t *params)
+
iec60730_VmcPost
iec60730_TestResult_t iec60730_VmcPost(vmcParams_t *params)
+
vmcParams_t
This structure is used as configuration for VMC testing.
Definition: sl_iec60730.h:1023
+
iec60730_TestResult_t
iec60730_TestResult_t
The result of a test.
Definition: sl_iec60730.h:259
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__watchdog_8h.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__watchdog_8h.html new file mode 100644 index 00000000..c305257a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__watchdog_8h.html @@ -0,0 +1,212 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_watchdog.h File Reference + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Classes | +Macros | +Enumerations | +Functions
+
+
sl_iec60730_watchdog.h File Reference
+
+
+ +

Watchdog check. +More...

+
+This graph shows which files directly or indirectly include this file:
+
+
+
+
+

Go to the source code of this file.

+ + + + + +

+Classes

struct  iec60730_WatchDog_t
 Watchdog component configuration structure. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

+#define IEC60730_WDOGINST_NUMB   1
 
+#define IEC60730_ENABLE_WDOG0
 
+#define IEC60730_WDOG_WAIT_TIMEOUT   (uint32_t) 0x0000FFFFUL
 
#define WDG_INST_DEF()
 
+#define IEC60730_WDOG(numb)   iec60730_WdogInst_arr[numb].wdog
 
+#define IEC60730_WDOG_INST(n)   WDOG##n
 
+#define IEC60730_RST   RMU
 
+#define IEC60730_RSTCAUSE_POR   RMU_RSTCAUSE_PORST
 
+#define IEC60730_RSTCAUSE_EM4   RMU_RSTCAUSE_EM4RST
 
+#define IEC60730_RSTCAUSE_WDOG0   RMU_RSTCAUSE_WDOGRST
 
+#define IEC60730_RSTCAUSE_WDOG1   RMU_RSTCAUSE_WDOGRST
 
#define IEC60730_RSTCAUSES_CLEAR()
 
+#define IEC60730_RSTCAUSE   (IEC60730_RST->RSTCAUSE)
 
+#define IEC60730_RST_POR   (IEC60730_RSTCAUSE & IEC60730_RSTCAUSE_POR)
 
+#define IEC60730_RST_EM4   (IEC60730_RSTCAUSE & IEC60730_RSTCAUSE_EM4)
 
+#define IEC60730_RST_WDOG0   (IEC60730_RSTCAUSE & IEC60730_RSTCAUSE_WDOG0)
 
+#define IEC60730_RST_WDOG1   0
 
+#define IEC60730_RST_WDOGS   (IEC60730_RST_WDOG0 || IEC60730_RST_WDOG1)
 
+#define IEC60730_RST_WDOG(numb)   (IEC60730_RSTCAUSE & iec60730_WdogInst_arr[numb].rst)
 
#define IEC60730_RST_WDOG_CHECK(numb)
 
+#define IEC60730_WDOG_CONFIG(n)   {.wdog = IEC60730_WDOG_INST(n), .rst = IEC60730_RSTCAUSE_WDOG##n},
 
+#define IEC60730_CFG_WDOG0   IEC60730_WDOG_CONFIG(0)
 
+#define IEC60730_CFG_WDOG1
 
#define IEC60730_WDOG_CFGSET
 
+#define IEC60730_WDOG_EN_WAIT_DISABLING(numb)
 
#define IEC60730_SETWATCHDOGTIMEOUTMIN(numb)
 
+#define IEC60730_BURAM   BURAM
 
+#define IEC60730_BURAM_IDX   0UL
 
+#define IEC60730_BURAM_STATE_SHIFT   8UL
 
+#define IEC60730_BURAM_MASK   0xFFUL
 
+ + + + +

+Enumerations

enum  iec60730_TestWatchdog_t { iec60730_WatchdogInvalid = 0, +iec60730_WatchdogTesting = 1, +iec60730_WatchdogValid = 2 + }
 State of watchdog testing. More...
 
+ + + + + +

+Functions

volatile SI_SEGMENT_VARIABLE (iec60730_WatchdogState, iec60730_TestWatchdog_t, SI_SEG_DATA_RETAINED_NO_CLEAR)
 
iec60730_TestResult_t iec60730_WatchdogPost (void)
 
+

Detailed Description

+

Watchdog check.

+

+License

+

Copyright 2023 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__watchdog_8h__dep__incl.dot b/docs/html/EFR32_ICE60730_Libraries/iec60730__watchdog_8h__dep__incl.dot new file mode 100644 index 00000000..2512e941 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__watchdog_8h__dep__incl.dot @@ -0,0 +1,15 @@ +digraph "Lib/inc/sl_iec60730_watchdog.h" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="Lib/inc/sl_iec60730_watchdog.h",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip="Watchdog check."]; + Node1 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 [label="Lib/inc/sl_iec60730_internal.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__internal_8h.html",tooltip="Internal definitions."]; + Node2 -> Node3 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 [label="Lib/inc/iec60730_cpu\l_registers.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__cpu__registers_8h.html",tooltip="CPU Registers check."]; + Node3 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node2 -> Node4 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node4 [label="Lib/inc/iec60730_programme\l_counter.h",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$iec60730__programme__counter_8h.html",tooltip="Program Counter check."]; + Node4 -> Node2 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/iec60730__watchdog_8h_source.html b/docs/html/EFR32_ICE60730_Libraries/iec60730__watchdog_8h_source.html new file mode 100644 index 00000000..7027d609 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/iec60730__watchdog_8h_source.html @@ -0,0 +1,282 @@ + + + + + + + +IEC_60730: Lib/inc/sl_iec60730_watchdog.h Source File + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
sl_iec60730_watchdog.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 #ifndef __IEC60730_WATCHDOG_H__
+
19 #define __IEC60730_WATCHDOG_H__
+
20 
+
21 #ifdef __cplusplus
+
22 extern "C" {
+
23 #endif /* __cplusplus */
+
24 
+
25 /**************************************************************************/
+
110 typedef struct {
+
112  WDOG_TypeDef *const wdog;
+
113  const uint32_t rst;
+
114 } iec60730_WatchDog_t;
+
115 
+
117 typedef enum {
+
118  iec60730_WatchdogInvalid = 0,
+
119  iec60730_WatchdogTesting = 1,
+
120  iec60730_WatchdogValid = 2,
+
121 } iec60730_TestWatchdog_t;
+
122 
+
123 // Default configuration if IEC60730_WDOGINST_NUMB is not defined
+
124 #ifndef IEC60730_WDOGINST_NUMB
+
125 #if (_SILICON_LABS_32B_SERIES < 2) // Series 1
+
126 #define IEC60730_WDOGINST_NUMB 1
+
127 #define IEC60730_ENABLE_WDOG0
+
128 #else // Series 2
+
129 #define IEC60730_WDOGINST_NUMB 2
+
130 #define IEC60730_ENABLE_WDOG0
+
131 #define IEC60730_ENABLE_WDOG1
+
132 #endif
+
133 #endif
+
134 
+
135 #if (IEC60730_WDOGINST_NUMB == 0)
+
136 #error "Number of Watchdog cannot be zero!"
+
137 #endif
+
138 
+
139 #ifndef IEC60730_WDOG_WAIT_TIMEOUT
+
140 #define IEC60730_WDOG_WAIT_TIMEOUT (uint32_t) 0x0000FFFFUL
+
141 #endif
+
142 
+
143 #define WDG_INST_DEF() \
+
144  const iec60730_WatchDog_t iec60730_WdogInst_arr[IEC60730_WDOGINST_NUMB] = { \
+
145  IEC60730_WDOG_CFGSET}
+
146 #define IEC60730_WDOG(numb) iec60730_WdogInst_arr[numb].wdog
+
147 
+
148 #ifndef IEC60730_WDOG_INST
+
149 #ifdef IEC60730_NON_SECURE_EN
+
150 #define IEC60730_WDOG_INST(n) WDOG##n##_NS
+
151 #else
+
152 #define IEC60730_WDOG_INST(n) WDOG##n
+
153 #endif
+
154 #endif
+
155 
+
156 #if (_SILICON_LABS_32B_SERIES < 2)
+
157 #ifndef IEC60730_RST
+
158 #define IEC60730_RST RMU
+
159 #endif
+
160 #define IEC60730_RSTCAUSE_POR RMU_RSTCAUSE_PORST
+
161 #define IEC60730_RSTCAUSE_EM4 RMU_RSTCAUSE_EM4RST
+
162 #define IEC60730_RSTCAUSE_WDOG0 RMU_RSTCAUSE_WDOGRST
+
163 #define IEC60730_RSTCAUSE_WDOG1 RMU_RSTCAUSE_WDOGRST
+
164 #define IEC60730_RSTCAUSES_CLEAR() \
+
165  do { \
+
166  IEC60730_RST->CMD |= RMU_CMD_RCCLR; \
+
167  } while (0)
+
168 #else // Series 2 devices
+
169 #ifndef IEC60730_RST
+
170 #ifdef IEC60730_NON_SECURE_EN
+
171 #define IEC60730_RST EMU_NS
+
172 #else
+
173 #define IEC60730_RST EMU
+
174 #endif
+
175 #endif
+
176 
+
177 #define IEC60730_RSTCAUSE_POR EMU_RSTCAUSE_POR
+
178 #define IEC60730_RSTCAUSE_EM4 EMU_RSTCAUSE_EM4
+
179 #define IEC60730_RSTCAUSE_WDOG0 EMU_RSTCAUSE_WDOG0
+
180 #define IEC60730_RSTCAUSE_WDOG1 EMU_RSTCAUSE_WDOG1
+
181 #ifdef WDOG_HAS_SET_CLEAR
+
182 #define IEC60730_RSTCAUSES_CLEAR() \
+
183  do { \
+
184  IEC60730_RST->CMD_SET = EMU_CMD_RSTCAUSECLR; \
+
185  } while (0)
+
186 #else
+
187 #define IEC60730_RSTCAUSES_CLEAR() \
+
188  do { \
+
189  IEC60730_RST->CMD |= EMU_CMD_RSTCAUSECLR; \
+
190  } while (0)
+
191 #endif
+
192 #endif // (_SILICON_LABS_32B_SERIES < 2)
+
193 
+
194 #define IEC60730_RSTCAUSE (IEC60730_RST->RSTCAUSE)
+
195 #define IEC60730_RST_POR (IEC60730_RSTCAUSE & IEC60730_RSTCAUSE_POR)
+
196 #define IEC60730_RST_EM4 (IEC60730_RSTCAUSE & IEC60730_RSTCAUSE_EM4)
+
197 #ifdef IEC60730_ENABLE_WDOG0
+
198 #define IEC60730_RST_WDOG0 (IEC60730_RSTCAUSE & IEC60730_RSTCAUSE_WDOG0)
+
199 #else
+
200 #define IEC60730_RST_WDOG0 0
+
201 #endif
+
202 #ifdef IEC60730_ENABLE_WDOG1
+
203 #define IEC60730_RST_WDOG1 (IEC60730_RSTCAUSE & IEC60730_RSTCAUSE_WDOG1)
+
204 #else
+
205 #define IEC60730_RST_WDOG1 0
+
206 #endif
+
207 #define IEC60730_RST_WDOGS (IEC60730_RST_WDOG0 || IEC60730_RST_WDOG1)
+
208 
+
209 #define IEC60730_RST_WDOG(numb) \
+
210  (IEC60730_RSTCAUSE & iec60730_WdogInst_arr[numb].rst)
+
211 #define IEC60730_RST_WDOG_CHECK(numb) \
+
212  (IEC60730_RSTCAUSE & iec60730_WdogInst_arr[numb].rst) \
+
213  == iec60730_WdogInst_arr[numb].rst
+
214 
+
215 #define IEC60730_WDOG_CONFIG(n) \
+
216  {.wdog = IEC60730_WDOG_INST(n), .rst = IEC60730_RSTCAUSE_WDOG##n},
+
217 #ifdef IEC60730_ENABLE_WDOG0
+
218 #define IEC60730_CFG_WDOG0 IEC60730_WDOG_CONFIG(0)
+
219 #else
+
220 #define IEC60730_CFG_WDOG0
+
221 #endif
+
222 #ifdef IEC60730_ENABLE_WDOG1
+
223 #define IEC60730_CFG_WDOG1 IEC60730_WDOG_CONFIG(1)
+
224 #else
+
225 #define IEC60730_CFG_WDOG1
+
226 #endif
+
227 
+
228 #define IEC60730_WDOG_CFGSET \
+
229  IEC60730_CFG_WDOG0 \
+
230  IEC60730_CFG_WDOG1
+
231 
+
232 #if defined(_SILICON_LABS_32B_SERIES_2_CONFIG_4) \
+
233  || defined(_SILICON_LABS_32B_SERIES_2_CONFIG_3)
+
234 #define IEC60730_WDOG_EN_WAIT_DISABLING(numb) \
+
235  while ((iec60730_WdogInst_arr[numb].wdog->EN & WDOG_EN_DISABLING) != 0U) {}
+
236 #else
+
237 #define IEC60730_WDOG_EN_WAIT_DISABLING(numb)
+
238 #endif
+
239 
+
240 // Min value for PERSEL is zero
+
241 #if (_SILICON_LABS_32B_SERIES < 2)
+
242 #define IEC60730_SETWATCHDOGTIMEOUTMIN(numb) \
+
243  do { \
+
244  while ((iec60730_WdogInst_arr[numb].wdog->SYNCBUSY & WDOG_SYNCBUSY_CTRL) \
+
245  != 0U) {} \
+
246  iec60730_WdogInst_arr[numb].wdog->CTRL &= \
+
247  ~(uint32_t) _WDOG_CTRL_PERSEL_MASK; \
+
248  } while (0)
+
249 #else // Series 2 devices
+
250 #ifdef WDOG_HAS_SET_CLEAR
+
251 #define IEC60730_SETWATCHDOGTIMEOUTMIN(numb) \
+
252  do { \
+
253  iec60730_WdogInst_arr[numb].wdog->EN_CLR = WDOG_EN_EN; \
+
254  IEC60730_WDOG_EN_WAIT_DISABLING(numb) \
+
255  iec60730_WdogInst_arr[numb].wdog->CFG_CLR = _WDOG_CFG_PERSEL_MASK; \
+
256  iec60730_WdogInst_arr[numb].wdog->EN_SET = WDOG_EN_EN; \
+
257  } while (0)
+
258 #else
+
259 #define IEC60730_SETWATCHDOGTIMEOUTMIN(numb) \
+
260  do { \
+
261  iec60730_WdogInst_arr[numb].wdog->EN &= ~_WDOG_EN_MASK; \
+
262  IEC60730_WDOG_EN_WAIT_DISABLING(numb) \
+
263  iec60730_WdogInst_arr[numb].wdog->CFG &= \
+
264  ~(uint32_t) _WDOG_CFG_PERSEL_MASK; \
+
265  iec60730_WdogInst_arr[numb].wdog->EN |= WDOG_EN_EN; \
+
266  } while (0)
+
267 #endif
+
268 #endif
+
269 
+
270 #ifndef IEC60730_BURAM
+
271 #ifdef IEC60730_NON_SECURE_EN
+
272 #define IEC60730_BURAM BURAM_NS
+
273 #else
+
274 #define IEC60730_BURAM BURAM
+
275 #endif
+
276 #endif
+
277 #ifndef IEC60730_BURAM_IDX
+
278 #define IEC60730_BURAM_IDX 0UL
+
279 #endif
+
280 #define IEC60730_BURAM_STATE_SHIFT 8UL
+
281 #define IEC60730_BURAM_MASK 0xFFUL
+
282 
+
286 extern volatile SI_SEGMENT_VARIABLE(iec60730_WatchdogState,
+
287  iec60730_TestWatchdog_t,
+
288  SI_SEG_DATA_RETAINED_NO_CLEAR);
+
289 
+
290 /**************************************************************************/
+
307 iec60730_TestResult_t iec60730_WatchdogPost(void);
+
308 
+
312 #ifdef __cplusplus
+
313 }
+
314 #endif /* __cplusplus */
+
315 
+
316 #endif /* __IEC60730_WATCHDOG_H__ */
+
+
SI_SEGMENT_VARIABLE
volatile SI_SEGMENT_VARIABLE(iec60730_WatchdogState, iec60730_TestWatchdog_t, SI_SEG_DATA_RETAINED_NO_CLEAR)
+
iec60730_WatchdogInvalid
@ iec60730_WatchdogInvalid
Watchdog POST test not done.
Definition: sl_iec60730_watchdog.h:118
+
iec60730_WatchDog_t::rst
const uint32_t rst
Watchdog reset cause value.
Definition: sl_iec60730_watchdog.h:113
+
iec60730_WatchdogPost
iec60730_TestResult_t iec60730_WatchdogPost(void)
+
iec60730_TestWatchdog_t
iec60730_TestWatchdog_t
State of watchdog testing.
Definition: sl_iec60730_watchdog.h:117
+
iec60730_WatchdogTesting
@ iec60730_WatchdogTesting
Watchdog POST testing in progress.
Definition: sl_iec60730_watchdog.h:119
+
iec60730_WatchdogValid
@ iec60730_WatchdogValid
Watchdog POST test complete, watchdog valid.
Definition: sl_iec60730_watchdog.h:120
+
iec60730_WatchDog_t
Watchdog component configuration structure.
Definition: sl_iec60730_watchdog.h:111
+
iec60730_WatchDog_t::wdog
WDOG_TypeDef *const wdog
Pointer to Watchdog instance.
Definition: sl_iec60730_watchdog.h:112
+
iec60730_TestResult_t
iec60730_TestResult_t
The result of a test.
Definition: sl_iec60730.h:259
+ +
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IEC_60730 +
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IEC_60730 Documentation
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+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/inherit_graph_0.dot b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_0.dot new file mode 100644 index 00000000..fb4fb142 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_0.dot @@ -0,0 +1,100 @@ +digraph "Graphical Class Hierarchy" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node67 [label="Exception",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node67 -> Node42 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node42 [label="errors.JLinkException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkException.html",tooltip=" "]; + Node42 -> Node31 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node31 [label="errors.JLinkDataException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkDataException.html",tooltip=" "]; + Node42 -> Node33 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node33 [label="errors.JLinkEraseException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkEraseException.html",tooltip=" "]; + Node42 -> Node35 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node35 [label="errors.JLinkFlashException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkFlashException.html",tooltip=" "]; + Node42 -> Node37 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node37 [label="errors.JLinkReadException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkReadException.html",tooltip=" "]; + Node42 -> Node39 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node39 [label="errors.JLinkRTTException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkRTTException.html",tooltip=" "]; + Node42 -> Node41 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node41 [label="errors.JLinkWriteException",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classerrors_1_1JLinkWriteException.html",tooltip=" "]; + Node18 [label="object",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node18 -> Node0 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node0 [label="enums.JLinkAccessFlags",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkAccessFlags.html",tooltip=" "]; + Node18 -> Node20 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node20 [label="enums.JLinkAccessMaskFlags",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkAccessMaskFlags.html",tooltip=" "]; + Node18 -> Node21 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node21 [label="enums.JLinkBreakpoint",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkBreakpoint.html",tooltip=" "]; + Node18 -> Node22 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node22 [label="enums.JLinkBreakpointImplementation",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkBreakpointImplementation.html",tooltip=" "]; + Node18 -> Node23 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node23 [label="enums.JLinkCore",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkCore.html",tooltip=" "]; + Node18 -> Node24 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node24 [label="enums.JLinkCPUCapabilities",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkCPUCapabilities.html",tooltip=" "]; + Node18 -> Node25 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node25 [label="enums.JLinkDeviceFamily",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkDeviceFamily.html",tooltip=" "]; + Node18 -> Node26 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node26 [label="enums.JLinkEventTypes",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkEventTypes.html",tooltip=" "]; + Node18 -> Node27 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node27 [label="enums.JLinkFlags",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkFlags.html",tooltip=" "]; + Node18 -> Node28 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node28 [label="enums.JLinkFunctions",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkFunctions.html",tooltip=" "]; + Node18 -> Node29 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node29 [label="enums.JLinkGlobalErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkGlobalErrors.html",tooltip=" "]; + Node29 -> Node30 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node30 [label="enums.JLinkDataErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkDataErrors.html",tooltip=" "]; + Node30 -> Node31 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node29 -> Node32 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node32 [label="enums.JLinkEraseErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkEraseErrors.html",tooltip=" "]; + Node32 -> Node33 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node29 -> Node34 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node34 [label="enums.JLinkFlashErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkFlashErrors.html",tooltip=" "]; + Node34 -> Node35 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node29 -> Node36 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node36 [label="enums.JLinkReadErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkReadErrors.html",tooltip=" "]; + Node36 -> Node37 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node29 -> Node38 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node38 [label="enums.JLinkRTTErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkRTTErrors.html",tooltip=" "]; + Node38 -> Node39 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node29 -> Node40 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node40 [label="enums.JLinkWriteErrors",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkWriteErrors.html",tooltip=" "]; + Node40 -> Node41 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node29 -> Node42 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node18 -> Node43 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node43 [label="enums.JLinkHaltReasons",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkHaltReasons.html",tooltip=" "]; + Node18 -> Node44 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node44 [label="enums.JLinkHost",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkHost.html",tooltip=" "]; + Node18 -> Node45 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node45 [label="enums.JLinkInterfaces",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkInterfaces.html",tooltip=" "]; + Node18 -> Node46 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node46 [label="enums.JLinkResetStrategy\lCortexM3",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkResetStrategyCortexM3.html",tooltip=" "]; + Node18 -> Node47 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node47 [label="enums.JLinkROMTable",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkROMTable.html",tooltip=" "]; + Node18 -> Node48 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node48 [label="enums.JLinkRTTCommand",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkRTTCommand.html",tooltip=" "]; + Node18 -> Node49 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node49 [label="enums.JLinkRTTDirection",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkRTTDirection.html",tooltip=" "]; + Node18 -> Node50 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node50 [label="enums.JLinkStraceCommand",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkStraceCommand.html",tooltip=" "]; + Node18 -> Node51 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node51 [label="enums.JLinkStraceEvent",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkStraceEvent.html",tooltip=" "]; + Node18 -> Node52 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node52 [label="enums.JLinkStraceOperation",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkStraceOperation.html",tooltip=" "]; + Node18 -> Node53 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node53 [label="enums.JLinkSWOCommands",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkSWOCommands.html",tooltip=" "]; + Node18 -> Node54 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node54 [label="enums.JLinkSWOInterfaces",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkSWOInterfaces.html",tooltip=" "]; + Node18 -> Node55 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node55 [label="enums.JLinkTraceCommand",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkTraceCommand.html",tooltip=" "]; + Node18 -> Node56 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node56 [label="enums.JLinkTraceFormat",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkTraceFormat.html",tooltip=" "]; + Node18 -> Node57 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node57 [label="enums.JLinkTraceSource",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkTraceSource.html",tooltip=" "]; + Node18 -> Node58 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node58 [label="enums.JLinkVectorCatchCortexM3",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classenums_1_1JLinkVectorCatchCortexM3.html",tooltip=" "]; + Node18 -> Node59 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node59 [label="util.PyTestSuites",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classutil_1_1PyTestSuites.html",tooltip=" "]; + Node18 -> Node60 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node60 [label="util.TimeStampUtil",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classutil_1_1TimeStampUtil.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/inherit_graph_1.dot b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_1.dot new file mode 100644 index 00000000..626e7d88 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_1.dot @@ -0,0 +1,30 @@ +digraph "Graphical Class Hierarchy" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node63 [label="iec60730_test_base.iec60730\lTestBase",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__test__base_1_1iec60730TestBase.html",tooltip=" "]; + Node63 -> Node0 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node0 [label="iec60730_cpu_registers.iec60730\l_cpu_regs",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__cpu__registers_1_1iec60730__cpu__regs.html",tooltip="IEC60730 CPU Register Check Tests."]; + Node63 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node5 [label="iec60730_invariable\l_memory.iec60730_imc",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__invariable__memory_1_1iec60730__imc.html",tooltip="IEC60730 Invariable Memory Plausibility Verification Tests."]; + Node63 -> Node6 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node6 [label="iec60730_irq.iec60730_irq",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__irq_1_1iec60730__irq.html",tooltip="IEC60730 IRQ Plausibility Verification Tests."]; + Node63 -> Node7 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node7 [label="iec60730_programme\l_counter.iec60730_programme\l_counter",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__programme__counter_1_1iec60730__programme__counter.html",tooltip="IEC60730 CPU programme counter Tests."]; + Node63 -> Node8 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node8 [label="iec60730_system_clock.iec60730\l_system_clock",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__system__clock_1_1iec60730__system__clock.html",tooltip="IEC60730 System Clock Verification Tests."]; + Node63 -> Node9 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node9 [label="iec60730_variable_memory.iec60730_vmc",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__variable__memory_1_1iec60730__vmc.html",tooltip="IEC60730 Variable Memory Plausibility Verification Tests."]; + Node63 -> Node10 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node10 [label="iec60730_watchdog.iec60730\l_watchdog",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classiec60730__watchdog_1_1iec60730__watchdog.html",tooltip="IEC60730 Watchdog Verification Tests."]; + Node3 [label="TestCase",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node3 -> Node0 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 -> Node5 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 -> Node6 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 -> Node7 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 -> Node8 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 -> Node9 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node3 -> Node10 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/inherit_graph_10.dot b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_10.dot new file mode 100644 index 00000000..6937b87c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_10.dot @@ -0,0 +1,8 @@ +digraph "Graphical Class Hierarchy" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node0 [label="vmcParams_t",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$structvmcParams__t.html",tooltip="This structure is used as configuration for VMC testing."]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/inherit_graph_2.dot b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_2.dot new file mode 100644 index 00000000..820f66cd --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_2.dot @@ -0,0 +1,8 @@ +digraph "Graphical Class Hierarchy" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node0 [label="iec60730_IRQExecutionBounds_t",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$structiec60730__IRQExecutionBounds__t.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/inherit_graph_3.dot b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_3.dot new file mode 100644 index 00000000..386264ac --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_3.dot @@ -0,0 +1,8 @@ +digraph "Graphical Class Hierarchy" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node0 [label="iec60730_LibraryVersion_t",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$structiec60730__LibraryVersion__t.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/inherit_graph_4.dot b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_4.dot new file mode 100644 index 00000000..7a52de21 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_4.dot @@ -0,0 +1,8 @@ +digraph "Graphical Class Hierarchy" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node0 [label="iec60730_WatchDog_t",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$structiec60730__WatchDog__t.html",tooltip="Watchdog component configuration structure."]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/inherit_graph_5.dot b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_5.dot new file mode 100644 index 00000000..5845664f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_5.dot @@ -0,0 +1,8 @@ +digraph "Graphical Class Hierarchy" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node0 [label="imcParams_t",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$structimcParams__t.html",tooltip="This structure is used as configuration for IMC testing, that holds GPCRC Register."]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/inherit_graph_6.dot b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_6.dot new file mode 100644 index 00000000..b465ef09 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_6.dot @@ -0,0 +1,8 @@ +digraph "Graphical Class Hierarchy" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node0 [label="jlink.JLinkDll",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classjlink_1_1JLinkDll.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/inherit_graph_7.dot b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_7.dot new file mode 100644 index 00000000..4ccae9cb --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_7.dot @@ -0,0 +1,14 @@ +digraph "Graphical Class Hierarchy" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node14 [label="Structure",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node14 -> Node0 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node0 [label="jlink_constants.JlinkArm\l_Speed_Info_CStruct",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classjlink__constants_1_1JlinkArm__Speed__Info__CStruct.html",tooltip=" "]; + Node14 -> Node16 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node16 [label="jlink_constants.JLinkArm\lEmuConnectInfo_CStruct",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct.html",tooltip=" "]; + Node14 -> Node17 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node17 [label="jlink_constants.JLinkJtag\lIdData_CStruct",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classjlink__constants_1_1JLinkJtagIdData__CStruct.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/inherit_graph_8.dot b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_8.dot new file mode 100644 index 00000000..0fbadaeb --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_8.dot @@ -0,0 +1,8 @@ +digraph "Graphical Class Hierarchy" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node0 [label="updateCrcParams_t",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$structupdateCrcParams__t.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/inherit_graph_9.dot b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_9.dot new file mode 100644 index 00000000..8cc57368 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherit_graph_9.dot @@ -0,0 +1,12 @@ +digraph "Graphical Class Hierarchy" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + rankdir="LR"; + Node11 [label="Telnet",height=0.2,width=0.4,color="grey75", fillcolor="white", style="filled",tooltip=" "]; + Node11 -> Node0 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node0 [label="util.TelnetHostUtil",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classutil_1_1TelnetHostUtil.html",tooltip=" "]; + Node0 -> Node1 [dir="back",color="midnightblue",fontsize="10",style="solid",fontname="Helvetica"]; + Node1 [label="util.TelnetDeviceUtil",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$classutil_1_1TelnetDeviceUtil.html",tooltip=" "]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/inherits.html b/docs/html/EFR32_ICE60730_Libraries/inherits.html new file mode 100644 index 00000000..af9f18d4 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/inherits.html @@ -0,0 +1,102 @@ + + + + + + + +IEC_60730: Class Hierarchy + + + + + + + + + +
+
+ + + + + + +
+
IEC_60730 +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+
Class Hierarchy
+
+
+
+

Go to the textual class hierarchy

+
+ + + + + + + + + + + +
+
+
+
+
+
+
+
+
+
+
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/html/EFR32_ICE60730_Libraries/invariable_memory_check_example_flowchart.png b/docs/html/EFR32_ICE60730_Libraries/invariable_memory_check_example_flowchart.png new file mode 100644 index 00000000..2751fe66 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/invariable_memory_check_example_flowchart.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/invariable_memory_check_post_flowchart.png b/docs/html/EFR32_ICE60730_Libraries/invariable_memory_check_post_flowchart.png new file mode 100644 index 00000000..e8269c2d Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/invariable_memory_check_post_flowchart.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/irq_plausibility_test_flowchart.png b/docs/html/EFR32_ICE60730_Libraries/irq_plausibility_test_flowchart.png new file mode 100644 index 00000000..31afeb08 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/irq_plausibility_test_flowchart.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/jquery.js b/docs/html/EFR32_ICE60730_Libraries/jquery.js new file mode 100644 index 00000000..103c32d7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/jquery.js @@ -0,0 +1,35 @@ +/*! jQuery v3.4.1 | (c) JS Foundation and other contributors | jquery.org/license */ +!function(e,t){"use strict";"object"==typeof module&&"object"==typeof module.exports?module.exports=e.document?t(e,!0):function(e){if(!e.document)throw new Error("jQuery requires a window with a document");return t(e)}:t(e)}("undefined"!=typeof window?window:this,function(C,e){"use strict";var t=[],E=C.document,r=Object.getPrototypeOf,s=t.slice,g=t.concat,u=t.push,i=t.indexOf,n={},o=n.toString,v=n.hasOwnProperty,a=v.toString,l=a.call(Object),y={},m=function(e){return"function"==typeof e&&"number"!=typeof e.nodeType},x=function(e){return null!=e&&e===e.window},c={type:!0,src:!0,nonce:!0,noModule:!0};function b(e,t,n){var r,i,o=(n=n||E).createElement("script");if(o.text=e,t)for(r in c)(i=t[r]||t.getAttribute&&t.getAttribute(r))&&o.setAttribute(r,i);n.head.appendChild(o).parentNode.removeChild(o)}function w(e){return null==e?e+"":"object"==typeof e||"function"==typeof e?n[o.call(e)]||"object":typeof e}var f="3.4.1",k=function(e,t){return new k.fn.init(e,t)},p=/^[\s\uFEFF\xA0]+|[\s\uFEFF\xA0]+$/g;function d(e){var t=!!e&&"length"in e&&e.length,n=w(e);return!m(e)&&!x(e)&&("array"===n||0===t||"number"==typeof t&&0+~]|"+M+")"+M+"*"),U=new RegExp(M+"|>"),X=new RegExp($),V=new RegExp("^"+I+"$"),G={ID:new RegExp("^#("+I+")"),CLASS:new RegExp("^\\.("+I+")"),TAG:new RegExp("^("+I+"|[*])"),ATTR:new RegExp("^"+W),PSEUDO:new RegExp("^"+$),CHILD:new RegExp("^:(only|first|last|nth|nth-last)-(child|of-type)(?:\\("+M+"*(even|odd|(([+-]|)(\\d*)n|)"+M+"*(?:([+-]|)"+M+"*(\\d+)|))"+M+"*\\)|)","i"),bool:new RegExp("^(?:"+R+")$","i"),needsContext:new RegExp("^"+M+"*[>+~]|:(even|odd|eq|gt|lt|nth|first|last)(?:\\("+M+"*((?:-\\d)?\\d*)"+M+"*\\)|)(?=[^-]|$)","i")},Y=/HTML$/i,Q=/^(?:input|select|textarea|button)$/i,J=/^h\d$/i,K=/^[^{]+\{\s*\[native \w/,Z=/^(?:#([\w-]+)|(\w+)|\.([\w-]+))$/,ee=/[+~]/,te=new RegExp("\\\\([\\da-f]{1,6}"+M+"?|("+M+")|.)","ig"),ne=function(e,t,n){var r="0x"+t-65536;return r!=r||n?t:r<0?String.fromCharCode(r+65536):String.fromCharCode(r>>10|55296,1023&r|56320)},re=/([\0-\x1f\x7f]|^-?\d)|^-$|[^\0-\x1f\x7f-\uFFFF\w-]/g,ie=function(e,t){return t?"\0"===e?"\ufffd":e.slice(0,-1)+"\\"+e.charCodeAt(e.length-1).toString(16)+" ":"\\"+e},oe=function(){T()},ae=be(function(e){return!0===e.disabled&&"fieldset"===e.nodeName.toLowerCase()},{dir:"parentNode",next:"legend"});try{H.apply(t=O.call(m.childNodes),m.childNodes),t[m.childNodes.length].nodeType}catch(e){H={apply:t.length?function(e,t){L.apply(e,O.call(t))}:function(e,t){var n=e.length,r=0;while(e[n++]=t[r++]);e.length=n-1}}}function se(t,e,n,r){var i,o,a,s,u,l,c,f=e&&e.ownerDocument,p=e?e.nodeType:9;if(n=n||[],"string"!=typeof t||!t||1!==p&&9!==p&&11!==p)return n;if(!r&&((e?e.ownerDocument||e:m)!==C&&T(e),e=e||C,E)){if(11!==p&&(u=Z.exec(t)))if(i=u[1]){if(9===p){if(!(a=e.getElementById(i)))return n;if(a.id===i)return n.push(a),n}else if(f&&(a=f.getElementById(i))&&y(e,a)&&a.id===i)return n.push(a),n}else{if(u[2])return H.apply(n,e.getElementsByTagName(t)),n;if((i=u[3])&&d.getElementsByClassName&&e.getElementsByClassName)return H.apply(n,e.getElementsByClassName(i)),n}if(d.qsa&&!A[t+" "]&&(!v||!v.test(t))&&(1!==p||"object"!==e.nodeName.toLowerCase())){if(c=t,f=e,1===p&&U.test(t)){(s=e.getAttribute("id"))?s=s.replace(re,ie):e.setAttribute("id",s=k),o=(l=h(t)).length;while(o--)l[o]="#"+s+" "+xe(l[o]);c=l.join(","),f=ee.test(t)&&ye(e.parentNode)||e}try{return H.apply(n,f.querySelectorAll(c)),n}catch(e){A(t,!0)}finally{s===k&&e.removeAttribute("id")}}}return g(t.replace(B,"$1"),e,n,r)}function ue(){var r=[];return function e(t,n){return r.push(t+" ")>b.cacheLength&&delete e[r.shift()],e[t+" "]=n}}function le(e){return e[k]=!0,e}function ce(e){var t=C.createElement("fieldset");try{return!!e(t)}catch(e){return!1}finally{t.parentNode&&t.parentNode.removeChild(t),t=null}}function fe(e,t){var n=e.split("|"),r=n.length;while(r--)b.attrHandle[n[r]]=t}function pe(e,t){var n=t&&e,r=n&&1===e.nodeType&&1===t.nodeType&&e.sourceIndex-t.sourceIndex;if(r)return r;if(n)while(n=n.nextSibling)if(n===t)return-1;return e?1:-1}function de(t){return function(e){return"input"===e.nodeName.toLowerCase()&&e.type===t}}function he(n){return function(e){var t=e.nodeName.toLowerCase();return("input"===t||"button"===t)&&e.type===n}}function ge(t){return function(e){return"form"in e?e.parentNode&&!1===e.disabled?"label"in e?"label"in e.parentNode?e.parentNode.disabled===t:e.disabled===t:e.isDisabled===t||e.isDisabled!==!t&&ae(e)===t:e.disabled===t:"label"in e&&e.disabled===t}}function ve(a){return le(function(o){return o=+o,le(function(e,t){var n,r=a([],e.length,o),i=r.length;while(i--)e[n=r[i]]&&(e[n]=!(t[n]=e[n]))})})}function ye(e){return e&&"undefined"!=typeof e.getElementsByTagName&&e}for(e in d=se.support={},i=se.isXML=function(e){var t=e.namespaceURI,n=(e.ownerDocument||e).documentElement;return!Y.test(t||n&&n.nodeName||"HTML")},T=se.setDocument=function(e){var t,n,r=e?e.ownerDocument||e:m;return r!==C&&9===r.nodeType&&r.documentElement&&(a=(C=r).documentElement,E=!i(C),m!==C&&(n=C.defaultView)&&n.top!==n&&(n.addEventListener?n.addEventListener("unload",oe,!1):n.attachEvent&&n.attachEvent("onunload",oe)),d.attributes=ce(function(e){return e.className="i",!e.getAttribute("className")}),d.getElementsByTagName=ce(function(e){return e.appendChild(C.createComment("")),!e.getElementsByTagName("*").length}),d.getElementsByClassName=K.test(C.getElementsByClassName),d.getById=ce(function(e){return a.appendChild(e).id=k,!C.getElementsByName||!C.getElementsByName(k).length}),d.getById?(b.filter.ID=function(e){var t=e.replace(te,ne);return function(e){return e.getAttribute("id")===t}},b.find.ID=function(e,t){if("undefined"!=typeof t.getElementById&&E){var n=t.getElementById(e);return n?[n]:[]}}):(b.filter.ID=function(e){var n=e.replace(te,ne);return function(e){var t="undefined"!=typeof e.getAttributeNode&&e.getAttributeNode("id");return t&&t.value===n}},b.find.ID=function(e,t){if("undefined"!=typeof t.getElementById&&E){var n,r,i,o=t.getElementById(e);if(o){if((n=o.getAttributeNode("id"))&&n.value===e)return[o];i=t.getElementsByName(e),r=0;while(o=i[r++])if((n=o.getAttributeNode("id"))&&n.value===e)return[o]}return[]}}),b.find.TAG=d.getElementsByTagName?function(e,t){return"undefined"!=typeof t.getElementsByTagName?t.getElementsByTagName(e):d.qsa?t.querySelectorAll(e):void 0}:function(e,t){var n,r=[],i=0,o=t.getElementsByTagName(e);if("*"===e){while(n=o[i++])1===n.nodeType&&r.push(n);return r}return o},b.find.CLASS=d.getElementsByClassName&&function(e,t){if("undefined"!=typeof t.getElementsByClassName&&E)return t.getElementsByClassName(e)},s=[],v=[],(d.qsa=K.test(C.querySelectorAll))&&(ce(function(e){a.appendChild(e).innerHTML="",e.querySelectorAll("[msallowcapture^='']").length&&v.push("[*^$]="+M+"*(?:''|\"\")"),e.querySelectorAll("[selected]").length||v.push("\\["+M+"*(?:value|"+R+")"),e.querySelectorAll("[id~="+k+"-]").length||v.push("~="),e.querySelectorAll(":checked").length||v.push(":checked"),e.querySelectorAll("a#"+k+"+*").length||v.push(".#.+[+~]")}),ce(function(e){e.innerHTML="";var t=C.createElement("input");t.setAttribute("type","hidden"),e.appendChild(t).setAttribute("name","D"),e.querySelectorAll("[name=d]").length&&v.push("name"+M+"*[*^$|!~]?="),2!==e.querySelectorAll(":enabled").length&&v.push(":enabled",":disabled"),a.appendChild(e).disabled=!0,2!==e.querySelectorAll(":disabled").length&&v.push(":enabled",":disabled"),e.querySelectorAll("*,:x"),v.push(",.*:")})),(d.matchesSelector=K.test(c=a.matches||a.webkitMatchesSelector||a.mozMatchesSelector||a.oMatchesSelector||a.msMatchesSelector))&&ce(function(e){d.disconnectedMatch=c.call(e,"*"),c.call(e,"[s!='']:x"),s.push("!=",$)}),v=v.length&&new RegExp(v.join("|")),s=s.length&&new RegExp(s.join("|")),t=K.test(a.compareDocumentPosition),y=t||K.test(a.contains)?function(e,t){var n=9===e.nodeType?e.documentElement:e,r=t&&t.parentNode;return e===r||!(!r||1!==r.nodeType||!(n.contains?n.contains(r):e.compareDocumentPosition&&16&e.compareDocumentPosition(r)))}:function(e,t){if(t)while(t=t.parentNode)if(t===e)return!0;return!1},D=t?function(e,t){if(e===t)return l=!0,0;var n=!e.compareDocumentPosition-!t.compareDocumentPosition;return n||(1&(n=(e.ownerDocument||e)===(t.ownerDocument||t)?e.compareDocumentPosition(t):1)||!d.sortDetached&&t.compareDocumentPosition(e)===n?e===C||e.ownerDocument===m&&y(m,e)?-1:t===C||t.ownerDocument===m&&y(m,t)?1:u?P(u,e)-P(u,t):0:4&n?-1:1)}:function(e,t){if(e===t)return l=!0,0;var n,r=0,i=e.parentNode,o=t.parentNode,a=[e],s=[t];if(!i||!o)return e===C?-1:t===C?1:i?-1:o?1:u?P(u,e)-P(u,t):0;if(i===o)return pe(e,t);n=e;while(n=n.parentNode)a.unshift(n);n=t;while(n=n.parentNode)s.unshift(n);while(a[r]===s[r])r++;return r?pe(a[r],s[r]):a[r]===m?-1:s[r]===m?1:0}),C},se.matches=function(e,t){return se(e,null,null,t)},se.matchesSelector=function(e,t){if((e.ownerDocument||e)!==C&&T(e),d.matchesSelector&&E&&!A[t+" "]&&(!s||!s.test(t))&&(!v||!v.test(t)))try{var n=c.call(e,t);if(n||d.disconnectedMatch||e.document&&11!==e.document.nodeType)return n}catch(e){A(t,!0)}return 0":{dir:"parentNode",first:!0}," ":{dir:"parentNode"},"+":{dir:"previousSibling",first:!0},"~":{dir:"previousSibling"}},preFilter:{ATTR:function(e){return e[1]=e[1].replace(te,ne),e[3]=(e[3]||e[4]||e[5]||"").replace(te,ne),"~="===e[2]&&(e[3]=" "+e[3]+" "),e.slice(0,4)},CHILD:function(e){return e[1]=e[1].toLowerCase(),"nth"===e[1].slice(0,3)?(e[3]||se.error(e[0]),e[4]=+(e[4]?e[5]+(e[6]||1):2*("even"===e[3]||"odd"===e[3])),e[5]=+(e[7]+e[8]||"odd"===e[3])):e[3]&&se.error(e[0]),e},PSEUDO:function(e){var t,n=!e[6]&&e[2];return G.CHILD.test(e[0])?null:(e[3]?e[2]=e[4]||e[5]||"":n&&X.test(n)&&(t=h(n,!0))&&(t=n.indexOf(")",n.length-t)-n.length)&&(e[0]=e[0].slice(0,t),e[2]=n.slice(0,t)),e.slice(0,3))}},filter:{TAG:function(e){var t=e.replace(te,ne).toLowerCase();return"*"===e?function(){return!0}:function(e){return e.nodeName&&e.nodeName.toLowerCase()===t}},CLASS:function(e){var t=p[e+" "];return t||(t=new RegExp("(^|"+M+")"+e+"("+M+"|$)"))&&p(e,function(e){return t.test("string"==typeof e.className&&e.className||"undefined"!=typeof e.getAttribute&&e.getAttribute("class")||"")})},ATTR:function(n,r,i){return function(e){var t=se.attr(e,n);return null==t?"!="===r:!r||(t+="","="===r?t===i:"!="===r?t!==i:"^="===r?i&&0===t.indexOf(i):"*="===r?i&&-1:\x20\t\r\n\f]*)[\x20\t\r\n\f]*\/?>(?:<\/\1>|)$/i;function j(e,n,r){return m(n)?k.grep(e,function(e,t){return!!n.call(e,t,e)!==r}):n.nodeType?k.grep(e,function(e){return e===n!==r}):"string"!=typeof n?k.grep(e,function(e){return-1)[^>]*|#([\w-]+))$/;(k.fn.init=function(e,t,n){var r,i;if(!e)return this;if(n=n||q,"string"==typeof e){if(!(r="<"===e[0]&&">"===e[e.length-1]&&3<=e.length?[null,e,null]:L.exec(e))||!r[1]&&t)return!t||t.jquery?(t||n).find(e):this.constructor(t).find(e);if(r[1]){if(t=t instanceof k?t[0]:t,k.merge(this,k.parseHTML(r[1],t&&t.nodeType?t.ownerDocument||t:E,!0)),D.test(r[1])&&k.isPlainObject(t))for(r in t)m(this[r])?this[r](t[r]):this.attr(r,t[r]);return this}return(i=E.getElementById(r[2]))&&(this[0]=i,this.length=1),this}return e.nodeType?(this[0]=e,this.length=1,this):m(e)?void 0!==n.ready?n.ready(e):e(k):k.makeArray(e,this)}).prototype=k.fn,q=k(E);var H=/^(?:parents|prev(?:Until|All))/,O={children:!0,contents:!0,next:!0,prev:!0};function P(e,t){while((e=e[t])&&1!==e.nodeType);return e}k.fn.extend({has:function(e){var t=k(e,this),n=t.length;return this.filter(function(){for(var e=0;e\x20\t\r\n\f]*)/i,he=/^$|^module$|\/(?:java|ecma)script/i,ge={option:[1,""],thead:[1,"","
"],col:[2,"","
"],tr:[2,"","
"],td:[3,"","
"],_default:[0,"",""]};function ve(e,t){var n;return n="undefined"!=typeof e.getElementsByTagName?e.getElementsByTagName(t||"*"):"undefined"!=typeof e.querySelectorAll?e.querySelectorAll(t||"*"):[],void 0===t||t&&A(e,t)?k.merge([e],n):n}function ye(e,t){for(var n=0,r=e.length;nx",y.noCloneChecked=!!me.cloneNode(!0).lastChild.defaultValue;var Te=/^key/,Ce=/^(?:mouse|pointer|contextmenu|drag|drop)|click/,Ee=/^([^.]*)(?:\.(.+)|)/;function ke(){return!0}function Se(){return!1}function Ne(e,t){return e===function(){try{return E.activeElement}catch(e){}}()==("focus"===t)}function Ae(e,t,n,r,i,o){var a,s;if("object"==typeof t){for(s in"string"!=typeof n&&(r=r||n,n=void 0),t)Ae(e,s,n,r,t[s],o);return e}if(null==r&&null==i?(i=n,r=n=void 0):null==i&&("string"==typeof n?(i=r,r=void 0):(i=r,r=n,n=void 0)),!1===i)i=Se;else if(!i)return e;return 1===o&&(a=i,(i=function(e){return k().off(e),a.apply(this,arguments)}).guid=a.guid||(a.guid=k.guid++)),e.each(function(){k.event.add(this,t,i,r,n)})}function De(e,i,o){o?(Q.set(e,i,!1),k.event.add(e,i,{namespace:!1,handler:function(e){var t,n,r=Q.get(this,i);if(1&e.isTrigger&&this[i]){if(r.length)(k.event.special[i]||{}).delegateType&&e.stopPropagation();else if(r=s.call(arguments),Q.set(this,i,r),t=o(this,i),this[i](),r!==(n=Q.get(this,i))||t?Q.set(this,i,!1):n={},r!==n)return e.stopImmediatePropagation(),e.preventDefault(),n.value}else r.length&&(Q.set(this,i,{value:k.event.trigger(k.extend(r[0],k.Event.prototype),r.slice(1),this)}),e.stopImmediatePropagation())}})):void 0===Q.get(e,i)&&k.event.add(e,i,ke)}k.event={global:{},add:function(t,e,n,r,i){var o,a,s,u,l,c,f,p,d,h,g,v=Q.get(t);if(v){n.handler&&(n=(o=n).handler,i=o.selector),i&&k.find.matchesSelector(ie,i),n.guid||(n.guid=k.guid++),(u=v.events)||(u=v.events={}),(a=v.handle)||(a=v.handle=function(e){return"undefined"!=typeof k&&k.event.triggered!==e.type?k.event.dispatch.apply(t,arguments):void 0}),l=(e=(e||"").match(R)||[""]).length;while(l--)d=g=(s=Ee.exec(e[l])||[])[1],h=(s[2]||"").split(".").sort(),d&&(f=k.event.special[d]||{},d=(i?f.delegateType:f.bindType)||d,f=k.event.special[d]||{},c=k.extend({type:d,origType:g,data:r,handler:n,guid:n.guid,selector:i,needsContext:i&&k.expr.match.needsContext.test(i),namespace:h.join(".")},o),(p=u[d])||((p=u[d]=[]).delegateCount=0,f.setup&&!1!==f.setup.call(t,r,h,a)||t.addEventListener&&t.addEventListener(d,a)),f.add&&(f.add.call(t,c),c.handler.guid||(c.handler.guid=n.guid)),i?p.splice(p.delegateCount++,0,c):p.push(c),k.event.global[d]=!0)}},remove:function(e,t,n,r,i){var o,a,s,u,l,c,f,p,d,h,g,v=Q.hasData(e)&&Q.get(e);if(v&&(u=v.events)){l=(t=(t||"").match(R)||[""]).length;while(l--)if(d=g=(s=Ee.exec(t[l])||[])[1],h=(s[2]||"").split(".").sort(),d){f=k.event.special[d]||{},p=u[d=(r?f.delegateType:f.bindType)||d]||[],s=s[2]&&new RegExp("(^|\\.)"+h.join("\\.(?:.*\\.|)")+"(\\.|$)"),a=o=p.length;while(o--)c=p[o],!i&&g!==c.origType||n&&n.guid!==c.guid||s&&!s.test(c.namespace)||r&&r!==c.selector&&("**"!==r||!c.selector)||(p.splice(o,1),c.selector&&p.delegateCount--,f.remove&&f.remove.call(e,c));a&&!p.length&&(f.teardown&&!1!==f.teardown.call(e,h,v.handle)||k.removeEvent(e,d,v.handle),delete u[d])}else for(d in u)k.event.remove(e,d+t[l],n,r,!0);k.isEmptyObject(u)&&Q.remove(e,"handle events")}},dispatch:function(e){var t,n,r,i,o,a,s=k.event.fix(e),u=new Array(arguments.length),l=(Q.get(this,"events")||{})[s.type]||[],c=k.event.special[s.type]||{};for(u[0]=s,t=1;t\x20\t\r\n\f]*)[^>]*)\/>/gi,qe=/\s*$/g;function Oe(e,t){return A(e,"table")&&A(11!==t.nodeType?t:t.firstChild,"tr")&&k(e).children("tbody")[0]||e}function Pe(e){return e.type=(null!==e.getAttribute("type"))+"/"+e.type,e}function Re(e){return"true/"===(e.type||"").slice(0,5)?e.type=e.type.slice(5):e.removeAttribute("type"),e}function Me(e,t){var n,r,i,o,a,s,u,l;if(1===t.nodeType){if(Q.hasData(e)&&(o=Q.access(e),a=Q.set(t,o),l=o.events))for(i in delete a.handle,a.events={},l)for(n=0,r=l[i].length;n")},clone:function(e,t,n){var r,i,o,a,s,u,l,c=e.cloneNode(!0),f=oe(e);if(!(y.noCloneChecked||1!==e.nodeType&&11!==e.nodeType||k.isXMLDoc(e)))for(a=ve(c),r=0,i=(o=ve(e)).length;r").attr(n.scriptAttrs||{}).prop({charset:n.scriptCharset,src:n.url}).on("load error",i=function(e){r.remove(),i=null,e&&t("error"===e.type?404:200,e.type)}),E.head.appendChild(r[0])},abort:function(){i&&i()}}});var Vt,Gt=[],Yt=/(=)\?(?=&|$)|\?\?/;k.ajaxSetup({jsonp:"callback",jsonpCallback:function(){var e=Gt.pop()||k.expando+"_"+kt++;return this[e]=!0,e}}),k.ajaxPrefilter("json jsonp",function(e,t,n){var r,i,o,a=!1!==e.jsonp&&(Yt.test(e.url)?"url":"string"==typeof e.data&&0===(e.contentType||"").indexOf("application/x-www-form-urlencoded")&&Yt.test(e.data)&&"data");if(a||"jsonp"===e.dataTypes[0])return r=e.jsonpCallback=m(e.jsonpCallback)?e.jsonpCallback():e.jsonpCallback,a?e[a]=e[a].replace(Yt,"$1"+r):!1!==e.jsonp&&(e.url+=(St.test(e.url)?"&":"?")+e.jsonp+"="+r),e.converters["script json"]=function(){return o||k.error(r+" was not called"),o[0]},e.dataTypes[0]="json",i=C[r],C[r]=function(){o=arguments},n.always(function(){void 0===i?k(C).removeProp(r):C[r]=i,e[r]&&(e.jsonpCallback=t.jsonpCallback,Gt.push(r)),o&&m(i)&&i(o[0]),o=i=void 0}),"script"}),y.createHTMLDocument=((Vt=E.implementation.createHTMLDocument("").body).innerHTML="
",2===Vt.childNodes.length),k.parseHTML=function(e,t,n){return"string"!=typeof e?[]:("boolean"==typeof t&&(n=t,t=!1),t||(y.createHTMLDocument?((r=(t=E.implementation.createHTMLDocument("")).createElement("base")).href=E.location.href,t.head.appendChild(r)):t=E),o=!n&&[],(i=D.exec(e))?[t.createElement(i[1])]:(i=we([e],t,o),o&&o.length&&k(o).remove(),k.merge([],i.childNodes)));var r,i,o},k.fn.load=function(e,t,n){var r,i,o,a=this,s=e.indexOf(" ");return-1").append(k.parseHTML(e)).find(r):e)}).always(n&&function(e,t){a.each(function(){n.apply(this,o||[e.responseText,t,e])})}),this},k.each(["ajaxStart","ajaxStop","ajaxComplete","ajaxError","ajaxSuccess","ajaxSend"],function(e,t){k.fn[t]=function(e){return this.on(t,e)}}),k.expr.pseudos.animated=function(t){return k.grep(k.timers,function(e){return t===e.elem}).length},k.offset={setOffset:function(e,t,n){var r,i,o,a,s,u,l=k.css(e,"position"),c=k(e),f={};"static"===l&&(e.style.position="relative"),s=c.offset(),o=k.css(e,"top"),u=k.css(e,"left"),("absolute"===l||"fixed"===l)&&-1<(o+u).indexOf("auto")?(a=(r=c.position()).top,i=r.left):(a=parseFloat(o)||0,i=parseFloat(u)||0),m(t)&&(t=t.call(e,n,k.extend({},s))),null!=t.top&&(f.top=t.top-s.top+a),null!=t.left&&(f.left=t.left-s.left+i),"using"in t?t.using.call(e,f):c.css(f)}},k.fn.extend({offset:function(t){if(arguments.length)return void 0===t?this:this.each(function(e){k.offset.setOffset(this,t,e)});var e,n,r=this[0];return r?r.getClientRects().length?(e=r.getBoundingClientRect(),n=r.ownerDocument.defaultView,{top:e.top+n.pageYOffset,left:e.left+n.pageXOffset}):{top:0,left:0}:void 0},position:function(){if(this[0]){var e,t,n,r=this[0],i={top:0,left:0};if("fixed"===k.css(r,"position"))t=r.getBoundingClientRect();else{t=this.offset(),n=r.ownerDocument,e=r.offsetParent||n.documentElement;while(e&&(e===n.body||e===n.documentElement)&&"static"===k.css(e,"position"))e=e.parentNode;e&&e!==r&&1===e.nodeType&&((i=k(e).offset()).top+=k.css(e,"borderTopWidth",!0),i.left+=k.css(e,"borderLeftWidth",!0))}return{top:t.top-i.top-k.css(r,"marginTop",!0),left:t.left-i.left-k.css(r,"marginLeft",!0)}}},offsetParent:function(){return this.map(function(){var e=this.offsetParent;while(e&&"static"===k.css(e,"position"))e=e.offsetParent;return e||ie})}}),k.each({scrollLeft:"pageXOffset",scrollTop:"pageYOffset"},function(t,i){var o="pageYOffset"===i;k.fn[t]=function(e){return _(this,function(e,t,n){var r;if(x(e)?r=e:9===e.nodeType&&(r=e.defaultView),void 0===n)return r?r[i]:e[t];r?r.scrollTo(o?r.pageXOffset:n,o?n:r.pageYOffset):e[t]=n},t,e,arguments.length)}}),k.each(["top","left"],function(e,n){k.cssHooks[n]=ze(y.pixelPosition,function(e,t){if(t)return t=_e(e,n),$e.test(t)?k(e).position()[n]+"px":t})}),k.each({Height:"height",Width:"width"},function(a,s){k.each({padding:"inner"+a,content:s,"":"outer"+a},function(r,o){k.fn[o]=function(e,t){var n=arguments.length&&(r||"boolean"!=typeof e),i=r||(!0===e||!0===t?"margin":"border");return _(this,function(e,t,n){var r;return x(e)?0===o.indexOf("outer")?e["inner"+a]:e.document.documentElement["client"+a]:9===e.nodeType?(r=e.documentElement,Math.max(e.body["scroll"+a],r["scroll"+a],e.body["offset"+a],r["offset"+a],r["client"+a])):void 0===n?k.css(e,t,i):k.style(e,t,n,i)},s,n?e:void 0,n)}})}),k.each("blur focus focusin focusout resize scroll click dblclick mousedown mouseup mousemove mouseover mouseout mouseenter mouseleave change select submit keydown keypress keyup contextmenu".split(" "),function(e,n){k.fn[n]=function(e,t){return 0a;a++)for(i in o[a])n=o[a][i],o[a].hasOwnProperty(i)&&void 0!==n&&(e[i]=t.isPlainObject(n)?t.isPlainObject(e[i])?t.widget.extend({},e[i],n):t.widget.extend({},n):n);return e},t.widget.bridge=function(e,i){var n=i.prototype.widgetFullName||e;t.fn[e]=function(o){var a="string"==typeof o,r=s.call(arguments,1),h=this;return a?this.length||"instance"!==o?this.each(function(){var i,s=t.data(this,n);return"instance"===o?(h=s,!1):s?t.isFunction(s[o])&&"_"!==o.charAt(0)?(i=s[o].apply(s,r),i!==s&&void 0!==i?(h=i&&i.jquery?h.pushStack(i.get()):i,!1):void 0):t.error("no such method '"+o+"' for "+e+" widget instance"):t.error("cannot call methods on "+e+" prior to initialization; "+"attempted to call method '"+o+"'")}):h=void 0:(r.length&&(o=t.widget.extend.apply(null,[o].concat(r))),this.each(function(){var e=t.data(this,n);e?(e.option(o||{}),e._init&&e._init()):t.data(this,n,new i(o,this))})),h}},t.Widget=function(){},t.Widget._childConstructors=[],t.Widget.prototype={widgetName:"widget",widgetEventPrefix:"",defaultElement:"
",options:{classes:{},disabled:!1,create:null},_createWidget:function(e,s){s=t(s||this.defaultElement||this)[0],this.element=t(s),this.uuid=i++,this.eventNamespace="."+this.widgetName+this.uuid,this.bindings=t(),this.hoverable=t(),this.focusable=t(),this.classesElementLookup={},s!==this&&(t.data(s,this.widgetFullName,this),this._on(!0,this.element,{remove:function(t){t.target===s&&this.destroy()}}),this.document=t(s.style?s.ownerDocument:s.document||s),this.window=t(this.document[0].defaultView||this.document[0].parentWindow)),this.options=t.widget.extend({},this.options,this._getCreateOptions(),e),this._create(),this.options.disabled&&this._setOptionDisabled(this.options.disabled),this._trigger("create",null,this._getCreateEventData()),this._init()},_getCreateOptions:function(){return{}},_getCreateEventData:t.noop,_create:t.noop,_init:t.noop,destroy:function(){var e=this;this._destroy(),t.each(this.classesElementLookup,function(t,i){e._removeClass(i,t)}),this.element.off(this.eventNamespace).removeData(this.widgetFullName),this.widget().off(this.eventNamespace).removeAttr("aria-disabled"),this.bindings.off(this.eventNamespace)},_destroy:t.noop,widget:function(){return this.element},option:function(e,i){var s,n,o,a=e;if(0===arguments.length)return t.widget.extend({},this.options);if("string"==typeof e)if(a={},s=e.split("."),e=s.shift(),s.length){for(n=a[e]=t.widget.extend({},this.options[e]),o=0;s.length-1>o;o++)n[s[o]]=n[s[o]]||{},n=n[s[o]];if(e=s.pop(),1===arguments.length)return void 0===n[e]?null:n[e];n[e]=i}else{if(1===arguments.length)return void 0===this.options[e]?null:this.options[e];a[e]=i}return this._setOptions(a),this},_setOptions:function(t){var e;for(e in t)this._setOption(e,t[e]);return this},_setOption:function(t,e){return"classes"===t&&this._setOptionClasses(e),this.options[t]=e,"disabled"===t&&this._setOptionDisabled(e),this},_setOptionClasses:function(e){var i,s,n;for(i in e)n=this.classesElementLookup[i],e[i]!==this.options.classes[i]&&n&&n.length&&(s=t(n.get()),this._removeClass(n,i),s.addClass(this._classes({element:s,keys:i,classes:e,add:!0})))},_setOptionDisabled:function(t){this._toggleClass(this.widget(),this.widgetFullName+"-disabled",null,!!t),t&&(this._removeClass(this.hoverable,null,"ui-state-hover"),this._removeClass(this.focusable,null,"ui-state-focus"))},enable:function(){return this._setOptions({disabled:!1})},disable:function(){return this._setOptions({disabled:!0})},_classes:function(e){function i(i,o){var a,r;for(r=0;i.length>r;r++)a=n.classesElementLookup[i[r]]||t(),a=e.add?t(t.unique(a.get().concat(e.element.get()))):t(a.not(e.element).get()),n.classesElementLookup[i[r]]=a,s.push(i[r]),o&&e.classes[i[r]]&&s.push(e.classes[i[r]])}var s=[],n=this;return e=t.extend({element:this.element,classes:this.options.classes||{}},e),this._on(e.element,{remove:"_untrackClassesElement"}),e.keys&&i(e.keys.match(/\S+/g)||[],!0),e.extra&&i(e.extra.match(/\S+/g)||[]),s.join(" ")},_untrackClassesElement:function(e){var i=this;t.each(i.classesElementLookup,function(s,n){-1!==t.inArray(e.target,n)&&(i.classesElementLookup[s]=t(n.not(e.target).get()))})},_removeClass:function(t,e,i){return this._toggleClass(t,e,i,!1)},_addClass:function(t,e,i){return this._toggleClass(t,e,i,!0)},_toggleClass:function(t,e,i,s){s="boolean"==typeof s?s:i;var n="string"==typeof t||null===t,o={extra:n?e:i,keys:n?t:e,element:n?this.element:t,add:s};return o.element.toggleClass(this._classes(o),s),this},_on:function(e,i,s){var n,o=this;"boolean"!=typeof e&&(s=i,i=e,e=!1),s?(i=n=t(i),this.bindings=this.bindings.add(i)):(s=i,i=this.element,n=this.widget()),t.each(s,function(s,a){function r(){return e||o.options.disabled!==!0&&!t(this).hasClass("ui-state-disabled")?("string"==typeof a?o[a]:a).apply(o,arguments):void 0}"string"!=typeof a&&(r.guid=a.guid=a.guid||r.guid||t.guid++);var h=s.match(/^([\w:-]*)\s*(.*)$/),l=h[1]+o.eventNamespace,c=h[2];c?n.on(l,c,r):i.on(l,r)})},_off:function(e,i){i=(i||"").split(" ").join(this.eventNamespace+" ")+this.eventNamespace,e.off(i).off(i),this.bindings=t(this.bindings.not(e).get()),this.focusable=t(this.focusable.not(e).get()),this.hoverable=t(this.hoverable.not(e).get())},_delay:function(t,e){function i(){return("string"==typeof t?s[t]:t).apply(s,arguments)}var s=this;return setTimeout(i,e||0)},_hoverable:function(e){this.hoverable=this.hoverable.add(e),this._on(e,{mouseenter:function(e){this._addClass(t(e.currentTarget),null,"ui-state-hover")},mouseleave:function(e){this._removeClass(t(e.currentTarget),null,"ui-state-hover")}})},_focusable:function(e){this.focusable=this.focusable.add(e),this._on(e,{focusin:function(e){this._addClass(t(e.currentTarget),null,"ui-state-focus")},focusout:function(e){this._removeClass(t(e.currentTarget),null,"ui-state-focus")}})},_trigger:function(e,i,s){var n,o,a=this.options[e];if(s=s||{},i=t.Event(i),i.type=(e===this.widgetEventPrefix?e:this.widgetEventPrefix+e).toLowerCase(),i.target=this.element[0],o=i.originalEvent)for(n in o)n in i||(i[n]=o[n]);return this.element.trigger(i,s),!(t.isFunction(a)&&a.apply(this.element[0],[i].concat(s))===!1||i.isDefaultPrevented())}},t.each({show:"fadeIn",hide:"fadeOut"},function(e,i){t.Widget.prototype["_"+e]=function(s,n,o){"string"==typeof n&&(n={effect:n});var a,r=n?n===!0||"number"==typeof n?i:n.effect||i:e;n=n||{},"number"==typeof n&&(n={duration:n}),a=!t.isEmptyObject(n),n.complete=o,n.delay&&s.delay(n.delay),a&&t.effects&&t.effects.effect[r]?s[e](n):r!==e&&s[r]?s[r](n.duration,n.easing,o):s.queue(function(i){t(this)[e](),o&&o.call(s[0]),i()})}}),t.widget,function(){function e(t,e,i){return[parseFloat(t[0])*(u.test(t[0])?e/100:1),parseFloat(t[1])*(u.test(t[1])?i/100:1)]}function i(e,i){return parseInt(t.css(e,i),10)||0}function s(e){var i=e[0];return 9===i.nodeType?{width:e.width(),height:e.height(),offset:{top:0,left:0}}:t.isWindow(i)?{width:e.width(),height:e.height(),offset:{top:e.scrollTop(),left:e.scrollLeft()}}:i.preventDefault?{width:0,height:0,offset:{top:i.pageY,left:i.pageX}}:{width:e.outerWidth(),height:e.outerHeight(),offset:e.offset()}}var n,o=Math.max,a=Math.abs,r=/left|center|right/,h=/top|center|bottom/,l=/[\+\-]\d+(\.[\d]+)?%?/,c=/^\w+/,u=/%$/,d=t.fn.position;t.position={scrollbarWidth:function(){if(void 0!==n)return n;var e,i,s=t("
"),o=s.children()[0];return t("body").append(s),e=o.offsetWidth,s.css("overflow","scroll"),i=o.offsetWidth,e===i&&(i=s[0].clientWidth),s.remove(),n=e-i},getScrollInfo:function(e){var i=e.isWindow||e.isDocument?"":e.element.css("overflow-x"),s=e.isWindow||e.isDocument?"":e.element.css("overflow-y"),n="scroll"===i||"auto"===i&&e.widthi?"left":e>0?"right":"center",vertical:0>r?"top":s>0?"bottom":"middle"};l>p&&p>a(e+i)&&(u.horizontal="center"),c>f&&f>a(s+r)&&(u.vertical="middle"),u.important=o(a(e),a(i))>o(a(s),a(r))?"horizontal":"vertical",n.using.call(this,t,u)}),h.offset(t.extend(D,{using:r}))})},t.ui.position={fit:{left:function(t,e){var i,s=e.within,n=s.isWindow?s.scrollLeft:s.offset.left,a=s.width,r=t.left-e.collisionPosition.marginLeft,h=n-r,l=r+e.collisionWidth-a-n;e.collisionWidth>a?h>0&&0>=l?(i=t.left+h+e.collisionWidth-a-n,t.left+=h-i):t.left=l>0&&0>=h?n:h>l?n+a-e.collisionWidth:n:h>0?t.left+=h:l>0?t.left-=l:t.left=o(t.left-r,t.left)},top:function(t,e){var i,s=e.within,n=s.isWindow?s.scrollTop:s.offset.top,a=e.within.height,r=t.top-e.collisionPosition.marginTop,h=n-r,l=r+e.collisionHeight-a-n;e.collisionHeight>a?h>0&&0>=l?(i=t.top+h+e.collisionHeight-a-n,t.top+=h-i):t.top=l>0&&0>=h?n:h>l?n+a-e.collisionHeight:n:h>0?t.top+=h:l>0?t.top-=l:t.top=o(t.top-r,t.top)}},flip:{left:function(t,e){var i,s,n=e.within,o=n.offset.left+n.scrollLeft,r=n.width,h=n.isWindow?n.scrollLeft:n.offset.left,l=t.left-e.collisionPosition.marginLeft,c=l-h,u=l+e.collisionWidth-r-h,d="left"===e.my[0]?-e.elemWidth:"right"===e.my[0]?e.elemWidth:0,p="left"===e.at[0]?e.targetWidth:"right"===e.at[0]?-e.targetWidth:0,f=-2*e.offset[0];0>c?(i=t.left+d+p+f+e.collisionWidth-r-o,(0>i||a(c)>i)&&(t.left+=d+p+f)):u>0&&(s=t.left-e.collisionPosition.marginLeft+d+p+f-h,(s>0||u>a(s))&&(t.left+=d+p+f))},top:function(t,e){var i,s,n=e.within,o=n.offset.top+n.scrollTop,r=n.height,h=n.isWindow?n.scrollTop:n.offset.top,l=t.top-e.collisionPosition.marginTop,c=l-h,u=l+e.collisionHeight-r-h,d="top"===e.my[1],p=d?-e.elemHeight:"bottom"===e.my[1]?e.elemHeight:0,f="top"===e.at[1]?e.targetHeight:"bottom"===e.at[1]?-e.targetHeight:0,m=-2*e.offset[1];0>c?(s=t.top+p+f+m+e.collisionHeight-r-o,(0>s||a(c)>s)&&(t.top+=p+f+m)):u>0&&(i=t.top-e.collisionPosition.marginTop+p+f+m-h,(i>0||u>a(i))&&(t.top+=p+f+m))}},flipfit:{left:function(){t.ui.position.flip.left.apply(this,arguments),t.ui.position.fit.left.apply(this,arguments)},top:function(){t.ui.position.flip.top.apply(this,arguments),t.ui.position.fit.top.apply(this,arguments)}}}}(),t.ui.position,t.extend(t.expr[":"],{data:t.expr.createPseudo?t.expr.createPseudo(function(e){return function(i){return!!t.data(i,e)}}):function(e,i,s){return!!t.data(e,s[3])}}),t.fn.extend({disableSelection:function(){var t="onselectstart"in document.createElement("div")?"selectstart":"mousedown";return function(){return this.on(t+".ui-disableSelection",function(t){t.preventDefault()})}}(),enableSelection:function(){return this.off(".ui-disableSelection")}}),t.ui.focusable=function(i,s){var n,o,a,r,h,l=i.nodeName.toLowerCase();return"area"===l?(n=i.parentNode,o=n.name,i.href&&o&&"map"===n.nodeName.toLowerCase()?(a=t("img[usemap='#"+o+"']"),a.length>0&&a.is(":visible")):!1):(/^(input|select|textarea|button|object)$/.test(l)?(r=!i.disabled,r&&(h=t(i).closest("fieldset")[0],h&&(r=!h.disabled))):r="a"===l?i.href||s:s,r&&t(i).is(":visible")&&e(t(i)))},t.extend(t.expr[":"],{focusable:function(e){return t.ui.focusable(e,null!=t.attr(e,"tabindex"))}}),t.ui.focusable,t.fn.form=function(){return"string"==typeof this[0].form?this.closest("form"):t(this[0].form)},t.ui.formResetMixin={_formResetHandler:function(){var e=t(this);setTimeout(function(){var i=e.data("ui-form-reset-instances");t.each(i,function(){this.refresh()})})},_bindFormResetHandler:function(){if(this.form=this.element.form(),this.form.length){var t=this.form.data("ui-form-reset-instances")||[];t.length||this.form.on("reset.ui-form-reset",this._formResetHandler),t.push(this),this.form.data("ui-form-reset-instances",t)}},_unbindFormResetHandler:function(){if(this.form.length){var e=this.form.data("ui-form-reset-instances");e.splice(t.inArray(this,e),1),e.length?this.form.data("ui-form-reset-instances",e):this.form.removeData("ui-form-reset-instances").off("reset.ui-form-reset")}}},"1.7"===t.fn.jquery.substring(0,3)&&(t.each(["Width","Height"],function(e,i){function s(e,i,s,o){return t.each(n,function(){i-=parseFloat(t.css(e,"padding"+this))||0,s&&(i-=parseFloat(t.css(e,"border"+this+"Width"))||0),o&&(i-=parseFloat(t.css(e,"margin"+this))||0)}),i}var n="Width"===i?["Left","Right"]:["Top","Bottom"],o=i.toLowerCase(),a={innerWidth:t.fn.innerWidth,innerHeight:t.fn.innerHeight,outerWidth:t.fn.outerWidth,outerHeight:t.fn.outerHeight};t.fn["inner"+i]=function(e){return void 0===e?a["inner"+i].call(this):this.each(function(){t(this).css(o,s(this,e)+"px")})},t.fn["outer"+i]=function(e,n){return"number"!=typeof e?a["outer"+i].call(this,e):this.each(function(){t(this).css(o,s(this,e,!0,n)+"px")})}}),t.fn.addBack=function(t){return this.add(null==t?this.prevObject:this.prevObject.filter(t))}),t.ui.keyCode={BACKSPACE:8,COMMA:188,DELETE:46,DOWN:40,END:35,ENTER:13,ESCAPE:27,HOME:36,LEFT:37,PAGE_DOWN:34,PAGE_UP:33,PERIOD:190,RIGHT:39,SPACE:32,TAB:9,UP:38},t.ui.escapeSelector=function(){var t=/([!"#$%&'()*+,./:;<=>?@[\]^`{|}~])/g;return function(e){return e.replace(t,"\\$1")}}(),t.fn.labels=function(){var e,i,s,n,o;return this[0].labels&&this[0].labels.length?this.pushStack(this[0].labels):(n=this.eq(0).parents("label"),s=this.attr("id"),s&&(e=this.eq(0).parents().last(),o=e.add(e.length?e.siblings():this.siblings()),i="label[for='"+t.ui.escapeSelector(s)+"']",n=n.add(o.find(i).addBack(i))),this.pushStack(n))},t.fn.scrollParent=function(e){var i=this.css("position"),s="absolute"===i,n=e?/(auto|scroll|hidden)/:/(auto|scroll)/,o=this.parents().filter(function(){var e=t(this);return s&&"static"===e.css("position")?!1:n.test(e.css("overflow")+e.css("overflow-y")+e.css("overflow-x"))}).eq(0);return"fixed"!==i&&o.length?o:t(this[0].ownerDocument||document)},t.extend(t.expr[":"],{tabbable:function(e){var i=t.attr(e,"tabindex"),s=null!=i;return(!s||i>=0)&&t.ui.focusable(e,s)}}),t.fn.extend({uniqueId:function(){var t=0;return function(){return this.each(function(){this.id||(this.id="ui-id-"+ ++t)})}}(),removeUniqueId:function(){return this.each(function(){/^ui-id-\d+$/.test(this.id)&&t(this).removeAttr("id")})}}),t.ui.ie=!!/msie [\w.]+/.exec(navigator.userAgent.toLowerCase());var n=!1;t(document).on("mouseup",function(){n=!1}),t.widget("ui.mouse",{version:"1.12.1",options:{cancel:"input, textarea, button, select, option",distance:1,delay:0},_mouseInit:function(){var e=this;this.element.on("mousedown."+this.widgetName,function(t){return e._mouseDown(t)}).on("click."+this.widgetName,function(i){return!0===t.data(i.target,e.widgetName+".preventClickEvent")?(t.removeData(i.target,e.widgetName+".preventClickEvent"),i.stopImmediatePropagation(),!1):void 0}),this.started=!1},_mouseDestroy:function(){this.element.off("."+this.widgetName),this._mouseMoveDelegate&&this.document.off("mousemove."+this.widgetName,this._mouseMoveDelegate).off("mouseup."+this.widgetName,this._mouseUpDelegate)},_mouseDown:function(e){if(!n){this._mouseMoved=!1,this._mouseStarted&&this._mouseUp(e),this._mouseDownEvent=e;var i=this,s=1===e.which,o="string"==typeof this.options.cancel&&e.target.nodeName?t(e.target).closest(this.options.cancel).length:!1;return s&&!o&&this._mouseCapture(e)?(this.mouseDelayMet=!this.options.delay,this.mouseDelayMet||(this._mouseDelayTimer=setTimeout(function(){i.mouseDelayMet=!0},this.options.delay)),this._mouseDistanceMet(e)&&this._mouseDelayMet(e)&&(this._mouseStarted=this._mouseStart(e)!==!1,!this._mouseStarted)?(e.preventDefault(),!0):(!0===t.data(e.target,this.widgetName+".preventClickEvent")&&t.removeData(e.target,this.widgetName+".preventClickEvent"),this._mouseMoveDelegate=function(t){return i._mouseMove(t)},this._mouseUpDelegate=function(t){return i._mouseUp(t)},this.document.on("mousemove."+this.widgetName,this._mouseMoveDelegate).on("mouseup."+this.widgetName,this._mouseUpDelegate),e.preventDefault(),n=!0,!0)):!0}},_mouseMove:function(e){if(this._mouseMoved){if(t.ui.ie&&(!document.documentMode||9>document.documentMode)&&!e.button)return this._mouseUp(e);if(!e.which)if(e.originalEvent.altKey||e.originalEvent.ctrlKey||e.originalEvent.metaKey||e.originalEvent.shiftKey)this.ignoreMissingWhich=!0;else if(!this.ignoreMissingWhich)return this._mouseUp(e)}return(e.which||e.button)&&(this._mouseMoved=!0),this._mouseStarted?(this._mouseDrag(e),e.preventDefault()):(this._mouseDistanceMet(e)&&this._mouseDelayMet(e)&&(this._mouseStarted=this._mouseStart(this._mouseDownEvent,e)!==!1,this._mouseStarted?this._mouseDrag(e):this._mouseUp(e)),!this._mouseStarted)},_mouseUp:function(e){this.document.off("mousemove."+this.widgetName,this._mouseMoveDelegate).off("mouseup."+this.widgetName,this._mouseUpDelegate),this._mouseStarted&&(this._mouseStarted=!1,e.target===this._mouseDownEvent.target&&t.data(e.target,this.widgetName+".preventClickEvent",!0),this._mouseStop(e)),this._mouseDelayTimer&&(clearTimeout(this._mouseDelayTimer),delete this._mouseDelayTimer),this.ignoreMissingWhich=!1,n=!1,e.preventDefault()},_mouseDistanceMet:function(t){return Math.max(Math.abs(this._mouseDownEvent.pageX-t.pageX),Math.abs(this._mouseDownEvent.pageY-t.pageY))>=this.options.distance},_mouseDelayMet:function(){return this.mouseDelayMet},_mouseStart:function(){},_mouseDrag:function(){},_mouseStop:function(){},_mouseCapture:function(){return!0}}),t.ui.plugin={add:function(e,i,s){var n,o=t.ui[e].prototype;for(n in s)o.plugins[n]=o.plugins[n]||[],o.plugins[n].push([i,s[n]])},call:function(t,e,i,s){var n,o=t.plugins[e];if(o&&(s||t.element[0].parentNode&&11!==t.element[0].parentNode.nodeType))for(n=0;o.length>n;n++)t.options[o[n][0]]&&o[n][1].apply(t.element,i)}},t.widget("ui.resizable",t.ui.mouse,{version:"1.12.1",widgetEventPrefix:"resize",options:{alsoResize:!1,animate:!1,animateDuration:"slow",animateEasing:"swing",aspectRatio:!1,autoHide:!1,classes:{"ui-resizable-se":"ui-icon ui-icon-gripsmall-diagonal-se"},containment:!1,ghost:!1,grid:!1,handles:"e,s,se",helper:!1,maxHeight:null,maxWidth:null,minHeight:10,minWidth:10,zIndex:90,resize:null,start:null,stop:null},_num:function(t){return parseFloat(t)||0},_isNumber:function(t){return!isNaN(parseFloat(t))},_hasScroll:function(e,i){if("hidden"===t(e).css("overflow"))return!1;var s=i&&"left"===i?"scrollLeft":"scrollTop",n=!1;return e[s]>0?!0:(e[s]=1,n=e[s]>0,e[s]=0,n)},_create:function(){var e,i=this.options,s=this;this._addClass("ui-resizable"),t.extend(this,{_aspectRatio:!!i.aspectRatio,aspectRatio:i.aspectRatio,originalElement:this.element,_proportionallyResizeElements:[],_helper:i.helper||i.ghost||i.animate?i.helper||"ui-resizable-helper":null}),this.element[0].nodeName.match(/^(canvas|textarea|input|select|button|img)$/i)&&(this.element.wrap(t("
").css({position:this.element.css("position"),width:this.element.outerWidth(),height:this.element.outerHeight(),top:this.element.css("top"),left:this.element.css("left")})),this.element=this.element.parent().data("ui-resizable",this.element.resizable("instance")),this.elementIsWrapper=!0,e={marginTop:this.originalElement.css("marginTop"),marginRight:this.originalElement.css("marginRight"),marginBottom:this.originalElement.css("marginBottom"),marginLeft:this.originalElement.css("marginLeft")},this.element.css(e),this.originalElement.css("margin",0),this.originalResizeStyle=this.originalElement.css("resize"),this.originalElement.css("resize","none"),this._proportionallyResizeElements.push(this.originalElement.css({position:"static",zoom:1,display:"block"})),this.originalElement.css(e),this._proportionallyResize()),this._setupHandles(),i.autoHide&&t(this.element).on("mouseenter",function(){i.disabled||(s._removeClass("ui-resizable-autohide"),s._handles.show())}).on("mouseleave",function(){i.disabled||s.resizing||(s._addClass("ui-resizable-autohide"),s._handles.hide())}),this._mouseInit()},_destroy:function(){this._mouseDestroy();var e,i=function(e){t(e).removeData("resizable").removeData("ui-resizable").off(".resizable").find(".ui-resizable-handle").remove()};return this.elementIsWrapper&&(i(this.element),e=this.element,this.originalElement.css({position:e.css("position"),width:e.outerWidth(),height:e.outerHeight(),top:e.css("top"),left:e.css("left")}).insertAfter(e),e.remove()),this.originalElement.css("resize",this.originalResizeStyle),i(this.originalElement),this},_setOption:function(t,e){switch(this._super(t,e),t){case"handles":this._removeHandles(),this._setupHandles();break;default:}},_setupHandles:function(){var e,i,s,n,o,a=this.options,r=this;if(this.handles=a.handles||(t(".ui-resizable-handle",this.element).length?{n:".ui-resizable-n",e:".ui-resizable-e",s:".ui-resizable-s",w:".ui-resizable-w",se:".ui-resizable-se",sw:".ui-resizable-sw",ne:".ui-resizable-ne",nw:".ui-resizable-nw"}:"e,s,se"),this._handles=t(),this.handles.constructor===String)for("all"===this.handles&&(this.handles="n,e,s,w,se,sw,ne,nw"),s=this.handles.split(","),this.handles={},i=0;s.length>i;i++)e=t.trim(s[i]),n="ui-resizable-"+e,o=t("
"),this._addClass(o,"ui-resizable-handle "+n),o.css({zIndex:a.zIndex}),this.handles[e]=".ui-resizable-"+e,this.element.append(o);this._renderAxis=function(e){var i,s,n,o;e=e||this.element;for(i in this.handles)this.handles[i].constructor===String?this.handles[i]=this.element.children(this.handles[i]).first().show():(this.handles[i].jquery||this.handles[i].nodeType)&&(this.handles[i]=t(this.handles[i]),this._on(this.handles[i],{mousedown:r._mouseDown})),this.elementIsWrapper&&this.originalElement[0].nodeName.match(/^(textarea|input|select|button)$/i)&&(s=t(this.handles[i],this.element),o=/sw|ne|nw|se|n|s/.test(i)?s.outerHeight():s.outerWidth(),n=["padding",/ne|nw|n/.test(i)?"Top":/se|sw|s/.test(i)?"Bottom":/^e$/.test(i)?"Right":"Left"].join(""),e.css(n,o),this._proportionallyResize()),this._handles=this._handles.add(this.handles[i])},this._renderAxis(this.element),this._handles=this._handles.add(this.element.find(".ui-resizable-handle")),this._handles.disableSelection(),this._handles.on("mouseover",function(){r.resizing||(this.className&&(o=this.className.match(/ui-resizable-(se|sw|ne|nw|n|e|s|w)/i)),r.axis=o&&o[1]?o[1]:"se")}),a.autoHide&&(this._handles.hide(),this._addClass("ui-resizable-autohide"))},_removeHandles:function(){this._handles.remove()},_mouseCapture:function(e){var i,s,n=!1;for(i in this.handles)s=t(this.handles[i])[0],(s===e.target||t.contains(s,e.target))&&(n=!0);return!this.options.disabled&&n},_mouseStart:function(e){var i,s,n,o=this.options,a=this.element;return this.resizing=!0,this._renderProxy(),i=this._num(this.helper.css("left")),s=this._num(this.helper.css("top")),o.containment&&(i+=t(o.containment).scrollLeft()||0,s+=t(o.containment).scrollTop()||0),this.offset=this.helper.offset(),this.position={left:i,top:s},this.size=this._helper?{width:this.helper.width(),height:this.helper.height()}:{width:a.width(),height:a.height()},this.originalSize=this._helper?{width:a.outerWidth(),height:a.outerHeight()}:{width:a.width(),height:a.height()},this.sizeDiff={width:a.outerWidth()-a.width(),height:a.outerHeight()-a.height()},this.originalPosition={left:i,top:s},this.originalMousePosition={left:e.pageX,top:e.pageY},this.aspectRatio="number"==typeof o.aspectRatio?o.aspectRatio:this.originalSize.width/this.originalSize.height||1,n=t(".ui-resizable-"+this.axis).css("cursor"),t("body").css("cursor","auto"===n?this.axis+"-resize":n),this._addClass("ui-resizable-resizing"),this._propagate("start",e),!0},_mouseDrag:function(e){var i,s,n=this.originalMousePosition,o=this.axis,a=e.pageX-n.left||0,r=e.pageY-n.top||0,h=this._change[o];return this._updatePrevProperties(),h?(i=h.apply(this,[e,a,r]),this._updateVirtualBoundaries(e.shiftKey),(this._aspectRatio||e.shiftKey)&&(i=this._updateRatio(i,e)),i=this._respectSize(i,e),this._updateCache(i),this._propagate("resize",e),s=this._applyChanges(),!this._helper&&this._proportionallyResizeElements.length&&this._proportionallyResize(),t.isEmptyObject(s)||(this._updatePrevProperties(),this._trigger("resize",e,this.ui()),this._applyChanges()),!1):!1},_mouseStop:function(e){this.resizing=!1;var i,s,n,o,a,r,h,l=this.options,c=this;return this._helper&&(i=this._proportionallyResizeElements,s=i.length&&/textarea/i.test(i[0].nodeName),n=s&&this._hasScroll(i[0],"left")?0:c.sizeDiff.height,o=s?0:c.sizeDiff.width,a={width:c.helper.width()-o,height:c.helper.height()-n},r=parseFloat(c.element.css("left"))+(c.position.left-c.originalPosition.left)||null,h=parseFloat(c.element.css("top"))+(c.position.top-c.originalPosition.top)||null,l.animate||this.element.css(t.extend(a,{top:h,left:r})),c.helper.height(c.size.height),c.helper.width(c.size.width),this._helper&&!l.animate&&this._proportionallyResize()),t("body").css("cursor","auto"),this._removeClass("ui-resizable-resizing"),this._propagate("stop",e),this._helper&&this.helper.remove(),!1},_updatePrevProperties:function(){this.prevPosition={top:this.position.top,left:this.position.left},this.prevSize={width:this.size.width,height:this.size.height}},_applyChanges:function(){var t={};return this.position.top!==this.prevPosition.top&&(t.top=this.position.top+"px"),this.position.left!==this.prevPosition.left&&(t.left=this.position.left+"px"),this.size.width!==this.prevSize.width&&(t.width=this.size.width+"px"),this.size.height!==this.prevSize.height&&(t.height=this.size.height+"px"),this.helper.css(t),t},_updateVirtualBoundaries:function(t){var e,i,s,n,o,a=this.options;o={minWidth:this._isNumber(a.minWidth)?a.minWidth:0,maxWidth:this._isNumber(a.maxWidth)?a.maxWidth:1/0,minHeight:this._isNumber(a.minHeight)?a.minHeight:0,maxHeight:this._isNumber(a.maxHeight)?a.maxHeight:1/0},(this._aspectRatio||t)&&(e=o.minHeight*this.aspectRatio,s=o.minWidth/this.aspectRatio,i=o.maxHeight*this.aspectRatio,n=o.maxWidth/this.aspectRatio,e>o.minWidth&&(o.minWidth=e),s>o.minHeight&&(o.minHeight=s),o.maxWidth>i&&(o.maxWidth=i),o.maxHeight>n&&(o.maxHeight=n)),this._vBoundaries=o},_updateCache:function(t){this.offset=this.helper.offset(),this._isNumber(t.left)&&(this.position.left=t.left),this._isNumber(t.top)&&(this.position.top=t.top),this._isNumber(t.height)&&(this.size.height=t.height),this._isNumber(t.width)&&(this.size.width=t.width)},_updateRatio:function(t){var e=this.position,i=this.size,s=this.axis;return this._isNumber(t.height)?t.width=t.height*this.aspectRatio:this._isNumber(t.width)&&(t.height=t.width/this.aspectRatio),"sw"===s&&(t.left=e.left+(i.width-t.width),t.top=null),"nw"===s&&(t.top=e.top+(i.height-t.height),t.left=e.left+(i.width-t.width)),t},_respectSize:function(t){var e=this._vBoundaries,i=this.axis,s=this._isNumber(t.width)&&e.maxWidth&&e.maxWidtht.width,a=this._isNumber(t.height)&&e.minHeight&&e.minHeight>t.height,r=this.originalPosition.left+this.originalSize.width,h=this.originalPosition.top+this.originalSize.height,l=/sw|nw|w/.test(i),c=/nw|ne|n/.test(i);return o&&(t.width=e.minWidth),a&&(t.height=e.minHeight),s&&(t.width=e.maxWidth),n&&(t.height=e.maxHeight),o&&l&&(t.left=r-e.minWidth),s&&l&&(t.left=r-e.maxWidth),a&&c&&(t.top=h-e.minHeight),n&&c&&(t.top=h-e.maxHeight),t.width||t.height||t.left||!t.top?t.width||t.height||t.top||!t.left||(t.left=null):t.top=null,t},_getPaddingPlusBorderDimensions:function(t){for(var e=0,i=[],s=[t.css("borderTopWidth"),t.css("borderRightWidth"),t.css("borderBottomWidth"),t.css("borderLeftWidth")],n=[t.css("paddingTop"),t.css("paddingRight"),t.css("paddingBottom"),t.css("paddingLeft")];4>e;e++)i[e]=parseFloat(s[e])||0,i[e]+=parseFloat(n[e])||0;return{height:i[0]+i[2],width:i[1]+i[3]}},_proportionallyResize:function(){if(this._proportionallyResizeElements.length)for(var t,e=0,i=this.helper||this.element;this._proportionallyResizeElements.length>e;e++)t=this._proportionallyResizeElements[e],this.outerDimensions||(this.outerDimensions=this._getPaddingPlusBorderDimensions(t)),t.css({height:i.height()-this.outerDimensions.height||0,width:i.width()-this.outerDimensions.width||0})},_renderProxy:function(){var e=this.element,i=this.options;this.elementOffset=e.offset(),this._helper?(this.helper=this.helper||t("
"),this._addClass(this.helper,this._helper),this.helper.css({width:this.element.outerWidth(),height:this.element.outerHeight(),position:"absolute",left:this.elementOffset.left+"px",top:this.elementOffset.top+"px",zIndex:++i.zIndex}),this.helper.appendTo("body").disableSelection()):this.helper=this.element +},_change:{e:function(t,e){return{width:this.originalSize.width+e}},w:function(t,e){var i=this.originalSize,s=this.originalPosition;return{left:s.left+e,width:i.width-e}},n:function(t,e,i){var s=this.originalSize,n=this.originalPosition;return{top:n.top+i,height:s.height-i}},s:function(t,e,i){return{height:this.originalSize.height+i}},se:function(e,i,s){return t.extend(this._change.s.apply(this,arguments),this._change.e.apply(this,[e,i,s]))},sw:function(e,i,s){return t.extend(this._change.s.apply(this,arguments),this._change.w.apply(this,[e,i,s]))},ne:function(e,i,s){return t.extend(this._change.n.apply(this,arguments),this._change.e.apply(this,[e,i,s]))},nw:function(e,i,s){return t.extend(this._change.n.apply(this,arguments),this._change.w.apply(this,[e,i,s]))}},_propagate:function(e,i){t.ui.plugin.call(this,e,[i,this.ui()]),"resize"!==e&&this._trigger(e,i,this.ui())},plugins:{},ui:function(){return{originalElement:this.originalElement,element:this.element,helper:this.helper,position:this.position,size:this.size,originalSize:this.originalSize,originalPosition:this.originalPosition}}}),t.ui.plugin.add("resizable","animate",{stop:function(e){var i=t(this).resizable("instance"),s=i.options,n=i._proportionallyResizeElements,o=n.length&&/textarea/i.test(n[0].nodeName),a=o&&i._hasScroll(n[0],"left")?0:i.sizeDiff.height,r=o?0:i.sizeDiff.width,h={width:i.size.width-r,height:i.size.height-a},l=parseFloat(i.element.css("left"))+(i.position.left-i.originalPosition.left)||null,c=parseFloat(i.element.css("top"))+(i.position.top-i.originalPosition.top)||null;i.element.animate(t.extend(h,c&&l?{top:c,left:l}:{}),{duration:s.animateDuration,easing:s.animateEasing,step:function(){var s={width:parseFloat(i.element.css("width")),height:parseFloat(i.element.css("height")),top:parseFloat(i.element.css("top")),left:parseFloat(i.element.css("left"))};n&&n.length&&t(n[0]).css({width:s.width,height:s.height}),i._updateCache(s),i._propagate("resize",e)}})}}),t.ui.plugin.add("resizable","containment",{start:function(){var e,i,s,n,o,a,r,h=t(this).resizable("instance"),l=h.options,c=h.element,u=l.containment,d=u instanceof t?u.get(0):/parent/.test(u)?c.parent().get(0):u;d&&(h.containerElement=t(d),/document/.test(u)||u===document?(h.containerOffset={left:0,top:0},h.containerPosition={left:0,top:0},h.parentData={element:t(document),left:0,top:0,width:t(document).width(),height:t(document).height()||document.body.parentNode.scrollHeight}):(e=t(d),i=[],t(["Top","Right","Left","Bottom"]).each(function(t,s){i[t]=h._num(e.css("padding"+s))}),h.containerOffset=e.offset(),h.containerPosition=e.position(),h.containerSize={height:e.innerHeight()-i[3],width:e.innerWidth()-i[1]},s=h.containerOffset,n=h.containerSize.height,o=h.containerSize.width,a=h._hasScroll(d,"left")?d.scrollWidth:o,r=h._hasScroll(d)?d.scrollHeight:n,h.parentData={element:d,left:s.left,top:s.top,width:a,height:r}))},resize:function(e){var i,s,n,o,a=t(this).resizable("instance"),r=a.options,h=a.containerOffset,l=a.position,c=a._aspectRatio||e.shiftKey,u={top:0,left:0},d=a.containerElement,p=!0;d[0]!==document&&/static/.test(d.css("position"))&&(u=h),l.left<(a._helper?h.left:0)&&(a.size.width=a.size.width+(a._helper?a.position.left-h.left:a.position.left-u.left),c&&(a.size.height=a.size.width/a.aspectRatio,p=!1),a.position.left=r.helper?h.left:0),l.top<(a._helper?h.top:0)&&(a.size.height=a.size.height+(a._helper?a.position.top-h.top:a.position.top),c&&(a.size.width=a.size.height*a.aspectRatio,p=!1),a.position.top=a._helper?h.top:0),n=a.containerElement.get(0)===a.element.parent().get(0),o=/relative|absolute/.test(a.containerElement.css("position")),n&&o?(a.offset.left=a.parentData.left+a.position.left,a.offset.top=a.parentData.top+a.position.top):(a.offset.left=a.element.offset().left,a.offset.top=a.element.offset().top),i=Math.abs(a.sizeDiff.width+(a._helper?a.offset.left-u.left:a.offset.left-h.left)),s=Math.abs(a.sizeDiff.height+(a._helper?a.offset.top-u.top:a.offset.top-h.top)),i+a.size.width>=a.parentData.width&&(a.size.width=a.parentData.width-i,c&&(a.size.height=a.size.width/a.aspectRatio,p=!1)),s+a.size.height>=a.parentData.height&&(a.size.height=a.parentData.height-s,c&&(a.size.width=a.size.height*a.aspectRatio,p=!1)),p||(a.position.left=a.prevPosition.left,a.position.top=a.prevPosition.top,a.size.width=a.prevSize.width,a.size.height=a.prevSize.height)},stop:function(){var e=t(this).resizable("instance"),i=e.options,s=e.containerOffset,n=e.containerPosition,o=e.containerElement,a=t(e.helper),r=a.offset(),h=a.outerWidth()-e.sizeDiff.width,l=a.outerHeight()-e.sizeDiff.height;e._helper&&!i.animate&&/relative/.test(o.css("position"))&&t(this).css({left:r.left-n.left-s.left,width:h,height:l}),e._helper&&!i.animate&&/static/.test(o.css("position"))&&t(this).css({left:r.left-n.left-s.left,width:h,height:l})}}),t.ui.plugin.add("resizable","alsoResize",{start:function(){var e=t(this).resizable("instance"),i=e.options;t(i.alsoResize).each(function(){var e=t(this);e.data("ui-resizable-alsoresize",{width:parseFloat(e.width()),height:parseFloat(e.height()),left:parseFloat(e.css("left")),top:parseFloat(e.css("top"))})})},resize:function(e,i){var s=t(this).resizable("instance"),n=s.options,o=s.originalSize,a=s.originalPosition,r={height:s.size.height-o.height||0,width:s.size.width-o.width||0,top:s.position.top-a.top||0,left:s.position.left-a.left||0};t(n.alsoResize).each(function(){var e=t(this),s=t(this).data("ui-resizable-alsoresize"),n={},o=e.parents(i.originalElement[0]).length?["width","height"]:["width","height","top","left"];t.each(o,function(t,e){var i=(s[e]||0)+(r[e]||0);i&&i>=0&&(n[e]=i||null)}),e.css(n)})},stop:function(){t(this).removeData("ui-resizable-alsoresize")}}),t.ui.plugin.add("resizable","ghost",{start:function(){var e=t(this).resizable("instance"),i=e.size;e.ghost=e.originalElement.clone(),e.ghost.css({opacity:.25,display:"block",position:"relative",height:i.height,width:i.width,margin:0,left:0,top:0}),e._addClass(e.ghost,"ui-resizable-ghost"),t.uiBackCompat!==!1&&"string"==typeof e.options.ghost&&e.ghost.addClass(this.options.ghost),e.ghost.appendTo(e.helper)},resize:function(){var e=t(this).resizable("instance");e.ghost&&e.ghost.css({position:"relative",height:e.size.height,width:e.size.width})},stop:function(){var e=t(this).resizable("instance");e.ghost&&e.helper&&e.helper.get(0).removeChild(e.ghost.get(0))}}),t.ui.plugin.add("resizable","grid",{resize:function(){var e,i=t(this).resizable("instance"),s=i.options,n=i.size,o=i.originalSize,a=i.originalPosition,r=i.axis,h="number"==typeof s.grid?[s.grid,s.grid]:s.grid,l=h[0]||1,c=h[1]||1,u=Math.round((n.width-o.width)/l)*l,d=Math.round((n.height-o.height)/c)*c,p=o.width+u,f=o.height+d,m=s.maxWidth&&p>s.maxWidth,g=s.maxHeight&&f>s.maxHeight,_=s.minWidth&&s.minWidth>p,v=s.minHeight&&s.minHeight>f;s.grid=h,_&&(p+=l),v&&(f+=c),m&&(p-=l),g&&(f-=c),/^(se|s|e)$/.test(r)?(i.size.width=p,i.size.height=f):/^(ne)$/.test(r)?(i.size.width=p,i.size.height=f,i.position.top=a.top-d):/^(sw)$/.test(r)?(i.size.width=p,i.size.height=f,i.position.left=a.left-u):((0>=f-c||0>=p-l)&&(e=i._getPaddingPlusBorderDimensions(this)),f-c>0?(i.size.height=f,i.position.top=a.top-d):(f=c-e.height,i.size.height=f,i.position.top=a.top+o.height-f),p-l>0?(i.size.width=p,i.position.left=a.left-u):(p=l-e.width,i.size.width=p,i.position.left=a.left+o.width-p))}}),t.ui.resizable});/** + * Copyright (c) 2007 Ariel Flesler - aflesler ○ gmail • com | https://github.com/flesler + * Licensed under MIT + * @author Ariel Flesler + * @version 2.1.2 + */ +;(function(f){"use strict";"function"===typeof define&&define.amd?define(["jquery"],f):"undefined"!==typeof module&&module.exports?module.exports=f(require("jquery")):f(jQuery)})(function($){"use strict";function n(a){return!a.nodeName||-1!==$.inArray(a.nodeName.toLowerCase(),["iframe","#document","html","body"])}function h(a){return $.isFunction(a)||$.isPlainObject(a)?a:{top:a,left:a}}var p=$.scrollTo=function(a,d,b){return $(window).scrollTo(a,d,b)};p.defaults={axis:"xy",duration:0,limit:!0};$.fn.scrollTo=function(a,d,b){"object"=== typeof d&&(b=d,d=0);"function"===typeof b&&(b={onAfter:b});"max"===a&&(a=9E9);b=$.extend({},p.defaults,b);d=d||b.duration;var u=b.queue&&1=f[g]?0:Math.min(f[g],n));!a&&1-1){targetElements.on(evt+EVENT_NAMESPACE,function elementToggle(event){$.powerTip.toggle(this,event)})}else{targetElements.on(evt+EVENT_NAMESPACE,function elementOpen(event){$.powerTip.show(this,event)})}});$.each(options.closeEvents,function(idx,evt){if($.inArray(evt,options.openEvents)<0){targetElements.on(evt+EVENT_NAMESPACE,function elementClose(event){$.powerTip.hide(this,!isMouseEvent(event))})}});targetElements.on("keydown"+EVENT_NAMESPACE,function elementKeyDown(event){if(event.keyCode===27){$.powerTip.hide(this,true)}})}return targetElements};$.fn.powerTip.defaults={fadeInTime:200,fadeOutTime:100,followMouse:false,popupId:"powerTip",popupClass:null,intentSensitivity:7,intentPollInterval:100,closeDelay:100,placement:"n",smartPlacement:false,offset:10,mouseOnToPopup:false,manual:false,openEvents:["mouseenter","focus"],closeEvents:["mouseleave","blur"]};$.fn.powerTip.smartPlacementLists={n:["n","ne","nw","s"],e:["e","ne","se","w","nw","sw","n","s","e"],s:["s","se","sw","n"],w:["w","nw","sw","e","ne","se","n","s","w"],nw:["nw","w","sw","n","s","se","nw"],ne:["ne","e","se","n","s","sw","ne"],sw:["sw","w","nw","s","n","ne","sw"],se:["se","e","ne","s","n","nw","se"],"nw-alt":["nw-alt","n","ne-alt","sw-alt","s","se-alt","w","e"],"ne-alt":["ne-alt","n","nw-alt","se-alt","s","sw-alt","e","w"],"sw-alt":["sw-alt","s","se-alt","nw-alt","n","ne-alt","w","e"],"se-alt":["se-alt","s","sw-alt","ne-alt","n","nw-alt","e","w"]};$.powerTip={show:function apiShowTip(element,event){if(isMouseEvent(event)){trackMouse(event);session.previousX=event.pageX;session.previousY=event.pageY;$(element).data(DATA_DISPLAYCONTROLLER).show()}else{$(element).first().data(DATA_DISPLAYCONTROLLER).show(true,true)}return element},reposition:function apiResetPosition(element){$(element).first().data(DATA_DISPLAYCONTROLLER).resetPosition();return element},hide:function apiCloseTip(element,immediate){var displayController;immediate=element?immediate:true;if(element){displayController=$(element).first().data(DATA_DISPLAYCONTROLLER)}else if(session.activeHover){displayController=session.activeHover.data(DATA_DISPLAYCONTROLLER)}if(displayController){displayController.hide(immediate)}return element},toggle:function apiToggle(element,event){if(session.activeHover&&session.activeHover.is(element)){$.powerTip.hide(element,!isMouseEvent(event))}else{$.powerTip.show(element,event)}return element}};$.powerTip.showTip=$.powerTip.show;$.powerTip.closeTip=$.powerTip.hide;function CSSCoordinates(){var me=this;me.top="auto";me.left="auto";me.right="auto";me.bottom="auto";me.set=function(property,value){if($.isNumeric(value)){me[property]=Math.round(value)}}}function DisplayController(element,options,tipController){var hoverTimer=null,myCloseDelay=null;function openTooltip(immediate,forceOpen){cancelTimer();if(!element.data(DATA_HASACTIVEHOVER)){if(!immediate){session.tipOpenImminent=true;hoverTimer=setTimeout(function intentDelay(){hoverTimer=null;checkForIntent()},options.intentPollInterval)}else{if(forceOpen){element.data(DATA_FORCEDOPEN,true)}closeAnyDelayed();tipController.showTip(element)}}else{cancelClose()}}function closeTooltip(disableDelay){if(myCloseDelay){myCloseDelay=session.closeDelayTimeout=clearTimeout(myCloseDelay);session.delayInProgress=false}cancelTimer();session.tipOpenImminent=false;if(element.data(DATA_HASACTIVEHOVER)){element.data(DATA_FORCEDOPEN,false);if(!disableDelay){session.delayInProgress=true;session.closeDelayTimeout=setTimeout(function closeDelay(){session.closeDelayTimeout=null;tipController.hideTip(element);session.delayInProgress=false;myCloseDelay=null},options.closeDelay);myCloseDelay=session.closeDelayTimeout}else{tipController.hideTip(element)}}}function checkForIntent(){var xDifference=Math.abs(session.previousX-session.currentX),yDifference=Math.abs(session.previousY-session.currentY),totalDifference=xDifference+yDifference;if(totalDifference",{id:options.popupId});if($body.length===0){$body=$("body")}$body.append(tipElement);session.tooltips=session.tooltips?session.tooltips.add(tipElement):tipElement}if(options.followMouse){if(!tipElement.data(DATA_HASMOUSEMOVE)){$document.on("mousemove"+EVENT_NAMESPACE,positionTipOnCursor);$window.on("scroll"+EVENT_NAMESPACE,positionTipOnCursor);tipElement.data(DATA_HASMOUSEMOVE,true)}}function beginShowTip(element){element.data(DATA_HASACTIVEHOVER,true);tipElement.queue(function queueTipInit(next){showTip(element);next()})}function showTip(element){var tipContent;if(!element.data(DATA_HASACTIVEHOVER)){return}if(session.isTipOpen){if(!session.isClosing){hideTip(session.activeHover)}tipElement.delay(100).queue(function queueTipAgain(next){showTip(element);next()});return}element.trigger("powerTipPreRender");tipContent=getTooltipContent(element);if(tipContent){tipElement.empty().append(tipContent)}else{return}element.trigger("powerTipRender");session.activeHover=element;session.isTipOpen=true;tipElement.data(DATA_MOUSEONTOTIP,options.mouseOnToPopup);tipElement.addClass(options.popupClass);if(!options.followMouse||element.data(DATA_FORCEDOPEN)){positionTipOnElement(element);session.isFixedTipOpen=true}else{positionTipOnCursor()}if(!element.data(DATA_FORCEDOPEN)&&!options.followMouse){$document.on("click"+EVENT_NAMESPACE,function documentClick(event){var target=event.target;if(target!==element[0]){if(options.mouseOnToPopup){if(target!==tipElement[0]&&!$.contains(tipElement[0],target)){$.powerTip.hide()}}else{$.powerTip.hide()}}})}if(options.mouseOnToPopup&&!options.manual){tipElement.on("mouseenter"+EVENT_NAMESPACE,function tipMouseEnter(){if(session.activeHover){session.activeHover.data(DATA_DISPLAYCONTROLLER).cancel()}});tipElement.on("mouseleave"+EVENT_NAMESPACE,function tipMouseLeave(){if(session.activeHover){session.activeHover.data(DATA_DISPLAYCONTROLLER).hide()}})}tipElement.fadeIn(options.fadeInTime,function fadeInCallback(){if(!session.desyncTimeout){session.desyncTimeout=setInterval(closeDesyncedTip,500)}element.trigger("powerTipOpen")})}function hideTip(element){session.isClosing=true;session.isTipOpen=false;session.desyncTimeout=clearInterval(session.desyncTimeout);element.data(DATA_HASACTIVEHOVER,false);element.data(DATA_FORCEDOPEN,false);$document.off("click"+EVENT_NAMESPACE);tipElement.off(EVENT_NAMESPACE);tipElement.fadeOut(options.fadeOutTime,function fadeOutCallback(){var coords=new CSSCoordinates;session.activeHover=null;session.isClosing=false;session.isFixedTipOpen=false;tipElement.removeClass();coords.set("top",session.currentY+options.offset);coords.set("left",session.currentX+options.offset);tipElement.css(coords);element.trigger("powerTipClose")})}function positionTipOnCursor(){var tipWidth,tipHeight,coords,collisions,collisionCount;if(!session.isFixedTipOpen&&(session.isTipOpen||session.tipOpenImminent&&tipElement.data(DATA_HASMOUSEMOVE))){tipWidth=tipElement.outerWidth();tipHeight=tipElement.outerHeight();coords=new CSSCoordinates;coords.set("top",session.currentY+options.offset);coords.set("left",session.currentX+options.offset);collisions=getViewportCollisions(coords,tipWidth,tipHeight);if(collisions!==Collision.none){collisionCount=countFlags(collisions);if(collisionCount===1){if(collisions===Collision.right){coords.set("left",session.scrollLeft+session.windowWidth-tipWidth)}else if(collisions===Collision.bottom){coords.set("top",session.scrollTop+session.windowHeight-tipHeight)}}else{coords.set("left",session.currentX-tipWidth-options.offset);coords.set("top",session.currentY-tipHeight-options.offset)}}tipElement.css(coords)}}function positionTipOnElement(element){var priorityList,finalPlacement;if(options.smartPlacement||options.followMouse&&element.data(DATA_FORCEDOPEN)){priorityList=$.fn.powerTip.smartPlacementLists[options.placement];$.each(priorityList,function(idx,pos){var collisions=getViewportCollisions(placeTooltip(element,pos),tipElement.outerWidth(),tipElement.outerHeight());finalPlacement=pos;return collisions!==Collision.none})}else{placeTooltip(element,options.placement);finalPlacement=options.placement}tipElement.removeClass("w nw sw e ne se n s w se-alt sw-alt ne-alt nw-alt");tipElement.addClass(finalPlacement)}function placeTooltip(element,placement){var iterationCount=0,tipWidth,tipHeight,coords=new CSSCoordinates;coords.set("top",0);coords.set("left",0);tipElement.css(coords);do{tipWidth=tipElement.outerWidth();tipHeight=tipElement.outerHeight();coords=placementCalculator.compute(element,placement,tipWidth,tipHeight,options.offset);tipElement.css(coords)}while(++iterationCount<=5&&(tipWidth!==tipElement.outerWidth()||tipHeight!==tipElement.outerHeight()));return coords}function closeDesyncedTip(){var isDesynced=false,hasDesyncableCloseEvent=$.grep(["mouseleave","mouseout","blur","focusout"],function(eventType){return $.inArray(eventType,options.closeEvents)!==-1}).length>0;if(session.isTipOpen&&!session.isClosing&&!session.delayInProgress&&hasDesyncableCloseEvent){if(session.activeHover.data(DATA_HASACTIVEHOVER)===false||session.activeHover.is(":disabled")){isDesynced=true}else if(!isMouseOver(session.activeHover)&&!session.activeHover.is(":focus")&&!session.activeHover.data(DATA_FORCEDOPEN)){if(tipElement.data(DATA_MOUSEONTOTIP)){if(!isMouseOver(tipElement)){isDesynced=true}}else{isDesynced=true}}if(isDesynced){hideTip(session.activeHover)}}}this.showTip=beginShowTip;this.hideTip=hideTip;this.resetPosition=positionTipOnElement}function isSvgElement(element){return Boolean(window.SVGElement&&element[0]instanceof SVGElement)}function isMouseEvent(event){return Boolean(event&&$.inArray(event.type,MOUSE_EVENTS)>-1&&typeof event.pageX==="number")}function initTracking(){if(!session.mouseTrackingActive){session.mouseTrackingActive=true;getViewportDimensions();$(getViewportDimensions);$document.on("mousemove"+EVENT_NAMESPACE,trackMouse);$window.on("resize"+EVENT_NAMESPACE,trackResize);$window.on("scroll"+EVENT_NAMESPACE,trackScroll)}}function getViewportDimensions(){session.scrollLeft=$window.scrollLeft();session.scrollTop=$window.scrollTop();session.windowWidth=$window.width();session.windowHeight=$window.height()}function trackResize(){session.windowWidth=$window.width();session.windowHeight=$window.height()}function trackScroll(){var x=$window.scrollLeft(),y=$window.scrollTop();if(x!==session.scrollLeft){session.currentX+=x-session.scrollLeft;session.scrollLeft=x}if(y!==session.scrollTop){session.currentY+=y-session.scrollTop;session.scrollTop=y}}function trackMouse(event){session.currentX=event.pageX;session.currentY=event.pageY}function isMouseOver(element){var elementPosition=element.offset(),elementBox=element[0].getBoundingClientRect(),elementWidth=elementBox.right-elementBox.left,elementHeight=elementBox.bottom-elementBox.top;return session.currentX>=elementPosition.left&&session.currentX<=elementPosition.left+elementWidth&&session.currentY>=elementPosition.top&&session.currentY<=elementPosition.top+elementHeight}function getTooltipContent(element){var tipText=element.data(DATA_POWERTIP),tipObject=element.data(DATA_POWERTIPJQ),tipTarget=element.data(DATA_POWERTIPTARGET),targetElement,content;if(tipText){if($.isFunction(tipText)){tipText=tipText.call(element[0])}content=tipText}else if(tipObject){if($.isFunction(tipObject)){tipObject=tipObject.call(element[0])}if(tipObject.length>0){content=tipObject.clone(true,true)}}else if(tipTarget){targetElement=$("#"+tipTarget);if(targetElement.length>0){content=targetElement.html()}}return content}function getViewportCollisions(coords,elementWidth,elementHeight){var viewportTop=session.scrollTop,viewportLeft=session.scrollLeft,viewportBottom=viewportTop+session.windowHeight,viewportRight=viewportLeft+session.windowWidth,collisions=Collision.none;if(coords.topviewportBottom||Math.abs(coords.bottom-session.windowHeight)>viewportBottom){collisions|=Collision.bottom}if(coords.leftviewportRight){collisions|=Collision.left}if(coords.left+elementWidth>viewportRight||coords.right1)){a.preventDefault();var c=a.originalEvent.changedTouches[0],d=document.createEvent("MouseEvents");d.initMouseEvent(b,!0,!0,window,1,c.screenX,c.screenY,c.clientX,c.clientY,!1,!1,!1,!1,0,null),a.target.dispatchEvent(d)}}if(a.support.touch="ontouchend"in document,a.support.touch){var e,b=a.ui.mouse.prototype,c=b._mouseInit,d=b._mouseDestroy;b._touchStart=function(a){var b=this;!e&&b._mouseCapture(a.originalEvent.changedTouches[0])&&(e=!0,b._touchMoved=!1,f(a,"mouseover"),f(a,"mousemove"),f(a,"mousedown"))},b._touchMove=function(a){e&&(this._touchMoved=!0,f(a,"mousemove"))},b._touchEnd=function(a){e&&(f(a,"mouseup"),f(a,"mouseout"),this._touchMoved||f(a,"click"),e=!1)},b._mouseInit=function(){var b=this;b.element.bind({touchstart:a.proxy(b,"_touchStart"),touchmove:a.proxy(b,"_touchMove"),touchend:a.proxy(b,"_touchEnd")}),c.call(b)},b._mouseDestroy=function(){var b=this;b.element.unbind({touchstart:a.proxy(b,"_touchStart"),touchmove:a.proxy(b,"_touchMove"),touchend:a.proxy(b,"_touchEnd")}),d.call(b)}}}(jQuery);/*! SmartMenus jQuery Plugin - v1.1.0 - September 17, 2017 + * http://www.smartmenus.org/ + * Copyright Vasil Dinkov, Vadikom Web Ltd. http://vadikom.com; Licensed MIT */(function(t){"function"==typeof define&&define.amd?define(["jquery"],t):"object"==typeof module&&"object"==typeof module.exports?module.exports=t(require("jquery")):t(jQuery)})(function($){function initMouseDetection(t){var e=".smartmenus_mouse";if(mouseDetectionEnabled||t)mouseDetectionEnabled&&t&&($(document).off(e),mouseDetectionEnabled=!1);else{var i=!0,s=null,o={mousemove:function(t){var e={x:t.pageX,y:t.pageY,timeStamp:(new Date).getTime()};if(s){var o=Math.abs(s.x-e.x),a=Math.abs(s.y-e.y);if((o>0||a>0)&&2>=o&&2>=a&&300>=e.timeStamp-s.timeStamp&&(mouse=!0,i)){var n=$(t.target).closest("a");n.is("a")&&$.each(menuTrees,function(){return $.contains(this.$root[0],n[0])?(this.itemEnter({currentTarget:n[0]}),!1):void 0}),i=!1}}s=e}};o[touchEvents?"touchstart":"pointerover pointermove pointerout MSPointerOver MSPointerMove MSPointerOut"]=function(t){isTouchEvent(t.originalEvent)&&(mouse=!1)},$(document).on(getEventsNS(o,e)),mouseDetectionEnabled=!0}}function isTouchEvent(t){return!/^(4|mouse)$/.test(t.pointerType)}function getEventsNS(t,e){e||(e="");var i={};for(var s in t)i[s.split(" ").join(e+" ")+e]=t[s];return i}var menuTrees=[],mouse=!1,touchEvents="ontouchstart"in window,mouseDetectionEnabled=!1,requestAnimationFrame=window.requestAnimationFrame||function(t){return setTimeout(t,1e3/60)},cancelAnimationFrame=window.cancelAnimationFrame||function(t){clearTimeout(t)},canAnimate=!!$.fn.animate;return $.SmartMenus=function(t,e){this.$root=$(t),this.opts=e,this.rootId="",this.accessIdPrefix="",this.$subArrow=null,this.activatedItems=[],this.visibleSubMenus=[],this.showTimeout=0,this.hideTimeout=0,this.scrollTimeout=0,this.clickActivated=!1,this.focusActivated=!1,this.zIndexInc=0,this.idInc=0,this.$firstLink=null,this.$firstSub=null,this.disabled=!1,this.$disableOverlay=null,this.$touchScrollingSub=null,this.cssTransforms3d="perspective"in t.style||"webkitPerspective"in t.style,this.wasCollapsible=!1,this.init()},$.extend($.SmartMenus,{hideAll:function(){$.each(menuTrees,function(){this.menuHideAll()})},destroy:function(){for(;menuTrees.length;)menuTrees[0].destroy();initMouseDetection(!0)},prototype:{init:function(t){var e=this;if(!t){menuTrees.push(this),this.rootId=((new Date).getTime()+Math.random()+"").replace(/\D/g,""),this.accessIdPrefix="sm-"+this.rootId+"-",this.$root.hasClass("sm-rtl")&&(this.opts.rightToLeftSubMenus=!0);var i=".smartmenus";this.$root.data("smartmenus",this).attr("data-smartmenus-id",this.rootId).dataSM("level",1).on(getEventsNS({"mouseover focusin":$.proxy(this.rootOver,this),"mouseout focusout":$.proxy(this.rootOut,this),keydown:$.proxy(this.rootKeyDown,this)},i)).on(getEventsNS({mouseenter:$.proxy(this.itemEnter,this),mouseleave:$.proxy(this.itemLeave,this),mousedown:$.proxy(this.itemDown,this),focus:$.proxy(this.itemFocus,this),blur:$.proxy(this.itemBlur,this),click:$.proxy(this.itemClick,this)},i),"a"),i+=this.rootId,this.opts.hideOnClick&&$(document).on(getEventsNS({touchstart:$.proxy(this.docTouchStart,this),touchmove:$.proxy(this.docTouchMove,this),touchend:$.proxy(this.docTouchEnd,this),click:$.proxy(this.docClick,this)},i)),$(window).on(getEventsNS({"resize orientationchange":$.proxy(this.winResize,this)},i)),this.opts.subIndicators&&(this.$subArrow=$("").addClass("sub-arrow"),this.opts.subIndicatorsText&&this.$subArrow.html(this.opts.subIndicatorsText)),initMouseDetection()}if(this.$firstSub=this.$root.find("ul").each(function(){e.menuInit($(this))}).eq(0),this.$firstLink=this.$root.find("a").eq(0),this.opts.markCurrentItem){var s=/(index|default)\.[^#\?\/]*/i,o=/#.*/,a=window.location.href.replace(s,""),n=a.replace(o,"");this.$root.find("a").each(function(){var t=this.href.replace(s,""),i=$(this);(t==a||t==n)&&(i.addClass("current"),e.opts.markCurrentTree&&i.parentsUntil("[data-smartmenus-id]","ul").each(function(){$(this).dataSM("parent-a").addClass("current")}))})}this.wasCollapsible=this.isCollapsible()},destroy:function(t){if(!t){var e=".smartmenus";this.$root.removeData("smartmenus").removeAttr("data-smartmenus-id").removeDataSM("level").off(e),e+=this.rootId,$(document).off(e),$(window).off(e),this.opts.subIndicators&&(this.$subArrow=null)}this.menuHideAll();var i=this;this.$root.find("ul").each(function(){var t=$(this);t.dataSM("scroll-arrows")&&t.dataSM("scroll-arrows").remove(),t.dataSM("shown-before")&&((i.opts.subMenusMinWidth||i.opts.subMenusMaxWidth)&&t.css({width:"",minWidth:"",maxWidth:""}).removeClass("sm-nowrap"),t.dataSM("scroll-arrows")&&t.dataSM("scroll-arrows").remove(),t.css({zIndex:"",top:"",left:"",marginLeft:"",marginTop:"",display:""})),0==(t.attr("id")||"").indexOf(i.accessIdPrefix)&&t.removeAttr("id")}).removeDataSM("in-mega").removeDataSM("shown-before").removeDataSM("scroll-arrows").removeDataSM("parent-a").removeDataSM("level").removeDataSM("beforefirstshowfired").removeAttr("role").removeAttr("aria-hidden").removeAttr("aria-labelledby").removeAttr("aria-expanded"),this.$root.find("a.has-submenu").each(function(){var t=$(this);0==t.attr("id").indexOf(i.accessIdPrefix)&&t.removeAttr("id")}).removeClass("has-submenu").removeDataSM("sub").removeAttr("aria-haspopup").removeAttr("aria-controls").removeAttr("aria-expanded").closest("li").removeDataSM("sub"),this.opts.subIndicators&&this.$root.find("span.sub-arrow").remove(),this.opts.markCurrentItem&&this.$root.find("a.current").removeClass("current"),t||(this.$root=null,this.$firstLink=null,this.$firstSub=null,this.$disableOverlay&&(this.$disableOverlay.remove(),this.$disableOverlay=null),menuTrees.splice($.inArray(this,menuTrees),1))},disable:function(t){if(!this.disabled){if(this.menuHideAll(),!t&&!this.opts.isPopup&&this.$root.is(":visible")){var e=this.$root.offset();this.$disableOverlay=$('
').css({position:"absolute",top:e.top,left:e.left,width:this.$root.outerWidth(),height:this.$root.outerHeight(),zIndex:this.getStartZIndex(!0),opacity:0}).appendTo(document.body)}this.disabled=!0}},docClick:function(t){return this.$touchScrollingSub?(this.$touchScrollingSub=null,void 0):((this.visibleSubMenus.length&&!$.contains(this.$root[0],t.target)||$(t.target).closest("a").length)&&this.menuHideAll(),void 0)},docTouchEnd:function(){if(this.lastTouch){if(!(!this.visibleSubMenus.length||void 0!==this.lastTouch.x2&&this.lastTouch.x1!=this.lastTouch.x2||void 0!==this.lastTouch.y2&&this.lastTouch.y1!=this.lastTouch.y2||this.lastTouch.target&&$.contains(this.$root[0],this.lastTouch.target))){this.hideTimeout&&(clearTimeout(this.hideTimeout),this.hideTimeout=0);var t=this;this.hideTimeout=setTimeout(function(){t.menuHideAll()},350)}this.lastTouch=null}},docTouchMove:function(t){if(this.lastTouch){var e=t.originalEvent.touches[0];this.lastTouch.x2=e.pageX,this.lastTouch.y2=e.pageY}},docTouchStart:function(t){var e=t.originalEvent.touches[0];this.lastTouch={x1:e.pageX,y1:e.pageY,target:e.target}},enable:function(){this.disabled&&(this.$disableOverlay&&(this.$disableOverlay.remove(),this.$disableOverlay=null),this.disabled=!1)},getClosestMenu:function(t){for(var e=$(t).closest("ul");e.dataSM("in-mega");)e=e.parent().closest("ul");return e[0]||null},getHeight:function(t){return this.getOffset(t,!0)},getOffset:function(t,e){var i;"none"==t.css("display")&&(i={position:t[0].style.position,visibility:t[0].style.visibility},t.css({position:"absolute",visibility:"hidden"}).show());var s=t[0].getBoundingClientRect&&t[0].getBoundingClientRect(),o=s&&(e?s.height||s.bottom-s.top:s.width||s.right-s.left);return o||0===o||(o=e?t[0].offsetHeight:t[0].offsetWidth),i&&t.hide().css(i),o},getStartZIndex:function(t){var e=parseInt(this[t?"$root":"$firstSub"].css("z-index"));return!t&&isNaN(e)&&(e=parseInt(this.$root.css("z-index"))),isNaN(e)?1:e},getTouchPoint:function(t){return t.touches&&t.touches[0]||t.changedTouches&&t.changedTouches[0]||t},getViewport:function(t){var e=t?"Height":"Width",i=document.documentElement["client"+e],s=window["inner"+e];return s&&(i=Math.min(i,s)),i},getViewportHeight:function(){return this.getViewport(!0)},getViewportWidth:function(){return this.getViewport()},getWidth:function(t){return this.getOffset(t)},handleEvents:function(){return!this.disabled&&this.isCSSOn()},handleItemEvents:function(t){return this.handleEvents()&&!this.isLinkInMegaMenu(t)},isCollapsible:function(){return"static"==this.$firstSub.css("position")},isCSSOn:function(){return"inline"!=this.$firstLink.css("display")},isFixed:function(){var t="fixed"==this.$root.css("position");return t||this.$root.parentsUntil("body").each(function(){return"fixed"==$(this).css("position")?(t=!0,!1):void 0}),t},isLinkInMegaMenu:function(t){return $(this.getClosestMenu(t[0])).hasClass("mega-menu")},isTouchMode:function(){return!mouse||this.opts.noMouseOver||this.isCollapsible()},itemActivate:function(t,e){var i=t.closest("ul"),s=i.dataSM("level");if(s>1&&(!this.activatedItems[s-2]||this.activatedItems[s-2][0]!=i.dataSM("parent-a")[0])){var o=this;$(i.parentsUntil("[data-smartmenus-id]","ul").get().reverse()).add(i).each(function(){o.itemActivate($(this).dataSM("parent-a"))})}if((!this.isCollapsible()||e)&&this.menuHideSubMenus(this.activatedItems[s-1]&&this.activatedItems[s-1][0]==t[0]?s:s-1),this.activatedItems[s-1]=t,this.$root.triggerHandler("activate.smapi",t[0])!==!1){var a=t.dataSM("sub");a&&(this.isTouchMode()||!this.opts.showOnClick||this.clickActivated)&&this.menuShow(a)}},itemBlur:function(t){var e=$(t.currentTarget);this.handleItemEvents(e)&&this.$root.triggerHandler("blur.smapi",e[0])},itemClick:function(t){var e=$(t.currentTarget);if(this.handleItemEvents(e)){if(this.$touchScrollingSub&&this.$touchScrollingSub[0]==e.closest("ul")[0])return this.$touchScrollingSub=null,t.stopPropagation(),!1;if(this.$root.triggerHandler("click.smapi",e[0])===!1)return!1;var i=$(t.target).is(".sub-arrow"),s=e.dataSM("sub"),o=s?2==s.dataSM("level"):!1,a=this.isCollapsible(),n=/toggle$/.test(this.opts.collapsibleBehavior),r=/link$/.test(this.opts.collapsibleBehavior),h=/^accordion/.test(this.opts.collapsibleBehavior);if(s&&!s.is(":visible")){if((!r||!a||i)&&(this.opts.showOnClick&&o&&(this.clickActivated=!0),this.itemActivate(e,h),s.is(":visible")))return this.focusActivated=!0,!1}else if(a&&(n||i))return this.itemActivate(e,h),this.menuHide(s),n&&(this.focusActivated=!1),!1;return this.opts.showOnClick&&o||e.hasClass("disabled")||this.$root.triggerHandler("select.smapi",e[0])===!1?!1:void 0}},itemDown:function(t){var e=$(t.currentTarget);this.handleItemEvents(e)&&e.dataSM("mousedown",!0)},itemEnter:function(t){var e=$(t.currentTarget);if(this.handleItemEvents(e)){if(!this.isTouchMode()){this.showTimeout&&(clearTimeout(this.showTimeout),this.showTimeout=0);var i=this;this.showTimeout=setTimeout(function(){i.itemActivate(e)},this.opts.showOnClick&&1==e.closest("ul").dataSM("level")?1:this.opts.showTimeout)}this.$root.triggerHandler("mouseenter.smapi",e[0])}},itemFocus:function(t){var e=$(t.currentTarget);this.handleItemEvents(e)&&(!this.focusActivated||this.isTouchMode()&&e.dataSM("mousedown")||this.activatedItems.length&&this.activatedItems[this.activatedItems.length-1][0]==e[0]||this.itemActivate(e,!0),this.$root.triggerHandler("focus.smapi",e[0]))},itemLeave:function(t){var e=$(t.currentTarget);this.handleItemEvents(e)&&(this.isTouchMode()||(e[0].blur(),this.showTimeout&&(clearTimeout(this.showTimeout),this.showTimeout=0)),e.removeDataSM("mousedown"),this.$root.triggerHandler("mouseleave.smapi",e[0]))},menuHide:function(t){if(this.$root.triggerHandler("beforehide.smapi",t[0])!==!1&&(canAnimate&&t.stop(!0,!0),"none"!=t.css("display"))){var e=function(){t.css("z-index","")};this.isCollapsible()?canAnimate&&this.opts.collapsibleHideFunction?this.opts.collapsibleHideFunction.call(this,t,e):t.hide(this.opts.collapsibleHideDuration,e):canAnimate&&this.opts.hideFunction?this.opts.hideFunction.call(this,t,e):t.hide(this.opts.hideDuration,e),t.dataSM("scroll")&&(this.menuScrollStop(t),t.css({"touch-action":"","-ms-touch-action":"","-webkit-transform":"",transform:""}).off(".smartmenus_scroll").removeDataSM("scroll").dataSM("scroll-arrows").hide()),t.dataSM("parent-a").removeClass("highlighted").attr("aria-expanded","false"),t.attr({"aria-expanded":"false","aria-hidden":"true"});var i=t.dataSM("level");this.activatedItems.splice(i-1,1),this.visibleSubMenus.splice($.inArray(t,this.visibleSubMenus),1),this.$root.triggerHandler("hide.smapi",t[0])}},menuHideAll:function(){this.showTimeout&&(clearTimeout(this.showTimeout),this.showTimeout=0);for(var t=this.opts.isPopup?1:0,e=this.visibleSubMenus.length-1;e>=t;e--)this.menuHide(this.visibleSubMenus[e]);this.opts.isPopup&&(canAnimate&&this.$root.stop(!0,!0),this.$root.is(":visible")&&(canAnimate&&this.opts.hideFunction?this.opts.hideFunction.call(this,this.$root):this.$root.hide(this.opts.hideDuration))),this.activatedItems=[],this.visibleSubMenus=[],this.clickActivated=!1,this.focusActivated=!1,this.zIndexInc=0,this.$root.triggerHandler("hideAll.smapi")},menuHideSubMenus:function(t){for(var e=this.activatedItems.length-1;e>=t;e--){var i=this.activatedItems[e].dataSM("sub");i&&this.menuHide(i)}},menuInit:function(t){if(!t.dataSM("in-mega")){t.hasClass("mega-menu")&&t.find("ul").dataSM("in-mega",!0);for(var e=2,i=t[0];(i=i.parentNode.parentNode)!=this.$root[0];)e++;var s=t.prevAll("a").eq(-1);s.length||(s=t.prevAll().find("a").eq(-1)),s.addClass("has-submenu").dataSM("sub",t),t.dataSM("parent-a",s).dataSM("level",e).parent().dataSM("sub",t);var o=s.attr("id")||this.accessIdPrefix+ ++this.idInc,a=t.attr("id")||this.accessIdPrefix+ ++this.idInc;s.attr({id:o,"aria-haspopup":"true","aria-controls":a,"aria-expanded":"false"}),t.attr({id:a,role:"group","aria-hidden":"true","aria-labelledby":o,"aria-expanded":"false"}),this.opts.subIndicators&&s[this.opts.subIndicatorsPos](this.$subArrow.clone())}},menuPosition:function(t){var e,i,s=t.dataSM("parent-a"),o=s.closest("li"),a=o.parent(),n=t.dataSM("level"),r=this.getWidth(t),h=this.getHeight(t),u=s.offset(),l=u.left,c=u.top,d=this.getWidth(s),m=this.getHeight(s),p=$(window),f=p.scrollLeft(),v=p.scrollTop(),b=this.getViewportWidth(),S=this.getViewportHeight(),g=a.parent().is("[data-sm-horizontal-sub]")||2==n&&!a.hasClass("sm-vertical"),M=this.opts.rightToLeftSubMenus&&!o.is("[data-sm-reverse]")||!this.opts.rightToLeftSubMenus&&o.is("[data-sm-reverse]"),w=2==n?this.opts.mainMenuSubOffsetX:this.opts.subMenusSubOffsetX,T=2==n?this.opts.mainMenuSubOffsetY:this.opts.subMenusSubOffsetY;if(g?(e=M?d-r-w:w,i=this.opts.bottomToTopSubMenus?-h-T:m+T):(e=M?w-r:d-w,i=this.opts.bottomToTopSubMenus?m-T-h:T),this.opts.keepInViewport){var y=l+e,I=c+i;if(M&&f>y?e=g?f-y+e:d-w:!M&&y+r>f+b&&(e=g?f+b-r-y+e:w-r),g||(S>h&&I+h>v+S?i+=v+S-h-I:(h>=S||v>I)&&(i+=v-I)),g&&(I+h>v+S+.49||v>I)||!g&&h>S+.49){var x=this;t.dataSM("scroll-arrows")||t.dataSM("scroll-arrows",$([$('')[0],$('')[0]]).on({mouseenter:function(){t.dataSM("scroll").up=$(this).hasClass("scroll-up"),x.menuScroll(t)},mouseleave:function(e){x.menuScrollStop(t),x.menuScrollOut(t,e)},"mousewheel DOMMouseScroll":function(t){t.preventDefault()}}).insertAfter(t));var A=".smartmenus_scroll";if(t.dataSM("scroll",{y:this.cssTransforms3d?0:i-m,step:1,itemH:m,subH:h,arrowDownH:this.getHeight(t.dataSM("scroll-arrows").eq(1))}).on(getEventsNS({mouseover:function(e){x.menuScrollOver(t,e)},mouseout:function(e){x.menuScrollOut(t,e)},"mousewheel DOMMouseScroll":function(e){x.menuScrollMousewheel(t,e)}},A)).dataSM("scroll-arrows").css({top:"auto",left:"0",marginLeft:e+(parseInt(t.css("border-left-width"))||0),width:r-(parseInt(t.css("border-left-width"))||0)-(parseInt(t.css("border-right-width"))||0),zIndex:t.css("z-index")}).eq(g&&this.opts.bottomToTopSubMenus?0:1).show(),this.isFixed()){var C={};C[touchEvents?"touchstart touchmove touchend":"pointerdown pointermove pointerup MSPointerDown MSPointerMove MSPointerUp"]=function(e){x.menuScrollTouch(t,e)},t.css({"touch-action":"none","-ms-touch-action":"none"}).on(getEventsNS(C,A))}}}t.css({top:"auto",left:"0",marginLeft:e,marginTop:i-m})},menuScroll:function(t,e,i){var s,o=t.dataSM("scroll"),a=t.dataSM("scroll-arrows"),n=o.up?o.upEnd:o.downEnd;if(!e&&o.momentum){if(o.momentum*=.92,s=o.momentum,.5>s)return this.menuScrollStop(t),void 0}else s=i||(e||!this.opts.scrollAccelerate?this.opts.scrollStep:Math.floor(o.step));var r=t.dataSM("level");if(this.activatedItems[r-1]&&this.activatedItems[r-1].dataSM("sub")&&this.activatedItems[r-1].dataSM("sub").is(":visible")&&this.menuHideSubMenus(r-1),o.y=o.up&&o.y>=n||!o.up&&n>=o.y?o.y:Math.abs(n-o.y)>s?o.y+(o.up?s:-s):n,t.css(this.cssTransforms3d?{"-webkit-transform":"translate3d(0, "+o.y+"px, 0)",transform:"translate3d(0, "+o.y+"px, 0)"}:{marginTop:o.y}),mouse&&(o.up&&o.y>o.downEnd||!o.up&&o.y0;t.dataSM("scroll-arrows").eq(i?0:1).is(":visible")&&(t.dataSM("scroll").up=i,this.menuScroll(t,!0))}e.preventDefault()},menuScrollOut:function(t,e){mouse&&(/^scroll-(up|down)/.test((e.relatedTarget||"").className)||(t[0]==e.relatedTarget||$.contains(t[0],e.relatedTarget))&&this.getClosestMenu(e.relatedTarget)==t[0]||t.dataSM("scroll-arrows").css("visibility","hidden"))},menuScrollOver:function(t,e){if(mouse&&!/^scroll-(up|down)/.test(e.target.className)&&this.getClosestMenu(e.target)==t[0]){this.menuScrollRefreshData(t);var i=t.dataSM("scroll"),s=$(window).scrollTop()-t.dataSM("parent-a").offset().top-i.itemH;t.dataSM("scroll-arrows").eq(0).css("margin-top",s).end().eq(1).css("margin-top",s+this.getViewportHeight()-i.arrowDownH).end().css("visibility","visible")}},menuScrollRefreshData:function(t){var e=t.dataSM("scroll"),i=$(window).scrollTop()-t.dataSM("parent-a").offset().top-e.itemH;this.cssTransforms3d&&(i=-(parseFloat(t.css("margin-top"))-i)),$.extend(e,{upEnd:i,downEnd:i+this.getViewportHeight()-e.subH})},menuScrollStop:function(t){return this.scrollTimeout?(cancelAnimationFrame(this.scrollTimeout),this.scrollTimeout=0,t.dataSM("scroll").step=1,!0):void 0},menuScrollTouch:function(t,e){if(e=e.originalEvent,isTouchEvent(e)){var i=this.getTouchPoint(e);if(this.getClosestMenu(i.target)==t[0]){var s=t.dataSM("scroll");if(/(start|down)$/i.test(e.type))this.menuScrollStop(t)?(e.preventDefault(),this.$touchScrollingSub=t):this.$touchScrollingSub=null,this.menuScrollRefreshData(t),$.extend(s,{touchStartY:i.pageY,touchStartTime:e.timeStamp});else if(/move$/i.test(e.type)){var o=void 0!==s.touchY?s.touchY:s.touchStartY;if(void 0!==o&&o!=i.pageY){this.$touchScrollingSub=t;var a=i.pageY>o;void 0!==s.up&&s.up!=a&&$.extend(s,{touchStartY:i.pageY,touchStartTime:e.timeStamp}),$.extend(s,{up:a,touchY:i.pageY}),this.menuScroll(t,!0,Math.abs(i.pageY-o))}e.preventDefault()}else void 0!==s.touchY&&((s.momentum=15*Math.pow(Math.abs(i.pageY-s.touchStartY)/(e.timeStamp-s.touchStartTime),2))&&(this.menuScrollStop(t),this.menuScroll(t),e.preventDefault()),delete s.touchY)}}},menuShow:function(t){if((t.dataSM("beforefirstshowfired")||(t.dataSM("beforefirstshowfired",!0),this.$root.triggerHandler("beforefirstshow.smapi",t[0])!==!1))&&this.$root.triggerHandler("beforeshow.smapi",t[0])!==!1&&(t.dataSM("shown-before",!0),canAnimate&&t.stop(!0,!0),!t.is(":visible"))){var e=t.dataSM("parent-a"),i=this.isCollapsible();if((this.opts.keepHighlighted||i)&&e.addClass("highlighted"),i)t.removeClass("sm-nowrap").css({zIndex:"",width:"auto",minWidth:"",maxWidth:"",top:"",left:"",marginLeft:"",marginTop:""});else{if(t.css("z-index",this.zIndexInc=(this.zIndexInc||this.getStartZIndex())+1),(this.opts.subMenusMinWidth||this.opts.subMenusMaxWidth)&&(t.css({width:"auto",minWidth:"",maxWidth:""}).addClass("sm-nowrap"),this.opts.subMenusMinWidth&&t.css("min-width",this.opts.subMenusMinWidth),this.opts.subMenusMaxWidth)){var s=this.getWidth(t);t.css("max-width",this.opts.subMenusMaxWidth),s>this.getWidth(t)&&t.removeClass("sm-nowrap").css("width",this.opts.subMenusMaxWidth)}this.menuPosition(t)}var o=function(){t.css("overflow","")};i?canAnimate&&this.opts.collapsibleShowFunction?this.opts.collapsibleShowFunction.call(this,t,o):t.show(this.opts.collapsibleShowDuration,o):canAnimate&&this.opts.showFunction?this.opts.showFunction.call(this,t,o):t.show(this.opts.showDuration,o),e.attr("aria-expanded","true"),t.attr({"aria-expanded":"true","aria-hidden":"false"}),this.visibleSubMenus.push(t),this.$root.triggerHandler("show.smapi",t[0])}},popupHide:function(t){this.hideTimeout&&(clearTimeout(this.hideTimeout),this.hideTimeout=0);var e=this;this.hideTimeout=setTimeout(function(){e.menuHideAll()},t?1:this.opts.hideTimeout)},popupShow:function(t,e){if(!this.opts.isPopup)return alert('SmartMenus jQuery Error:\n\nIf you want to show this menu via the "popupShow" method, set the isPopup:true option.'),void 0;if(this.hideTimeout&&(clearTimeout(this.hideTimeout),this.hideTimeout=0),this.$root.dataSM("shown-before",!0),canAnimate&&this.$root.stop(!0,!0),!this.$root.is(":visible")){this.$root.css({left:t,top:e});var i=this,s=function(){i.$root.css("overflow","")};canAnimate&&this.opts.showFunction?this.opts.showFunction.call(this,this.$root,s):this.$root.show(this.opts.showDuration,s),this.visibleSubMenus[0]=this.$root}},refresh:function(){this.destroy(!0),this.init(!0)},rootKeyDown:function(t){if(this.handleEvents())switch(t.keyCode){case 27:var e=this.activatedItems[0];if(e){this.menuHideAll(),e[0].focus();var i=e.dataSM("sub");i&&this.menuHide(i)}break;case 32:var s=$(t.target);if(s.is("a")&&this.handleItemEvents(s)){var i=s.dataSM("sub");i&&!i.is(":visible")&&(this.itemClick({currentTarget:t.target}),t.preventDefault())}}},rootOut:function(t){if(this.handleEvents()&&!this.isTouchMode()&&t.target!=this.$root[0]&&(this.hideTimeout&&(clearTimeout(this.hideTimeout),this.hideTimeout=0),!this.opts.showOnClick||!this.opts.hideOnClick)){var e=this;this.hideTimeout=setTimeout(function(){e.menuHideAll()},this.opts.hideTimeout)}},rootOver:function(t){this.handleEvents()&&!this.isTouchMode()&&t.target!=this.$root[0]&&this.hideTimeout&&(clearTimeout(this.hideTimeout),this.hideTimeout=0)},winResize:function(t){if(this.handleEvents()){if(!("onorientationchange"in window)||"orientationchange"==t.type){var e=this.isCollapsible();this.wasCollapsible&&e||(this.activatedItems.length&&this.activatedItems[this.activatedItems.length-1][0].blur(),this.menuHideAll()),this.wasCollapsible=e}}else if(this.$disableOverlay){var i=this.$root.offset();this.$disableOverlay.css({top:i.top,left:i.left,width:this.$root.outerWidth(),height:this.$root.outerHeight()})}}}}),$.fn.dataSM=function(t,e){return e?this.data(t+"_smartmenus",e):this.data(t+"_smartmenus")},$.fn.removeDataSM=function(t){return this.removeData(t+"_smartmenus")},$.fn.smartmenus=function(options){if("string"==typeof options){var args=arguments,method=options;return Array.prototype.shift.call(args),this.each(function(){var t=$(this).data("smartmenus");t&&t[method]&&t[method].apply(t,args)})}return this.each(function(){var dataOpts=$(this).data("sm-options")||null;if(dataOpts)try{dataOpts=eval("("+dataOpts+")")}catch(e){dataOpts=null,alert('ERROR\n\nSmartMenus jQuery init:\nInvalid "data-sm-options" attribute value syntax.')}new $.SmartMenus(this,$.extend({},$.fn.smartmenus.defaults,options,dataOpts))})},$.fn.smartmenus.defaults={isPopup:!1,mainMenuSubOffsetX:0,mainMenuSubOffsetY:0,subMenusSubOffsetX:0,subMenusSubOffsetY:0,subMenusMinWidth:"10em",subMenusMaxWidth:"20em",subIndicators:!0,subIndicatorsPos:"append",subIndicatorsText:"",scrollStep:30,scrollAccelerate:!0,showTimeout:250,hideTimeout:500,showDuration:0,showFunction:null,hideDuration:0,hideFunction:function(t,e){t.fadeOut(200,e)},collapsibleShowDuration:0,collapsibleShowFunction:function(t,e){t.slideDown(200,e)},collapsibleHideDuration:0,collapsibleHideFunction:function(t,e){t.slideUp(200,e)},showOnClick:!1,hideOnClick:!0,noMouseOver:!1,keepInViewport:!0,keepHighlighted:!0,markCurrentItem:!1,markCurrentTree:!0,rightToLeftSubMenus:!1,bottomToTopSubMenus:!1,collapsibleBehavior:"default"},$}); \ No newline at end of file diff --git a/docs/html/EFR32_ICE60730_Libraries/menu.js b/docs/html/EFR32_ICE60730_Libraries/menu.js new file mode 100644 index 00000000..433c15b8 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/menu.js @@ -0,0 +1,50 @@ +/* + @licstart The following is the entire license notice for the + JavaScript code in this file. + + Copyright (C) 1997-2017 by Dimitri van Heesch + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + + @licend The above is the entire license notice + for the JavaScript code in this file + */ +function initMenu(relPath,searchEnabled,serverSide,searchPage,search) { + function makeTree(data,relPath) { + var result=''; + if ('children' in data) { + result+=''; + } + return result; + } + + $('#main-nav').append(makeTree(menudata,relPath)); + $('#main-nav').children(':first').addClass('sm sm-dox').attr('id','main-menu'); + if (searchEnabled) { + if (serverSide) { + $('#main-menu').append('
    • '); + } else { + $('#main-menu').append('
    • '); + } + } + $('#main-menu').smartmenus(); +} +/* @license-end */ diff --git a/docs/html/EFR32_ICE60730_Libraries/menudata.js b/docs/html/EFR32_ICE60730_Libraries/menudata.js new file mode 100644 index 00000000..6d5504cd --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/menudata.js @@ -0,0 +1,96 @@ +/* +@licstart The following is the entire license notice for the +JavaScript code in this file. + +Copyright (C) 1997-2019 by Dimitri van Heesch + +This program is free software; you can redistribute it and/or modify +it under the terms of version 2 of the GNU General Public License as published by +the Free Software Foundation + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +@licend The above is the entire license notice +for the JavaScript code in this file +*/ +var menudata={children:[ +{text:"Main Page",url:"index.html"}, +{text:"Modules",url:"modules.html"}, +{text:"Namespaces",url:"namespaces.html",children:[ +{text:"Namespace List",url:"namespaces.html"}]}, +{text:"Classes",url:"annotated.html",children:[ +{text:"Class List",url:"annotated.html"}, +{text:"Class Index",url:"classes.html"}, +{text:"Class Hierarchy",url:"inherits.html"}, +{text:"Class Members",url:"functions.html",children:[ +{text:"All",url:"functions.html",children:[ +{text:"_",url:"functions.html#index__5F"}, +{text:"c",url:"functions.html#index_c"}, +{text:"e",url:"functions.html#index_e"}, +{text:"g",url:"functions.html#index_g"}, +{text:"h",url:"functions.html#index_h"}, +{text:"i",url:"functions.html#index_i"}, +{text:"m",url:"functions.html#index_m"}, +{text:"n",url:"functions.html#index_n"}, +{text:"r",url:"functions.html#index_r"}, +{text:"s",url:"functions.html#index_s"}, +{text:"t",url:"functions.html#index_t"}, +{text:"w",url:"functions.html#index_w"}, +{text:"x",url:"functions.html#index_x"}]}, +{text:"Functions",url:"functions_func.html",children:[ +{text:"_",url:"functions_func.html#index__5F"}, +{text:"c",url:"functions_func.html#index_c"}, +{text:"e",url:"functions_func.html#index_e"}, +{text:"g",url:"functions_func.html#index_g"}, +{text:"h",url:"functions_func.html#index_h"}, +{text:"m",url:"functions_func.html#index_m"}, +{text:"n",url:"functions_func.html#index_n"}, +{text:"r",url:"functions_func.html#index_r"}, +{text:"s",url:"functions_func.html#index_s"}, +{text:"t",url:"functions_func.html#index_t"}, +{text:"w",url:"functions_func.html#index_w"}]}, +{text:"Variables",url:"functions_vars.html"}]}]}, +{text:"Files",url:"files.html",children:[ +{text:"File List",url:"files.html"}, +{text:"File Members",url:"globals.html",children:[ +{text:"All",url:"globals.html",children:[ +{text:"_",url:"globals.html#index__5F"}, +{text:"b",url:"globals.html#index_b"}, +{text:"c",url:"globals.html#index_c"}, +{text:"d",url:"globals.html#index_d"}, +{text:"e",url:"globals.html#index_e"}, +{text:"f",url:"globals.html#index_f"}, +{text:"i",url:"globals.html#index_i"}, +{text:"l",url:"globals.html#index_l"}, +{text:"r",url:"globals.html#index_r"}, +{text:"s",url:"globals.html#index_s"}, +{text:"t",url:"globals.html#index_t"}, +{text:"u",url:"globals.html#index_u"}]}, +{text:"Functions",url:"globals_func.html",children:[ +{text:"i",url:"globals_func.html#index_i"}, +{text:"s",url:"globals_func.html#index_s"}]}, +{text:"Variables",url:"globals_vars.html"}, +{text:"Typedefs",url:"globals_type.html"}, +{text:"Enumerations",url:"globals_enum.html"}, +{text:"Enumerator",url:"globals_eval.html",children:[ +{text:"i",url:"globals_eval.html#index_i"}]}, +{text:"Macros",url:"globals_defs.html",children:[ +{text:"_",url:"globals_defs.html#index__5F"}, +{text:"b",url:"globals_defs.html#index_b"}, +{text:"c",url:"globals_defs.html#index_c"}, +{text:"d",url:"globals_defs.html#index_d"}, +{text:"e",url:"globals_defs.html#index_e"}, +{text:"f",url:"globals_defs.html#index_f"}, +{text:"i",url:"globals_defs.html#index_i"}, +{text:"l",url:"globals_defs.html#index_l"}, +{text:"r",url:"globals_defs.html#index_r"}, +{text:"s",url:"globals_defs.html#index_s"}, +{text:"t",url:"globals_defs.html#index_t"}, +{text:"u",url:"globals_defs.html#index_u"}]}]}]}]} diff --git a/docs/html/EFR32_ICE60730_Libraries/modules.html b/docs/html/EFR32_ICE60730_Libraries/modules.html new file mode 100644 index 00000000..46fba5cd --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/modules.html @@ -0,0 +1,106 @@ + + + + + + + +IEC_60730: Modules + + + + + + + + + +
    +
    + + + + + + +
    +
    IEC_60730 +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +
    Modules
    +
    +
    +
    Here is a list of all modules:
    +
    [detail level 123]
    + + + + + + + + + + + + + + + + + + + + + + + + + + +
     ▼EFR32 IEC60730 LibraryEFR32 IEC60730 Library
     ▼EFR32 IEC60730 Library Extra FilesExtra files for the EFR32 IEC Library
     Silicon Labs Coding StandardSilicon Labs Coding Standard
     Release NotesRelease Notes for the IEC60730 Library
     Silicon Labs Software License AgreementLicense Agreement for the IEC60730 Library
     POSTPower On Self Test - Executed once during power up
     BISTBuilt In Self Test - Executed periodically
     Programme Counter CheckVerifies all tests have completed on time
     Watchdog TestMonitors CPU execution
     IRQ TestVerifies interrupt frequency is within bounds
     GPIO Plausibility TestVerifies GPIOs work properly
     ADC Plausibility TestVerifies analog components work properly
     Invariable Memory CheckVerifies contents of flash memory
     Variable Memory CheckVerifies RAM is working correctly
     CPU Register CheckVerifies CPU registers are working correctly
     System clock plausibility testVerifies that system clocks are within expected frequencies
     OEM External Communications Example using UARTVerifies communication channel is operating as expected
     Safe StateWhen incorrect behavior is detected, this state prevents further execution
     ▼IEC60730 Test SpecificationAutomated tests for validating correct firmware operation
     CPU Register Check Automated Verification TestsPython script for the IEC60730 CPU Register Check Verification tests
     Invariable Memory Automated Verification TestsPython script for the IEC60730 Invariable Memory plausibility verification tests
     IRQ Automated Verification TestsPython script for the IEC60730 IRQ plausibility verification tests
     Programme Counter Verification TestsPython script for the IEC60730 Programme Counter Verification tests
     System Clock Automated Verification TestsPython script for the IEC60730 system clock Verification tests
     Variable Memory Automated Verification TestsPython script for the IEC60730 Variable Memory plausibility verification tests
     Watchdog Automated Verification TestsPython script for the IEC60730 Watchdog timer Verification tests
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/namespacejlink.html b/docs/html/EFR32_ICE60730_Libraries/namespacejlink.html new file mode 100644 index 00000000..25818acc --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/namespacejlink.html @@ -0,0 +1,97 @@ + + + + + + + +IEC_60730: jlink Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    IEC_60730 +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + +
    +
    +
    +Classes | +Variables
    +
    +
    jlink Namespace Reference
    +
    +
    + + + + +

    +Classes

    class  JLinkDll
     
    + + + + + +

    +Variables

    +int JLINKARM_HOSTIF_USB = 0x01
     
    +int JLINKARM_HOSTIF_IP = 0x02
     
    +

    Detailed Description

    +
    jlink.py:  JLinkARM.dll Wrapper - Python Edition
+
+This module provides access to all functions of JLinkARM.dll.
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/namespacejlink__constants.html b/docs/html/EFR32_ICE60730_Libraries/namespacejlink__constants.html new file mode 100644 index 00000000..6a74b2e5 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/namespacejlink__constants.html @@ -0,0 +1,92 @@ + + + + + + + +IEC_60730: jlink_constants Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    IEC_60730 +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + +
    +
    +
    +Classes
    +
    +
    jlink_constants Namespace Reference
    +
    +
    + + + + + + + + +

    +Classes

    class  JlinkArm_Speed_Info_CStruct
     
    class  JLinkArmEmuConnectInfo_CStruct
     
    class  JLinkJtagIdData_CStruct
     
    +

    Detailed Description

    +
    jlink_constants.py:  Constants for JLinkARM.dll Wrapper - Python Edition
+
+This module provides constants used by the JLinkARM.dll wrapper jlink.py.
+
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/namespaces.html b/docs/html/EFR32_ICE60730_Libraries/namespaces.html new file mode 100644 index 00000000..078095e0 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/namespaces.html @@ -0,0 +1,82 @@ + + + + + + + +IEC_60730: Namespace List + + + + + + + + + +
    +
    + + + + + + +
    +
    IEC_60730 +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +
    Namespace List
    +
    +
    +
    Here is a list of all documented namespaces with brief descriptions:
    + + + +
     Njlink
     Njlink_constants
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/nav_f.png b/docs/html/EFR32_ICE60730_Libraries/nav_f.png new file mode 100644 index 00000000..72a58a52 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/nav_f.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/nav_g.png b/docs/html/EFR32_ICE60730_Libraries/nav_g.png new file mode 100644 index 00000000..2093a237 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/nav_g.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/nav_h.png b/docs/html/EFR32_ICE60730_Libraries/nav_h.png new file mode 100644 index 00000000..33389b10 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/nav_h.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/open.png b/docs/html/EFR32_ICE60730_Libraries/open.png new file mode 100644 index 00000000..30f75c7e Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/open.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/programme_counter_check.png b/docs/html/EFR32_ICE60730_Libraries/programme_counter_check.png new file mode 100644 index 00000000..8d868285 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/programme_counter_check.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_0.html b/docs/html/EFR32_ICE60730_Libraries/search/all_0.html new file mode 100644 index 00000000..26dd244f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_0.js b/docs/html/EFR32_ICE60730_Libraries/search/all_0.js new file mode 100644 index 00000000..dfeae1af --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_0.js @@ -0,0 +1,9 @@ +var searchData= +[ + ['_5f_5fchecksum_0',['check_sum',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga958cd3e171526a901e3c8b99cf2dfd56',1,'sl_iec60730.h']]], + ['_5f_5fclassb_5fram_1',['__CLASSB_RAM',['../group__IEC60730__POST.html#gad812b380481d0985a9998c87002bb1c7',1,'sl_iec60730.h']]], + ['_5f_5finit_5f_5f_2',['__init__',['../classerrors_1_1JLinkException.html#a267980212c110cb6e265bff8cabb6e3f',1,'errors::JLinkException']]], + ['_5f_5foverlap_3',['__OVERLAP',['../group__IEC60730__POST.html#ga81130e671032ca30a2e18c6b181e3a02',1,'sl_iec60730.h']]], + ['_5f_5frt_5fbuf_4',['__RT_BUF',['../group__IEC60730__POST.html#gac3fe4abf3f7643dad0056ed616a21fc8',1,'sl_iec60730.h']]], + ['_5f_5fstack_5fbottom_5',['__STACK_BOTTOM',['../group__IEC60730__VARIABLE__MEMORY__Test.html#ga0ccdba6dafc3ea84329974483e1c1d64',1,'sl_iec60730.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_1.html b/docs/html/EFR32_ICE60730_Libraries/search/all_1.html new file mode 100644 index 00000000..8eb215b9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_1.html @@ -0,0 +1,30 @@ + + + + + + + + + +
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    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_1.js b/docs/html/EFR32_ICE60730_Libraries/search/all_1.js new file mode 100644 index 00000000..a19f60ae --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_1.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['adc_20plausibility_20test_6',['ADC Plausibility Test',['../group__IEC60730__ADC__PLAUSIBILTY__Test.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_10.html b/docs/html/EFR32_ICE60730_Libraries/search/all_10.html new file mode 100644 index 00000000..6fd3a4aa --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_10.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
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    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_10.js b/docs/html/EFR32_ICE60730_Libraries/search/all_10.js new file mode 100644 index 00000000..cdb5f59f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_10.js @@ -0,0 +1,19 @@ +var searchData= +[ + ['release_20notes_225',['Release Notes',['../group__iec60730__release__notes.html',1,'']]], + ['read_5fram_5farm_5f64_226',['read_ram_arm_64',['../classjlink_1_1JLinkDll.html#af88d9307a04acd3db22dc0d6efb0a0fd',1,'jlink::JLinkDll']]], + ['readtype_227',['readType',['../structupdateCrcParams__t.html#ac6810666b02845f684782db8b2fb5e4a',1,'updateCrcParams_t']]], + ['readtype_5ft_228',['readType_t',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga26f1499161354923417472c57fd0f942',1,'sl_iec60730.h']]], + ['ref_5fcrc_229',['REF_CRC',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gac8a3e47f009f04f9dfdee367c0507f22',1,'sl_iec60730.h']]], + ['register_5flist_230',['register_list',['../classjlink_1_1JLinkDll.html#adbd4e5ad4370cb309d9831c45496d005',1,'jlink::JLinkDll']]], + ['register_5fname_231',['register_name',['../classjlink_1_1JLinkDll.html#a695eb7e0836b129a64481d4683fea1e7',1,'jlink::JLinkDll']]], + ['register_5fread_232',['register_read',['../classjlink_1_1JLinkDll.html#ad6b7786db9051c430a1e4d649e649eb7',1,'jlink::JLinkDll']]], + ['register_5fwrite_233',['register_write',['../classjlink_1_1JLinkDll.html#a35f46e5ae53cef7570b252b4e0e04b1e',1,'jlink::JLinkDll']]], + ['reset_234',['reset',['../classjlink_1_1JLinkDll.html#a3fc884f8ab28b2ce6b9893198dd62095',1,'jlink::JLinkDll']]], + ['rom_5fend_235',['ROM_END',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga1fafdaede51f1a2092840264d1776522',1,'sl_iec60730.h']]], + ['rom_5fsize_236',['ROM_SIZE',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gad9e53d1418399b36953a40395ac1384d',1,'sl_iec60730.h']]], + ['rom_5fsize_5finwords_237',['ROM_SIZE_INWORDS',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga31d3955f55968c7f8dee5682092847b1',1,'sl_iec60730.h']]], + ['rst_238',['rst',['../structiec60730__WatchDog__t.html#a97599a1bea83f2b6a91533f08d4bb7ce',1,'iec60730_WatchDog_t']]], + ['rt_5fblock_5foverlap_239',['RT_BLOCK_OVERLAP',['../group__IEC60730__VARIABLE__MEMORY__Test.html#gab7a6ab08c9653816bcb906726ec4c625',1,'sl_iec60730.h']]], + ['rt_5fblocksize_240',['RT_BLOCKSIZE',['../group__IEC60730__VARIABLE__MEMORY__Test.html#gaafe5f5cd2212b1b9c5a1bba0e43dbf16',1,'sl_iec60730.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_11.html b/docs/html/EFR32_ICE60730_Libraries/search/all_11.html new file mode 100644 index 00000000..f78343b9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_11.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_11.js b/docs/html/EFR32_ICE60730_Libraries/search/all_11.js new file mode 100644 index 00000000..867c54ec --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_11.js @@ -0,0 +1,22 @@ +var searchData= +[ + ['silicon_20labs_20coding_20standard_241',['Silicon Labs Coding Standard',['../group__iec60730__coding__standard.html',1,'']]], + ['silicon_20labs_20software_20license_20agreement_242',['Silicon Labs Software License Agreement',['../group__iec60730__license__agreement.html',1,'']]], + ['safe_20state_243',['Safe State',['../group__IEC60730__SAFE__STATE.html',1,'']]], + ['system_20clock_20plausibility_20test_244',['System clock plausibility test',['../group__IEC60730__SYSTEM__CLOCK__Test.html',1,'']]], + ['system_20clock_20automated_20verification_20tests_245',['System Clock Automated Verification Tests',['../group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html',1,'']]], + ['set_5fbreakpoint_246',['set_breakpoint',['../classjlink_1_1JLinkDll.html#acedfec6a99d482b4cc903582cedb0a2b',1,'jlink::JLinkDll']]], + ['set_5fmax_5fspeed_247',['set_max_speed',['../classjlink_1_1JLinkDll.html#a9190b19dd23499b8e3effcac98fe14b3',1,'jlink::JLinkDll']]], + ['set_5fspeed_248',['set_speed',['../classjlink_1_1JLinkDll.html#aa1489d903b101ccb7a7e38d951c5b137',1,'jlink::JLinkDll']]], + ['setup_249',['setUp',['../classiec60730__irq_1_1iec60730__irq.html#a00de13d6a5a208c64f773f2ca2c1b14a',1,'iec60730_irq::iec60730_irq']]], + ['si_5fsegment_5fconst_250',['SI_SEGMENT_CONST',['../group__IEC60730__IRQ__Test.html#gac7cfeb8778147ca004c51acfeb58d26f',1,'SI_SEGMENT_CONST(iec60730_IRQFreqBounds[], iec60730_IRQExecutionBounds_t, SI_SEG_CODE): sl_iec60730.h'],['../group__IEC60730__IRQ__Test.html#gacf8f01fda2cf8af6c68b16362fcbe78e',1,'SI_SEGMENT_CONST(iec60730_IRQFreqBoundsSize, uint8_t, SI_SEG_CODE): sl_iec60730.h']]], + ['si_5fsegment_5fvariable_251',['SI_SEGMENT_VARIABLE',['../group__IEC60730__BIST.html#ga504ca12159a1d0912ae560bf7ad61154',1,'SI_SEGMENT_VARIABLE(iec60730_SafetyCheck, iec60730_TestFailure_t, SI_SEG_DATA): sl_iec60730.h'],['../group__IEC60730__PROGRAMME__COUNTER.html#ga2a7501a937cadf80d50e62d98bac4139',1,'SI_SEGMENT_VARIABLE(iec60730_programmeCounterCheck, uint16_t, SI_SEG_DATA): sl_iec60730.h'],['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga3820191b96b93601df2259799981b535',1,'SI_SEGMENT_VARIABLE(iec60730_clockTestTolerance, uint8_t, SI_SEG_DATA): sl_iec60730.h'],['../group__IEC60730__SYSTEM__CLOCK__Test.html#gaf459913b5cb22f9dbaee0191bec2c8aa',1,'SI_SEGMENT_VARIABLE(iec60730_timerTestControl, uint8_t, SI_SEG_DATA): sl_iec60730.h'],['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga298b6c0c7bd8966085d998f269381891',1,'SI_SEGMENT_VARIABLE(iec60730_timerTick, uint16_t, SI_SEG_DATA): sl_iec60730.h'],['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga63e389f9c28dda9bf8d7aeaf54824797',1,'SI_SEGMENT_VARIABLE(iec60730_systemClockToTestClockFrequency, uint16_t, SI_SEG_DATA): sl_iec60730.h'],['../group__IEC60730__IRQ__Test.html#ga1fd484f2e669b4da687d4aa4f3d2a079',1,'SI_SEGMENT_VARIABLE(iec60730_IRQExecCount[], uint8_t, SI_SEG_DATA): sl_iec60730.h'],['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga4e96f73a854a4e844930b958d6cf9b86',1,'SI_SEGMENT_VARIABLE(iec60730_systemClockCounter, uint8_t, SI_SEG_DATA): sl_iec60730_system_clock.h'],['../group__IEC60730__WDOG__Test.html#ga3d1902e82797eef6780ffcd8cd4a1f0e',1,'SI_SEGMENT_VARIABLE(iec60730_WatchdogState, iec60730_TestWatchdog_t, SI_SEG_DATA_RETAINED_NO_CLEAR): sl_iec60730_watchdog.h']]], + ['silabs_5flicense_5fagreement_2eh_252',['silabs_license_agreement.h',['../Silabs__License__Agreement_8h.html',1,'']]], + ['stack_5foverflow_5fconst_5fguard_5fvalue_5f0_253',['STACK_OVERFLOW_CONST_GUARD_VALUE_0',['../group__IEC60730__VARIABLE__MEMORY__Test.html#gabf01211bb68ede7a54a60b2f77f899d8',1,'sl_iec60730.h']]], + ['stack_5foverflow_5fconst_5fguard_5fvalue_5f1_254',['STACK_OVERFLOW_CONST_GUARD_VALUE_1',['../group__IEC60730__VARIABLE__MEMORY__Test.html#ga4ca7fe9616c171c577e60df3afd35d4c',1,'sl_iec60730.h']]], + ['stack_5foverflow_5fconst_5fguard_5fvalue_5f2_255',['STACK_OVERFLOW_CONST_GUARD_VALUE_2',['../group__IEC60730__VARIABLE__MEMORY__Test.html#ga62b63b5f7a13c9323f91477ecec6aba1',1,'sl_iec60730.h']]], + ['stack_5foverflow_5fconst_5fguard_5fvalue_5f3_256',['STACK_OVERFLOW_CONST_GUARD_VALUE_3',['../group__IEC60730__VARIABLE__MEMORY__Test.html#ga75a78ca5e999345b5e082c1695e97582',1,'sl_iec60730.h']]], + ['start_257',['start',['../structvmcParams__t.html#af7e0cd524a978d1587a5eb0edc38d9b2',1,'vmcParams_t']]], + ['static_5fdec_5fclassb_5fvars_258',['sl_static_dec_classb_vars',['../group__IEC60730__POST.html#ga6c276c6c39755499927558bd8067b18f',1,'sl_iec60730.h']]], + ['steps_5fnumber_259',['STEPS_NUMBER',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga1756482c5c8ec4b8e3a2635e3cac8778',1,'sl_iec60730.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_12.html b/docs/html/EFR32_ICE60730_Libraries/search/all_12.html new file mode 100644 index 00000000..dd9ff1d5 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_12.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_12.js b/docs/html/EFR32_ICE60730_Libraries/search/all_12.js new file mode 100644 index 00000000..53477cc9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_12.js @@ -0,0 +1,51 @@ +var searchData= +[ + ['telnetdeviceutil_260',['TelnetDeviceUtil',['../classutil_1_1TelnetDeviceUtil.html',1,'util']]], + ['telnethostutil_261',['TelnetHostUtil',['../classutil_1_1TelnetHostUtil.html',1,'util']]], + ['test_5f01_5fcore_5fregister_5fapsr_262',['test_01_core_register_APSR',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a40ef47008fdc7fb16dfb44808473ca2d',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f01_5fprogramme_5fcounter_5fexecution_263',['test_01_programme_counter_execution',['../classiec60730__programme__counter_1_1iec60730__programme__counter.html#ac4b5c30687ccde30965e7b286aa49e63',1,'iec60730_programme_counter::iec60730_programme_counter']]], + ['test_5f02_5fmsp_5fns_5fregister_264',['test_02_MSP_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#af5ce801b3b593f943428f385bee7620d',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f02_5fprogramme_5fcounter_5ftoo_5fslow_265',['test_02_programme_counter_too_slow',['../classiec60730__programme__counter_1_1iec60730__programme__counter.html#a61f99aa2d8fb175fa8c011bb44565d96',1,'iec60730_programme_counter::iec60730_programme_counter']]], + ['test_5f03_5fmsp_5fs_5fregister_266',['test_03_MSP_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#ad97b71a3309dff0e19a22a07b43bd41d',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f04_5fpsp_5fns_5fregister_267',['test_04_PSP_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a8c97579415da4879c006a28e7169d97c',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f05_5fpsp_5fs_5fregister_268',['test_05_PSP_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#afd9f4988f0e0d7b2a007c1a75c142dee',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f06_5fmsplim_5fns_5fregister_269',['test_06_MSPLIM_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a3d34c28ae3b91eec87ec5f8c42fb044e',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f07_5fmsplim_5fs_5fregister_270',['test_07_MSPLIM_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a2d3b101657201c4bdb0df4285a9cc752',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f08_5fpsplim_5fns_5fregister_271',['test_08_PSPLIM_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a8c6a98f5f7a96e27853d036f8d4816be',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f09_5fpsplim_5fs_5fregister_272',['test_09_PSPLIM_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a07d080657e0576e235eb053fa49c07e2',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f10_5fcontrol_5fns_5fregister_273',['test_10_CONTROL_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a830bd866aaf7d9e25dd599959f2c020d',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f11_5fcontrol_5fs_5fregister_274',['test_11_CONTROL_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a93aa859ee396b1923c12aa0556dcdc1b',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f12_5fprimask_5fns_5fregister_275',['test_12_PRIMASK_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a5936c26d4e4c75c66388e1f486e716a2',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f13_5fprimask_5fs_5fregister_276',['test_13_PRIMASK_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a57511d3314cd5860f702ae59979757fc',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f14_5fbasepri_5fns_5fregister_277',['test_14_BASEPRI_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a1b9f36d75ee2c14f671b04359df0bb5e',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f15_5fbasepri_5fs_5fregister_278',['test_15_BASEPRI_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a1c31093d17e9793e09cc64f572adf8af',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f16_5ffaultmask_5fns_5fregister_279',['test_16_FAULTMASK_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#aa3d71f53a39c41f083afb7d65fa87079',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f17_5ffaultmask_5fs_5fregister_280',['test_17_FAULTMASK_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a46421bed726003d44aba5f727366630a',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f18_5ffpu_5ffpscr_5fregister_281',['test_18_FPU_FPSCR_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a5d347f2263d43e143768ce259e5f37bc',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f19_5ffpu_5fsx_5fregister_282',['test_19_FPU_Sx_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#af616ed6ca97c983c68bd5873d29e3857',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5fcalcrc_5fblock_5fmemory_283',['test_CalCRC_Block_Memory',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html#ga6d3026e3a64d50c8d079ade28cb2931f',1,'iec60730_invariable_memory::iec60730_imc']]], + ['test_5fcalcrc_5ffull_5fmemory_284',['test_CalCRC_Full_Memory',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html#gaa79a499cef27a5b8f02db2ad5434943c',1,'iec60730_invariable_memory::iec60730_imc']]], + ['test_5fclock_5fmultiplier_285',['TEST_CLOCK_MULTIPLIER',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gaac58d10880d0d5a3b0e671033bd1036e',1,'sl_iec60730_system_clock.h']]], + ['test_5fcorrectbackground_5ffullramclassb_286',['test_CorrectBackGround_FullRamClassB',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#ga5e82fa851169a727a4946fb0a1055ae2',1,'iec60730_variable_memory::iec60730_vmc']]], + ['test_5fcorrectbackground_5fstepramclassb_287',['test_CorrectBackGround_StepRamClassB',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#gab8c1c2f70daaf2ff886668c6cdc89381',1,'iec60730_variable_memory::iec60730_vmc']]], + ['test_5fcorruptcrc_5fcalcrc_5fblock_5fmemory_288',['test_CorruptCRC_CalCRC_Block_Memory',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html#ga693b5231b6a2dac3d9506cf81a280272',1,'iec60730_invariable_memory::iec60730_imc']]], + ['test_5fcorruptcrc_5ffull_5fmemory_289',['test_CorruptCRC_Full_Memory',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html#ga41570257fb035bddab8ba6b6794a2b44',1,'iec60730_invariable_memory::iec60730_imc']]], + ['test_5fcorruptintegrity_5fruncrc_5fblock_5fmemory_290',['test_CorruptIntegrity_RunCRC_Block_Memory',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html#ga76980fe7e6dcc1938ae5c5d689a68045',1,'iec60730_invariable_memory::iec60730_imc']]], + ['test_5fdetectcorruption_5ffullramclassb_291',['test_DetectCorruption_FullRamClassB',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#gae3c86af21b50c48fca0ca4d05e50fa08',1,'iec60730_variable_memory::iec60730_vmc']]], + ['test_5fdetectcorruption_5fstepramclassb_292',['test_DetectCorruption_StepRamClassB',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#ga08c82f87906b8befdb5e52e3de07d715',1,'iec60730_variable_memory::iec60730_vmc']]], + ['test_5fdetectfailed_5fstacktest_293',['test_DetectFailed_StackTest',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#gac627880e4550b92519d2c225a009c031',1,'iec60730_variable_memory::iec60730_vmc']]], + ['test_5firq_5fexecution_294',['test_irq_execution',['../classiec60730__irq_1_1iec60730__irq.html#aa6a5933ea5f0a12842d46d36e1fc985f',1,'iec60730_irq::iec60730_irq']]], + ['test_5firq_5fout_5fof_5fbounds_295',['test_IRQ_out_of_bounds',['../classiec60730__irq_1_1iec60730__irq.html#a3a12cd9f7d0a35c27dbd098288f87b54',1,'iec60730_irq::iec60730_irq']]], + ['test_5fsuite_5fname_296',['TEST_SUITE_NAME',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a02be343ef6cae9428d794cbc6dc4407f',1,'iec60730_cpu_registers.iec60730_cpu_regs.TEST_SUITE_NAME()'],['../classiec60730__irq_1_1iec60730__irq.html#ab8d111a3b10a8757446f68e6d138f341',1,'iec60730_irq.iec60730_irq.TEST_SUITE_NAME()'],['../classiec60730__programme__counter_1_1iec60730__programme__counter.html#a7b9770f029d465bc152ddcc5945ac63c',1,'iec60730_programme_counter.iec60730_programme_counter.TEST_SUITE_NAME()'],['../classiec60730__system__clock_1_1iec60730__system__clock.html#a4b8807504d66060d2a655ba0f099e906',1,'iec60730_system_clock.iec60730_system_clock.TEST_SUITE_NAME()'],['../classiec60730__watchdog_1_1iec60730__watchdog.html#a6c1491221abc9cacee3dee1de67964b4',1,'iec60730_watchdog.iec60730_watchdog.TEST_SUITE_NAME()']]], + ['test_5fsystem_5fclock_5fexecution_297',['test_system_clock_execution',['../classiec60730__system__clock_1_1iec60730__system__clock.html#a0e9494d374f73fc0edb2608e5bfd44f1',1,'iec60730_system_clock::iec60730_system_clock']]], + ['test_5fsystem_5fclock_5fhigh_5fsafe_5fstate_5fentry_298',['test_system_clock_high_safe_state_entry',['../classiec60730__system__clock_1_1iec60730__system__clock.html#a38be552f302142b772c84b2764948c35',1,'iec60730_system_clock::iec60730_system_clock']]], + ['test_5fsystem_5fclock_5flow_5fsafe_5fstate_5fentry_299',['test_system_clock_Low_safe_state_entry',['../classiec60730__system__clock_1_1iec60730__system__clock.html#ad70898ab9e994740d0284bdceae23713',1,'iec60730_system_clock::iec60730_system_clock']]], + ['test_5ftc1_5fwatchdog_5fpor_5fexecution_300',['test_tc1_watchdog_por_execution',['../classiec60730__watchdog_1_1iec60730__watchdog.html#ac449ec677e1fd222209ac068bcb0fe20',1,'iec60730_watchdog::iec60730_watchdog']]], + ['test_5ftc2_5fwatchdog_5fcounter_5fexecution_301',['test_tc2_watchdog_counter_execution',['../classiec60730__watchdog_1_1iec60730__watchdog.html#a29178d471ebbb3ddc8b4a5bb4fa4181d',1,'iec60730_watchdog::iec60730_watchdog']]], + ['test_5ftc3_5fwatchdog_5fwrong_5frst_5fexecution_302',['test_tc3_watchdog_wrong_rst_execution',['../classiec60730__watchdog_1_1iec60730__watchdog.html#a7ebfd154c1e03309c513ec6ef267e860',1,'iec60730_watchdog::iec60730_watchdog']]], + ['test_5ftc4_5fwatchdog_5fwrong_5ftesting_5fexecution_303',['test_tc4_watchdog_wrong_testing_execution',['../classiec60730__watchdog_1_1iec60730__watchdog.html#aa69c77ac148c08e86c4c569624644204',1,'iec60730_watchdog::iec60730_watchdog']]], + ['test_5ftc5_5frestart_5fwatchdog_5fexecution_304',['test_tc5_restart_watchdog_execution',['../classiec60730__watchdog_1_1iec60730__watchdog.html#a3d20d043b4ed85e7e480af15904f83b1',1,'iec60730_watchdog::iec60730_watchdog']]], + ['test_5fworknormally_5fstacktest_305',['test_WorkNormally_StackTest',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#ga31cd1e5ecca8805963cb08dc1227a6ef',1,'iec60730_variable_memory::iec60730_vmc']]], + ['timestamputil_306',['TimeStampUtil',['../classutil_1_1TimeStampUtil.html',1,'util']]], + ['to_5fstring_307',['to_string',['../classenums_1_1JLinkGlobalErrors.html#ab869803308e89e556753884d76b34f7e',1,'enums.JLinkGlobalErrors.to_string()'],['../classenums_1_1JLinkEraseErrors.html#a25e9efbbc3382764bc7a5d493fb176de',1,'enums.JLinkEraseErrors.to_string()'],['../classenums_1_1JLinkFlashErrors.html#a1dd5fb5213effb0736de9b0cc9556ab6',1,'enums.JLinkFlashErrors.to_string()'],['../classenums_1_1JLinkWriteErrors.html#a2ea380c6880c53f15a19c44110315e81',1,'enums.JLinkWriteErrors.to_string()'],['../classenums_1_1JLinkReadErrors.html#abdb5d2d89e512804581c5d7a1e5dc4c6',1,'enums.JLinkReadErrors.to_string()'],['../classenums_1_1JLinkDataErrors.html#a1abfe866d313546321adcb1d11c8ca1f',1,'enums.JLinkDataErrors.to_string()'],['../classenums_1_1JLinkRTTErrors.html#a2b6d6bcc1327d146ce3235ca9e627aae',1,'enums.JLinkRTTErrors.to_string()']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_13.html b/docs/html/EFR32_ICE60730_Libraries/search/all_13.html new file mode 100644 index 00000000..2611a100 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_13.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_13.js b/docs/html/EFR32_ICE60730_Libraries/search/all_13.js new file mode 100644 index 00000000..fb317544 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_13.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['unused_5fvar_308',['UNUSED_VAR',['../group__IEC60730__POST.html#ga6e61b3a07893501c121343edf3bfcbd8',1,'sl_iec60730.h']]], + ['updatecrcparams_5ft_309',['updateCrcParams_t',['../structupdateCrcParams__t.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_14.html b/docs/html/EFR32_ICE60730_Libraries/search/all_14.html new file mode 100644 index 00000000..72d12e90 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_14.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_14.js b/docs/html/EFR32_ICE60730_Libraries/search/all_14.js new file mode 100644 index 00000000..805d5a58 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_14.js @@ -0,0 +1,6 @@ +var searchData= +[ + ['variable_20memory_20check_310',['Variable Memory Check',['../group__IEC60730__VARIABLE__MEMORY__Test.html',1,'']]], + ['variable_20memory_20automated_20verification_20tests_311',['Variable Memory Automated Verification Tests',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html',1,'']]], + ['vmcparams_5ft_312',['vmcParams_t',['../structvmcParams__t.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_15.html b/docs/html/EFR32_ICE60730_Libraries/search/all_15.html new file mode 100644 index 00000000..767aec36 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_15.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_15.js b/docs/html/EFR32_ICE60730_Libraries/search/all_15.js new file mode 100644 index 00000000..d6ee034a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_15.js @@ -0,0 +1,7 @@ +var searchData= +[ + ['watchdog_20automated_20verification_20tests_313',['Watchdog Automated Verification Tests',['../group__IEC60730__WATCHDOG__VERIFICATION.html',1,'']]], + ['watchdog_20test_314',['Watchdog Test',['../group__IEC60730__WDOG__Test.html',1,'']]], + ['warnouthandler_315',['WarnOutHandler',['../classjlink_1_1JLinkDll.html#a568afab553458268065b5aa698da06d6',1,'jlink::JLinkDll']]], + ['wdog_316',['wdog',['../structiec60730__WatchDog__t.html#a9f48ce04ef6a84187e989373042260ec',1,'iec60730_WatchDog_t']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_16.html b/docs/html/EFR32_ICE60730_Libraries/search/all_16.html new file mode 100644 index 00000000..7bd7afe6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_16.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_16.js b/docs/html/EFR32_ICE60730_Libraries/search/all_16.js new file mode 100644 index 00000000..0548fecf --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_16.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['xorout_317',['xorOut',['../structupdateCrcParams__t.html#a0ad02f0aee0badfb17565255e0dbd9ce',1,'updateCrcParams_t']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_2.html b/docs/html/EFR32_ICE60730_Libraries/search/all_2.html new file mode 100644 index 00000000..b26d9165 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_2.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_2.js b/docs/html/EFR32_ICE60730_Libraries/search/all_2.js new file mode 100644 index 00000000..40ed84cb --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_2.js @@ -0,0 +1,6 @@ +var searchData= +[ + ['background_7',['BACKGROUND',['../group__IEC60730__VARIABLE__MEMORY__Test.html#ga850b2f07a67b73890889e63fb8a49fda',1,'sl_iec60730.h']]], + ['blocksize_8',['BLOCKSIZE',['../group__IEC60730__VARIABLE__MEMORY__Test.html#gafcf795f5a96fd55561abe69f56224630',1,'sl_iec60730.h']]], + ['bist_9',['BIST',['../group__IEC60730__BIST.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_3.html b/docs/html/EFR32_ICE60730_Libraries/search/all_3.html new file mode 100644 index 00000000..b61b96f8 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_3.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_3.js b/docs/html/EFR32_ICE60730_Libraries/search/all_3.js new file mode 100644 index 00000000..683334e5 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_3.js @@ -0,0 +1,9 @@ +var searchData= +[ + ['check_5fintegrity_10',['CHECK_INTEGRITY',['../group__IEC60730__POST.html#ga71232bd1d7304cf1c37c7595f45421e0',1,'sl_iec60730.h']]], + ['clear_5fbreakpoint_11',['clear_breakpoint',['../classjlink_1_1JLinkDll.html#a7aea496fb4339c90ac61fc1e909f42cf',1,'jlink::JLinkDll']]], + ['close_12',['close',['../classjlink_1_1JLinkDll.html#a4522d53244d7b5cc6c3327b04ae7e36c',1,'jlink::JLinkDll']]], + ['close_5fhost_5fconnection_13',['close_host_connection',['../classutil_1_1TelnetHostUtil.html#aa8df9f1226c70b78d4aa04bf2aaaf5ad',1,'util::TelnetHostUtil']]], + ['cpu_20register_20check_20automated_20verification_20tests_14',['CPU Register Check Automated Verification Tests',['../group__IEC60730__CPU__REGISTERS__VERIFICATION.html',1,'']]], + ['cpu_20register_20check_15',['CPU Register Check',['../group__IEC60730__CPUREG__Test.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_4.html b/docs/html/EFR32_ICE60730_Libraries/search/all_4.html new file mode 100644 index 00000000..06de1550 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_4.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_4.js b/docs/html/EFR32_ICE60730_Libraries/search/all_4.js new file mode 100644 index 00000000..f99b6d30 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_4.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['dec_5fclassb_5fvars_16',['DEC_CLASSB_VARS',['../group__IEC60730__POST.html#ga8b1f082b1b96f93a3325897446c18128',1,'sl_iec60730.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_5.html b/docs/html/EFR32_ICE60730_Libraries/search/all_5.html new file mode 100644 index 00000000..2544c4e5 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_5.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_5.js b/docs/html/EFR32_ICE60730_Libraries/search/all_5.js new file mode 100644 index 00000000..0c484965 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_5.js @@ -0,0 +1,11 @@ +var searchData= +[ + ['efr32_20iec60730_20library_17',['EFR32 IEC60730 Library',['../group__efr32__sl_iec60730.html',1,'']]], + ['efr32_5fiec60730_5freleasenotes_2eh_18',['efr32_iec60730_release_notes.h',['../efr32__iec60730__releaseNotes_8h.html',1,'']]], + ['end_19',['end',['../structvmcParams__t.html#a08e05b3f74b09f5eb94d7337c1d298e1',1,'vmcParams_t']]], + ['erase_5fchip_20',['erase_chip',['../classjlink_1_1JLinkDll.html#a0bc9b11ba29ea65dec1fdfc08393789f',1,'jlink::JLinkDll']]], + ['errorouthandler_21',['ErrorOutHandler',['../classjlink_1_1JLinkDll.html#a324a117a6f1ae561c1f147ad4ceb66df',1,'jlink::JLinkDll']]], + ['execute_5fcommand_22',['execute_command',['../classjlink_1_1JLinkDll.html#a25e87338c235b56baaafc5c511a6538e',1,'jlink::JLinkDll']]], + ['extern_5fdec_5fclassb_5fvars_23',['EXTERN_DEC_CLASSB_VARS',['../group__IEC60730__POST.html#ga3facba7fb5e30c4dc4f1733910b309a2',1,'sl_iec60730.h']]], + ['efr32_20iec60730_20library_20extra_20files_24',['EFR32 IEC60730 Library Extra Files',['../group__IEC60730__EXTRA.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_6.html b/docs/html/EFR32_ICE60730_Libraries/search/all_6.html new file mode 100644 index 00000000..43f14eab --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_6.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_6.js b/docs/html/EFR32_ICE60730_Libraries/search/all_6.js new file mode 100644 index 00000000..14b9520f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_6.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['flash_5fblock_25',['FLASH_BLOCK',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga6dba447a327f1cb1da83327a4e7abb80',1,'sl_iec60730.h']]], + ['flash_5fblock_5fwords_26',['FLASH_BLOCK_WORDS',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga9ab72a2f0d6a9c3bc531b69362b202a1',1,'sl_iec60730.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_7.html b/docs/html/EFR32_ICE60730_Libraries/search/all_7.html new file mode 100644 index 00000000..af52f82a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_7.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_7.js b/docs/html/EFR32_ICE60730_Libraries/search/all_7.js new file mode 100644 index 00000000..5dfcca68 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_7.js @@ -0,0 +1,13 @@ +var searchData= +[ + ['get_5fadapter_5flist_27',['get_adapter_list',['../classjlink_1_1JLinkDll.html#ae13d80a5bb10cd44c0b273241ba60e25',1,'jlink::JLinkDll']]], + ['get_5fid_28',['get_id',['../classjlink_1_1JLinkDll.html#a9f3a72e7365a40f7f92642af7dad1bbd',1,'jlink::JLinkDll']]], + ['get_5fid_5fdata_29',['get_id_data',['../classjlink_1_1JLinkDll.html#a126e886dc6150823382a5ddba6fc1a14',1,'jlink::JLinkDll']]], + ['get_5fspeed_30',['get_speed',['../classjlink_1_1JLinkDll.html#a2406b3c9ab2cd023eb781cbca1f4e540',1,'jlink::JLinkDll']]], + ['get_5fspeed_5finfo_31',['get_speed_info',['../classjlink_1_1JLinkDll.html#a49798eadb5374b12612ad29ddef81b08',1,'jlink::JLinkDll']]], + ['get_5ftcp_5fip_5fadapter_5flist_32',['get_tcp_ip_adapter_list',['../classjlink_1_1JLinkDll.html#a9e08f70d733a59d712dc03c4dd29bb93',1,'jlink::JLinkDll']]], + ['get_5fusb_5fadapter_5flist_33',['get_usb_adapter_list',['../classjlink_1_1JLinkDll.html#a1afc0a4b341d3c8a44224cc1592a7d19',1,'jlink::JLinkDll']]], + ['go_5fex_34',['go_ex',['../classjlink_1_1JLinkDll.html#abb881bc93e7f84b295932ca9e7c09304',1,'jlink::JLinkDll']]], + ['gpcrc_35',['gpcrc',['../structimcParams__t.html#af5438da098733b9ab06c7e7050a4685a',1,'imcParams_t']]], + ['gpio_20plausibility_20test_36',['GPIO Plausibility Test',['../group__IEC60730__GPIO__PLAUSIBILTY__Test.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_8.html b/docs/html/EFR32_ICE60730_Libraries/search/all_8.html new file mode 100644 index 00000000..cf2b5df9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_8.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_8.js b/docs/html/EFR32_ICE60730_Libraries/search/all_8.js new file mode 100644 index 00000000..7867823a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_8.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['hal_37',['hal',['../structupdateCrcParams__t.html#a34ada0551ae09a366f3ac91bdfe22636',1,'updateCrcParams_t']]], + ['halted_38',['halted',['../classjlink_1_1JLinkDll.html#aa6fad9e7e170e3cafbb384f8cf0b4dac',1,'jlink::JLinkDll']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_9.html b/docs/html/EFR32_ICE60730_Libraries/search/all_9.html new file mode 100644 index 00000000..690785a5 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_9.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_9.js b/docs/html/EFR32_ICE60730_Libraries/search/all_9.js new file mode 100644 index 00000000..09f33e4f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_9.js @@ -0,0 +1,131 @@ +var searchData= +[ + ['ie60730_5flibrary_5fversion_39',['IE60730_LIBRARY_VERSION',['../group__IEC60730__POST.html#ga90d1efd92a31bf629e24b0b614575b0f',1,'sl_iec60730.h']]], + ['iec60730_2eh_40',['sl_iec60730.h',['../iec60730_8h.html',1,'']]], + ['iec60730_5fall_5fcomplete_5fbits_41',['IEC60730_ALL_COMPLETE_BITS',['../group__IEC60730__PROGRAMME__COUNTER.html#ga6babd698ebbbd319c2bda154a1679b8d',1,'sl_iec60730.h']]], + ['iec60730_5fanalog_5fcomplete_42',['IEC60730_ANALOG_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#gaaae64e77429b539c3fd29b317c957a2c',1,'sl_iec60730.h']]], + ['iec60730_5fanalogfail_43',['iec60730_AnalogFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a20099345d848be169d47f829ae6a0336',1,'sl_iec60730.h']]], + ['iec60730_5fbist_44',['iec60730_Bist',['../group__IEC60730__BIST.html#ga2e25e3bbfafc3679a262b9834dc08c0c',1,'sl_iec60730.h']]], + ['iec60730_5fclockfail_45',['iec60730_ClockFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ad003937e7ee5395df23045f964f3749c',1,'sl_iec60730.h']]], + ['iec60730_5fclockticksreset_46',['iec60730_clockTicksReset',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gad4a554fa32a5a4353f789584c7ac9afe',1,'sl_iec60730.h']]], + ['iec60730_5fcomm_2eh_47',['sl_iec60730_comm.h',['../iec60730__comm_8h.html',1,'']]], + ['iec60730_5fcomms_5fcomplete_48',['IEC60730_COMMS_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#gad31a930db0465b5a6bc168ed67dcbaa0',1,'sl_iec60730.h']]], + ['iec60730_5fcpu_5fclocks_5fcomplete_49',['IEC60730_CPU_CLOCKS_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#gaa75670fc501234c0a04cb9a7eb7a72ce',1,'sl_iec60730.h']]], + ['iec60730_5fcpu_5fregisters_2eh_50',['sl_iec60730_cpu_registers.h',['../iec60730__cpu__registers_8h.html',1,'']]], + ['iec60730_5fcpu_5fregs_51',['iec60730_cpu_regs',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html',1,'iec60730_cpu_registers']]], + ['iec60730_5fcpu_5fregs_5fcomplete_52',['IEC60730_CPU_REGS_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#ga2955dfd4c3daa7a14028419297e20561',1,'sl_iec60730.h']]], + ['iec60730_5fcpuregistersbasepri_53',['iec60730_CpuRegistersBasePri',['../group__IEC60730__CPUREG__Test.html#gacd5d92c03572968937e13dc8eb550256',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregistersbist_54',['iec60730_CpuRegistersBist',['../group__IEC60730__CPUREG__Test.html#ga01765ba7d672ee2611ab8c98f544be86',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregisterscontrol_55',['iec60730_CpuRegistersControl',['../group__IEC60730__CPUREG__Test.html#ga9ca0958ac52e1cd07cca7798099c918a',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregisterscore_56',['iec60730_CpuRegistersCore',['../group__IEC60730__CPUREG__Test.html#gadc7393bb81ae3c4aeef8657bbb6baff6',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregistersfail_57',['iec60730_CpuRegistersFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023af5015ade87ec06e17e02167377e10e3e',1,'sl_iec60730.h']]], + ['iec60730_5fcpuregistersfaultmask_58',['iec60730_CpuRegistersFaultMask',['../group__IEC60730__CPUREG__Test.html#ga9d49eaf992ffb22f3b1230a3012256f5',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregistersmsp_59',['iec60730_CpuRegistersMSP',['../group__IEC60730__CPUREG__Test.html#ga03352f50d16a030918d18d14d57ac2f0',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregisterspost_60',['iec60730_CpuRegistersPost',['../group__IEC60730__CPUREG__Test.html#ga3d7aca4480ae67c797d30033b99686d4',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregistersprimask_61',['iec60730_CpuRegistersPriMask',['../group__IEC60730__CPUREG__Test.html#gaee6d4bc5b2b26e0957926406098ed440',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregisterspsp_62',['iec60730_CpuRegistersPSP',['../group__IEC60730__CPUREG__Test.html#gad01323880af2ad9e47b391c32a78b60e',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcs0fail_63',['iec60730_Cs0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ae13ecaf8f999311eeab49158b67bf6ed',1,'sl_iec60730.h']]], + ['iec60730_5feuart0fail_64',['iec60730_Euart0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023afb8e8e8231785b81e00711b3fe84fab6',1,'sl_iec60730.h']]], + ['iec60730_5fgpio_5fcomplete_65',['IEC60730_GPIO_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#gaa145e197c54ea9343e0e0a25a0189c80',1,'sl_iec60730.h']]], + ['iec60730_5fgpiofail_66',['iec60730_GpioFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023afef1b5d3f282d2caea3db8d9fb8cee3d',1,'sl_iec60730.h']]], + ['iec60730_5fi2c0fail_67',['iec60730_I2C0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a04b440e5e7bd688fab1a429ef6e46972',1,'sl_iec60730.h']]], + ['iec60730_5fi2c1fail_68',['iec60730_I2C1Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ac82d6bf3316e7aa84fabec0e68f33c3d',1,'sl_iec60730.h']]], + ['iec60730_5fimc_69',['iec60730_imc',['../classiec60730__invariable__memory_1_1iec60730__imc.html',1,'iec60730_invariable_memory']]], + ['iec60730_5fimc_5fcomplete_70',['IEC60730_IMC_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#ga2f4cc16975fca5a0610e07c7de5811d0',1,'sl_iec60730.h']]], + ['iec60730_5fimcbist_71',['iec60730_ImcBist',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga5a2c4e133b3741d068369405320070c6',1,'sl_iec60730_invariable_memory.h']]], + ['iec60730_5fimcfail_72',['iec60730_IMCFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a00fa8cb85279e95b80245257295d1eb4',1,'sl_iec60730.h']]], + ['iec60730_5fimcinit_73',['iec60730_ImcInit',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gaa655a39e13c235af64c9c1a65798eda5',1,'sl_iec60730.h']]], + ['iec60730_5fimcpost_74',['iec60730_ImcPost',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga137fdbab6da48afed3c5120ff18a1a3d',1,'sl_iec60730_invariable_memory.h']]], + ['iec60730_5finternal_2eh_75',['sl_iec60730_internal.h',['../iec60730__internal_8h.html',1,'']]], + ['iec60730_5finterrupt_5fcomplete_76',['IEC60730_INTERRUPT_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#ga33e80e609861bd9b4907bcc349154d2e',1,'sl_iec60730.h']]], + ['iec60730_5finterruptfail_77',['iec60730_InterruptFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ad57c493440d16f911ef6c0fdfe03db3d',1,'sl_iec60730.h']]], + ['iec60730_5finvariable_5fmemory_2eh_78',['sl_iec60730_invariable_memory.h',['../iec60730__invariable__memory_8h.html',1,'']]], + ['invariable_20memory_20check_79',['Invariable Memory Check',['../group__IEC60730__INVARIABLE__MEMORY__Test.html',1,'']]], + ['invariable_20memory_20automated_20verification_20tests_80',['Invariable Memory Automated Verification Tests',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html',1,'']]], + ['iec60730_5firq_81',['iec60730_irq',['../classiec60730__irq_1_1iec60730__irq.html',1,'iec60730_irq']]], + ['iec60730_5firq_2eh_82',['sl_iec60730_irq.h',['../iec60730__irq_8h.html',1,'']]], + ['irq_20test_83',['IRQ Test',['../group__IEC60730__IRQ__Test.html',1,'']]], + ['irq_20automated_20verification_20tests_84',['IRQ Automated Verification Tests',['../group__IEC60730__IRQ__VERIFICATION.html',1,'']]], + ['iec60730_5firqcheck_85',['iec60730_IRQCheck',['../group__IEC60730__IRQ__Test.html#ga12a2f3b916aba015300180051a01c1fd',1,'sl_iec60730_irq.h']]], + ['iec60730_5firqexecutionbounds_5ft_86',['iec60730_IRQExecutionBounds_t',['../structiec60730__IRQExecutionBounds__t.html',1,'']]], + ['iec60730_5flesense0fail_87',['iec60730_LeSense0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ac87264cca086949be9c9aa9daea6b0a9',1,'sl_iec60730.h']]], + ['iec60730_5fleuart0fail_88',['iec60730_LeUart0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ada4e6b4f9c673b0d3c806faf59fe6fa8',1,'sl_iec60730.h']]], + ['iec60730_5flibrary_5fdocumentation_2eh_89',['sl_iec60730_library_documentation.h',['../iec60730__library__documentation_8h.html',1,'']]], + ['iec60730_5flibraryversion_90',['iec60730_LibraryVersion',['../group__IEC60730__POST.html#ga94096c59bc99dd72fca3e99d49a09cbe',1,'sl_iec60730.h']]], + ['iec60730_5flibraryversion_5ft_91',['iec60730_LibraryVersion_t',['../structiec60730__LibraryVersion__t.html',1,'']]], + ['iec60730_5fnofailure_92',['iec60730_NoFailure',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a7afc614dedb7ebd805585fab8a83dda8',1,'sl_iec60730.h']]], + ['iec60730_5foem0_5fcomplete_93',['IEC60730_OEM0_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#gaeb32fa926c0609365d09cdda135c29e8',1,'sl_iec60730.h']]], + ['iec60730_5foem1_5fcomplete_94',['IEC60730_OEM1_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#ga094312997f43b86f72fe85047a3ad771',1,'sl_iec60730.h']]], + ['iec60730_5foem2_5fcomplete_95',['IEC60730_OEM2_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#ga91c6c6706f8ab36c14c3acfe796cf9b7',1,'sl_iec60730.h']]], + ['iec60730_5foem3_5fcomplete_96',['IEC60730_OEM3_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#gaed81c7a412d88483d1c80e9e8684630d',1,'sl_iec60730.h']]], + ['iec60730_5foem4_5fcomplete_97',['IEC60730_OEM4_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#ga127157cac100e5b06f0a46298f8359a7',1,'sl_iec60730.h']]], + ['iec60730_5foem5_5fcomplete_98',['IEC60730_OEM5_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#gaaf45028752cffa68cf7a8559f679dba9',1,'sl_iec60730.h']]], + ['iec60730_5foem6_5fcomplete_99',['IEC60730_OEM6_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#ga49be8e380fbda8788064211626b30e08',1,'sl_iec60730.h']]], + ['iec60730_5foem7_5fcomplete_100',['IEC60730_OEM7_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#ga941b2c5701ddab7c2b2f5074eeba10fe',1,'sl_iec60730.h']]], + ['iec60730_5foem_5fdocumentation_2eh_101',['sl_iec60730_oem_documentation.h',['../iec60730__oem__documentation_8h.html',1,'']]], + ['iec60730_5foemfail_5f1_102',['iec60730_OEMFail_1',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a7c05b7386df07953405727367f758f5c',1,'sl_iec60730.h']]], + ['iec60730_5foemfail_5f2_103',['iec60730_OEMFail_2',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a1722b60782680dfc96a7483bf840e1cf',1,'sl_iec60730.h']]], + ['iec60730_5foemfail_5f3_104',['iec60730_OEMFail_3',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a4a75cdefcb04ee50969580efe5bcef75',1,'sl_iec60730.h']]], + ['iec60730_5foemfail_5f4_105',['iec60730_OEMFail_4',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a6809805b6bbebc7280405b5d0a59f4c1',1,'sl_iec60730.h']]], + ['iec60730_5fpdm0fail_106',['iec60730_Pdm0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a88f37f65231d879973c84ef81a10f843',1,'sl_iec60730.h']]], + ['iec60730_5fpost_107',['iec60730_Post',['../group__IEC60730__POST.html#ga0319006c98e0cf697fb33b1773bbc101',1,'sl_iec60730.h']]], + ['iec60730_5fprogramme_5fcounter_108',['iec60730_programme_counter',['../classiec60730__programme__counter_1_1iec60730__programme__counter.html',1,'iec60730_programme_counter']]], + ['iec60730_5fprogramme_5fcounter_2eh_109',['iec60730_programme_counter.h',['../iec60730__programme__counter_8h.html',1,'']]], + ['iec60730_5fprogrammecounterfail_110',['iec60730_ProgrammeCounterFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a8f2d4992410253abe701c4d543937f6b',1,'sl_iec60730.h']]], + ['iec60730_5fprogrammecountertest_111',['iec60730_programmeCounterTest',['../group__IEC60730__PROGRAMME__COUNTER.html#ga4936cb40310b4b10038d8f427c492113',1,'iec60730_programme_counter.h']]], + ['iec60730_5fradiofail_112',['iec60730_RadioFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a8519cb420d2b3566c90c464d1dd98704',1,'sl_iec60730.h']]], + ['iec60730_5frestartwatchdogs_113',['iec60730_RestartWatchdogs',['../group__IEC60730__WDOG__Test.html#ga8b7e7389eabf5b9497b094c9ebe1778d',1,'sl_iec60730.h']]], + ['iec60730_5fsafestate_114',['iec60730_SafeState',['../group__IEC60730__SAFE__STATE.html#gaf28ccd1df36222150296fbfe62ace9cf',1,'sl_iec60730.h']]], + ['iec60730_5fsystem_5fclock_115',['iec60730_system_clock',['../classiec60730__system__clock_1_1iec60730__system__clock.html',1,'iec60730_system_clock']]], + ['iec60730_5fsystem_5fclock_2eh_116',['sl_iec60730_system_clock.h',['../iec60730__system__clock_8h.html',1,'']]], + ['iec60730_5fsystemclocktick_117',['iec60730_SystemClockTick',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gafee8a31ec9311f3d3d8390ec0cf2bf51',1,'sl_iec60730.h']]], + ['iec60730_5ftestclocktick_118',['iec60730_TestClockTick',['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga6b15a364dd6ec51c0246903d2e678fca',1,'sl_iec60730.h']]], + ['iec60730_5ftestfailed_119',['iec60730_TestFailed',['../group__IEC60730__POST.html#gga15a78a582ee2ef5999615f3a64d26741a26db973cd4fdebd964685ce701486450',1,'sl_iec60730.h']]], + ['iec60730_5ftestfailure_5ft_120',['iec60730_TestFailure_t',['../group__IEC60730__POST.html#gab423b676af8982b70e767164f1574023',1,'sl_iec60730.h']]], + ['iec60730_5ftestinprogress_121',['iec60730_TestInProgress',['../group__IEC60730__POST.html#gga15a78a582ee2ef5999615f3a64d26741a60b3c9c488facdb917c35ffca92960f9',1,'sl_iec60730.h']]], + ['iec60730_5ftestpassed_122',['iec60730_TestPassed',['../group__IEC60730__POST.html#gga15a78a582ee2ef5999615f3a64d26741a6796830621fbae14b5c78b4a36af1b84',1,'sl_iec60730.h']]], + ['iec60730_5ftestresult_5ft_123',['iec60730_TestResult_t',['../group__IEC60730__POST.html#ga15a78a582ee2ef5999615f3a64d26741',1,'sl_iec60730.h']]], + ['iec60730_5ftestverify_124',['iec60730_TestVerify',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a2dfe01a597b96f83096e9667eb51617c',1,'sl_iec60730.h']]], + ['iec60730_5ftestwatchdog_5ft_125',['iec60730_TestWatchdog_t',['../group__IEC60730__WDOG__Test.html#gaece8bdb434f4c8bafba3590467815044',1,'sl_iec60730_watchdog.h']]], + ['iec60730_5ftimersinit_126',['iec60730_TimersInit',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gac9d18836b0cc66433df68b332f541767',1,'sl_iec60730.h']]], + ['iec60730_5ftimertestcontrol_5ft_127',['iec60730_TimerTestControl_t',['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga5d9503d6c07fff2f4cf1ace3cb59c989',1,'sl_iec60730.h']]], + ['iec60730_5ftimertestdisable_128',['iec60730_TimerTestDisable',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gga5d9503d6c07fff2f4cf1ace3cb59c989a0ca88c5af3c7f609332ca92e279a3db1',1,'sl_iec60730.h']]], + ['iec60730_5ftimertestenable_129',['iec60730_TimerTestEnable',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gga5d9503d6c07fff2f4cf1ace3cb59c989a047379c994d751fca75b338a81569d74',1,'sl_iec60730.h']]], + ['iec60730_5fupdatecrcwithdatabuffer_130',['iec60730_updateCRCWithDataBuffer',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gabdc62d310b78ec8e9f011cb28c6b9225',1,'sl_iec60730.h']]], + ['iec60730_5fusart0fail_131',['iec60730_Usart0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a7a06d9691ab6362b3b9e1c520c66acdf',1,'sl_iec60730.h']]], + ['iec60730_5fusart1fail_132',['iec60730_Usart1Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ab7190b1b31e1dd7e364e8a4b5910a9db',1,'sl_iec60730.h']]], + ['iec60730_5fusart2fail_133',['iec60730_Usart2Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a11b62da15bc0da8e734f3a8b932d5c53',1,'sl_iec60730.h']]], + ['iec60730_5fusart3fail_134',['iec60730_Usart3Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a96d303448c3808f6980700ffd24b93a9',1,'sl_iec60730.h']]], + ['iec60730_5fvariable_5fmemory_2eh_135',['sl_iec60730_variable_memory.h',['../iec60730__variable__memory_8h.html',1,'']]], + ['iec60730_20test_20specification_136',['IEC60730 Test Specification',['../group__IEC60730__VERIFICATION.html',1,'']]], + ['iec60730_5fvmc_137',['iec60730_vmc',['../classiec60730__variable__memory_1_1iec60730__vmc.html',1,'iec60730_variable_memory']]], + ['iec60730_5fvmc_5fcomplete_138',['IEC60730_VMC_COMPLETE',['../group__IEC60730__PROGRAMME__COUNTER.html#gac9c345ed684a034b5a5cb53efa21cc63',1,'sl_iec60730.h']]], + ['iec60730_5fvmcbist_139',['iec60730_VmcBist',['../group__IEC60730__VARIABLE__MEMORY__Test.html#gaf10bd8e32c2e1487d09764e6d76a5eed',1,'sl_iec60730_variable_memory.h']]], + ['iec60730_5fvmcfail_140',['iec60730_VMCFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ac4a9584420d98b8a3ea0846ac5b40f82',1,'sl_iec60730.h']]], + ['iec60730_5fvmcinit_141',['iec60730_VmcInit',['../group__IEC60730__VARIABLE__MEMORY__Test.html#gacfc27fdace9baad090a08676443030e0',1,'sl_iec60730.h']]], + ['iec60730_5fvmcpost_142',['iec60730_VmcPost',['../group__IEC60730__VARIABLE__MEMORY__Test.html#ga22773c2c382079a11115ba53b64b8df8',1,'sl_iec60730_variable_memory.h']]], + ['iec60730_5fwatchdog_143',['iec60730_watchdog',['../classiec60730__watchdog_1_1iec60730__watchdog.html',1,'iec60730_watchdog']]], + ['iec60730_5fwatchdog_2eh_144',['sl_iec60730_watchdog.h',['../iec60730__watchdog_8h.html',1,'']]], + ['iec60730_5fwatchdog_5ft_145',['iec60730_WatchDog_t',['../structiec60730__WatchDog__t.html',1,'']]], + ['iec60730_5fwatchdoginvalid_146',['iec60730_WatchdogInvalid',['../group__IEC60730__WDOG__Test.html#ggaece8bdb434f4c8bafba3590467815044a3dbff590e48b57859ec08cfff6c6812b',1,'sl_iec60730_watchdog.h']]], + ['iec60730_5fwatchdogpost_147',['iec60730_WatchdogPost',['../group__IEC60730__WDOG__Test.html#ga558fac53c0d96b6b1ae215ceadc335dc',1,'sl_iec60730_watchdog.h']]], + ['iec60730_5fwatchdogpostfail_148',['iec60730_WatchdogPostFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a25dd32462cffeb3067f286e07f87c27d',1,'sl_iec60730.h']]], + ['iec60730_5fwatchdogtesting_149',['iec60730_WatchdogTesting',['../group__IEC60730__WDOG__Test.html#ggaece8bdb434f4c8bafba3590467815044a5d9a9cd963dc0a0bbccd807d674bffe9',1,'sl_iec60730_watchdog.h']]], + ['iec60730_5fwatchdogvalid_150',['iec60730_WatchdogValid',['../group__IEC60730__WDOG__Test.html#ggaece8bdb434f4c8bafba3590467815044a7f643e2fc022bee4149c82ec9c42f3ef',1,'sl_iec60730_watchdog.h']]], + ['iec60730testbase_151',['iec60730TestBase',['../classiec60730__test__base_1_1iec60730TestBase.html',1,'iec60730_test_base']]], +<<<<<<< HEAD:docs/html/EFR32_ICE60730_Libraries/search/all_9.js + ['imc_5fcrcbuffer_5fsampletest_152',['SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga558de50fe1c89a1afb8292d2ee4346da',1,'sl_iec60730.h']]], + ['imc_5fdata_5fread_153',['SL_IEC60730_IMC_DATA_READ',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba81e9d30c093158a799c13cf1d42df28a',1,'sl_iec60730.h']]], + ['imc_5fdata_5fread_5fbit_5freversed_154',['SL_IEC60730_IMC_DATA_READ_BIT_REVERSED',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba14b98b0e584e8059ab9e3990ffe8e149',1,'sl_iec60730.h']]], + ['imc_5fdata_5fread_5fbyte_5freversed_155',['SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba641228c714e8ef6fb667f3ee76761f22',1,'sl_iec60730.h']]], +======= + ['imc_5fcrcbuffer_5fsampletest_152',['IMC_CRCBUFFER_SAMPLETEST',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga558de50fe1c89a1afb8292d2ee4346da',1,'iec60730.h']]], + ['imc_5fdata_5fread_153',['IMC_DATA_READ',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba81e9d30c093158a799c13cf1d42df28a',1,'iec60730.h']]], + ['imc_5fdata_5fread_5fbit_5freversed_154',['IMC_DATA_READ_BIT_REVERSED',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba14b98b0e584e8059ab9e3990ffe8e149',1,'iec60730.h']]], + ['imc_5fdata_5fread_5fbyte_5freversed_155',['IMC_DATA_READ_BYTE_REVERSED',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba641228c714e8ef6fb667f3ee76761f22',1,'iec60730.h']]], +>>>>>>> develop:Doc/html/EFR32_ICE60730_Libraries/search/all_9.js + ['imcparams_5ft_156',['imcParams_t',['../structimcParams__t.html',1,'']]], + ['init_157',['init',['../structupdateCrcParams__t.html#abcc7407def14860e8e7937ca993327cb',1,'updateCrcParams_t']]], + ['inv_5fclassb_5fpvar_158',['INV_CLASSB_PVAR',['../group__IEC60730__POST.html#ga5e516d9dd091357c8ecb7ba3c10c7f9b',1,'sl_iec60730.h']]], + ['inv_5fclassb_5fvar_159',['INV_CLASSB_VAR',['../group__IEC60730__POST.html#ga7ceff82eebbc7dd125727947508df7ea',1,'sl_iec60730.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_a.html b/docs/html/EFR32_ICE60730_Libraries/search/all_a.html new file mode 100644 index 00000000..f2f3d3a3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_a.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_a.js b/docs/html/EFR32_ICE60730_Libraries/search/all_a.js new file mode 100644 index 00000000..5113584b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_a.js @@ -0,0 +1,49 @@ +var searchData= +[ + ['jlink_160',['jlink',['../namespacejlink.html',1,'']]], + ['jlink_5fconstants_161',['jlink_constants',['../namespacejlink__constants.html',1,'']]], + ['jlinkaccessflags_162',['JLinkAccessFlags',['../classenums_1_1JLinkAccessFlags.html',1,'enums']]], + ['jlinkaccessmaskflags_163',['JLinkAccessMaskFlags',['../classenums_1_1JLinkAccessMaskFlags.html',1,'enums']]], + ['jlinkarm_5fspeed_5finfo_5fcstruct_164',['JlinkArm_Speed_Info_CStruct',['../classjlink__constants_1_1JlinkArm__Speed__Info__CStruct.html',1,'jlink_constants']]], + ['jlinkarmemuconnectinfo_5fcstruct_165',['JLinkArmEmuConnectInfo_CStruct',['../classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct.html',1,'jlink_constants']]], + ['jlinkbreakpoint_166',['JLinkBreakpoint',['../classenums_1_1JLinkBreakpoint.html',1,'enums']]], + ['jlinkbreakpointimplementation_167',['JLinkBreakpointImplementation',['../classenums_1_1JLinkBreakpointImplementation.html',1,'enums']]], + ['jlinkcore_168',['JLinkCore',['../classenums_1_1JLinkCore.html',1,'enums']]], + ['jlinkcpucapabilities_169',['JLinkCPUCapabilities',['../classenums_1_1JLinkCPUCapabilities.html',1,'enums']]], + ['jlinkdataerrors_170',['JLinkDataErrors',['../classenums_1_1JLinkDataErrors.html',1,'enums']]], + ['jlinkdataexception_171',['JLinkDataException',['../classerrors_1_1JLinkDataException.html',1,'errors']]], + ['jlinkdevicefamily_172',['JLinkDeviceFamily',['../classenums_1_1JLinkDeviceFamily.html',1,'enums']]], + ['jlinkdll_173',['JLinkDll',['../classjlink_1_1JLinkDll.html',1,'jlink']]], + ['jlinkeraseerrors_174',['JLinkEraseErrors',['../classenums_1_1JLinkEraseErrors.html',1,'enums']]], + ['jlinkeraseexception_175',['JLinkEraseException',['../classerrors_1_1JLinkEraseException.html',1,'errors']]], + ['jlinkeventtypes_176',['JLinkEventTypes',['../classenums_1_1JLinkEventTypes.html',1,'enums']]], + ['jlinkexception_177',['JLinkException',['../classerrors_1_1JLinkException.html',1,'errors']]], + ['jlinkflags_178',['JLinkFlags',['../classenums_1_1JLinkFlags.html',1,'enums']]], + ['jlinkflasherrors_179',['JLinkFlashErrors',['../classenums_1_1JLinkFlashErrors.html',1,'enums']]], + ['jlinkflashexception_180',['JLinkFlashException',['../classerrors_1_1JLinkFlashException.html',1,'errors']]], + ['jlinkfunctions_181',['JLinkFunctions',['../classenums_1_1JLinkFunctions.html',1,'enums']]], + ['jlinkglobalerrors_182',['JLinkGlobalErrors',['../classenums_1_1JLinkGlobalErrors.html',1,'enums']]], + ['jlinkhaltreasons_183',['JLinkHaltReasons',['../classenums_1_1JLinkHaltReasons.html',1,'enums']]], + ['jlinkhost_184',['JLinkHost',['../classenums_1_1JLinkHost.html',1,'enums']]], + ['jlinkinterfaces_185',['JLinkInterfaces',['../classenums_1_1JLinkInterfaces.html',1,'enums']]], + ['jlinkjtagiddata_5fcstruct_186',['JLinkJtagIdData_CStruct',['../classjlink__constants_1_1JLinkJtagIdData__CStruct.html',1,'jlink_constants']]], + ['jlinkreaderrors_187',['JLinkReadErrors',['../classenums_1_1JLinkReadErrors.html',1,'enums']]], + ['jlinkreadexception_188',['JLinkReadException',['../classerrors_1_1JLinkReadException.html',1,'errors']]], + ['jlinkresetstrategycortexm3_189',['JLinkResetStrategyCortexM3',['../classenums_1_1JLinkResetStrategyCortexM3.html',1,'enums']]], + ['jlinkromtable_190',['JLinkROMTable',['../classenums_1_1JLinkROMTable.html',1,'enums']]], + ['jlinkrttcommand_191',['JLinkRTTCommand',['../classenums_1_1JLinkRTTCommand.html',1,'enums']]], + ['jlinkrttdirection_192',['JLinkRTTDirection',['../classenums_1_1JLinkRTTDirection.html',1,'enums']]], + ['jlinkrtterrors_193',['JLinkRTTErrors',['../classenums_1_1JLinkRTTErrors.html',1,'enums']]], + ['jlinkrttexception_194',['JLinkRTTException',['../classerrors_1_1JLinkRTTException.html',1,'errors']]], + ['jlinkstracecommand_195',['JLinkStraceCommand',['../classenums_1_1JLinkStraceCommand.html',1,'enums']]], + ['jlinkstraceevent_196',['JLinkStraceEvent',['../classenums_1_1JLinkStraceEvent.html',1,'enums']]], + ['jlinkstraceoperation_197',['JLinkStraceOperation',['../classenums_1_1JLinkStraceOperation.html',1,'enums']]], + ['jlinkswocommands_198',['JLinkSWOCommands',['../classenums_1_1JLinkSWOCommands.html',1,'enums']]], + ['jlinkswointerfaces_199',['JLinkSWOInterfaces',['../classenums_1_1JLinkSWOInterfaces.html',1,'enums']]], + ['jlinktracecommand_200',['JLinkTraceCommand',['../classenums_1_1JLinkTraceCommand.html',1,'enums']]], + ['jlinktraceformat_201',['JLinkTraceFormat',['../classenums_1_1JLinkTraceFormat.html',1,'enums']]], + ['jlinktracesource_202',['JLinkTraceSource',['../classenums_1_1JLinkTraceSource.html',1,'enums']]], + ['jlinkvectorcatchcortexm3_203',['JLinkVectorCatchCortexM3',['../classenums_1_1JLinkVectorCatchCortexM3.html',1,'enums']]], + ['jlinkwriteerrors_204',['JLinkWriteErrors',['../classenums_1_1JLinkWriteErrors.html',1,'enums']]], + ['jlinkwriteexception_205',['JLinkWriteException',['../classerrors_1_1JLinkWriteException.html',1,'errors']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_b.html b/docs/html/EFR32_ICE60730_Libraries/search/all_b.html new file mode 100644 index 00000000..14f34036 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_b.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_b.js b/docs/html/EFR32_ICE60730_Libraries/search/all_b.js new file mode 100644 index 00000000..05458648 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_b.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['label_5fdef_206',['LABEL_DEF',['../group__IEC60730__POST.html#gaab20f1da07182a5cd62db5125ef095ac',1,'sl_iec60730.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_c.html b/docs/html/EFR32_ICE60730_Libraries/search/all_c.html new file mode 100644 index 00000000..da60ab8d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_c.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_c.js b/docs/html/EFR32_ICE60730_Libraries/search/all_c.js new file mode 100644 index 00000000..623a3c21 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_c.js @@ -0,0 +1,15 @@ +var searchData= +[ + ['max_207',['max',['../structiec60730__IRQExecutionBounds__t.html#adbe664f54502f6f6314615e62d602b92',1,'iec60730_IRQExecutionBounds_t']]], + ['memory_5fread_208',['memory_read',['../classjlink_1_1JLinkDll.html#afe784d47e98286e1eb0217c2e72f802e',1,'jlink::JLinkDll']]], + ['memory_5fread16_209',['memory_read16',['../classjlink_1_1JLinkDll.html#a5cb81a55da3992adb63fbc40fa34adf5',1,'jlink::JLinkDll']]], + ['memory_5fread32_210',['memory_read32',['../classjlink_1_1JLinkDll.html#a0e5a859537c39153d2a5fbe23dc2fcff',1,'jlink::JLinkDll']]], + ['memory_5fread64_211',['memory_read64',['../classjlink_1_1JLinkDll.html#aec864455e6600f9bc3101b242933e9b2',1,'jlink::JLinkDll']]], + ['memory_5fread8_212',['memory_read8',['../classjlink_1_1JLinkDll.html#a5210d4bc41a8af90fd7f0b856f4a4546',1,'jlink::JLinkDll']]], + ['memory_5fwrite_213',['memory_write',['../classjlink_1_1JLinkDll.html#a623a321e723b59dcb4b49a83a21b577c',1,'jlink::JLinkDll']]], + ['memory_5fwrite16_214',['memory_write16',['../classjlink_1_1JLinkDll.html#a017ac95b287c6cf7d3f62eea3cb6a957',1,'jlink::JLinkDll']]], + ['memory_5fwrite32_215',['memory_write32',['../classjlink_1_1JLinkDll.html#a8bdede301782fa29c3aabbb95fed92f3',1,'jlink::JLinkDll']]], + ['memory_5fwrite64_216',['memory_write64',['../classjlink_1_1JLinkDll.html#a6ae93e22755fe9663b3e8db0ffd0d942',1,'jlink::JLinkDll']]], + ['memory_5fwrite8_217',['memory_write8',['../classjlink_1_1JLinkDll.html#a66c0f12a109a28a96c599df2dad18c8f',1,'jlink::JLinkDll']]], + ['min_218',['min',['../structiec60730__IRQExecutionBounds__t.html#a33f943d2a9e4226189e0e7cf445b3774',1,'iec60730_IRQExecutionBounds_t']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_d.html b/docs/html/EFR32_ICE60730_Libraries/search/all_d.html new file mode 100644 index 00000000..bc376fec --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_d.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_d.js b/docs/html/EFR32_ICE60730_Libraries/search/all_d.js new file mode 100644 index 00000000..0144cf39 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_d.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['num_5factive_5fbreakpoints_219',['num_active_breakpoints',['../classjlink_1_1JLinkDll.html#af9a412b31add09389e3481e59ac70264',1,'jlink::JLinkDll']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_e.html b/docs/html/EFR32_ICE60730_Libraries/search/all_e.html new file mode 100644 index 00000000..2e3c74dc --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_e.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_e.js b/docs/html/EFR32_ICE60730_Libraries/search/all_e.js new file mode 100644 index 00000000..f77200a1 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_e.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['oem_20external_20communications_20example_20using_20uart_220',['OEM External Communications Example using UART',['../group__IEC60730__OEM__COMM__Test.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_f.html b/docs/html/EFR32_ICE60730_Libraries/search/all_f.html new file mode 100644 index 00000000..246f8ab1 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_f.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/all_f.js b/docs/html/EFR32_ICE60730_Libraries/search/all_f.js new file mode 100644 index 00000000..7aeccf9d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/all_f.js @@ -0,0 +1,7 @@ +var searchData= +[ + ['post_221',['POST',['../group__IEC60730__POST.html',1,'']]], + ['programme_20counter_20check_222',['Programme Counter Check',['../group__IEC60730__PROGRAMME__COUNTER.html',1,'']]], + ['programme_20counter_20verification_20tests_223',['Programme Counter Verification Tests',['../group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html',1,'']]], + ['pytestsuites_224',['PyTestSuites',['../classutil_1_1PyTestSuites.html',1,'util']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_0.html b/docs/html/EFR32_ICE60730_Libraries/search/classes_0.html new file mode 100644 index 00000000..f7e4c14e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_0.js b/docs/html/EFR32_ICE60730_Libraries/search/classes_0.js new file mode 100644 index 00000000..6f875b73 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_0.js @@ -0,0 +1,15 @@ +var searchData= +[ + ['iec60730_5fcpu_5fregs_318',['iec60730_cpu_regs',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html',1,'iec60730_cpu_registers']]], + ['iec60730_5fimc_319',['iec60730_imc',['../classiec60730__invariable__memory_1_1iec60730__imc.html',1,'iec60730_invariable_memory']]], + ['iec60730_5firq_320',['iec60730_irq',['../classiec60730__irq_1_1iec60730__irq.html',1,'iec60730_irq']]], + ['iec60730_5firqexecutionbounds_5ft_321',['iec60730_IRQExecutionBounds_t',['../structiec60730__IRQExecutionBounds__t.html',1,'']]], + ['iec60730_5flibraryversion_5ft_322',['iec60730_LibraryVersion_t',['../structiec60730__LibraryVersion__t.html',1,'']]], + ['iec60730_5fprogramme_5fcounter_323',['iec60730_programme_counter',['../classiec60730__programme__counter_1_1iec60730__programme__counter.html',1,'iec60730_programme_counter']]], + ['iec60730_5fsystem_5fclock_324',['iec60730_system_clock',['../classiec60730__system__clock_1_1iec60730__system__clock.html',1,'iec60730_system_clock']]], + ['iec60730_5fvmc_325',['iec60730_vmc',['../classiec60730__variable__memory_1_1iec60730__vmc.html',1,'iec60730_variable_memory']]], + ['iec60730_5fwatchdog_326',['iec60730_watchdog',['../classiec60730__watchdog_1_1iec60730__watchdog.html',1,'iec60730_watchdog']]], + ['iec60730_5fwatchdog_5ft_327',['iec60730_WatchDog_t',['../structiec60730__WatchDog__t.html',1,'']]], + ['iec60730testbase_328',['iec60730TestBase',['../classiec60730__test__base_1_1iec60730TestBase.html',1,'iec60730_test_base']]], + ['imcparams_5ft_329',['imcParams_t',['../structimcParams__t.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_1.html b/docs/html/EFR32_ICE60730_Libraries/search/classes_1.html new file mode 100644 index 00000000..c7ff4b31 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_1.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_1.js b/docs/html/EFR32_ICE60730_Libraries/search/classes_1.js new file mode 100644 index 00000000..70519e08 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_1.js @@ -0,0 +1,47 @@ +var searchData= +[ + ['jlinkaccessflags_330',['JLinkAccessFlags',['../classenums_1_1JLinkAccessFlags.html',1,'enums']]], + ['jlinkaccessmaskflags_331',['JLinkAccessMaskFlags',['../classenums_1_1JLinkAccessMaskFlags.html',1,'enums']]], + ['jlinkarm_5fspeed_5finfo_5fcstruct_332',['JlinkArm_Speed_Info_CStruct',['../classjlink__constants_1_1JlinkArm__Speed__Info__CStruct.html',1,'jlink_constants']]], + ['jlinkarmemuconnectinfo_5fcstruct_333',['JLinkArmEmuConnectInfo_CStruct',['../classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct.html',1,'jlink_constants']]], + ['jlinkbreakpoint_334',['JLinkBreakpoint',['../classenums_1_1JLinkBreakpoint.html',1,'enums']]], + ['jlinkbreakpointimplementation_335',['JLinkBreakpointImplementation',['../classenums_1_1JLinkBreakpointImplementation.html',1,'enums']]], + ['jlinkcore_336',['JLinkCore',['../classenums_1_1JLinkCore.html',1,'enums']]], + ['jlinkcpucapabilities_337',['JLinkCPUCapabilities',['../classenums_1_1JLinkCPUCapabilities.html',1,'enums']]], + ['jlinkdataerrors_338',['JLinkDataErrors',['../classenums_1_1JLinkDataErrors.html',1,'enums']]], + ['jlinkdataexception_339',['JLinkDataException',['../classerrors_1_1JLinkDataException.html',1,'errors']]], + ['jlinkdevicefamily_340',['JLinkDeviceFamily',['../classenums_1_1JLinkDeviceFamily.html',1,'enums']]], + ['jlinkdll_341',['JLinkDll',['../classjlink_1_1JLinkDll.html',1,'jlink']]], + ['jlinkeraseerrors_342',['JLinkEraseErrors',['../classenums_1_1JLinkEraseErrors.html',1,'enums']]], + ['jlinkeraseexception_343',['JLinkEraseException',['../classerrors_1_1JLinkEraseException.html',1,'errors']]], + ['jlinkeventtypes_344',['JLinkEventTypes',['../classenums_1_1JLinkEventTypes.html',1,'enums']]], + ['jlinkexception_345',['JLinkException',['../classerrors_1_1JLinkException.html',1,'errors']]], + ['jlinkflags_346',['JLinkFlags',['../classenums_1_1JLinkFlags.html',1,'enums']]], + ['jlinkflasherrors_347',['JLinkFlashErrors',['../classenums_1_1JLinkFlashErrors.html',1,'enums']]], + ['jlinkflashexception_348',['JLinkFlashException',['../classerrors_1_1JLinkFlashException.html',1,'errors']]], + ['jlinkfunctions_349',['JLinkFunctions',['../classenums_1_1JLinkFunctions.html',1,'enums']]], + ['jlinkglobalerrors_350',['JLinkGlobalErrors',['../classenums_1_1JLinkGlobalErrors.html',1,'enums']]], + ['jlinkhaltreasons_351',['JLinkHaltReasons',['../classenums_1_1JLinkHaltReasons.html',1,'enums']]], + ['jlinkhost_352',['JLinkHost',['../classenums_1_1JLinkHost.html',1,'enums']]], + ['jlinkinterfaces_353',['JLinkInterfaces',['../classenums_1_1JLinkInterfaces.html',1,'enums']]], + ['jlinkjtagiddata_5fcstruct_354',['JLinkJtagIdData_CStruct',['../classjlink__constants_1_1JLinkJtagIdData__CStruct.html',1,'jlink_constants']]], + ['jlinkreaderrors_355',['JLinkReadErrors',['../classenums_1_1JLinkReadErrors.html',1,'enums']]], + ['jlinkreadexception_356',['JLinkReadException',['../classerrors_1_1JLinkReadException.html',1,'errors']]], + ['jlinkresetstrategycortexm3_357',['JLinkResetStrategyCortexM3',['../classenums_1_1JLinkResetStrategyCortexM3.html',1,'enums']]], + ['jlinkromtable_358',['JLinkROMTable',['../classenums_1_1JLinkROMTable.html',1,'enums']]], + ['jlinkrttcommand_359',['JLinkRTTCommand',['../classenums_1_1JLinkRTTCommand.html',1,'enums']]], + ['jlinkrttdirection_360',['JLinkRTTDirection',['../classenums_1_1JLinkRTTDirection.html',1,'enums']]], + ['jlinkrtterrors_361',['JLinkRTTErrors',['../classenums_1_1JLinkRTTErrors.html',1,'enums']]], + ['jlinkrttexception_362',['JLinkRTTException',['../classerrors_1_1JLinkRTTException.html',1,'errors']]], + ['jlinkstracecommand_363',['JLinkStraceCommand',['../classenums_1_1JLinkStraceCommand.html',1,'enums']]], + ['jlinkstraceevent_364',['JLinkStraceEvent',['../classenums_1_1JLinkStraceEvent.html',1,'enums']]], + ['jlinkstraceoperation_365',['JLinkStraceOperation',['../classenums_1_1JLinkStraceOperation.html',1,'enums']]], + ['jlinkswocommands_366',['JLinkSWOCommands',['../classenums_1_1JLinkSWOCommands.html',1,'enums']]], + ['jlinkswointerfaces_367',['JLinkSWOInterfaces',['../classenums_1_1JLinkSWOInterfaces.html',1,'enums']]], + ['jlinktracecommand_368',['JLinkTraceCommand',['../classenums_1_1JLinkTraceCommand.html',1,'enums']]], + ['jlinktraceformat_369',['JLinkTraceFormat',['../classenums_1_1JLinkTraceFormat.html',1,'enums']]], + ['jlinktracesource_370',['JLinkTraceSource',['../classenums_1_1JLinkTraceSource.html',1,'enums']]], + ['jlinkvectorcatchcortexm3_371',['JLinkVectorCatchCortexM3',['../classenums_1_1JLinkVectorCatchCortexM3.html',1,'enums']]], + ['jlinkwriteerrors_372',['JLinkWriteErrors',['../classenums_1_1JLinkWriteErrors.html',1,'enums']]], + ['jlinkwriteexception_373',['JLinkWriteException',['../classerrors_1_1JLinkWriteException.html',1,'errors']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_2.html b/docs/html/EFR32_ICE60730_Libraries/search/classes_2.html new file mode 100644 index 00000000..0d1e8a0c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_2.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_2.js b/docs/html/EFR32_ICE60730_Libraries/search/classes_2.js new file mode 100644 index 00000000..40391b84 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_2.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['pytestsuites_374',['PyTestSuites',['../classutil_1_1PyTestSuites.html',1,'util']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_3.html b/docs/html/EFR32_ICE60730_Libraries/search/classes_3.html new file mode 100644 index 00000000..21025456 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_3.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_3.js b/docs/html/EFR32_ICE60730_Libraries/search/classes_3.js new file mode 100644 index 00000000..8b046bf1 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_3.js @@ -0,0 +1,6 @@ +var searchData= +[ + ['telnetdeviceutil_375',['TelnetDeviceUtil',['../classutil_1_1TelnetDeviceUtil.html',1,'util']]], + ['telnethostutil_376',['TelnetHostUtil',['../classutil_1_1TelnetHostUtil.html',1,'util']]], + ['timestamputil_377',['TimeStampUtil',['../classutil_1_1TimeStampUtil.html',1,'util']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_4.html b/docs/html/EFR32_ICE60730_Libraries/search/classes_4.html new file mode 100644 index 00000000..095ab595 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_4.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_4.js b/docs/html/EFR32_ICE60730_Libraries/search/classes_4.js new file mode 100644 index 00000000..5af0f115 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_4.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['updatecrcparams_5ft_378',['updateCrcParams_t',['../structupdateCrcParams__t.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_5.html b/docs/html/EFR32_ICE60730_Libraries/search/classes_5.html new file mode 100644 index 00000000..fc9cdc99 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_5.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/classes_5.js b/docs/html/EFR32_ICE60730_Libraries/search/classes_5.js new file mode 100644 index 00000000..3ebcf9e7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/classes_5.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['vmcparams_5ft_379',['vmcParams_t',['../structvmcParams__t.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/close.png b/docs/html/EFR32_ICE60730_Libraries/search/close.png new file mode 100644 index 00000000..9342d3df Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/search/close.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/search/enums_0.html b/docs/html/EFR32_ICE60730_Libraries/search/enums_0.html new file mode 100644 index 00000000..9669700a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/enums_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/enums_0.js b/docs/html/EFR32_ICE60730_Libraries/search/enums_0.js new file mode 100644 index 00000000..b92b7a52 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/enums_0.js @@ -0,0 +1,7 @@ +var searchData= +[ + ['iec60730_5ftestfailure_5ft_521',['iec60730_TestFailure_t',['../group__IEC60730__POST.html#gab423b676af8982b70e767164f1574023',1,'sl_iec60730.h']]], + ['iec60730_5ftestresult_5ft_522',['iec60730_TestResult_t',['../group__IEC60730__POST.html#ga15a78a582ee2ef5999615f3a64d26741',1,'sl_iec60730.h']]], + ['iec60730_5ftestwatchdog_5ft_523',['iec60730_TestWatchdog_t',['../group__IEC60730__WDOG__Test.html#gaece8bdb434f4c8bafba3590467815044',1,'sl_iec60730_watchdog.h']]], + ['iec60730_5ftimertestcontrol_5ft_524',['iec60730_TimerTestControl_t',['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga5d9503d6c07fff2f4cf1ace3cb59c989',1,'sl_iec60730.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/enumvalues_0.html b/docs/html/EFR32_ICE60730_Libraries/search/enumvalues_0.html new file mode 100644 index 00000000..92862489 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/enumvalues_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/enumvalues_0.js b/docs/html/EFR32_ICE60730_Libraries/search/enumvalues_0.js new file mode 100644 index 00000000..b7ca7363 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/enumvalues_0.js @@ -0,0 +1,82 @@ +var searchData= +[ +<<<<<<< HEAD:docs/html/EFR32_ICE60730_Libraries/search/enumvalues_0.js + ['iec60730_5fanalogfail_525',['iec60730_AnalogFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a20099345d848be169d47f829ae6a0336',1,'sl_iec60730.h']]], + ['iec60730_5fclockfail_526',['iec60730_ClockFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ad003937e7ee5395df23045f964f3749c',1,'sl_iec60730.h']]], + ['iec60730_5fcpuregistersfail_527',['iec60730_CpuRegistersFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023af5015ade87ec06e17e02167377e10e3e',1,'sl_iec60730.h']]], + ['iec60730_5fcs0fail_528',['iec60730_Cs0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ae13ecaf8f999311eeab49158b67bf6ed',1,'sl_iec60730.h']]], + ['iec60730_5feuart0fail_529',['iec60730_Euart0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023afb8e8e8231785b81e00711b3fe84fab6',1,'sl_iec60730.h']]], + ['iec60730_5fgpiofail_530',['iec60730_GpioFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023afef1b5d3f282d2caea3db8d9fb8cee3d',1,'sl_iec60730.h']]], + ['iec60730_5fi2c0fail_531',['iec60730_I2C0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a04b440e5e7bd688fab1a429ef6e46972',1,'sl_iec60730.h']]], + ['iec60730_5fi2c1fail_532',['iec60730_I2C1Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ac82d6bf3316e7aa84fabec0e68f33c3d',1,'sl_iec60730.h']]], + ['iec60730_5fimcfail_533',['iec60730_IMCFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a00fa8cb85279e95b80245257295d1eb4',1,'sl_iec60730.h']]], + ['iec60730_5finterruptfail_534',['iec60730_InterruptFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ad57c493440d16f911ef6c0fdfe03db3d',1,'sl_iec60730.h']]], + ['iec60730_5flesense0fail_535',['iec60730_LeSense0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ac87264cca086949be9c9aa9daea6b0a9',1,'sl_iec60730.h']]], + ['iec60730_5fleuart0fail_536',['iec60730_LeUart0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ada4e6b4f9c673b0d3c806faf59fe6fa8',1,'sl_iec60730.h']]], + ['iec60730_5fnofailure_537',['iec60730_NoFailure',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a7afc614dedb7ebd805585fab8a83dda8',1,'sl_iec60730.h']]], + ['iec60730_5foemfail_5f1_538',['iec60730_OEMFail_1',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a7c05b7386df07953405727367f758f5c',1,'sl_iec60730.h']]], + ['iec60730_5foemfail_5f2_539',['iec60730_OEMFail_2',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a1722b60782680dfc96a7483bf840e1cf',1,'sl_iec60730.h']]], + ['iec60730_5foemfail_5f3_540',['iec60730_OEMFail_3',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a4a75cdefcb04ee50969580efe5bcef75',1,'sl_iec60730.h']]], + ['iec60730_5foemfail_5f4_541',['iec60730_OEMFail_4',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a6809805b6bbebc7280405b5d0a59f4c1',1,'sl_iec60730.h']]], + ['iec60730_5fpdm0fail_542',['iec60730_Pdm0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a88f37f65231d879973c84ef81a10f843',1,'sl_iec60730.h']]], + ['iec60730_5fprogrammecounterfail_543',['iec60730_ProgrammeCounterFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a8f2d4992410253abe701c4d543937f6b',1,'sl_iec60730.h']]], + ['iec60730_5fradiofail_544',['iec60730_RadioFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a8519cb420d2b3566c90c464d1dd98704',1,'sl_iec60730.h']]], + ['iec60730_5ftestfailed_545',['iec60730_TestFailed',['../group__IEC60730__POST.html#gga15a78a582ee2ef5999615f3a64d26741a26db973cd4fdebd964685ce701486450',1,'sl_iec60730.h']]], + ['iec60730_5ftestinprogress_546',['iec60730_TestInProgress',['../group__IEC60730__POST.html#gga15a78a582ee2ef5999615f3a64d26741a60b3c9c488facdb917c35ffca92960f9',1,'sl_iec60730.h']]], + ['iec60730_5ftestpassed_547',['iec60730_TestPassed',['../group__IEC60730__POST.html#gga15a78a582ee2ef5999615f3a64d26741a6796830621fbae14b5c78b4a36af1b84',1,'sl_iec60730.h']]], + ['iec60730_5ftestverify_548',['iec60730_TestVerify',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a2dfe01a597b96f83096e9667eb51617c',1,'sl_iec60730.h']]], + ['iec60730_5ftimertestdisable_549',['iec60730_TimerTestDisable',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gga5d9503d6c07fff2f4cf1ace3cb59c989a0ca88c5af3c7f609332ca92e279a3db1',1,'sl_iec60730.h']]], + ['iec60730_5ftimertestenable_550',['iec60730_TimerTestEnable',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gga5d9503d6c07fff2f4cf1ace3cb59c989a047379c994d751fca75b338a81569d74',1,'sl_iec60730.h']]], + ['iec60730_5fusart0fail_551',['iec60730_Usart0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a7a06d9691ab6362b3b9e1c520c66acdf',1,'sl_iec60730.h']]], + ['iec60730_5fusart1fail_552',['iec60730_Usart1Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ab7190b1b31e1dd7e364e8a4b5910a9db',1,'sl_iec60730.h']]], + ['iec60730_5fusart2fail_553',['iec60730_Usart2Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a11b62da15bc0da8e734f3a8b932d5c53',1,'sl_iec60730.h']]], + ['iec60730_5fusart3fail_554',['iec60730_Usart3Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a96d303448c3808f6980700ffd24b93a9',1,'sl_iec60730.h']]], + ['iec60730_5fvmcfail_555',['iec60730_VMCFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ac4a9584420d98b8a3ea0846ac5b40f82',1,'sl_iec60730.h']]], + ['iec60730_5fwatchdoginvalid_556',['iec60730_WatchdogInvalid',['../group__IEC60730__WDOG__Test.html#ggaece8bdb434f4c8bafba3590467815044a3dbff590e48b57859ec08cfff6c6812b',1,'sl_iec60730_watchdog.h']]], + ['iec60730_5fwatchdogpostfail_557',['iec60730_WatchdogPostFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a25dd32462cffeb3067f286e07f87c27d',1,'sl_iec60730.h']]], + ['iec60730_5fwatchdogtesting_558',['iec60730_WatchdogTesting',['../group__IEC60730__WDOG__Test.html#ggaece8bdb434f4c8bafba3590467815044a5d9a9cd963dc0a0bbccd807d674bffe9',1,'sl_iec60730_watchdog.h']]], + ['iec60730_5fwatchdogvalid_559',['iec60730_WatchdogValid',['../group__IEC60730__WDOG__Test.html#ggaece8bdb434f4c8bafba3590467815044a7f643e2fc022bee4149c82ec9c42f3ef',1,'sl_iec60730_watchdog.h']]], + ['imc_5fdata_5fread_560',['SL_IEC60730_IMC_DATA_READ',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba81e9d30c093158a799c13cf1d42df28a',1,'sl_iec60730.h']]], + ['imc_5fdata_5fread_5fbit_5freversed_561',['SL_IEC60730_IMC_DATA_READ_BIT_REVERSED',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba14b98b0e584e8059ab9e3990ffe8e149',1,'sl_iec60730.h']]], + ['imc_5fdata_5fread_5fbyte_5freversed_562',['SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba641228c714e8ef6fb667f3ee76761f22',1,'sl_iec60730.h']]] +======= + ['iec60730_5fanalogfail_525',['iec60730_AnalogFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a20099345d848be169d47f829ae6a0336',1,'iec60730.h']]], + ['iec60730_5fclockfail_526',['iec60730_ClockFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ad003937e7ee5395df23045f964f3749c',1,'iec60730.h']]], + ['iec60730_5fcpuregistersfail_527',['iec60730_CpuRegistersFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023af5015ade87ec06e17e02167377e10e3e',1,'iec60730.h']]], + ['iec60730_5fcs0fail_528',['iec60730_Cs0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ae13ecaf8f999311eeab49158b67bf6ed',1,'iec60730.h']]], + ['iec60730_5feuart0fail_529',['iec60730_Euart0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023afb8e8e8231785b81e00711b3fe84fab6',1,'iec60730.h']]], + ['iec60730_5fgpiofail_530',['iec60730_GpioFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023afef1b5d3f282d2caea3db8d9fb8cee3d',1,'iec60730.h']]], + ['iec60730_5fi2c0fail_531',['iec60730_I2C0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a04b440e5e7bd688fab1a429ef6e46972',1,'iec60730.h']]], + ['iec60730_5fi2c1fail_532',['iec60730_I2C1Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ac82d6bf3316e7aa84fabec0e68f33c3d',1,'iec60730.h']]], + ['iec60730_5fimcfail_533',['iec60730_IMCFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a00fa8cb85279e95b80245257295d1eb4',1,'iec60730.h']]], + ['iec60730_5finterruptfail_534',['iec60730_InterruptFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ad57c493440d16f911ef6c0fdfe03db3d',1,'iec60730.h']]], + ['iec60730_5flesense0fail_535',['iec60730_LeSense0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ac87264cca086949be9c9aa9daea6b0a9',1,'iec60730.h']]], + ['iec60730_5fleuart0fail_536',['iec60730_LeUart0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ada4e6b4f9c673b0d3c806faf59fe6fa8',1,'iec60730.h']]], + ['iec60730_5fnofailure_537',['iec60730_NoFailure',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a7afc614dedb7ebd805585fab8a83dda8',1,'iec60730.h']]], + ['iec60730_5foemfail_5f1_538',['iec60730_OEMFail_1',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a7c05b7386df07953405727367f758f5c',1,'iec60730.h']]], + ['iec60730_5foemfail_5f2_539',['iec60730_OEMFail_2',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a1722b60782680dfc96a7483bf840e1cf',1,'iec60730.h']]], + ['iec60730_5foemfail_5f3_540',['iec60730_OEMFail_3',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a4a75cdefcb04ee50969580efe5bcef75',1,'iec60730.h']]], + ['iec60730_5foemfail_5f4_541',['iec60730_OEMFail_4',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a6809805b6bbebc7280405b5d0a59f4c1',1,'iec60730.h']]], + ['iec60730_5fpdm0fail_542',['iec60730_Pdm0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a88f37f65231d879973c84ef81a10f843',1,'iec60730.h']]], + ['iec60730_5fprogrammecounterfail_543',['iec60730_ProgrammeCounterFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a8f2d4992410253abe701c4d543937f6b',1,'iec60730.h']]], + ['iec60730_5fradiofail_544',['iec60730_RadioFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a8519cb420d2b3566c90c464d1dd98704',1,'iec60730.h']]], + ['iec60730_5ftestfailed_545',['iec60730_TestFailed',['../group__IEC60730__POST.html#gga15a78a582ee2ef5999615f3a64d26741a26db973cd4fdebd964685ce701486450',1,'iec60730.h']]], + ['iec60730_5ftestinprogress_546',['iec60730_TestInProgress',['../group__IEC60730__POST.html#gga15a78a582ee2ef5999615f3a64d26741a60b3c9c488facdb917c35ffca92960f9',1,'iec60730.h']]], + ['iec60730_5ftestpassed_547',['iec60730_TestPassed',['../group__IEC60730__POST.html#gga15a78a582ee2ef5999615f3a64d26741a6796830621fbae14b5c78b4a36af1b84',1,'iec60730.h']]], + ['iec60730_5ftestverify_548',['iec60730_TestVerify',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a2dfe01a597b96f83096e9667eb51617c',1,'iec60730.h']]], + ['iec60730_5ftimertestdisable_549',['iec60730_TimerTestDisable',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gga5d9503d6c07fff2f4cf1ace3cb59c989a0ca88c5af3c7f609332ca92e279a3db1',1,'iec60730.h']]], + ['iec60730_5ftimertestenable_550',['iec60730_TimerTestEnable',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gga5d9503d6c07fff2f4cf1ace3cb59c989a047379c994d751fca75b338a81569d74',1,'iec60730.h']]], + ['iec60730_5fusart0fail_551',['iec60730_Usart0Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a7a06d9691ab6362b3b9e1c520c66acdf',1,'iec60730.h']]], + ['iec60730_5fusart1fail_552',['iec60730_Usart1Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ab7190b1b31e1dd7e364e8a4b5910a9db',1,'iec60730.h']]], + ['iec60730_5fusart2fail_553',['iec60730_Usart2Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a11b62da15bc0da8e734f3a8b932d5c53',1,'iec60730.h']]], + ['iec60730_5fusart3fail_554',['iec60730_Usart3Fail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a96d303448c3808f6980700ffd24b93a9',1,'iec60730.h']]], + ['iec60730_5fvmcfail_555',['iec60730_VMCFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023ac4a9584420d98b8a3ea0846ac5b40f82',1,'iec60730.h']]], + ['iec60730_5fwatchdoginvalid_556',['iec60730_WatchdogInvalid',['../group__IEC60730__WDOG__Test.html#ggaece8bdb434f4c8bafba3590467815044a3dbff590e48b57859ec08cfff6c6812b',1,'iec60730_watchdog.h']]], + ['iec60730_5fwatchdogpostfail_557',['iec60730_WatchdogPostFail',['../group__IEC60730__POST.html#ggab423b676af8982b70e767164f1574023a25dd32462cffeb3067f286e07f87c27d',1,'iec60730.h']]], + ['iec60730_5fwatchdogtesting_558',['iec60730_WatchdogTesting',['../group__IEC60730__WDOG__Test.html#ggaece8bdb434f4c8bafba3590467815044a5d9a9cd963dc0a0bbccd807d674bffe9',1,'iec60730_watchdog.h']]], + ['iec60730_5fwatchdogvalid_559',['iec60730_WatchdogValid',['../group__IEC60730__WDOG__Test.html#ggaece8bdb434f4c8bafba3590467815044a7f643e2fc022bee4149c82ec9c42f3ef',1,'iec60730_watchdog.h']]], + ['imc_5fdata_5fread_560',['IMC_DATA_READ',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba81e9d30c093158a799c13cf1d42df28a',1,'iec60730.h']]], + ['imc_5fdata_5fread_5fbit_5freversed_561',['IMC_DATA_READ_BIT_REVERSED',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba14b98b0e584e8059ab9e3990ffe8e149',1,'iec60730.h']]], + ['imc_5fdata_5fread_5fbyte_5freversed_562',['IMC_DATA_READ_BYTE_REVERSED',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gga06fc87d81c62e9abb8790b6e5713c55ba641228c714e8ef6fb667f3ee76761f22',1,'iec60730.h']]] +>>>>>>> develop:Doc/html/EFR32_ICE60730_Libraries/search/enumvalues_0.js +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/files_0.html b/docs/html/EFR32_ICE60730_Libraries/search/files_0.html new file mode 100644 index 00000000..737608e1 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/files_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/files_0.js b/docs/html/EFR32_ICE60730_Libraries/search/files_0.js new file mode 100644 index 00000000..771a666b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/files_0.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['efr32_5fiec60730_5freleasenotes_2eh_382',['efr32_iec60730_release_notes.h',['../efr32__iec60730__releaseNotes_8h.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/files_1.html b/docs/html/EFR32_ICE60730_Libraries/search/files_1.html new file mode 100644 index 00000000..f27a62de --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/files_1.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/files_1.js b/docs/html/EFR32_ICE60730_Libraries/search/files_1.js new file mode 100644 index 00000000..0cecfd9b --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/files_1.js @@ -0,0 +1,15 @@ +var searchData= +[ + ['iec60730_2eh_383',['iec60730.h',['../iec60730_8h.html',1,'']]], + ['iec60730_5fcomm_2eh_384',['iec60730_comm.h',['../iec60730__comm_8h.html',1,'']]], + ['iec60730_5fcpu_5fregisters_2eh_385',['iec60730_cpu_registers.h',['../iec60730__cpu__registers_8h.html',1,'']]], + ['iec60730_5finternal_2eh_386',['iec60730_internal.h',['../iec60730__internal_8h.html',1,'']]], + ['iec60730_5finvariable_5fmemory_2eh_387',['iec60730_invariable_memory.h',['../iec60730__invariable__memory_8h.html',1,'']]], + ['iec60730_5firq_2eh_388',['iec60730_irq.h',['../iec60730__irq_8h.html',1,'']]], + ['iec60730_5flibrary_5fdocumentation_2eh_389',['iec60730_library_documentation.h',['../iec60730__library__documentation_8h.html',1,'']]], + ['iec60730_5foem_5fdocumentation_2eh_390',['iec60730_oem_documentation.h',['../iec60730__oem__documentation_8h.html',1,'']]], + ['iec60730_5fprogramme_5fcounter_2eh_391',['iec60730_programme_counter.h',['../iec60730__programme__counter_8h.html',1,'']]], + ['iec60730_5fsystem_5fclock_2eh_392',['iec60730_system_clock.h',['../iec60730__system__clock_8h.html',1,'']]], + ['iec60730_5fvariable_5fmemory_2eh_393',['iec60730_variable_memory.h',['../iec60730__variable__memory_8h.html',1,'']]], + ['iec60730_5fwatchdog_2eh_394',['iec60730_watchdog.h',['../iec60730__watchdog_8h.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/files_2.html b/docs/html/EFR32_ICE60730_Libraries/search/files_2.html new file mode 100644 index 00000000..a45066e9 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/files_2.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/files_2.js b/docs/html/EFR32_ICE60730_Libraries/search/files_2.js new file mode 100644 index 00000000..b5708a25 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/files_2.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['silabs_5flicense_5fagreement_2eh_395',['silabs_license_agreement.h',['../Silabs__License__Agreement_8h.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_0.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_0.html new file mode 100644 index 00000000..e17c7111 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_0.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_0.js new file mode 100644 index 00000000..079c22d1 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_0.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['_5f_5finit_5f_5f_396',['__init__',['../classerrors_1_1JLinkException.html#a267980212c110cb6e265bff8cabb6e3f',1,'errors::JLinkException']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_1.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_1.html new file mode 100644 index 00000000..0ddac0a4 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_1.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_1.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_1.js new file mode 100644 index 00000000..893193a0 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_1.js @@ -0,0 +1,6 @@ +var searchData= +[ + ['clear_5fbreakpoint_397',['clear_breakpoint',['../classjlink_1_1JLinkDll.html#a7aea496fb4339c90ac61fc1e909f42cf',1,'jlink::JLinkDll']]], + ['close_398',['close',['../classjlink_1_1JLinkDll.html#a4522d53244d7b5cc6c3327b04ae7e36c',1,'jlink::JLinkDll']]], + ['close_5fhost_5fconnection_399',['close_host_connection',['../classutil_1_1TelnetHostUtil.html#aa8df9f1226c70b78d4aa04bf2aaaf5ad',1,'util::TelnetHostUtil']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_2.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_2.html new file mode 100644 index 00000000..2737c5ac --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_2.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_2.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_2.js new file mode 100644 index 00000000..2fe68542 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_2.js @@ -0,0 +1,6 @@ +var searchData= +[ + ['erase_5fchip_400',['erase_chip',['../classjlink_1_1JLinkDll.html#a0bc9b11ba29ea65dec1fdfc08393789f',1,'jlink::JLinkDll']]], + ['errorouthandler_401',['ErrorOutHandler',['../classjlink_1_1JLinkDll.html#a324a117a6f1ae561c1f147ad4ceb66df',1,'jlink::JLinkDll']]], + ['execute_5fcommand_402',['execute_command',['../classjlink_1_1JLinkDll.html#a25e87338c235b56baaafc5c511a6538e',1,'jlink::JLinkDll']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_3.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_3.html new file mode 100644 index 00000000..6da86e7d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_3.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_3.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_3.js new file mode 100644 index 00000000..dde9493e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_3.js @@ -0,0 +1,11 @@ +var searchData= +[ + ['get_5fadapter_5flist_403',['get_adapter_list',['../classjlink_1_1JLinkDll.html#ae13d80a5bb10cd44c0b273241ba60e25',1,'jlink::JLinkDll']]], + ['get_5fid_404',['get_id',['../classjlink_1_1JLinkDll.html#a9f3a72e7365a40f7f92642af7dad1bbd',1,'jlink::JLinkDll']]], + ['get_5fid_5fdata_405',['get_id_data',['../classjlink_1_1JLinkDll.html#a126e886dc6150823382a5ddba6fc1a14',1,'jlink::JLinkDll']]], + ['get_5fspeed_406',['get_speed',['../classjlink_1_1JLinkDll.html#a2406b3c9ab2cd023eb781cbca1f4e540',1,'jlink::JLinkDll']]], + ['get_5fspeed_5finfo_407',['get_speed_info',['../classjlink_1_1JLinkDll.html#a49798eadb5374b12612ad29ddef81b08',1,'jlink::JLinkDll']]], + ['get_5ftcp_5fip_5fadapter_5flist_408',['get_tcp_ip_adapter_list',['../classjlink_1_1JLinkDll.html#a9e08f70d733a59d712dc03c4dd29bb93',1,'jlink::JLinkDll']]], + ['get_5fusb_5fadapter_5flist_409',['get_usb_adapter_list',['../classjlink_1_1JLinkDll.html#a1afc0a4b341d3c8a44224cc1592a7d19',1,'jlink::JLinkDll']]], + ['go_5fex_410',['go_ex',['../classjlink_1_1JLinkDll.html#abb881bc93e7f84b295932ca9e7c09304',1,'jlink::JLinkDll']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_4.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_4.html new file mode 100644 index 00000000..911304e6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_4.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_4.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_4.js new file mode 100644 index 00000000..33a08105 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_4.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['halted_411',['halted',['../classjlink_1_1JLinkDll.html#aa6fad9e7e170e3cafbb384f8cf0b4dac',1,'jlink::JLinkDll']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_5.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_5.html new file mode 100644 index 00000000..61b920db --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_5.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_5.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_5.js new file mode 100644 index 00000000..8ba4989e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_5.js @@ -0,0 +1,30 @@ +var searchData= +[ + ['iec60730_5fbist_412',['iec60730_Bist',['../group__IEC60730__BIST.html#ga2e25e3bbfafc3679a262b9834dc08c0c',1,'sl_iec60730.h']]], + ['iec60730_5fclockticksreset_413',['iec60730_clockTicksReset',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gad4a554fa32a5a4353f789584c7ac9afe',1,'sl_iec60730.h']]], + ['iec60730_5fcpuregistersbasepri_414',['iec60730_CpuRegistersBasePri',['../group__IEC60730__CPUREG__Test.html#gacd5d92c03572968937e13dc8eb550256',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregistersbist_415',['iec60730_CpuRegistersBist',['../group__IEC60730__CPUREG__Test.html#ga01765ba7d672ee2611ab8c98f544be86',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregisterscontrol_416',['iec60730_CpuRegistersControl',['../group__IEC60730__CPUREG__Test.html#ga9ca0958ac52e1cd07cca7798099c918a',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregisterscore_417',['iec60730_CpuRegistersCore',['../group__IEC60730__CPUREG__Test.html#gadc7393bb81ae3c4aeef8657bbb6baff6',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregistersfaultmask_418',['iec60730_CpuRegistersFaultMask',['../group__IEC60730__CPUREG__Test.html#ga9d49eaf992ffb22f3b1230a3012256f5',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregistersmsp_419',['iec60730_CpuRegistersMSP',['../group__IEC60730__CPUREG__Test.html#ga03352f50d16a030918d18d14d57ac2f0',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregisterspost_420',['iec60730_CpuRegistersPost',['../group__IEC60730__CPUREG__Test.html#ga3d7aca4480ae67c797d30033b99686d4',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregistersprimask_421',['iec60730_CpuRegistersPriMask',['../group__IEC60730__CPUREG__Test.html#gaee6d4bc5b2b26e0957926406098ed440',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fcpuregisterspsp_422',['iec60730_CpuRegistersPSP',['../group__IEC60730__CPUREG__Test.html#gad01323880af2ad9e47b391c32a78b60e',1,'sl_iec60730_cpu_registers.h']]], + ['iec60730_5fimcbist_423',['iec60730_ImcBist',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga5a2c4e133b3741d068369405320070c6',1,'sl_iec60730_invariable_memory.h']]], + ['iec60730_5fimcinit_424',['iec60730_ImcInit',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gaa655a39e13c235af64c9c1a65798eda5',1,'sl_iec60730.h']]], + ['iec60730_5fimcpost_425',['iec60730_ImcPost',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga137fdbab6da48afed3c5120ff18a1a3d',1,'sl_iec60730_invariable_memory.h']]], + ['iec60730_5firqcheck_426',['iec60730_IRQCheck',['../group__IEC60730__IRQ__Test.html#ga12a2f3b916aba015300180051a01c1fd',1,'sl_iec60730_irq.h']]], + ['iec60730_5fpost_427',['iec60730_Post',['../group__IEC60730__POST.html#ga0319006c98e0cf697fb33b1773bbc101',1,'sl_iec60730.h']]], + ['iec60730_5fprogrammecountertest_428',['iec60730_programmeCounterTest',['../group__IEC60730__PROGRAMME__COUNTER.html#ga4936cb40310b4b10038d8f427c492113',1,'iec60730_programme_counter.h']]], + ['iec60730_5frestartwatchdogs_429',['iec60730_RestartWatchdogs',['../group__IEC60730__WDOG__Test.html#ga8b7e7389eabf5b9497b094c9ebe1778d',1,'sl_iec60730.h']]], + ['iec60730_5fsafestate_430',['iec60730_SafeState',['../group__IEC60730__SAFE__STATE.html#gaf28ccd1df36222150296fbfe62ace9cf',1,'sl_iec60730.h']]], + ['iec60730_5fsystemclocktick_431',['iec60730_SystemClockTick',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gafee8a31ec9311f3d3d8390ec0cf2bf51',1,'sl_iec60730.h']]], + ['iec60730_5ftestclocktick_432',['iec60730_TestClockTick',['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga6b15a364dd6ec51c0246903d2e678fca',1,'sl_iec60730.h']]], + ['iec60730_5ftimersinit_433',['iec60730_TimersInit',['../group__IEC60730__SYSTEM__CLOCK__Test.html#gac9d18836b0cc66433df68b332f541767',1,'sl_iec60730.h']]], + ['iec60730_5fupdatecrcwithdatabuffer_434',['iec60730_updateCRCWithDataBuffer',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#gabdc62d310b78ec8e9f011cb28c6b9225',1,'sl_iec60730.h']]], + ['iec60730_5fvmcbist_435',['iec60730_VmcBist',['../group__IEC60730__VARIABLE__MEMORY__Test.html#gaf10bd8e32c2e1487d09764e6d76a5eed',1,'sl_iec60730_variable_memory.h']]], + ['iec60730_5fvmcinit_436',['iec60730_VmcInit',['../group__IEC60730__VARIABLE__MEMORY__Test.html#gacfc27fdace9baad090a08676443030e0',1,'sl_iec60730.h']]], + ['iec60730_5fvmcpost_437',['iec60730_VmcPost',['../group__IEC60730__VARIABLE__MEMORY__Test.html#ga22773c2c382079a11115ba53b64b8df8',1,'sl_iec60730_variable_memory.h']]], + ['iec60730_5fwatchdogpost_438',['iec60730_WatchdogPost',['../group__IEC60730__WDOG__Test.html#ga558fac53c0d96b6b1ae215ceadc335dc',1,'sl_iec60730_watchdog.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_6.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_6.html new file mode 100644 index 00000000..dc70a4a0 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_6.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_6.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_6.js new file mode 100644 index 00000000..4961b80c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_6.js @@ -0,0 +1,13 @@ +var searchData= +[ + ['memory_5fread_439',['memory_read',['../classjlink_1_1JLinkDll.html#afe784d47e98286e1eb0217c2e72f802e',1,'jlink::JLinkDll']]], + ['memory_5fread16_440',['memory_read16',['../classjlink_1_1JLinkDll.html#a5cb81a55da3992adb63fbc40fa34adf5',1,'jlink::JLinkDll']]], + ['memory_5fread32_441',['memory_read32',['../classjlink_1_1JLinkDll.html#a0e5a859537c39153d2a5fbe23dc2fcff',1,'jlink::JLinkDll']]], + ['memory_5fread64_442',['memory_read64',['../classjlink_1_1JLinkDll.html#aec864455e6600f9bc3101b242933e9b2',1,'jlink::JLinkDll']]], + ['memory_5fread8_443',['memory_read8',['../classjlink_1_1JLinkDll.html#a5210d4bc41a8af90fd7f0b856f4a4546',1,'jlink::JLinkDll']]], + ['memory_5fwrite_444',['memory_write',['../classjlink_1_1JLinkDll.html#a623a321e723b59dcb4b49a83a21b577c',1,'jlink::JLinkDll']]], + ['memory_5fwrite16_445',['memory_write16',['../classjlink_1_1JLinkDll.html#a017ac95b287c6cf7d3f62eea3cb6a957',1,'jlink::JLinkDll']]], + ['memory_5fwrite32_446',['memory_write32',['../classjlink_1_1JLinkDll.html#a8bdede301782fa29c3aabbb95fed92f3',1,'jlink::JLinkDll']]], + ['memory_5fwrite64_447',['memory_write64',['../classjlink_1_1JLinkDll.html#a6ae93e22755fe9663b3e8db0ffd0d942',1,'jlink::JLinkDll']]], + ['memory_5fwrite8_448',['memory_write8',['../classjlink_1_1JLinkDll.html#a66c0f12a109a28a96c599df2dad18c8f',1,'jlink::JLinkDll']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_7.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_7.html new file mode 100644 index 00000000..7de31067 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_7.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_7.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_7.js new file mode 100644 index 00000000..ab7d56db --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_7.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['num_5factive_5fbreakpoints_449',['num_active_breakpoints',['../classjlink_1_1JLinkDll.html#af9a412b31add09389e3481e59ac70264',1,'jlink::JLinkDll']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_8.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_8.html new file mode 100644 index 00000000..7422be24 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_8.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_8.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_8.js new file mode 100644 index 00000000..c7b2946f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_8.js @@ -0,0 +1,9 @@ +var searchData= +[ + ['read_5fram_5farm_5f64_450',['read_ram_arm_64',['../classjlink_1_1JLinkDll.html#af88d9307a04acd3db22dc0d6efb0a0fd',1,'jlink::JLinkDll']]], + ['register_5flist_451',['register_list',['../classjlink_1_1JLinkDll.html#adbd4e5ad4370cb309d9831c45496d005',1,'jlink::JLinkDll']]], + ['register_5fname_452',['register_name',['../classjlink_1_1JLinkDll.html#a695eb7e0836b129a64481d4683fea1e7',1,'jlink::JLinkDll']]], + ['register_5fread_453',['register_read',['../classjlink_1_1JLinkDll.html#ad6b7786db9051c430a1e4d649e649eb7',1,'jlink::JLinkDll']]], + ['register_5fwrite_454',['register_write',['../classjlink_1_1JLinkDll.html#a35f46e5ae53cef7570b252b4e0e04b1e',1,'jlink::JLinkDll']]], + ['reset_455',['reset',['../classjlink_1_1JLinkDll.html#a3fc884f8ab28b2ce6b9893198dd62095',1,'jlink::JLinkDll']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_9.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_9.html new file mode 100644 index 00000000..befd4faa --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_9.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_9.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_9.js new file mode 100644 index 00000000..879a2077 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_9.js @@ -0,0 +1,9 @@ +var searchData= +[ + ['set_5fbreakpoint_456',['set_breakpoint',['../classjlink_1_1JLinkDll.html#acedfec6a99d482b4cc903582cedb0a2b',1,'jlink::JLinkDll']]], + ['set_5fmax_5fspeed_457',['set_max_speed',['../classjlink_1_1JLinkDll.html#a9190b19dd23499b8e3effcac98fe14b3',1,'jlink::JLinkDll']]], + ['set_5fspeed_458',['set_speed',['../classjlink_1_1JLinkDll.html#aa1489d903b101ccb7a7e38d951c5b137',1,'jlink::JLinkDll']]], + ['setup_459',['setUp',['../classiec60730__irq_1_1iec60730__irq.html#a00de13d6a5a208c64f773f2ca2c1b14a',1,'iec60730_irq::iec60730_irq']]], + ['si_5fsegment_5fconst_460',['SI_SEGMENT_CONST',['../group__IEC60730__IRQ__Test.html#gac7cfeb8778147ca004c51acfeb58d26f',1,'SI_SEGMENT_CONST(iec60730_IRQFreqBounds[], iec60730_IRQExecutionBounds_t, SI_SEG_CODE): iec60730.h'],['../group__IEC60730__IRQ__Test.html#gacf8f01fda2cf8af6c68b16362fcbe78e',1,'SI_SEGMENT_CONST(iec60730_IRQFreqBoundsSize, uint8_t, SI_SEG_CODE): iec60730.h']]], + ['si_5fsegment_5fvariable_461',['SI_SEGMENT_VARIABLE',['../group__IEC60730__BIST.html#ga504ca12159a1d0912ae560bf7ad61154',1,'SI_SEGMENT_VARIABLE(iec60730_SafetyCheck, iec60730_TestFailure_t, SI_SEG_DATA): iec60730.h'],['../group__IEC60730__PROGRAMME__COUNTER.html#ga2a7501a937cadf80d50e62d98bac4139',1,'SI_SEGMENT_VARIABLE(iec60730_programmeCounterCheck, uint16_t, SI_SEG_DATA): iec60730.h'],['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga3820191b96b93601df2259799981b535',1,'SI_SEGMENT_VARIABLE(iec60730_clockTestTolerance, uint8_t, SI_SEG_DATA): iec60730.h'],['../group__IEC60730__SYSTEM__CLOCK__Test.html#gaf459913b5cb22f9dbaee0191bec2c8aa',1,'SI_SEGMENT_VARIABLE(iec60730_timerTestControl, uint8_t, SI_SEG_DATA): iec60730.h'],['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga298b6c0c7bd8966085d998f269381891',1,'SI_SEGMENT_VARIABLE(iec60730_timerTick, uint16_t, SI_SEG_DATA): iec60730.h'],['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga63e389f9c28dda9bf8d7aeaf54824797',1,'SI_SEGMENT_VARIABLE(iec60730_systemClockToTestClockFrequency, uint16_t, SI_SEG_DATA): iec60730.h'],['../group__IEC60730__IRQ__Test.html#ga1fd484f2e669b4da687d4aa4f3d2a079',1,'SI_SEGMENT_VARIABLE(iec60730_IRQExecCount[], uint8_t, SI_SEG_DATA): iec60730.h'],['../group__IEC60730__SYSTEM__CLOCK__Test.html#ga4e96f73a854a4e844930b958d6cf9b86',1,'SI_SEGMENT_VARIABLE(iec60730_systemClockCounter, uint8_t, SI_SEG_DATA): iec60730_system_clock.h'],['../group__IEC60730__WDOG__Test.html#ga3d1902e82797eef6780ffcd8cd4a1f0e',1,'SI_SEGMENT_VARIABLE(iec60730_WatchdogState, iec60730_TestWatchdog_t, SI_SEG_DATA_RETAINED_NO_CLEAR): iec60730_watchdog.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_a.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_a.html new file mode 100644 index 00000000..a81e9633 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_a.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_a.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_a.js new file mode 100644 index 00000000..9e6da206 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_a.js @@ -0,0 +1,46 @@ +var searchData= +[ + ['test_5f01_5fcore_5fregister_5fapsr_462',['test_01_core_register_APSR',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a40ef47008fdc7fb16dfb44808473ca2d',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f01_5fprogramme_5fcounter_5fexecution_463',['test_01_programme_counter_execution',['../classiec60730__programme__counter_1_1iec60730__programme__counter.html#ac4b5c30687ccde30965e7b286aa49e63',1,'iec60730_programme_counter::iec60730_programme_counter']]], + ['test_5f02_5fmsp_5fns_5fregister_464',['test_02_MSP_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#af5ce801b3b593f943428f385bee7620d',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f02_5fprogramme_5fcounter_5ftoo_5fslow_465',['test_02_programme_counter_too_slow',['../classiec60730__programme__counter_1_1iec60730__programme__counter.html#a61f99aa2d8fb175fa8c011bb44565d96',1,'iec60730_programme_counter::iec60730_programme_counter']]], + ['test_5f03_5fmsp_5fs_5fregister_466',['test_03_MSP_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#ad97b71a3309dff0e19a22a07b43bd41d',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f04_5fpsp_5fns_5fregister_467',['test_04_PSP_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a8c97579415da4879c006a28e7169d97c',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f05_5fpsp_5fs_5fregister_468',['test_05_PSP_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#afd9f4988f0e0d7b2a007c1a75c142dee',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f06_5fmsplim_5fns_5fregister_469',['test_06_MSPLIM_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a3d34c28ae3b91eec87ec5f8c42fb044e',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f07_5fmsplim_5fs_5fregister_470',['test_07_MSPLIM_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a2d3b101657201c4bdb0df4285a9cc752',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f08_5fpsplim_5fns_5fregister_471',['test_08_PSPLIM_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a8c6a98f5f7a96e27853d036f8d4816be',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f09_5fpsplim_5fs_5fregister_472',['test_09_PSPLIM_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a07d080657e0576e235eb053fa49c07e2',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f10_5fcontrol_5fns_5fregister_473',['test_10_CONTROL_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a830bd866aaf7d9e25dd599959f2c020d',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f11_5fcontrol_5fs_5fregister_474',['test_11_CONTROL_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a93aa859ee396b1923c12aa0556dcdc1b',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f12_5fprimask_5fns_5fregister_475',['test_12_PRIMASK_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a5936c26d4e4c75c66388e1f486e716a2',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f13_5fprimask_5fs_5fregister_476',['test_13_PRIMASK_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a57511d3314cd5860f702ae59979757fc',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f14_5fbasepri_5fns_5fregister_477',['test_14_BASEPRI_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a1b9f36d75ee2c14f671b04359df0bb5e',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f15_5fbasepri_5fs_5fregister_478',['test_15_BASEPRI_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a1c31093d17e9793e09cc64f572adf8af',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f16_5ffaultmask_5fns_5fregister_479',['test_16_FAULTMASK_NS_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#aa3d71f53a39c41f083afb7d65fa87079',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f17_5ffaultmask_5fs_5fregister_480',['test_17_FAULTMASK_S_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a46421bed726003d44aba5f727366630a',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f18_5ffpu_5ffpscr_5fregister_481',['test_18_FPU_FPSCR_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#a5d347f2263d43e143768ce259e5f37bc',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5f19_5ffpu_5fsx_5fregister_482',['test_19_FPU_Sx_register',['../classiec60730__cpu__registers_1_1iec60730__cpu__regs.html#af616ed6ca97c983c68bd5873d29e3857',1,'iec60730_cpu_registers::iec60730_cpu_regs']]], + ['test_5fcalcrc_5fblock_5fmemory_483',['test_CalCRC_Block_Memory',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html#ga6d3026e3a64d50c8d079ade28cb2931f',1,'iec60730_invariable_memory::iec60730_imc']]], + ['test_5fcalcrc_5ffull_5fmemory_484',['test_CalCRC_Full_Memory',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html#gaa79a499cef27a5b8f02db2ad5434943c',1,'iec60730_invariable_memory::iec60730_imc']]], + ['test_5fcorrectbackground_5ffullramclassb_485',['test_CorrectBackGround_FullRamClassB',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#ga5e82fa851169a727a4946fb0a1055ae2',1,'iec60730_variable_memory::iec60730_vmc']]], + ['test_5fcorrectbackground_5fstepramclassb_486',['test_CorrectBackGround_StepRamClassB',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#gab8c1c2f70daaf2ff886668c6cdc89381',1,'iec60730_variable_memory::iec60730_vmc']]], + ['test_5fcorruptcrc_5fcalcrc_5fblock_5fmemory_487',['test_CorruptCRC_CalCRC_Block_Memory',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html#ga693b5231b6a2dac3d9506cf81a280272',1,'iec60730_invariable_memory::iec60730_imc']]], + ['test_5fcorruptcrc_5ffull_5fmemory_488',['test_CorruptCRC_Full_Memory',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html#ga41570257fb035bddab8ba6b6794a2b44',1,'iec60730_invariable_memory::iec60730_imc']]], + ['test_5fcorruptintegrity_5fruncrc_5fblock_5fmemory_489',['test_CorruptIntegrity_RunCRC_Block_Memory',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html#ga76980fe7e6dcc1938ae5c5d689a68045',1,'iec60730_invariable_memory::iec60730_imc']]], + ['test_5fdetectcorruption_5ffullramclassb_490',['test_DetectCorruption_FullRamClassB',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#gae3c86af21b50c48fca0ca4d05e50fa08',1,'iec60730_variable_memory::iec60730_vmc']]], + ['test_5fdetectcorruption_5fstepramclassb_491',['test_DetectCorruption_StepRamClassB',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#ga08c82f87906b8befdb5e52e3de07d715',1,'iec60730_variable_memory::iec60730_vmc']]], + ['test_5fdetectfailed_5fstacktest_492',['test_DetectFailed_StackTest',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#gac627880e4550b92519d2c225a009c031',1,'iec60730_variable_memory::iec60730_vmc']]], + ['test_5firq_5fexecution_493',['test_irq_execution',['../classiec60730__irq_1_1iec60730__irq.html#aa6a5933ea5f0a12842d46d36e1fc985f',1,'iec60730_irq::iec60730_irq']]], + ['test_5firq_5fout_5fof_5fbounds_494',['test_IRQ_out_of_bounds',['../classiec60730__irq_1_1iec60730__irq.html#a3a12cd9f7d0a35c27dbd098288f87b54',1,'iec60730_irq::iec60730_irq']]], + ['test_5fsystem_5fclock_5fexecution_495',['test_system_clock_execution',['../classiec60730__system__clock_1_1iec60730__system__clock.html#a0e9494d374f73fc0edb2608e5bfd44f1',1,'iec60730_system_clock::iec60730_system_clock']]], + ['test_5fsystem_5fclock_5fhigh_5fsafe_5fstate_5fentry_496',['test_system_clock_high_safe_state_entry',['../classiec60730__system__clock_1_1iec60730__system__clock.html#a38be552f302142b772c84b2764948c35',1,'iec60730_system_clock::iec60730_system_clock']]], + ['test_5fsystem_5fclock_5flow_5fsafe_5fstate_5fentry_497',['test_system_clock_Low_safe_state_entry',['../classiec60730__system__clock_1_1iec60730__system__clock.html#ad70898ab9e994740d0284bdceae23713',1,'iec60730_system_clock::iec60730_system_clock']]], + ['test_5ftc1_5fwatchdog_5fpor_5fexecution_498',['test_tc1_watchdog_por_execution',['../classiec60730__watchdog_1_1iec60730__watchdog.html#ac449ec677e1fd222209ac068bcb0fe20',1,'iec60730_watchdog::iec60730_watchdog']]], + ['test_5ftc2_5fwatchdog_5fcounter_5fexecution_499',['test_tc2_watchdog_counter_execution',['../classiec60730__watchdog_1_1iec60730__watchdog.html#a29178d471ebbb3ddc8b4a5bb4fa4181d',1,'iec60730_watchdog::iec60730_watchdog']]], + ['test_5ftc3_5fwatchdog_5fwrong_5frst_5fexecution_500',['test_tc3_watchdog_wrong_rst_execution',['../classiec60730__watchdog_1_1iec60730__watchdog.html#a7ebfd154c1e03309c513ec6ef267e860',1,'iec60730_watchdog::iec60730_watchdog']]], + ['test_5ftc4_5fwatchdog_5fwrong_5ftesting_5fexecution_501',['test_tc4_watchdog_wrong_testing_execution',['../classiec60730__watchdog_1_1iec60730__watchdog.html#aa69c77ac148c08e86c4c569624644204',1,'iec60730_watchdog::iec60730_watchdog']]], + ['test_5ftc5_5frestart_5fwatchdog_5fexecution_502',['test_tc5_restart_watchdog_execution',['../classiec60730__watchdog_1_1iec60730__watchdog.html#a3d20d043b4ed85e7e480af15904f83b1',1,'iec60730_watchdog::iec60730_watchdog']]], + ['test_5fworknormally_5fstacktest_503',['test_WorkNormally_StackTest',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html#ga31cd1e5ecca8805963cb08dc1227a6ef',1,'iec60730_variable_memory::iec60730_vmc']]], + ['to_5fstring_504',['to_string',['../classenums_1_1JLinkGlobalErrors.html#ab869803308e89e556753884d76b34f7e',1,'enums.JLinkGlobalErrors.to_string()'],['../classenums_1_1JLinkEraseErrors.html#a25e9efbbc3382764bc7a5d493fb176de',1,'enums.JLinkEraseErrors.to_string()'],['../classenums_1_1JLinkFlashErrors.html#a1dd5fb5213effb0736de9b0cc9556ab6',1,'enums.JLinkFlashErrors.to_string()'],['../classenums_1_1JLinkWriteErrors.html#a2ea380c6880c53f15a19c44110315e81',1,'enums.JLinkWriteErrors.to_string()'],['../classenums_1_1JLinkReadErrors.html#abdb5d2d89e512804581c5d7a1e5dc4c6',1,'enums.JLinkReadErrors.to_string()'],['../classenums_1_1JLinkDataErrors.html#a1abfe866d313546321adcb1d11c8ca1f',1,'enums.JLinkDataErrors.to_string()'],['../classenums_1_1JLinkRTTErrors.html#a2b6d6bcc1327d146ce3235ca9e627aae',1,'enums.JLinkRTTErrors.to_string()']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_b.html b/docs/html/EFR32_ICE60730_Libraries/search/functions_b.html new file mode 100644 index 00000000..345265d6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_b.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/functions_b.js b/docs/html/EFR32_ICE60730_Libraries/search/functions_b.js new file mode 100644 index 00000000..3b2c8388 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/functions_b.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['warnouthandler_505',['WarnOutHandler',['../classjlink_1_1JLinkDll.html#a568afab553458268065b5aa698da06d6',1,'jlink::JLinkDll']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_0.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_0.html new file mode 100644 index 00000000..a2d93357 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_0.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_0.js new file mode 100644 index 00000000..2e00dc99 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_0.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['adc_20plausibility_20test_563',['ADC Plausibility Test',['../group__IEC60730__ADC__PLAUSIBILTY__Test.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_1.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_1.html new file mode 100644 index 00000000..aa06d658 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_1.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_1.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_1.js new file mode 100644 index 00000000..99f87002 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_1.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['bist_564',['BIST',['../group__IEC60730__BIST.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_2.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_2.html new file mode 100644 index 00000000..a205d30d --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_2.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_2.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_2.js new file mode 100644 index 00000000..0157d8be --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_2.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['cpu_20register_20check_20automated_20verification_20tests_565',['CPU Register Check Automated Verification Tests',['../group__IEC60730__CPU__REGISTERS__VERIFICATION.html',1,'']]], + ['cpu_20register_20check_566',['CPU Register Check',['../group__IEC60730__CPUREG__Test.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_3.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_3.html new file mode 100644 index 00000000..4255bed4 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_3.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_3.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_3.js new file mode 100644 index 00000000..ca30da08 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_3.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['efr32_20iec60730_20library_567',['EFR32 IEC60730 Library',['../group__efr32__sl_iec60730.html',1,'']]], + ['efr32_20iec60730_20library_20extra_20files_568',['EFR32 IEC60730 Library Extra Files',['../group__IEC60730__EXTRA.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_4.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_4.html new file mode 100644 index 00000000..8644fbe7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_4.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_4.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_4.js new file mode 100644 index 00000000..6a6090c7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_4.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['gpio_20plausibility_20test_569',['GPIO Plausibility Test',['../group__IEC60730__GPIO__PLAUSIBILTY__Test.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_5.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_5.html new file mode 100644 index 00000000..1e9ba853 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_5.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_5.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_5.js new file mode 100644 index 00000000..138f5f1f --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_5.js @@ -0,0 +1,8 @@ +var searchData= +[ + ['invariable_20memory_20check_570',['Invariable Memory Check',['../group__IEC60730__INVARIABLE__MEMORY__Test.html',1,'']]], + ['invariable_20memory_20automated_20verification_20tests_571',['Invariable Memory Automated Verification Tests',['../group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html',1,'']]], + ['irq_20test_572',['IRQ Test',['../group__IEC60730__IRQ__Test.html',1,'']]], + ['irq_20automated_20verification_20tests_573',['IRQ Automated Verification Tests',['../group__IEC60730__IRQ__VERIFICATION.html',1,'']]], + ['iec60730_20test_20specification_574',['IEC60730 Test Specification',['../group__IEC60730__VERIFICATION.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_6.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_6.html new file mode 100644 index 00000000..921827f3 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_6.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_6.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_6.js new file mode 100644 index 00000000..fe1ddcd6 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_6.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['oem_20external_20communications_20example_20using_20uart_575',['OEM External Communications Example using UART',['../group__IEC60730__OEM__COMM__Test.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_7.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_7.html new file mode 100644 index 00000000..254468f2 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_7.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_7.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_7.js new file mode 100644 index 00000000..6d149344 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_7.js @@ -0,0 +1,6 @@ +var searchData= +[ + ['post_576',['POST',['../group__IEC60730__POST.html',1,'']]], + ['programme_20counter_20check_577',['Programme Counter Check',['../group__IEC60730__PROGRAMME__COUNTER.html',1,'']]], + ['programme_20counter_20verification_20tests_578',['Programme Counter Verification Tests',['../group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_8.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_8.html new file mode 100644 index 00000000..726aca22 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_8.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_8.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_8.js new file mode 100644 index 00000000..24443f32 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_8.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['release_20notes_579',['Release Notes',['../group__iec60730__release__notes.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_9.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_9.html new file mode 100644 index 00000000..b5dc5898 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_9.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_9.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_9.js new file mode 100644 index 00000000..a75e98d7 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_9.js @@ -0,0 +1,8 @@ +var searchData= +[ + ['silicon_20labs_20coding_20standard_580',['Silicon Labs Coding Standard',['../group__iec60730__coding__standard.html',1,'']]], + ['silicon_20labs_20software_20license_20agreement_581',['Silicon Labs Software License Agreement',['../group__iec60730__license__agreement.html',1,'']]], + ['safe_20state_582',['Safe State',['../group__IEC60730__SAFE__STATE.html',1,'']]], + ['system_20clock_20plausibility_20test_583',['System clock plausibility test',['../group__IEC60730__SYSTEM__CLOCK__Test.html',1,'']]], + ['system_20clock_20automated_20verification_20tests_584',['System Clock Automated Verification Tests',['../group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_a.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_a.html new file mode 100644 index 00000000..93fc4d56 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_a.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_a.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_a.js new file mode 100644 index 00000000..a0003382 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_a.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['variable_20memory_20check_585',['Variable Memory Check',['../group__IEC60730__VARIABLE__MEMORY__Test.html',1,'']]], + ['variable_20memory_20automated_20verification_20tests_586',['Variable Memory Automated Verification Tests',['../group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_b.html b/docs/html/EFR32_ICE60730_Libraries/search/groups_b.html new file mode 100644 index 00000000..81b6ddc4 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_b.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/groups_b.js b/docs/html/EFR32_ICE60730_Libraries/search/groups_b.js new file mode 100644 index 00000000..fba73727 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/groups_b.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['watchdog_20automated_20verification_20tests_587',['Watchdog Automated Verification Tests',['../group__IEC60730__WATCHDOG__VERIFICATION.html',1,'']]], + ['watchdog_20test_588',['Watchdog Test',['../group__IEC60730__WDOG__Test.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/mag_sel.png b/docs/html/EFR32_ICE60730_Libraries/search/mag_sel.png new file mode 100644 index 00000000..39c0ed52 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/search/mag_sel.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/search/namespaces_0.html b/docs/html/EFR32_ICE60730_Libraries/search/namespaces_0.html new file mode 100644 index 00000000..76996d1c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/namespaces_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/namespaces_0.js b/docs/html/EFR32_ICE60730_Libraries/search/namespaces_0.js new file mode 100644 index 00000000..0a4c000c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/namespaces_0.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['jlink_380',['jlink',['../namespacejlink.html',1,'']]], + ['jlink_5fconstants_381',['jlink_constants',['../namespacejlink__constants.html',1,'']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/nomatches.html b/docs/html/EFR32_ICE60730_Libraries/search/nomatches.html new file mode 100644 index 00000000..43773208 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/nomatches.html @@ -0,0 +1,12 @@ + + + + + + + +
    +
    No Matches
    +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/search.css b/docs/html/EFR32_ICE60730_Libraries/search/search.css new file mode 100644 index 00000000..3cf9df94 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/search.css @@ -0,0 +1,271 @@ +/*---------------- Search Box */ + +#FSearchBox { + float: left; +} + +#MSearchBox { + white-space : nowrap; + float: none; + margin-top: 8px; + right: 0px; + width: 170px; + height: 24px; + z-index: 102; +} + +#MSearchBox .left +{ + display:block; + position:absolute; + left:10px; + width:20px; + height:19px; + background:url('search_l.png') no-repeat; + background-position:right; +} + +#MSearchSelect { + display:block; + position:absolute; + width:20px; + height:19px; +} + +.left #MSearchSelect { + left:4px; +} + +.right #MSearchSelect { + right:5px; +} + +#MSearchField { + display:block; + position:absolute; + height:19px; + background:url('search_m.png') repeat-x; + border:none; + width:115px; + margin-left:20px; + padding-left:4px; + color: #909090; + outline: none; + font: 9pt Arial, Verdana, sans-serif; + -webkit-border-radius: 0px; +} + +#FSearchBox #MSearchField { + margin-left:15px; +} + +#MSearchBox .right { + display:block; + position:absolute; + right:10px; + top:8px; + width:20px; + height:19px; + background:url('search_r.png') no-repeat; + background-position:left; +} + +#MSearchClose { + display: none; + position: absolute; + top: 4px; + background : none; + border: none; + margin: 0px 4px 0px 0px; + padding: 0px 0px; + outline: none; +} + +.left #MSearchClose { + left: 6px; +} + +.right #MSearchClose { + right: 2px; +} + +.MSearchBoxActive #MSearchField { + color: #000000; +} + +/*---------------- Search filter selection */ + +#MSearchSelectWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #90A5CE; + background-color: #F9FAFC; + z-index: 10001; + padding-top: 4px; + padding-bottom: 4px; + -moz-border-radius: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +.SelectItem { + font: 8pt Arial, Verdana, sans-serif; + padding-left: 2px; + padding-right: 12px; + border: 0px; +} + +span.SelectionMark { + margin-right: 4px; + font-family: monospace; + outline-style: none; + text-decoration: none; +} + +a.SelectItem { + display: block; + outline-style: none; + color: #000000; + text-decoration: none; + padding-left: 6px; + padding-right: 12px; +} + +a.SelectItem:focus, +a.SelectItem:active { + color: #000000; + outline-style: none; + text-decoration: none; +} + +a.SelectItem:hover { + color: #FFFFFF; + background-color: #3D578C; + outline-style: none; + text-decoration: none; + cursor: pointer; + display: block; +} + +/*---------------- Search results window */ + +iframe#MSearchResults { + width: 60ex; + height: 15em; +} + +#MSearchResultsWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #000; + background-color: #EEF1F7; + z-index:10000; +} + +/* ----------------------------------- */ + + +#SRIndex { + clear:both; + padding-bottom: 15px; +} + +.SREntry { + font-size: 10pt; + padding-left: 1ex; +} + +.SRPage .SREntry { + font-size: 8pt; + padding: 1px 5px; +} + +body.SRPage { + margin: 5px 2px; +} + +.SRChildren { + padding-left: 3ex; padding-bottom: .5em +} + +.SRPage .SRChildren { + display: none; +} + +.SRSymbol { + font-weight: bold; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRScope { + display: block; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRSymbol:focus, a.SRSymbol:active, +a.SRScope:focus, a.SRScope:active { + text-decoration: underline; +} + +span.SRScope { + padding-left: 4px; +} + +.SRPage .SRStatus { + padding: 2px 5px; + font-size: 8pt; + font-style: italic; +} + +.SRResult { + display: none; +} + +DIV.searchresults { + margin-left: 10px; + margin-right: 10px; +} + +/*---------------- External search page results */ + +.searchresult { + background-color: #F0F3F8; +} + +.pages b { + color: white; + padding: 5px 5px 3px 5px; + background-image: url("../tab_a.png"); + background-repeat: repeat-x; + text-shadow: 0 1px 1px #000000; +} + +.pages { + line-height: 17px; + margin-left: 4px; + text-decoration: none; +} + +.hl { + font-weight: bold; +} + +#searchresults { + margin-bottom: 20px; +} + +.searchpages { + margin-top: 10px; +} + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/search.js b/docs/html/EFR32_ICE60730_Libraries/search/search.js new file mode 100644 index 00000000..a554ab9c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/search.js @@ -0,0 +1,814 @@ +/* + @licstart The following is the entire license notice for the + JavaScript code in this file. + + Copyright (C) 1997-2017 by Dimitri van Heesch + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + + @licend The above is the entire license notice + for the JavaScript code in this file + */ +function convertToId(search) +{ + var result = ''; + for (i=0;i do a search + { + this.Search(); + } + } + + this.OnSearchSelectKey = function(evt) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==40 && this.searchIndex0) // Up + { + this.searchIndex--; + this.OnSelectItem(this.searchIndex); + } + else if (e.keyCode==13 || e.keyCode==27) + { + this.OnSelectItem(this.searchIndex); + this.CloseSelectionWindow(); + this.DOMSearchField().focus(); + } + return false; + } + + // --------- Actions + + // Closes the results window. + this.CloseResultsWindow = function() + { + this.DOMPopupSearchResultsWindow().style.display = 'none'; + this.DOMSearchClose().style.display = 'none'; + this.Activate(false); + } + + this.CloseSelectionWindow = function() + { + this.DOMSearchSelectWindow().style.display = 'none'; + } + + // Performs a search. + this.Search = function() + { + this.keyTimeout = 0; + + // strip leading whitespace + var searchValue = this.DOMSearchField().value.replace(/^ +/, ""); + + var code = searchValue.toLowerCase().charCodeAt(0); + var idxChar = searchValue.substr(0, 1).toLowerCase(); + if ( 0xD800 <= code && code <= 0xDBFF && searchValue > 1) // surrogate pair + { + idxChar = searchValue.substr(0, 2); + } + + var resultsPage; + var resultsPageWithSearch; + var hasResultsPage; + + var idx = indexSectionsWithContent[this.searchIndex].indexOf(idxChar); + if (idx!=-1) + { + var hexCode=idx.toString(16); + resultsPage = this.resultsPath + '/' + indexSectionNames[this.searchIndex] + '_' + hexCode + '.html'; + resultsPageWithSearch = resultsPage+'?'+escape(searchValue); + hasResultsPage = true; + } + else // nothing available for this search term + { + resultsPage = this.resultsPath + '/nomatches.html'; + resultsPageWithSearch = resultsPage; + hasResultsPage = false; + } + + window.frames.MSearchResults.location = resultsPageWithSearch; + var domPopupSearchResultsWindow = this.DOMPopupSearchResultsWindow(); + + if (domPopupSearchResultsWindow.style.display!='block') + { + var domSearchBox = this.DOMSearchBox(); + this.DOMSearchClose().style.display = 'inline'; + if (this.insideFrame) + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + domPopupSearchResultsWindow.style.position = 'relative'; + domPopupSearchResultsWindow.style.display = 'block'; + var width = document.body.clientWidth - 8; // the -8 is for IE :-( + domPopupSearchResultsWindow.style.width = width + 'px'; + domPopupSearchResults.style.width = width + 'px'; + } + else + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth; + var top = getYPos(domSearchBox) + 20; // domSearchBox.offsetHeight + 1; + domPopupSearchResultsWindow.style.display = 'block'; + left -= domPopupSearchResults.offsetWidth; + domPopupSearchResultsWindow.style.top = top + 'px'; + domPopupSearchResultsWindow.style.left = left + 'px'; + } + } + + this.lastSearchValue = searchValue; + this.lastResultsPage = resultsPage; + } + + // -------- Activation Functions + + // Activates or deactivates the search panel, resetting things to + // their default values if necessary. + this.Activate = function(isActive) + { + if (isActive || // open it + this.DOMPopupSearchResultsWindow().style.display == 'block' + ) + { + this.DOMSearchBox().className = 'MSearchBoxActive'; + + var searchField = this.DOMSearchField(); + + if (searchField.value == this.searchLabel) // clear "Search" term upon entry + { + searchField.value = ''; + this.searchActive = true; + } + } + else if (!isActive) // directly remove the panel + { + this.DOMSearchBox().className = 'MSearchBoxInactive'; + this.DOMSearchField().value = this.searchLabel; + this.searchActive = false; + this.lastSearchValue = '' + this.lastResultsPage = ''; + } + } +} + +// ----------------------------------------------------------------------- + +// The class that handles everything on the search results page. +function SearchResults(name) +{ + // The number of matches from the last run of . + this.lastMatchCount = 0; + this.lastKey = 0; + this.repeatOn = false; + + // Toggles the visibility of the passed element ID. + this.FindChildElement = function(id) + { + var parentElement = document.getElementById(id); + var element = parentElement.firstChild; + + while (element && element!=parentElement) + { + if (element.nodeName == 'DIV' && element.className == 'SRChildren') + { + return element; + } + + if (element.nodeName == 'DIV' && element.hasChildNodes()) + { + element = element.firstChild; + } + else if (element.nextSibling) + { + element = element.nextSibling; + } + else + { + do + { + element = element.parentNode; + } + while (element && element!=parentElement && !element.nextSibling); + + if (element && element!=parentElement) + { + element = element.nextSibling; + } + } + } + } + + this.Toggle = function(id) + { + var element = this.FindChildElement(id); + if (element) + { + if (element.style.display == 'block') + { + element.style.display = 'none'; + } + else + { + element.style.display = 'block'; + } + } + } + + // Searches for the passed string. If there is no parameter, + // it takes it from the URL query. + // + // Always returns true, since other documents may try to call it + // and that may or may not be possible. + this.Search = function(search) + { + if (!search) // get search word from URL + { + search = window.location.search; + search = search.substring(1); // Remove the leading '?' + search = unescape(search); + } + + search = search.replace(/^ +/, ""); // strip leading spaces + search = search.replace(/ +$/, ""); // strip trailing spaces + search = search.toLowerCase(); + search = convertToId(search); + + var resultRows = document.getElementsByTagName("div"); + var matches = 0; + + var i = 0; + while (i < resultRows.length) + { + var row = resultRows.item(i); + if (row.className == "SRResult") + { + var rowMatchName = row.id.toLowerCase(); + rowMatchName = rowMatchName.replace(/^sr\d*_/, ''); // strip 'sr123_' + + if (search.length<=rowMatchName.length && + rowMatchName.substr(0, search.length)==search) + { + row.style.display = 'block'; + matches++; + } + else + { + row.style.display = 'none'; + } + } + i++; + } + document.getElementById("Searching").style.display='none'; + if (matches == 0) // no results + { + document.getElementById("NoMatches").style.display='block'; + } + else // at least one result + { + document.getElementById("NoMatches").style.display='none'; + } + this.lastMatchCount = matches; + return true; + } + + // return the first item with index index or higher that is visible + this.NavNext = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index++; + } + return focusItem; + } + + this.NavPrev = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index--; + } + return focusItem; + } + + this.ProcessKeys = function(e) + { + if (e.type == "keydown") + { + this.repeatOn = false; + this.lastKey = e.keyCode; + } + else if (e.type == "keypress") + { + if (!this.repeatOn) + { + if (this.lastKey) this.repeatOn = true; + return false; // ignore first keypress after keydown + } + } + else if (e.type == "keyup") + { + this.lastKey = 0; + this.repeatOn = false; + } + return this.lastKey!=0; + } + + this.Nav = function(evt,itemIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + var newIndex = itemIndex-1; + var focusItem = this.NavPrev(newIndex); + if (focusItem) + { + var child = this.FindChildElement(focusItem.parentNode.parentNode.id); + if (child && child.style.display == 'block') // children visible + { + var n=0; + var tmpElem; + while (1) // search for last child + { + tmpElem = document.getElementById('Item'+newIndex+'_c'+n); + if (tmpElem) + { + focusItem = tmpElem; + } + else // found it! + { + break; + } + n++; + } + } + } + if (focusItem) + { + focusItem.focus(); + } + else // return focus to search field + { + parent.document.getElementById("MSearchField").focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = itemIndex+1; + var focusItem; + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem && elem.style.display == 'block') // children visible + { + focusItem = document.getElementById('Item'+itemIndex+'_c0'); + } + if (!focusItem) focusItem = this.NavNext(newIndex); + if (focusItem) focusItem.focus(); + } + else if (this.lastKey==39) // Right + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'block'; + } + else if (this.lastKey==37) // Left + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'none'; + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } + + this.NavChild = function(evt,itemIndex,childIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + if (childIndex>0) + { + var newIndex = childIndex-1; + document.getElementById('Item'+itemIndex+'_c'+newIndex).focus(); + } + else // already at first child, jump to parent + { + document.getElementById('Item'+itemIndex).focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = childIndex+1; + var elem = document.getElementById('Item'+itemIndex+'_c'+newIndex); + if (!elem) // last child, jump to parent next parent + { + elem = this.NavNext(itemIndex+1); + } + if (elem) + { + elem.focus(); + } + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } +} + +function setKeyActions(elem,action) +{ + elem.setAttribute('onkeydown',action); + elem.setAttribute('onkeypress',action); + elem.setAttribute('onkeyup',action); +} + +function setClassAttr(elem,attr) +{ + elem.setAttribute('class',attr); + elem.setAttribute('className',attr); +} + +function createResults() +{ + var results = document.getElementById("SRResults"); + for (var e=0; e + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/typedefs_0.js b/docs/html/EFR32_ICE60730_Libraries/search/typedefs_0.js new file mode 100644 index 00000000..7a37b66e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/typedefs_0.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['readtype_5ft_520',['readType_t',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga26f1499161354923417472c57fd0f942',1,'sl_iec60730.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/variables_0.html b/docs/html/EFR32_ICE60730_Libraries/search/variables_0.html new file mode 100644 index 00000000..bf3eba5c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/variables_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/search/variables_0.js b/docs/html/EFR32_ICE60730_Libraries/search/variables_0.js new file mode 100644 index 00000000..05b3dd9e --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/variables_0.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['_5f_5fchecksum_506',['check_sum',['../group__IEC60730__INVARIABLE__MEMORY__Test.html#ga958cd3e171526a901e3c8b99cf2dfd56',1,'sl_iec60730.h']]] +]; diff --git a/docs/html/EFR32_ICE60730_Libraries/search/variables_1.html b/docs/html/EFR32_ICE60730_Libraries/search/variables_1.html new file mode 100644 index 00000000..49fe59a1 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/search/variables_1.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
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    + +
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    iec60730_IRQExecutionBounds_t Member List
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    This is the complete list of members for iec60730_IRQExecutionBounds_t, including all inherited members.

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    maxiec60730_IRQExecutionBounds_t
    miniec60730_IRQExecutionBounds_t
    + +
    +Generated by   +doxygen + 1.8.17 +
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    iec60730_IRQExecutionBounds_t Struct Reference
    EFR32 IEC60730 Library » IRQ Test
    +
    +
    + +

    #include <sl_iec60730.h>

    + + + + + + + + +

    +Public Attributes

    +uint8_t min
     Minimum expected executions of ISR. Can be 0-255, must be less than or equal to max.
     
    +uint8_t max
     Maximum executed executions of ISR. Can be 0-255, must be greater than or equal to min.
     
    +

    Detailed Description

    +

    OEMs use this structure to define the expected min and max number of executions for each interrupt included in a project.

    +
    The documentation for this struct was generated from the following file: +
    + +
    +Generated by   +doxygen + 1.8.17 +
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    major (defined in iec60730_LibraryVersion_t)iec60730_LibraryVersion_t
    minor (defined in iec60730_LibraryVersion_t)iec60730_LibraryVersion_t
    revision (defined in iec60730_LibraryVersion_t)iec60730_LibraryVersion_t
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    iec60730_LibraryVersion_t Struct Reference
    EFR32 IEC60730 Library » POST
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    +Public Attributes

    +uint8_t major
     
    +uint8_t minor
     
    +uint8_t revision
     
    +
    The documentation for this struct was generated from the following file: +
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    +Generated by   +doxygen + 1.8.17 +
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    rstiec60730_WatchDog_t
    wdogiec60730_WatchDog_t
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    iec60730_WatchDog_t Struct Reference
    EFR32 IEC60730 Library » Watchdog Test
    +
    +
    + +

    Watchdog component configuration structure. + More...

    + +

    #include <sl_iec60730_watchdog.h>

    + + + + + + + + +

    +Public Attributes

    +WDOG_TypeDef *const wdog
     Pointer to Watchdog instance.
     
    +const uint32_t rst
     Watchdog reset cause value.
     
    +

    Detailed Description

    +

    Watchdog component configuration structure.

    +
    The documentation for this struct was generated from the following file: +
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    gpcrcimcParams_t
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    imcParams_t Struct Reference
    EFR32 IEC60730 Library » Invariable Memory Check
    +
    +
    + +

    This structure is used as configuration for IMC testing, that holds GPCRC Register. + More...

    + +

    #include <sl_iec60730.h>

    + + + + + +

    +Public Attributes

    +CRC_TypeDef * gpcrc
     GPCRC Register.
     
    +

    Detailed Description

    +

    This structure is used as configuration for IMC testing, that holds GPCRC Register.

    +
    The documentation for this struct was generated from the following file: +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/structupdateCrcParams__t-members.html b/docs/html/EFR32_ICE60730_Libraries/structupdateCrcParams__t-members.html new file mode 100644 index 00000000..debcb589 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/structupdateCrcParams__t-members.html @@ -0,0 +1,83 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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    This is the complete list of members for updateCrcParams_t, including all inherited members.

    + + + + + +
    halupdateCrcParams_t
    initupdateCrcParams_t
    readTypeupdateCrcParams_t
    xorOutupdateCrcParams_t
    + +
    +Generated by   +doxygen + 1.8.17 +
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    updateCrcParams_t Struct Reference
    EFR32 IEC60730 Library » Invariable Memory Check
    +
    +
    + +

    #include <sl_iec60730.h>

    +
    +Collaboration diagram for updateCrcParams_t:
    +
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    +Public Attributes

    +imcParams_t hal
     struct imcParams_t that contain GPCRC Register
     
    +CRC_INIT_TypeDef init
     CRC initialization structure.
     
    +readType_t readType
     The way to read calculated CRC value.
     
    +crc_t xorOut
     XOR with calculated CRC value.
     
    +

    Detailed Description

    +

    This structure is used as configuration for CRC Buffer calculation. It used when using function iec60730_updateCRCWithDataBuffer

    Note
    : struct #CRC_INIT_TypeDef defined in header file oem_iec60730.h
    +
    The documentation for this struct was generated from the following file: +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/structupdateCrcParams__t__coll__graph.dot b/docs/html/EFR32_ICE60730_Libraries/structupdateCrcParams__t__coll__graph.dot new file mode 100644 index 00000000..71e6ec54 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/structupdateCrcParams__t__coll__graph.dot @@ -0,0 +1,9 @@ +digraph "updateCrcParams_t" +{ + // LATEX_PDF_SIZE + edge [fontname="Helvetica",fontsize="10",labelfontname="Helvetica",labelfontsize="10"]; + node [fontname="Helvetica",fontsize="10",shape=record]; + Node1 [label="updateCrcParams_t",height=0.2,width=0.4,color="black", fillcolor="grey75", style="filled", fontcolor="black",tooltip=" "]; + Node2 -> Node1 [dir="back",color="darkorchid3",fontsize="10",style="dashed",label=" hal" ,fontname="Helvetica"]; + Node2 [label="imcParams_t",height=0.2,width=0.4,color="black", fillcolor="white", style="filled",URL="$structimcParams__t.html",tooltip="This structure is used as configuration for IMC testing, that holds GPCRC Register."]; +} diff --git a/docs/html/EFR32_ICE60730_Libraries/structvmcParams__t-members.html b/docs/html/EFR32_ICE60730_Libraries/structvmcParams__t-members.html new file mode 100644 index 00000000..c9a39892 --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/structvmcParams__t-members.html @@ -0,0 +1,81 @@ + + + + + + + +IEC_60730: Member List + + + + + + + + + +
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    IEC_60730 +
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    vmcParams_t Member List
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    + +

    This is the complete list of members for vmcParams_t, including all inherited members.

    + + + +
    endvmcParams_t
    startvmcParams_t
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    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/html/EFR32_ICE60730_Libraries/structvmcParams__t.html b/docs/html/EFR32_ICE60730_Libraries/structvmcParams__t.html new file mode 100644 index 00000000..d5ae300a --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/structvmcParams__t.html @@ -0,0 +1,101 @@ + + + + + + + +IEC_60730: vmcParams_t Struct Reference + + + + + + + + + +
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    IEC_60730 +
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    +Public Attributes | +List of all members
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    vmcParams_t Struct Reference
    EFR32 IEC60730 Library » Variable Memory Check
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    +
    + +

    This structure is used as configuration for VMC testing. + More...

    + +

    #include <sl_iec60730.h>

    + + + + + + + + +

    +Public Attributes

    +uint32_t * start
     Start address of RAM to check.
     
    +uint32_t * end
     End address of RAM to check.
     
    +

    Detailed Description

    +

    This structure is used as configuration for VMC testing.

    +
    The documentation for this struct was generated from the following file: +
    + +
    +Generated by   +doxygen + 1.8.17 +
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a/docs/html/EFR32_ICE60730_Libraries/tab_h.png b/docs/html/EFR32_ICE60730_Libraries/tab_h.png new file mode 100644 index 00000000..fd5cb705 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/tab_h.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/tab_s.png b/docs/html/EFR32_ICE60730_Libraries/tab_s.png new file mode 100644 index 00000000..ab478c95 Binary files /dev/null and b/docs/html/EFR32_ICE60730_Libraries/tab_s.png differ diff --git a/docs/html/EFR32_ICE60730_Libraries/tabs.css b/docs/html/EFR32_ICE60730_Libraries/tabs.css new file mode 100644 index 00000000..7d45d36c --- /dev/null +++ b/docs/html/EFR32_ICE60730_Libraries/tabs.css @@ -0,0 +1 @@ +.sm{position:relative;z-index:9999}.sm,.sm ul,.sm li{display:block;list-style:none;margin:0;padding:0;line-height:normal;direction:ltr;text-align:left;-webkit-tap-highlight-color:rgba(0,0,0,0)}.sm-rtl,.sm-rtl ul,.sm-rtl li{direction:rtl;text-align:right}.sm>li>h1,.sm>li>h2,.sm>li>h3,.sm>li>h4,.sm>li>h5,.sm>li>h6{margin:0;padding:0}.sm ul{display:none}.sm li,.sm a{position:relative}.sm a{display:block}.sm a.disabled{cursor:not-allowed}.sm:after{content:"\00a0";display:block;height:0;font:0px/0 serif;clear:both;visibility:hidden;overflow:hidden}.sm,.sm *,.sm *:before,.sm *:after{-moz-box-sizing:border-box;-webkit-box-sizing:border-box;box-sizing:border-box}.sm-dox{background-image:url("tab_b.png")}.sm-dox a,.sm-dox a:focus,.sm-dox a:hover,.sm-dox a:active{padding:0px 12px;padding-right:43px;font-family:"Lucida Grande","Geneva","Helvetica",Arial,sans-serif;font-size:13px;font-weight:bold;line-height:36px;text-decoration:none;text-shadow:0px 1px 1px rgba(255,255,255,0.9);color:#283A5D;outline:none}.sm-dox a:hover{background-image:url("tab_a.png");background-repeat:repeat-x;color:#fff;text-shadow:0px 1px 1px #000}.sm-dox a.current{color:#D23600}.sm-dox a.disabled{color:#bbb}.sm-dox a span.sub-arrow{position:absolute;top:50%;margin-top:-14px;left:auto;right:3px;width:28px;height:28px;overflow:hidden;font:bold 12px/28px monospace !important;text-align:center;text-shadow:none;background:rgba(255,255,255,0.5);border-radius:5px}.sm-dox a.highlighted span.sub-arrow:before{display:block;content:'-'}.sm-dox>li:first-child>a,.sm-dox>li:first-child>:not(ul) a{border-radius:5px 5px 0 0}.sm-dox>li:last-child>a,.sm-dox>li:last-child>*:not(ul) a,.sm-dox>li:last-child>ul,.sm-dox>li:last-child>ul>li:last-child>a,.sm-dox>li:last-child>ul>li:last-child>*:not(ul) a,.sm-dox>li:last-child>ul>li:last-child>ul,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>a,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>*:not(ul) a,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>ul,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>a,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>*:not(ul) a,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>ul,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>a,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>*:not(ul) a,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>ul{border-radius:0 0 5px 5px}.sm-dox>li:last-child>a.highlighted,.sm-dox>li:last-child>*:not(ul) a.highlighted,.sm-dox>li:last-child>ul>li:last-child>a.highlighted,.sm-dox>li:last-child>ul>li:last-child>*:not(ul) a.highlighted,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>a.highlighted,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>*:not(ul) a.highlighted,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>a.highlighted,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>*:not(ul) a.highlighted,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>a.highlighted,.sm-dox>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>ul>li:last-child>*:not(ul) a.highlighted{border-radius:0}.sm-dox ul{background:rgba(162,162,162,0.1)}.sm-dox ul a,.sm-dox ul a:focus,.sm-dox ul a:hover,.sm-dox ul a:active{font-size:12px;border-left:8px solid transparent;line-height:36px;text-shadow:none;background-color:white;background-image:none}.sm-dox ul a:hover{background-image:url("tab_a.png");background-repeat:repeat-x;color:#fff;text-shadow:0px 1px 1px #000}.sm-dox ul ul a,.sm-dox ul ul a:hover,.sm-dox ul ul a:focus,.sm-dox ul ul a:active{border-left:16px solid transparent}.sm-dox ul ul ul a,.sm-dox ul ul ul a:hover,.sm-dox ul ul ul a:focus,.sm-dox ul ul ul a:active{border-left:24px solid transparent}.sm-dox ul ul ul ul a,.sm-dox ul ul ul ul a:hover,.sm-dox ul ul ul ul a:focus,.sm-dox ul ul ul ul a:active{border-left:32px solid transparent}.sm-dox ul ul ul ul ul a,.sm-dox ul ul ul ul ul a:hover,.sm-dox ul ul ul ul ul a:focus,.sm-dox ul ul ul ul ul a:active{border-left:40px solid transparent}@media (min-width: 768px){.sm-dox ul{position:absolute;width:12em}.sm-dox li{float:left}.sm-dox.sm-rtl li{float:right}.sm-dox ul li,.sm-dox.sm-rtl ul li,.sm-dox.sm-vertical li{float:none}.sm-dox a{white-space:nowrap}.sm-dox ul a,.sm-dox.sm-vertical a{white-space:normal}.sm-dox .sm-nowrap>li>a,.sm-dox .sm-nowrap>li>:not(ul) a{white-space:nowrap}.sm-dox{padding:0 10px;background-image:url("tab_b.png");line-height:36px}.sm-dox a span.sub-arrow{top:50%;margin-top:-2px;right:12px;width:0;height:0;border-width:4px;border-style:solid dashed dashed dashed;border-color:#283A5D transparent transparent transparent;background:transparent;border-radius:0}.sm-dox a,.sm-dox a:focus,.sm-dox a:active,.sm-dox a:hover,.sm-dox a.highlighted{padding:0px 12px;background-image:url("tab_s.png");background-repeat:no-repeat;background-position:right;border-radius:0 !important}.sm-dox a:hover{background-image:url("tab_a.png");background-repeat:repeat-x;color:#fff;text-shadow:0px 1px 1px #000}.sm-dox a:hover span.sub-arrow{border-color:#fff transparent transparent transparent}.sm-dox a.has-submenu{padding-right:24px}.sm-dox li{border-top:0}.sm-dox>li>ul:before,.sm-dox>li>ul:after{content:'';position:absolute;top:-18px;left:30px;width:0;height:0;overflow:hidden;border-width:9px;border-style:dashed dashed solid dashed;border-color:transparent transparent #bbb transparent}.sm-dox>li>ul:after{top:-16px;left:31px;border-width:8px;border-color:transparent transparent #fff transparent}.sm-dox ul{border:1px solid #bbb;padding:5px 0;background:#fff;border-radius:5px !important;box-shadow:0 5px 9px rgba(0,0,0,0.2)}.sm-dox ul a span.sub-arrow{right:8px;top:50%;margin-top:-5px;border-width:5px;border-color:transparent transparent transparent #555;border-style:dashed dashed dashed solid}.sm-dox ul a,.sm-dox ul a:hover,.sm-dox ul a:focus,.sm-dox ul a:active,.sm-dox ul a.highlighted{color:#555;background-image:none;border:0 !important;color:#555;background-image:none}.sm-dox ul a:hover{background-image:url("tab_a.png");background-repeat:repeat-x;color:#fff;text-shadow:0px 1px 1px #000}.sm-dox ul a:hover span.sub-arrow{border-color:transparent transparent transparent #fff}.sm-dox span.scroll-up,.sm-dox span.scroll-down{position:absolute;display:none;visibility:hidden;overflow:hidden;background:#fff;height:36px}.sm-dox span.scroll-up:hover,.sm-dox span.scroll-down:hover{background:#eee}.sm-dox span.scroll-up:hover span.scroll-up-arrow,.sm-dox span.scroll-up:hover span.scroll-down-arrow{border-color:transparent transparent #D23600 transparent}.sm-dox span.scroll-down:hover span.scroll-down-arrow{border-color:#D23600 transparent transparent transparent}.sm-dox span.scroll-up-arrow,.sm-dox span.scroll-down-arrow{position:absolute;top:0;left:50%;margin-left:-6px;width:0;height:0;overflow:hidden;border-width:6px;border-style:dashed dashed solid dashed;border-color:transparent transparent #555 transparent}.sm-dox span.scroll-down-arrow{top:8px;border-style:solid dashed dashed dashed;border-color:#555 transparent transparent transparent}.sm-dox.sm-rtl a.has-submenu{padding-right:12px;padding-left:24px}.sm-dox.sm-rtl a span.sub-arrow{right:auto;left:12px}.sm-dox.sm-rtl.sm-vertical a.has-submenu{padding:10px 20px}.sm-dox.sm-rtl.sm-vertical a span.sub-arrow{right:auto;left:8px;border-style:dashed solid dashed dashed;border-color:transparent #555 transparent transparent}.sm-dox.sm-rtl>li>ul:before{left:auto;right:30px}.sm-dox.sm-rtl>li>ul:after{left:auto;right:31px}.sm-dox.sm-rtl ul a.has-submenu{padding:10px 20px !important}.sm-dox.sm-rtl ul a span.sub-arrow{right:auto;left:8px;border-style:dashed solid dashed dashed;border-color:transparent #555 transparent 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00000000..d5216bd7 --- /dev/null +++ b/docs/run_integration_test.md @@ -0,0 +1,291 @@ +# Guideline for running integration test + +## Export Variable + +> [!NOTE] +> Before running cmake, you need to export some variables first. + +Export SDK_PATH=, TOOL_DIRS=, TOOL_CHAINS, FLASH_REGIONS_TEST (flash start address support calculate crc for module invariable memory), JLINK_PATH and path to `slc-cli` tool a before run config CMake. + +If you want to calculate from start address to end address of flash: + +```sh +$ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk +$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin +$ export TOOL_CHAINS=GCC +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +$ export PATH=$PATH:/media/slc_cli/slc_cli_linux_check/slc_cli +$ export FLASH_REGIONS_TEST=0x8000000 +``` + +or if you want to calculate multiple regions: + +```sh +$ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190" +``` + +with FLASH_REGIONS_TEST=0x8000000 is flash start address of board name brd4187c (chip EFR32MG24) + +To run integration tests by manually, for the watchdog module you need to connect the device to ethernet. Export CHIP, ADAPTER_SN, LST_PATH, JLINK_PATH and the device's IP address and run test script, for example: + +```sh +$ export CHIP=EFR32MG24BXXXF1536 ADAPTER_SN=440111030 +$ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/S +``` + +if test secure peripherals or for non-secure peripherals: + +```sh +$ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/NS +``` + +```sh +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +$ export HOST_IP=192.168.1.69 +``` + +> [!NOTE] +> Environment variables need to be exported during test execution: +>> export TOOL_CHAINS= (IAR or GCC) +>> +>> export TOOL_DIRS= +>> +>> export FLASH_REGIONS_TEST= +>> +>> export HOST_IP= +>> +>> export JLINK_PATH= + +## Build test for IAR tool + +To build tests for the IAR tool, if you run manually test, you need to run the pre-build command below. + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=${BOARD_NAME} $OPTION_PRE_BUILD_IAR_TOOL +$ cd .. +$ make prepare +``` +> [!NOTE] +> Keep `$OPTION_PRE_BUILD_IAR_TOOL` the same when running integration test cmake config + +For example build integration test: + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=brd4187c -DINTEGRATION_TEST_WDOG1_ENABLE=ON -DENABLE_INTEGRATION_TESTING=ON -DINTEGRATION_TEST_USE_MARCHX_DISABLE=ON -DENABLE_CRC_USE_SW=ON -DENABLE_CAL_CRC_32=ON +$ cd .. +$ make prepare +``` + +or you can run bash script `pre_build_iar.sh` in path [./../simplicity_sdk/pre_build_iar.sh](../simplicity_sdk/) with: + +- $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48 +- $2: OPTION_INTEGRATION_TEST: -DENABLE_INTEGRATION_TESTING=ON, etc... + +```sh +$ bash pre_build_iar.sh $BOARD_NAME $OPTION_INTEGRATION_TEST +``` + +for example: + +```sh +$ bash pre_build_iar.sh brd4187c "-DENABLE_INTEGRATION_TESTING=ON" +``` + +## Manually run integration tests + +CMake config + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DBOARD_NAME=brd4187c +``` + +CMake Build + +```sh +$ cmake --build . --target integration_test_info -j4 +``` + +or + +```sh +$ make integration_test_info -j4 +``` + +To support running integration tests for the watchdog module, there are 2 options when running when running CMake config: +- TEST_SECURE_PERIPHERALS_ENABLE: enable test secure peripherals + +- INTEGRATION_TEST_WDOG1_ENABLE: enable watchdog 1 to test if device supports + +To support running integration tests for the variable memory module, there are 1 options when running when running CMake config: +- INTEGRATION_TEST_USE_MARCHX_DISABLE: disable using MarchXC algorithm + +By default when testing variable memory module, enable using MarchXC algorithm. For example: + +```sh +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DINTEGRATION_TEST_USE_MARCHX_DISABLE=ON -DBOARD_NAME=brd4187c +``` + +For devices that have Trust zone implemented, secure and non-secure peripherals need to test. +Default enable checks non-secure peripherals. To check secure peripherals enable this option when run CMake config: TEST_SECURE_PERIPHERALS_ENABLE. For example: + +```sh +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DTEST_SECURE_PERIPHERALS_ENABLE=ON -DBOARD_NAME=brd4187c +``` + +For devices that support 2 watchdogs, if you want to test both watchdogs, enable option INTEGRATION_TEST_WDOG1_ENABLE to ON when run Cmake config: + +```sh +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DINTEGRATION_TEST_WDOG1_ENABLE=ON -DBOARD_NAME=brd4187c +``` + +To run integration tests for the watchdog module you need to connect the device to ethernet. Export CHIP, ADAPTER_SN, LST_PATH, JLINK_PATH and the device's IP address and run test script, for example: + +```sh +$ export CHIP=EFR32MG24BXXXF1536 ADAPTER_SN=440111030 +$ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/S +``` + +if test secure peripherals or for non-secure peripherals: + +```sh +$ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/NS +``` + +```sh +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +$ export HOST_IP=192.168.1.69 +``` + +```sh +$ python3 integration_test_iec60730_irq.py GCC +``` + +By default device enable watchdog 0 and test watchdog 0. If you want to test wachdog 1 using this command: + +```sh +$ INTEGRATION_TEST_WDOG1_ENABLE=enable python3 integration_test_iec60730_watchdog.py GCC +``` + +If you want to test variable memory module with disable using MarchXC algorithm: + +```sh +$ INTEGRATION_TEST_USE_MARCHX_DISABLE=disable python3 integration_test_iec60730_variable_memory.py GCC +``` + +If you want to test invariable memory module with calculate crc32: + +```sh +$ INTEGRATION_TEST_ENABLE_CAL_CRC_32=enable python3 integration_test_iec60730_variable_memory.py GCC +``` + +## Automatically run integration tests + +Command run + +```sh +bash execute_test.sh $1 $2 $3 $4 $5 $6 +``` + +With the input arguments, there is the following information + +- $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48 +- $2: task: all, gen-only, run-only +- $3: components: all, unit_test_iec60730_bist, unit_test_iec60730_post, ... +- $4: ADAPTER_SN +- $5: compiler: GCC, IAR +- $6: OPTION_SUPPORT_INTEGRATION_TEST: "-DENABLE_CAL_CRC_32=ON -DENABLE_CRC_USE_SW=ON -DTEST_SECURE_PERIPHERALS_ENABLE=ON -DINTEGRATION_TEST_WDOG1_ENABLE=ON - INTEGRATION_TEST_USE_MARCHX_DISABLE=ON" + +In which: Components list that support testing includes: +- integration_test_iec60730_program_counter +- integration_test_iec60730_irq +- integration_test_iec60730_system_clock +- integration_test_iec60730_watchdog +- integration_test_iec60730_cpu_registers +- integration_test_iec60730_variable_memory +- integration_test_iec60730_invariable_memory + +Before running the bash file, you need to install Jlink, Srecord and slc tool, refer [README.md](../README.md) to set up some environment variables as follows: +If the compiler is GCC +- If the compiler is GCC: + +If you want to calculate from start address to end address of flash: + +```sh +$ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk +$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin +$ export TOOL_CHAINS=GCC +$ export FLASH_REGIONS_TEST=0x8000000 +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +$ export HOST_IP=192.168.1.69 +``` + +or if you want to calculate multiple regions: + +```sh +$ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190" +``` + +> [!NOTE] +> In the current integration test file, only enable computation one region: from the start address of ​​the flash to the end of the flash. Therefore, just export the flash's starting address. For example, chip EFR32MG24: +>> $ export FLASH_REGIONS_TEST=0x8000000 + +### Example + +- With GCC toolchain: + +```sh +bash execute_integration_test.sh brd4187c all all 440111030 GCC +``` + +- With IAR toolchain: + +```sh +bash execute_integration_test.sh brd4187c all all 440111030 IAR +``` + +### Note: +In case you want to build CRC32 run this command. For example: + +```sh +bash execute_integration_test.sh brd4187c all all 440111030 GCC "-DENABLE_CAL_CRC_32=ON" +``` + +Or case you want to use the above integration test support options, run this command. For example: + +```sh +bash execute_integration_test.sh brd4187c all all 440111030 GCC "-DTEST_SECURE_PERIPHERALS_ENABLE=ON -DINTEGRATION_TEST_WDOG1_ENABLE=ON -DINTEGRATION_TEST_USE_MARCHX_DISABLE=ON -DENABLE_CAL_CRC_32=ON" +``` + +## CRC calculation options + +When running build cmake to run unit tests and integration tests for invariable memory modules, the crc calculation image file will have the suffix _crc16 or _crc32, you must flash the image file with this suffix. + +With the commands above, the default value supports calculation CRC-16. If you want to change to calculate for CRC-32 bits, use the CMake config command below: + +- With integration test: + +by mannually + +```sh +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DBOARD_NAME=brd4187c -DENABLE_CAL_CRC_32=ON +``` + +or by automatically + +```sh +bash execute_integration_test.sh brd4187c all all 440111030 GCC "-DENABLE_CAL_CRC_32=ON" +``` + + +Here is some options to support running tests of invariable memory modules: +- ENABLE_CAL_CRC_32 +- ENABLE_CRC_USE_SW (if this option ON, you can enable option: ENABLE_SW_CRC_TABLE) + +> [!NOTE] +> Only use ENABLE_SW_CRC_TABLE option when the ENABLE_CRC_USE_SW option is ON, otherwise an error will be reported during the build process. \ No newline at end of file diff --git a/docs/run_unit_test.md b/docs/run_unit_test.md new file mode 100644 index 00000000..c29226aa --- /dev/null +++ b/docs/run_unit_test.md @@ -0,0 +1,183 @@ +# Guideline for running unit test + +## Export Variable + +> [!NOTE] +> Before running cmake, you need to export some variables first. + +Export SDK_PATH=, TOOL_DIRS=, TOOL_CHAINS, FLASH_REGIONS_TEST (flash start address support calculate crc for module invariable memory), JLINK_PATH and path to `slc-cli` tool a before run config CMake. + +If you want to calculate from start address to end address of flash: + +```sh +$ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk +$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin +$ export TOOL_CHAINS=GCC +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +$ export PATH=$PATH:/media/slc_cli/slc_cli_linux_check/slc_cli +$ export FLASH_REGIONS_TEST=0x8000000 +``` + +or if you want to calculate multiple regions: + +```sh +$ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190" +``` + +with FLASH_REGIONS_TEST=0x8000000 is flash start address of board name brd4187c (chip EFR32MG24) + +## Build test for IAR tool + +To build tests for the IAR tool, if you run manually test, you need to run the pre-build command below. + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=${BOARD_NAME} $OPTION_PRE_BUILD_IAR_TOOL +$ cd .. +$ make prepare +``` + +> [!NOTE] +> Keep `$OPTION_PRE_BUILD_IAR_TOOL` the same when running unit test cmake config + +For example build integration test: + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=brd4187c -DENABLE_UNIT_TESTING=ON -DENABLE_CRC_USE_SW=ON -DENABLE_CAL_CRC_32=ON +$ cd .. +$ make prepare +``` + +or you can run bash script `pre_build_iar.sh` in path [./../simplicity_sdk/pre_build_iar.sh](../simplicity_sdk/) with: + +- $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48 +- $2: OPTION_UNIT_TEST: -DENABLE_UNIT_TESTING=ON, etc... + +```sh +$ bash pre_build_iar.sh $BOARD_NAME $OPTION_UNIT_TEST +``` + +for example: + +```sh +$ bash pre_build_iar.sh brd4187c "-DENABLE_UNIT_TESTING=ON" +``` + +## Manually run unit tests + +CMake config + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_UNIT_TESTING=ON -DBOARD_NAME=brd4187c +``` + +CMake Build + +```sh +$ cmake --build . --target unit_test_info -j4 +``` + +or + +```sh +$ make unit_test_info -j4 +``` + +## Automatically run unit tests + +Command run + +```sh +bash execute_test.sh $1 $2 $3 $4 $5 $6 +``` + +With the input arguments, there is the following information + +- $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48 +- $2: task: all, gen-only, run-only +- $3: components: all, unit_test_iec60730_bist, unit_test_iec60730_post, ... +- $4: ADAPTER_SN +- $5: compiler: GCC, IAR +- $6: OPTION_SUPPORT_UNIT_TEST: "-DENABLE_CAL_CRC_32=ON -DENABLE_CRC_USE_SW" + +In which: Components list that supports unit testing includes: +- unit_test_iec60730_post +- unit_test_iec60730_bist +- unit_test_iec60730_program_counter +- unit_test_iec60730_safety_check +- unit_test_iec60730_irq +- unit_test_iec60730_system_clock +- unit_test_iec60730_watchdog +- unit_test_iec60730_cpu_registers +- unit_test_iec60730_variable_memory +- unit_test_iec60730_invariable_memory + +Before running the bash file, you need to install Jlink, Srecord and slc tool, refer [README.md](../README.md) to set up some environment variables as follows: +If the compiler is GCC +- If the compiler is GCC: + +If you want to calculate from start address to end address of flash: + +```sh +$ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk +$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin +$ export TOOL_CHAINS=GCC +$ export FLASH_REGIONS_TEST=0x8000000 +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +``` + +or if you want to calculate multiple regions: + +```sh +$ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190" +``` + +> [!NOTE] +> In the current unit test file, only enable computation one region: from the start address of ​​the flash to the end of the flash. Therefore, just export the flash's starting address. For example, chip EFR32MG24: +>> $ export FLASH_REGIONS_TEST=0x8000000 + +### Example + +- With GCC toolchain: + +```sh +bash execute_unit_test.sh brd4187c all all 440111030 GCC +``` + +- With IAR toolchain: + +```sh +bash execute_unit_test.sh brd4187c all all 440111030 IAR +``` + +## CRC calculation options + +When running build cmake to run unit tests and integration tests for invariable memory modules, the crc calculation image file will have the suffix _crc16 or _crc32, you must flash the image file with this suffix. + +With the commands above, the default value supports calculation CRC-16. If you want to change to calculate for CRC-32 bits, use the CMake config command below: + +- With unit test: + +by mannually + +```sh +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_UNIT_TESTING=ON -DBOARD_NAME=brd4187c -DENABLE_CAL_CRC_32=ON +``` + +or by automatically + +```sh +bash execute_unit_test.sh brd4187c all all 440111030 GCC "-DENABLE_CAL_CRC_32=ON" +``` + +Here is some options to support running tests of invariable memory modules: +- ENABLE_CAL_CRC_32 +- ENABLE_CRC_USE_SW (if this option ON, you can enable option: ENABLE_SW_CRC_TABLE) + +> [!NOTE] +> Only use ENABLE_SW_CRC_TABLE option when the ENABLE_CRC_USE_SW option is ON, otherwise an error will be reported during the build process. \ No newline at end of file diff --git a/iec60730.slce b/iec60730.slce new file mode 100644 index 00000000..eb338f0a --- /dev/null +++ b/iec60730.slce @@ -0,0 +1,9 @@ +id: iec60730 +version: 1.0.0 +description: "IEC60730 extension for Gecko SDK Suite" +label: "Silicon Labs Safety Libraries IEC60730" +sdk: + id: gecko_sdk + version: 4.4.2 +component_path: + - path: components diff --git a/iec60730.slsdk b/iec60730.slsdk new file mode 100644 index 00000000..b99d116f --- /dev/null +++ b/iec60730.slsdk @@ -0,0 +1,11 @@ +# Properties file for Simplicity Studio metadata +id=com.silabs.sdk.iec60730 + +version=1.0.0 + +label=Silicon Labs Safety Libraries IEC60730 +description=IEC60730 extension for Gecko SDK Suite + +prop.subLabel=Silicon\\ Labs\\ IEC60730 \\1.0.0 + +prop.file.templatesFile=iec60730_templates.xml diff --git a/iec60730_templates.xml b/iec60730_templates.xml new file mode 100644 index 00000000..4d18f698 --- /dev/null +++ b/iec60730_templates.xml @@ -0,0 +1,33 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt new file mode 100644 index 00000000..26d55f96 --- /dev/null +++ b/lib/CMakeLists.txt @@ -0,0 +1,68 @@ + +# Run coding_convention +include(coding_convention) + +if(DEFINED ENV{TOOL_CHAINS}) + set(TOOL_CHAINS "$ENV{TOOL_CHAINS}") +else() + set(TOOL_CHAINS "GCC") +endif() + +if(CHECK_CODING_CONVETION_ENABLE) + if(${TOOL_CHAINS} STREQUAL "GCC") + set(SOURCE_LIBIEC60730 + "${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}/app.c" + "${CMAKE_SOURCE_DIR}/lib/asm/sl_iec60730_vmc_marchc.S" + "${CMAKE_SOURCE_DIR}/lib/asm/sl_iec60730_vmc_marchxc.S" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_bist.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers_ns.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers_s.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_invariable_memory.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_irq.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_post.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_program_counter.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_system_clock.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_variable_memory.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_watchdog.c" + "${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}/main.c" + ) + elseif(${TOOL_CHAINS} STREQUAL "IAR") + set(SOURCE_LIBIEC60730 + "${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}/app.c" + "${CMAKE_SOURCE_DIR}/lib/asm/sl_iec60730_vmc_marchc_iar.S" + "${CMAKE_SOURCE_DIR}/lib/asm/sl_iec60730_vmc_marchxc_iar.S" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_bist.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers_ns.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_cpu_registers_s.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_invariable_memory.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_irq.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_post.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_program_counter.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_system_clock.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_variable_memory.c" + "${CMAKE_SOURCE_DIR}/lib/src/sl_iec60730_watchdog.c" + "${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}/main.c" + ) + endif() + + set(HEADER_LIBIEC60730 PUBLIC + "${CMAKE_SOURCE_DIR}/lib/config/sl_iec60730_config.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_toolchain.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_board.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_comm.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_cpu_registers.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_internal.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_invariable_memory.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_irq.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_program_counter.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_system_clock.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_variable_memory.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730_watchdog.h" + "${CMAKE_SOURCE_DIR}/lib/inc/sl_iec60730.h" + "${CMAKE_SOURCE_DIR}/lib/lib/asm" + "${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}" + ) + +endif() diff --git a/lib/asm/sl_iec60730_vmc_marchc.S b/lib/asm/sl_iec60730_vmc_marchc.S new file mode 100644 index 00000000..bedfc71e --- /dev/null +++ b/lib/asm/sl_iec60730_vmc_marchc.S @@ -0,0 +1,222 @@ +/***************************************************************************//** + * @file + * @brief Variable memory March-C test + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + + .syntax unified + .thumb + .thumb_func + + .global sl_iec60730_vmc_marchc_step + +/**************************************************************************//** + * public IEC60730 March C test for start-up + * + * @param r0 - Start address of RAM to check + * r1 - End address of RAM to check + * r2 - Background pattern + * r3 - Backup area + * @return 1 if passed, 0 if failed + *****************************************************************************/ + .section .text.sl_iec60730_vmc_marchc_step + .type sl_iec60730_vmc_marchc_step, %function + .size sl_iec60730_vmc_marchc_step, .-sl_iec60730_vmc_marchc_step + +sl_iec60730_vmc_marchc_step: + PUSH {r4-r7, lr} + + /* Setup inverted background pattern (r7) */ + MOVS r7, r2 + RSBS r7, r7, #0 + SUBS r7, r7, #1 + + /* Backup buffer to be tested? */ + MOVS r5, r0 + CMP r5, r3 + BEQ IEC60730_MARCHC_STEP_BUFF1 + + /* SAVE */ +IEC60730_MARCHC_STEP_SAVE: + MOVS r4, #0 +IEC60730_MARCHC_STEP_SAVE_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_STEP1 + LDR r6, [r5], #+4 + STR r6, [r3, r4] + ADDS r4, r4, #+4 + B IEC60730_MARCHC_STEP_SAVE_LOOP + + /* STEP 1: Write background pattern */ +IEC60730_MARCHC_STEP_STEP1: + MOVS r5, r0 +IEC60730_MARCHC_STEP_STEP1_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_STEP2 + STR r2, [r5], #+4 + B IEC60730_MARCHC_STEP_STEP1_LOOP + + /* STEP 2 */ +IEC60730_MARCHC_STEP_STEP2: + MOVS r5, r0 +IEC60730_MARCHC_STEP_STEP2_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_STEP3 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + STR r7, [r5], #4 + B IEC60730_MARCHC_STEP_STEP2_LOOP + + /* STEP 3 */ +IEC60730_MARCHC_STEP_STEP3: + MOVS r5, r0 +IEC60730_MARCHC_STEP_STEP3_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_STEP4 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHC_STEP_ERR + STR r2, [r5], #4 + B IEC60730_MARCHC_STEP_STEP3_LOOP + + /* STEP 4 */ +IEC60730_MARCHC_STEP_STEP4: + MOVS r5, r1 + SUB r5, r5, #+3 +IEC60730_MARCHC_STEP_STEP4_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHC_STEP_STEP5 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + STR r7, [r5], #-4 + B IEC60730_MARCHC_STEP_STEP4_LOOP + + /* STEP 5 */ +IEC60730_MARCHC_STEP_STEP5: + MOVS r5, r1 + SUB r5, r5, #+3 +IEC60730_MARCHC_STEP_STEP5_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHC_STEP_STEP6 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHC_STEP_ERR + STR r2, [r5], #-4 + B IEC60730_MARCHC_STEP_STEP5_LOOP + + /* STEP 6 */ +IEC60730_MARCHC_STEP_STEP6: + MOVS r5, r0 +IEC60730_MARCHC_STEP_STEP6_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_RESTORE + LDR r6, [r5], #4 + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + B IEC60730_MARCHC_STEP_STEP6_LOOP + + /* RESTORE */ +IEC60730_MARCHC_STEP_RESTORE: + MOVS r5, r0 + MOVS r4, #0 +IEC60730_MARCHC_STEP_RESTORE_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_MARCH_RET + LDR r6, [r3, r4] + STR r6, [r5] + ADDS r5, r5, #+4 + ADDS r4, r4, #+4 + B IEC60730_MARCHC_STEP_RESTORE_LOOP + + /* STEP 1: Write background pattern */ +IEC60730_MARCHC_STEP_BUFF1: + MOVS r5, r0 +IEC60730_MARCHC_STEP_BUFF1_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_BUFF2 + STR r2, [r5], #+4 + B IEC60730_MARCHC_STEP_BUFF1_LOOP + + /* STEP 2 */ +IEC60730_MARCHC_STEP_BUFF2: + MOVS r5, r0 +IEC60730_MARCHC_STEP_BUFF2_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_BUFF3 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + STR r7, [r5], #4 + B IEC60730_MARCHC_STEP_BUFF2_LOOP + + /* STEP 3 */ +IEC60730_MARCHC_STEP_BUFF3: + MOVS r5, r0 +IEC60730_MARCHC_STEP_BUFF3_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_BUFF4 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHC_STEP_ERR + STR r2, [r5], #4 + B IEC60730_MARCHC_STEP_BUFF3_LOOP + + /* STEP 4 */ +IEC60730_MARCHC_STEP_BUFF4: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHC_STEP_BUFF4_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHC_STEP_BUFF5 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + STR r7, [r5], #-4 + B IEC60730_MARCHC_STEP_BUFF4_LOOP + + /* STEP 5 */ +IEC60730_MARCHC_STEP_BUFF5: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHC_STEP_BUFF5_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHC_STEP_BUFF6 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHC_STEP_ERR + STR r2, [r5], #-4 + B IEC60730_MARCHC_STEP_BUFF5_LOOP + + /* STEP 6 */ +IEC60730_MARCHC_STEP_BUFF6: + MOVS r5, r0 +IEC60730_MARCHC_STEP_BUFF6_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_MARCH_RET + LDR r6, [r5], #4 + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + B IEC60730_MARCHC_STEP_BUFF6_LOOP + +IEC60730_MARCHC_STEP_MARCH_RET: + MOVS r0, #1 + B IEC60730_MARCHC_STEP_RET + +IEC60730_MARCHC_STEP_ERR: + MOVS r0, #0 + +IEC60730_MARCHC_STEP_RET: + POP {r4-r7, pc} diff --git a/lib/asm/sl_iec60730_vmc_marchc_iar.S b/lib/asm/sl_iec60730_vmc_marchc_iar.S new file mode 100644 index 00000000..4d3e09e8 --- /dev/null +++ b/lib/asm/sl_iec60730_vmc_marchc_iar.S @@ -0,0 +1,218 @@ +;***************************************************************************//** +; @file +; @brief Variable memory March-X test +;******************************************************************************* +; # License +; Copyright 2023 Silicon Laboratories Inc. www.silabs.com +;******************************************************************************* +; +; The licensor of this software is Silicon Laboratories Inc. Your use of this +; software is governed by the terms of Silicon Labs Master Software License +; Agreement (MSLA) available at +; www.silabs.com/about-us/legal/master-software-license-agreement. This +; software is distributed to you in Source Code format and is governed by the +; sections of the MSLA applicable to Source Code. +; +;******************************************************************************/ + + SECTION text:CODE(2) + + EXPORT sl_iec60730_vmc_marchc_step + +;****************************************************************************/** +; public IEC60730 March C test for start-up +; +; @param r0 - Start address of RAM to check +; r1 - End address of RAM to check +; r2 - Background pattern +; r3 - Backup area +; @return 1 if passed, 0 if failed +;******************************************************************************/ + +sl_iec60730_vmc_marchc_step: + PUSH {r4-r7, lr} + + ; Setup inverted background pattern (r7) + MOVS r7, r2 + RSBS r7, r7, #0 + SUBS r7, r7, #1 + + ; Backup buffer to be tested? + MOVS r5, r0 + CMP r5, r3 + BEQ IEC60730_MARCHC_STEP_BUFF1 + + ; SAVE +IEC60730_MARCHC_STEP_SAVE: + MOVS r4, #0 +IEC60730_MARCHC_STEP_SAVE_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_STEP1 + LDR r6, [r5], #+4 + STR r6, [r3, r4] + ADDS r4, r4, #+4 + B IEC60730_MARCHC_STEP_SAVE_LOOP + + ; STEP 1 +IEC60730_MARCHC_STEP_STEP1: + MOVS r5, r0 +IEC60730_MARCHC_STEP_STEP1_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_STEP2 + STR r2, [r5], #+4 + B IEC60730_MARCHC_STEP_STEP1_LOOP + + ; STEP 2 +IEC60730_MARCHC_STEP_STEP2: + MOVS r5, r0 +IEC60730_MARCHC_STEP_STEP2_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_STEP3 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + STR r7, [r5], #4 + B IEC60730_MARCHC_STEP_STEP2_LOOP + + ; STEP 3 +IEC60730_MARCHC_STEP_STEP3: + MOVS r5, r0 +IEC60730_MARCHC_STEP_STEP3_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_STEP4 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHC_STEP_ERR + STR r2, [r5], #4 + B IEC60730_MARCHC_STEP_STEP3_LOOP + + ; STEP 4 +IEC60730_MARCHC_STEP_STEP4: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHC_STEP_STEP4_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHC_STEP_STEP5 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + STR r7, [r5], #-4 + B IEC60730_MARCHC_STEP_STEP4_LOOP + + ; STEP 5 +IEC60730_MARCHC_STEP_STEP5: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHC_STEP_STEP5_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHC_STEP_STEP6 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHC_STEP_ERR + STR r2, [r5], #-4 + B IEC60730_MARCHC_STEP_STEP5_LOOP + + ; STEP 6 +IEC60730_MARCHC_STEP_STEP6: + MOVS r5, r0 +IEC60730_MARCHC_STEP_STEP6_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_RESTORE + LDR r6, [r5], #4 + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + B IEC60730_MARCHC_STEP_STEP6_LOOP + + ; RESTORE +IEC60730_MARCHC_STEP_RESTORE: + MOVS r5, r0 + MOVS r4, #0 +IEC60730_MARCHC_STEP_RESTORE_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_MARCH_RET + LDR r6, [r3, r4] + STR r6, [r5] + ADDS r5, r5, #+4 + ADDS r4, r4, #+4 + B IEC60730_MARCHC_STEP_RESTORE_LOOP + +IEC60730_MARCHC_STEP_BUFF1: + MOVS r5, r0 +IEC60730_MARCHC_STEP_BUFF1_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_BUFF2 + STR r2, [r5], #+4 + B IEC60730_MARCHC_STEP_BUFF1_LOOP + + ; STEP 2 +IEC60730_MARCHC_STEP_BUFF2: + MOVS r5, r0 +IEC60730_MARCHC_STEP_BUFF2_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_BUFF3 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + STR r7, [r5], #4 + B IEC60730_MARCHC_STEP_BUFF2_LOOP + + ; STEP 3 +IEC60730_MARCHC_STEP_BUFF3: + MOVS r5, r0 +IEC60730_MARCHC_STEP_BUFF3_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_BUFF4 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHC_STEP_ERR + STR r2, [r5], #4 + B IEC60730_MARCHC_STEP_BUFF3_LOOP + + ; STEP 4 +IEC60730_MARCHC_STEP_BUFF4: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHC_STEP_BUFF4_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHC_STEP_BUFF5 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + STR r7, [r5], #-4 + B IEC60730_MARCHC_STEP_BUFF4_LOOP + + ; STEP 5 +IEC60730_MARCHC_STEP_BUFF5: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHC_STEP_BUFF5_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHC_STEP_BUFF6 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHC_STEP_ERR + STR r2, [r5], #-4 + B IEC60730_MARCHC_STEP_BUFF5_LOOP + + ; STEP 6 +IEC60730_MARCHC_STEP_BUFF6: + MOVS r5, r0 +IEC60730_MARCHC_STEP_BUFF6_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHC_STEP_MARCH_RET + LDR r6, [r5], #4 + CMP r6, r2 + BNE IEC60730_MARCHC_STEP_ERR + B IEC60730_MARCHC_STEP_BUFF6_LOOP + +IEC60730_MARCHC_STEP_MARCH_RET: + MOVS r0, #1 + B IEC60730_MARCHC_STEP_RET + +IEC60730_MARCHC_STEP_ERR: + MOVS r0, #0 + +IEC60730_MARCHC_STEP_RET: + POP {r4-r7, pc} + + END diff --git a/lib/asm/sl_iec60730_vmc_marchxc.S b/lib/asm/sl_iec60730_vmc_marchxc.S new file mode 100644 index 00000000..4ec6ec1c --- /dev/null +++ b/lib/asm/sl_iec60730_vmc_marchxc.S @@ -0,0 +1,235 @@ +/***************************************************************************//** + * @file + * @brief Variable memory March-X test + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + + #include "sl_iec60730_config.h" + .syntax unified + .thumb + .thumb_func + + .global sl_iec60730_vmc_marchxc_step + +/**************************************************************************//** + * public IEC60730 March C test for start-up + * + * @param r0 - Start address of RAM to check + * r1 - End address of RAM to check + * r2 - Background pattern + * r3 - Backup area + * @return 1 if passed, 0 if failed + *****************************************************************************/ + .section .text.sl_iec60730_vmc_marchxc_step + .type sl_iec60730_vmc_marchxc_step, %function + .size sl_iec60730_vmc_marchxc_step, .-sl_iec60730_vmc_marchxc_step + +sl_iec60730_vmc_marchxc_step: + PUSH {r4-r7, lr} + + /* Setup inverted background pattern (r7) */ + MOVS r7, r2 + RSBS r7, r7, #0 + SUBS r7, r7, #1 + + /* Backup buffer to be tested? */ + MOVS r5, r0 + CMP r5, r3 + BEQ IEC60730_MARCHXC_STEP_BUFF1 + + /* SAVE */ +IEC60730_MARCHXC_STEP_SAVE: + MOVS r4, #0 +IEC60730_MARCHXC_STEP_SAVE_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_STEP1 + LDR r6, [r5], #+4 + STR r6, [r3, r4] + ADDS r4, r4, #+4 + B IEC60730_MARCHXC_STEP_SAVE_LOOP + + /* STEP 1: Write background pattern */ +IEC60730_MARCHXC_STEP_STEP1: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_STEP1_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_STEP2 + STR r2, [r5], #+4 + B IEC60730_MARCHXC_STEP_STEP1_LOOP + + /* STEP 2 */ +IEC60730_MARCHXC_STEP_STEP2: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_STEP2_LOOP: + CMP r5, r1 +#if (SL_IEC60730_USE_MARCHX_ENABLE == 0) + BHI IEC60730_MARCHXC_STEP_STEP3 +#else + BHI IEC60730_MARCHXC_STEP_STEP5 +#endif + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + STR r7, [r5], #4 + B IEC60730_MARCHXC_STEP_STEP2_LOOP + +#if (SL_IEC60730_USE_MARCHX_ENABLE == 0) + /* STEP 3 */ +IEC60730_MARCHXC_STEP_STEP3: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_STEP3_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_STEP4 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHXC_STEP_ERR + STR r2, [r5], #4 + B IEC60730_MARCHXC_STEP_STEP3_LOOP + + /* STEP 4 */ +IEC60730_MARCHXC_STEP_STEP4: + MOVS r5, r1 + SUB r5, r5, #+3 +IEC60730_MARCHXC_STEP_STEP4_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHXC_STEP_STEP5 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + STR r7, [r5], #-4 + B IEC60730_MARCHXC_STEP_STEP4_LOOP +#endif /* March-X */ + + /* STEP 5 */ +IEC60730_MARCHXC_STEP_STEP5: + MOVS r5, r1 + SUB r5, r5, #+3 +IEC60730_MARCHXC_STEP_STEP5_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHXC_STEP_STEP6 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHXC_STEP_ERR + STR r2, [r5], #-4 + B IEC60730_MARCHXC_STEP_STEP5_LOOP + + /* STEP 6 */ +IEC60730_MARCHXC_STEP_STEP6: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_STEP6_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_RESTORE + LDR r6, [r5], #4 + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + B IEC60730_MARCHXC_STEP_STEP6_LOOP + + /* RESTORE */ +IEC60730_MARCHXC_STEP_RESTORE: + MOVS r5, r0 + MOVS r4, #0 +IEC60730_MARCHXC_STEP_RESTORE_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_MARCH_RET + LDR r6, [r3, r4] + STR r6, [r5] + ADDS r5, r5, #+4 + ADDS r4, r4, #+4 + B IEC60730_MARCHXC_STEP_RESTORE_LOOP + + /* STEP 1: Write background pattern */ +IEC60730_MARCHXC_STEP_BUFF1: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_BUFF1_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_BUFF2 + STR r2, [r5], #+4 + B IEC60730_MARCHXC_STEP_BUFF1_LOOP + + /* STEP 2 */ +IEC60730_MARCHXC_STEP_BUFF2: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_BUFF2_LOOP: + CMP r5, r1 +#if (SL_IEC60730_USE_MARCHX_ENABLE == 0) + BHI IEC60730_MARCHXC_STEP_BUFF3 +#else + BHI IEC60730_MARCHXC_STEP_BUFF5 +#endif + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + STR r7, [r5], #4 + B IEC60730_MARCHXC_STEP_BUFF2_LOOP + +#if (SL_IEC60730_USE_MARCHX_ENABLE == 0) + /* STEP 3 */ +IEC60730_MARCHXC_STEP_BUFF3: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_BUFF3_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_BUFF4 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHXC_STEP_ERR + STR r2, [r5], #4 + B IEC60730_MARCHXC_STEP_BUFF3_LOOP + + /* STEP 4 */ +IEC60730_MARCHXC_STEP_BUFF4: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHXC_STEP_BUFF4_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHXC_STEP_BUFF5 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + STR r7, [r5], #-4 + B IEC60730_MARCHXC_STEP_BUFF4_LOOP +#endif /* March-X */ + + /* STEP 5 */ +IEC60730_MARCHXC_STEP_BUFF5: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHXC_STEP_BUFF5_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHXC_STEP_BUFF6 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHXC_STEP_ERR + STR r2, [r5], #-4 + B IEC60730_MARCHXC_STEP_BUFF5_LOOP + + /* STEP 6 */ +IEC60730_MARCHXC_STEP_BUFF6: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_BUFF6_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_MARCH_RET + LDR r6, [r5], #4 + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + B IEC60730_MARCHXC_STEP_BUFF6_LOOP + +IEC60730_MARCHXC_STEP_MARCH_RET: + MOVS r0, #1 + B IEC60730_MARCHXC_STEP_RET + +IEC60730_MARCHXC_STEP_ERR: + MOVS r0, #0 + +IEC60730_MARCHXC_STEP_RET: + POP {r4-r7, pc} diff --git a/lib/asm/sl_iec60730_vmc_marchxc_iar.S b/lib/asm/sl_iec60730_vmc_marchxc_iar.S new file mode 100644 index 00000000..fae223d5 --- /dev/null +++ b/lib/asm/sl_iec60730_vmc_marchxc_iar.S @@ -0,0 +1,232 @@ +;***************************************************************************//** +; @file +; @brief Variable memory March-X test +;******************************************************************************* +; # License +; Copyright 2023 Silicon Laboratories Inc. www.silabs.com +;******************************************************************************* +; +; The licensor of this software is Silicon Laboratories Inc. Your use of this +; software is governed by the terms of Silicon Labs Master Software License +; Agreement (MSLA) available at +; www.silabs.com/about-us/legal/master-software-license-agreement. This +; software is distributed to you in Source Code format and is governed by the +; sections of the MSLA applicable to Source Code. +; +;******************************************************************************/ + + #include "sl_iec60730_config.h" + + SECTION text:CODE(2) + + EXPORT sl_iec60730_vmc_marchxc_step + +;****************************************************************************/** +; public IEC60730 March C test for start-up +; +; @param r0 - Start address of RAM to check +; r1 - End address of RAM to check +; r2 - Background pattern +; r3 - Backup area +; @return 1 if passed, 0 if failed +;******************************************************************************/ + +sl_iec60730_vmc_marchxc_step: + PUSH {r4-r7, lr} + + ; Setup inverted background pattern (r7) + MOVS r7, r2 + RSBS r7, r7, #0 + SUBS r7, r7, #1 + + ; Backup buffer to be tested? + MOVS r5, r0 + CMP r5, r3 + BEQ IEC60730_MARCHXC_STEP_BUFF1 + + ; SAVE +IEC60730_MARCHXC_STEP_SAVE: + MOVS r4, #0 +IEC60730_MARCHXC_STEP_SAVE_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_STEP1 + LDR r6, [r5], #+4 + STR r6, [r3, r4] + ADDS r4, r4, #+4 + B IEC60730_MARCHXC_STEP_SAVE_LOOP + + ; STEP 1 +IEC60730_MARCHXC_STEP_STEP1: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_STEP1_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_STEP2 + STR r2, [r5], #+4 + B IEC60730_MARCHXC_STEP_STEP1_LOOP + + ; STEP 2 +IEC60730_MARCHXC_STEP_STEP2: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_STEP2_LOOP: + CMP r5, r1 +#if (SL_IEC60730_USE_MARCHX_ENABLE == 0) + BHI IEC60730_MARCHXC_STEP_STEP3 +#else + BHI IEC60730_MARCHXC_STEP_STEP5 +#endif + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + STR r7, [r5], #4 + B IEC60730_MARCHXC_STEP_STEP2_LOOP + +#if (SL_IEC60730_USE_MARCHX_ENABLE == 0) + ; STEP 3 +IEC60730_MARCHXC_STEP_STEP3: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_STEP3_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_STEP4 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHXC_STEP_ERR + STR r2, [r5], #4 + B IEC60730_MARCHXC_STEP_STEP3_LOOP + + ; STEP 4 +IEC60730_MARCHXC_STEP_STEP4: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHXC_STEP_STEP4_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHXC_STEP_STEP5 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + STR r7, [r5], #-4 + B IEC60730_MARCHXC_STEP_STEP4_LOOP +#endif /* March-X */ + + ; STEP 5 +IEC60730_MARCHXC_STEP_STEP5: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHXC_STEP_STEP5_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHXC_STEP_STEP6 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHXC_STEP_ERR + STR r2, [r5], #-4 + B IEC60730_MARCHXC_STEP_STEP5_LOOP + + ; STEP 6 +IEC60730_MARCHXC_STEP_STEP6: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_STEP6_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_RESTORE + LDR r6, [r5], #4 + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + B IEC60730_MARCHXC_STEP_STEP6_LOOP + + ; RESTORE +IEC60730_MARCHXC_STEP_RESTORE: + MOVS r5, r0 + MOVS r4, #0 +IEC60730_MARCHXC_STEP_RESTORE_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_MARCH_RET + LDR r6, [r3, r4] + STR r6, [r5] + ADDS r5, r5, #+4 + ADDS r4, r4, #+4 + B IEC60730_MARCHXC_STEP_RESTORE_LOOP + +IEC60730_MARCHXC_STEP_BUFF1: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_BUFF1_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_BUFF2 + STR r2, [r5], #+4 + B IEC60730_MARCHXC_STEP_BUFF1_LOOP + + ; STEP 2 +IEC60730_MARCHXC_STEP_BUFF2: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_BUFF2_LOOP: + CMP r5, r1 +#if (SL_IEC60730_USE_MARCHX_ENABLE == 0) + BHI IEC60730_MARCHXC_STEP_BUFF3 +#else + BHI IEC60730_MARCHXC_STEP_BUFF5 +#endif + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + STR r7, [r5], #4 + B IEC60730_MARCHXC_STEP_BUFF2_LOOP + +#if (SL_IEC60730_USE_MARCHX_ENABLE == 0) + ; STEP 3 +IEC60730_MARCHXC_STEP_BUFF3: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_BUFF3_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_BUFF4 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHXC_STEP_ERR + STR r2, [r5], #4 + B IEC60730_MARCHXC_STEP_BUFF3_LOOP + + ; STEP 4 +IEC60730_MARCHXC_STEP_BUFF4: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHXC_STEP_BUFF4_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHXC_STEP_BUFF5 + LDR r6, [r5] + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + STR r7, [r5], #-4 + B IEC60730_MARCHXC_STEP_BUFF4_LOOP +#endif /* March-X */ + + ; STEP 5 +IEC60730_MARCHXC_STEP_BUFF5: + MOVS r5, r1 + SUB r5, #+3 +IEC60730_MARCHXC_STEP_BUFF5_LOOP: + CMP r5, r0 + BLO IEC60730_MARCHXC_STEP_BUFF6 + LDR r6, [r5] + CMP r6, r7 + BNE IEC60730_MARCHXC_STEP_ERR + STR r2, [r5], #-4 + B IEC60730_MARCHXC_STEP_BUFF5_LOOP + + ; STEP 6 +IEC60730_MARCHXC_STEP_BUFF6: + MOVS r5, r0 +IEC60730_MARCHXC_STEP_BUFF6_LOOP: + CMP r5, r1 + BHI IEC60730_MARCHXC_STEP_MARCH_RET + LDR r6, [r5], #4 + CMP r6, r2 + BNE IEC60730_MARCHXC_STEP_ERR + B IEC60730_MARCHXC_STEP_BUFF6_LOOP + +IEC60730_MARCHXC_STEP_MARCH_RET: + MOVS r0, #1 + B IEC60730_MARCHXC_STEP_RET + +IEC60730_MARCHXC_STEP_ERR: + MOVS r0, #0 + +IEC60730_MARCHXC_STEP_RET: + POP {r4-r7, pc} + + END diff --git a/lib/config/sl_iec60730_config.h b/lib/config/sl_iec60730_config.h new file mode 100644 index 00000000..1e9540e8 --- /dev/null +++ b/lib/config/sl_iec60730_config.h @@ -0,0 +1,201 @@ +/***************************************************************************/ /** + * @file + * @brief Library definitions + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_CONFIG_H +#define SL_IEC60730_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_IRQ_Test + * @{ + *****************************************************************************/ + +// IEC60730_IRQ + +// Data type for iec60730_IRQExecCount variables +// uint8_t +// uint16_t +// uint32_t +// Default: uint8_t +#define SL_IEC60730_IRQ_TYPE_VARIABLE uint8_t +// Enable function to get the value of failed irqs +// Default: 0 +#define SL_IEC60730_IRQ_STATUS_ENABLE 0 + +// + +/** @} (end addtogroup IEC60730_IRQ_Test) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_WDOG_Test + * @{ + *****************************************************************************/ + +// IEC60730_WATCHDOG + +// Enable Watchdog 0 +// Default: 1 +#ifndef SL_IEC60730_WDOG0_ENABLE +#define SL_IEC60730_WDOG0_ENABLE 1 +#endif //SL_IEC60730_WDOG0_ENABLE + +// Enable Watchdog 1 +// Default: 0 +#ifndef SL_IEC60730_WDOG1_ENABLE +#define SL_IEC60730_WDOG1_ENABLE 0 +#endif //SL_IEC60730_WDOG1_ENABLE + +// Enable saving iec60730_watchdog_state to backup RAM on Series 2 +// Default: 0 +#define SL_IEC60730_SAVE_STAGE_ENABLE 0 + +// Reset cause flags in the RSTCASUES register +// Default: 1 +#define SL_IEC60730_RSTCAUSES_CLEAR_ENABLE 1 + +// + +/** @} (end addtogroup IEC60730_WDOG_Test) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_SYSTEM_CLOCK_Test + * @{ + *****************************************************************************/ + +// IEC60730_SYS_CLOCK + +// Determines how many entrances into sl_iec60730_test_clock_tick() +// occur before bist frequency test executes +// Default: 10 +#define SL_IEC60730_TEST_CLOCK_MULTIPLIER 10 + +// This value is used to compare with the system clock counter +// This define holds the ratio value between system clock timer interrupt period and +// test clock timer interrupt period +// Default: 10 +#define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ 10 + +// The tolerance of test +// (OEM set value of the define, example: iec60730_sys_clock_test_tolerance) +// is typical (+/-) 10%-49% of the SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ. +// Default: 1 +#define SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE 1 + +// + +/** @} (end addtogroup IEC60730_SYSTEM_CLOCK_Test) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_VARIABLE_MEMORY_Test + * @{ + *****************************************************************************/ + +// IEC60730_VMC + +// Enable used the algorithm used in BIST is March-X. +// Default: 1 +#ifndef SL_IEC60730_USE_MARCHX_ENABLE +#define SL_IEC60730_USE_MARCHX_ENABLE 1 +#endif // SL_IEC60730_USE_MARCHX_ENABLE + +// SL_IEC60730_VAR_BLOCKS_PER_BIST +// Default: 256 +#define SL_IEC60730_VAR_BLOCKS_PER_BIST 256 + +// Pattern 0 is used for stack overflow +// Default: (0xEEEEEEEEuL) +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0 (0xEEEEEEEEuL) + +// Pattern 1 is used for stack overflow +// Default: (0xCCCCCCCCuL) +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1 (0xCCCCCCCCuL) + +// Pattern 2 is used for stack overflow +// Default: (0xBBBBBBBBuL) +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2 (0xBBBBBBBBuL) + +// Pattern 3 is used for stack overflow +// Default: (0xDDDDDDDDuL) +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3 (0xDDDDDDDDuL) + +// + +/** @} (end addtogroup IEC60730_VARIABLE_MEMORY_Test) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_INVARIABLE_MEMORY_Test + * @{ + *****************************************************************************/ + +// IEC60730_IMC + +// Enable debug IMC module +/// Use this definition for debugging purposes. +// Default: 1 +#define SL_IEC60730_CRC_DEBUG_ENABLE 1 + +// SL_IEC60730_INVAR_BLOCKS_PER_BIST +// Default: 512 +#define SL_IEC60730_INVAR_BLOCKS_PER_BIST 512 + +// Definition is size of block of Flash +/// The value of this +/// definition SHOULD be a power of two. The minimal value SHOULD be 4 and +/// maximum value SHOULD be the alignment value that is defined in linker (GCC +/// compiler) or in configuration of IAR. Our example use alignment 64 for +/// #check_sum variable. So that in our example the #SL_IEC60730_FLASH_BLOCK definition +/// is 64. User can refer to our example linker on how to provide #check_sum +/// variable with alignment 64. +// Default: 64 +#define SL_IEC60730_FLASH_BLOCK 64 + +// Enable CRC calculation using software instead of hardware +/// The library support both hardware and software CRC. Use this definition in +/// case the user use software CRC. The default hardware is used. +// Default: 0 +#ifndef SL_IEC60730_CRC_USE_SW_ENABLE +#define SL_IEC60730_CRC_USE_SW_ENABLE 0 +#endif // SL_IEC60730_CRC_USE_SW_ENABLE + +// Enable pre-defined table for calculating CRC +/// If using #SL_IEC60730_CRC_USE_SW_ENABLE definition then the #SL_IEC60730_SW_CRC_TABLE_ENABLE definition is used for +/// using pre-defined table for calculating. +// Default: 0 +#ifndef SL_IEC60730_SW_CRC_TABLE_ENABLE +#define SL_IEC60730_SW_CRC_TABLE_ENABLE 0 +#endif // SL_IEC60730_SW_CRC_TABLE_ENABLE +// + +// Enable CRC-32 for calculating the CRC value +/// Use this definition in case the user use CRC-32 for calculating the CRC value. +/// The default CRC-16 is used. +// Default: 0 +#ifndef SL_IEC60730_USE_CRC_32_ENABLE +#define SL_IEC60730_USE_CRC_32_ENABLE 0 +#endif // SL_IEC60730_USE_CRC_32_ENABLE + +// + +/** @} (end addtogroup IEC60730_INVARIABLE_MEMORY_Test) */ +/** @} (end addtogroup efr32_iec60730) */ + +// <<< end of configuration section >>> + +#endif /* SL_IEC60730_CONFIG_H */ diff --git a/lib/crc/sl_iec60730_cal_crc16.sh b/lib/crc/sl_iec60730_cal_crc16.sh new file mode 100644 index 00000000..20b11254 --- /dev/null +++ b/lib/crc/sl_iec60730_cal_crc16.sh @@ -0,0 +1,163 @@ +#!/bin/bash + +PROJ_NAME=$1 +BUILD_DIR=$2 +SREC_PATH=$3 +TOOL_CHAINS=$4 +START_ADDR=0 +SUFFIX=_crc16 +NON_SECURE=0 + +START_ADDR=${5//"%20"/" "} +NUMBER_ELEMENT=0 + + +#printf "$START_ADDR\n" + +START_ARR_ADDR=() +END_ARR_ADDR=() +for END_ARR_ADDR in ${START_ADDR[@]}; do + #echo $END_ARR_ADDR ; + if [ "$NUMBER_ELEMENT" -eq 0 ];then + START_ARR_ADDR=$END_ARR_ADDR; + fi + NUMBER_ELEMENT=$((NUMBER_ELEMENT+1)); +done + +#printf "ARR_ADDR: $ARR_ADDR\n" +#printf "START_ARR_ADDR: $START_ARR_ADDR\n" +#printf "NUMBER_ELEMENT: $NUMBER_ELEMENT\n" + +SUFFIX_NON_SECURE="" +if [ ! -z $6 ]; then + NON_SECURE=$6 + echo NonSecure: ${NON_SECURE} + if [ "$NON_SECURE" = "true" ]; then + SUFFIX_NON_SECURE="_NS" + fi +fi + +case $(uname | tr '[:upper:]' '[:lower:]') in + linux*) + OS_NAME="linux" + ;; + msys*) + OS_NAME="windows" + ;; + *) + OS_NAME="notset" + ;; +esac + +if [ -z ${BUILD_DIR} ]; then + MAPFILE=${PROJ_NAME}${SUFFIX_NON_SECURE}.map + INPUT_HEXFILE=${PROJ_NAME}${SUFFIX_NON_SECURE}.hex + OUTPUT_HEXFILE=${PROJ_NAME}${SUFFIX_NON_SECURE}${SUFFIX}.hex + OUTPUT_BINFILE=${PROJ_NAME}${SUFFIX_NON_SECURE}${SUFFIX}.bin + OUTPUT_SRECFILE=${PROJ_NAME}${SUFFIX_NON_SECURE}${SUFFIX}.s37 + TEMP_FILE=tmpfile.txt +else + MAPFILE=${BUILD_DIR}/${PROJ_NAME}${SUFFIX_NON_SECURE}.map + INPUT_HEXFILE=${BUILD_DIR}/${PROJ_NAME}${SUFFIX_NON_SECURE}.hex + OUTPUT_HEXFILE=${BUILD_DIR}/${PROJ_NAME}${SUFFIX_NON_SECURE}${SUFFIX}.hex + OUTPUT_BINFILE=${BUILD_DIR}/${PROJ_NAME}${SUFFIX_NON_SECURE}${SUFFIX}.bin + OUTPUT_SRECFILE=${BUILD_DIR}/${PROJ_NAME}${SUFFIX_NON_SECURE}${SUFFIX}.s37 + TEMP_FILE=${BUILD_DIR}/tmpfile.txt +fi + +echo Proj: ${PROJ_NAME} +echo BuildDir: ${BUILD_DIR} +echo TempFile: ${TEMP_FILE} +echo MapFile: ${MAPFILE} +echo InputHex: ${INPUT_HEXFILE} +echo OutputHex: ${OUTPUT_HEXFILE} +echo TempFile: ${TEMP_FILE} +echo OutputBin: ${OUTPUT_BINFILE} +echo OutputSrec: ${OUTPUT_SRECFILE} +echo OS: ${OS_NAME} + +if [ "${OS_NAME}" = "windows" ]; then + SREC_CAT=${SREC_PATH}/srec_cat.exe + SREC_CMP=${SREC_PATH}/srec_cmp.exe +elif [ "${OS_NAME}" = "linux" ]; then + SREC_CAT=srec_cat + SREC_CMP=srec_cmp +fi + +if [ -e ${TEMP_FILE} ]; then + rm -rf ${TEMP_FILE} +fi +touch ${TEMP_FILE} + +if [ "${TOOL_CHAINS}" = "IAR" ]; then + grep -n "CHECKSUM" ${MAPFILE}>${TEMP_FILE} + while IFS=' ' read -r a1 a2 a3 remainder; do + if [ $a2 = "CHECKSUM" ]; then + LINE_NO=${a1%%:*} + # CRC_ADDR=$a3 + CRC_ADDR=$( echo "$a3" | sed s/\'//g) + fi + done < ${TEMP_FILE} +else # GCC + grep -n "PROVIDE (check_sum = .)" ${MAPFILE}>${TEMP_FILE} + # Find address of check_sum + while IFS=' ' read -r a1 a2 remainder; do + LINE_NO=${a1%%:*} + CRC_ADDR=$a2 + done < ${TEMP_FILE} +fi + +echo Start address: ${START_ADDR} +echo CRC16 address: ${CRC_ADDR} at LineNo: ${LINE_NO} of ${MAPFILE} + +if [ "$(( $NUMBER_ELEMENT % 2 ))" -eq 0 ]; then + +#printf "=== Calculate multiple regions: $START_ADDR and $END_ARR_ADDR to ${CRC_ADDR}\n" + +${SREC_CAT} \ + ${INPUT_HEXFILE} -intel \ + -crop ${START_ADDR} \ + -crc16-l-e ${CRC_ADDR} -xmodem \ + -o ${TEMP_FILE} -intel >/dev/null 2>&1 + +${SREC_CAT} \ + ${INPUT_HEXFILE} -intel \ + -exclude -within ${TEMP_FILE} -intel \ + ${TEMP_FILE} -intel \ + -o ${OUTPUT_HEXFILE} -intel + +else + +#printf "=== Calculate from ${START_ADDR} to ${CRC_ADDR}\n" + +${SREC_CAT} \ + ${INPUT_HEXFILE} -intel \ + -crop ${START_ADDR} ${CRC_ADDR}\ + -fill 0xFF ${START_ADDR} ${CRC_ADDR}\ + -crc16-l-e ${CRC_ADDR} -xmodem \ + -o ${TEMP_FILE} -intel + +${SREC_CAT} \ + ${INPUT_HEXFILE} -intel \ + -exclude -within ${TEMP_FILE} -intel \ + ${TEMP_FILE} -intel \ + -o ${OUTPUT_HEXFILE} -intel + +fi + +rm -rf ${TEMP_FILE} + +echo Comparing ... +${SREC_CMP} \ + ${INPUT_HEXFILE} -intel ${OUTPUT_HEXFILE} -intel -v + +${SREC_CAT} \ + ${OUTPUT_HEXFILE} -intel \ + -offset -${START_ARR_ADDR} \ + -o ${OUTPUT_BINFILE} -binary + +${SREC_CAT} \ + ${OUTPUT_HEXFILE} -intel \ + -o ${OUTPUT_SRECFILE} -address-length=4 + +echo Build done! diff --git a/lib/crc/sl_iec60730_cal_crc32.sh b/lib/crc/sl_iec60730_cal_crc32.sh new file mode 100644 index 00000000..7a4e3d1b --- /dev/null +++ b/lib/crc/sl_iec60730_cal_crc32.sh @@ -0,0 +1,162 @@ +#!/bin/bash + +PROJ_NAME=$1 +BUILD_DIR=$2 +SREC_PATH=$3 +TOOL_CHAINS=$4 +START_ADDR=0 +SUFFIX=_crc32 +NON_SECURE=0 + +START_ADDR=${5//"%20"/" "} +NUMBER_ELEMENT=0 + + +#printf "$START_ADDR\n" + +START_ARR_ADDR=() +END_ARR_ADDR=() +for END_ARR_ADDR in ${START_ADDR[@]}; do + #echo $END_ARR_ADDR ; + if [ "$NUMBER_ELEMENT" -eq 0 ];then + START_ARR_ADDR=$END_ARR_ADDR; + fi + NUMBER_ELEMENT=$((NUMBER_ELEMENT+1)); +done + +#printf "ARR_ADDR: $ARR_ADDR\n" +#printf "START_ARR_ADDR: $START_ARR_ADDR\n" +#printf "NUMBER_ELEMENT: $NUMBER_ELEMENT\n" + +SUFFIX_SECURE="" +if [ ! -z $6 ]; then + NON_SECURE=$6 + echo NonSecure: ${NON_SECURE} + if [ "$NON_SECURE" = "true" ]; then + SUFFIX_SECURE="_NS" + fi +fi + +case $(uname | tr '[:upper:]' '[:lower:]') in + linux*) + OS_NAME="linux" + ;; + msys*) + OS_NAME="windows" + ;; + *) + OS_NAME="notset" + ;; +esac + +if [ -z ${BUILD_DIR} ]; then + MAPFILE=${PROJ_NAME}.map + INPUT_HEXFILE=${PROJ_NAME}.hex + OUTPUT_HEXFILE=${PROJ_NAME}${SUFFIX}.hex + OUTPUT_BINFILE=${PROJ_NAME}${SUFFIX}.bin + OUTPUT_SRECFILE=${PROJ_NAME}${SUFFIX}.s37 + TEMP_FILE=tmpfile.txt +else + MAPFILE=${BUILD_DIR}/${PROJ_NAME}.map + INPUT_HEXFILE=${BUILD_DIR}/${PROJ_NAME}.hex + OUTPUT_HEXFILE=${BUILD_DIR}/${PROJ_NAME}${SUFFIX}.hex + OUTPUT_BINFILE=${BUILD_DIR}/${PROJ_NAME}${SUFFIX}.bin + OUTPUT_SRECFILE=${BUILD_DIR}/${PROJ_NAME}${SUFFIX}.s37 + TEMP_FILE=${BUILD_DIR}/tmpfile.txt +fi + +echo Proj: ${PROJ_NAME} +echo BuildDir: ${BUILD_DIR} +echo TempFile: ${TEMP_FILE} +echo MapFile: ${MAPFILE} +echo InputHex: ${INPUT_HEXFILE} +echo InputHex: ${OUTPUT_HEXFILE} +echo OutputBin: ${OUTPUT_BINFILE} +echo OutputSrec: ${OUTPUT_SRECFILE} +echo OS: ${OS_NAME} + +if [ "${OS_NAME}" = "windows" ]; then + SREC_CAT=${SREC_PATH}/srec_cat.exe + SREC_CMP=${SREC_PATH}/srec_cmp.exe +elif [ "${OS_NAME}" = "linux" ]; then + SREC_CAT=srec_cat + SREC_CMP=srec_cmp +fi + +if [ -e ${TEMP_FILE} ];then + rm -rf ${TEMP_FILE} +fi +touch ${TEMP_FILE} + +if [ "${TOOL_CHAINS}" = "IAR" ]; then + grep -n "CHECKSUM" ${MAPFILE}>${TEMP_FILE} + while IFS=' ' read -r a1 a2 a3 remainder; do + if [ $a2 = "CHECKSUM" ]; then + LINE_NO=${a1%%:*} + # CRC_ADDR=$a3 + CRC_ADDR=$( echo "$a3" | sed s/\'//g) + fi + done < ${TEMP_FILE} +else # GCC + grep -n "PROVIDE (check_sum = .)" ${MAPFILE}>${TEMP_FILE} + # Find address of check_sum + while IFS=' ' read -r a1 a2 remainder; do + LINE_NO=${a1%%:*} + CRC_ADDR=$a2 + done < ${TEMP_FILE} +fi + +echo Start address: ${START_ADDR} +echo CRC32 address: ${CRC_ADDR} at LineNo: ${LINE_NO} of ${MAPFILE} + +if [ "$(( $NUMBER_ELEMENT % 2 ))" -eq 0 ]; then + +#printf "=== Calculate multiple regions: $START_ADDR and $END_ARR_ADDR to ${CRC_ADDR}\n" + +${SREC_CAT} \ + ${INPUT_HEXFILE} -intel \ + -crop ${START_ADDR} \ + -crc32-le ${CRC_ADDR} \ + -o ${TEMP_FILE} -intel >/dev/null 2>&1 + +${SREC_CAT} \ + ${INPUT_HEXFILE} -intel \ + -exclude -within ${TEMP_FILE} -intel \ + ${TEMP_FILE} -intel \ + -o ${OUTPUT_HEXFILE} -intel + +else + +#printf "=== Calculate from ${START_ADDR} to ${CRC_ADDR}\n" + +${SREC_CAT} \ + ${INPUT_HEXFILE} -intel \ + -crop ${START_ADDR} ${CRC_ADDR}\ + -fill 0xFF ${START_ADDR} ${CRC_ADDR}\ + -crc32-le ${CRC_ADDR} \ + -o ${TEMP_FILE} -intel + +${SREC_CAT} \ + ${INPUT_HEXFILE} -intel \ + -exclude -within ${TEMP_FILE} -intel \ + ${TEMP_FILE} -intel \ + -o ${OUTPUT_HEXFILE} -intel + +fi + +rm -rf ${TEMP_FILE} + +echo Comparing ... +${SREC_CMP} \ + ${INPUT_HEXFILE} -intel ${OUTPUT_HEXFILE} -intel -v + +${SREC_CAT} \ + ${OUTPUT_HEXFILE} -intel \ + -offset -${START_ARR_ADDR} \ + -o ${OUTPUT_BINFILE} -binary + +${SREC_CAT} \ + ${OUTPUT_HEXFILE} -intel \ + -o ${OUTPUT_SRECFILE} -address-length=4 + +echo Build done! diff --git a/lib/inc/coding_standard.h b/lib/inc/coding_standard.h new file mode 100644 index 00000000..191c1672 --- /dev/null +++ b/lib/inc/coding_standard.h @@ -0,0 +1,1547 @@ + /****************************************************************************** + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************//** +@addtogroup iec60730_coding_standard +@{ +@verbatim +Silicon Labs IoT Firmware Coding Standard +========================================= +1 Introduction +1.1 Purpose of this document +The purpose of this document is to describe the coding standard used by Silicon Labs IoT customer facing firmware. A unified coding standard is necessary to provide a professional look & feel in the source code that we provide to our customers. Furthermore, it reduces cognitive load, when you need to work with another group's code. Coding style and preferences differ from person to person, which means that there will be rules in this document that you will disagree with. However, please adhere to the rules described here, as having a coding standard that you (somewhat) disagree with is better than having no coding standard. + +1.2 Latest version of this document +This document is version 1.0. + +1.3 Changing this document + +1.4 Structure and wording of this document +This document contains three separate parts: Coding guidelines, coding style and documentation. The coding guidelines deal with the structure of your code. This part is split into a general and a C specific part. The coding style guide details how your code should look, e.g. brace style, comment style etc. Documentation deals with how you should document your code to make it easy for other people to use and modify the code. + +1.4.1 Source Code +In this document, Source code is used as a common name for any C, C++ or header file from Silicon Labs that is being provided to customers. It applies to both manually created as well as autogenerated code. + +1.4.2 Required +Some of the coding standards are required and some are recommendations. All required coding standards are tagged with Required. + +1.4.3 Recommended +Recommended rules should generally be followed. However, recommended rules can be broken in special circumstances. All recommended coding standards are tagged Recommended. + +1.4.4 Should +The word "should" is used throughout this document. In this context, "should" is used to indicate best practice. You should strive to meet these guidelines. However, it is possible to break these rules, if that results in a better end result. + +1.5 Application of this standard +1.5.1 New modules +This standard applies unconditionally to new modules. + +Please note that a new software module does not need to be a new full stack. This could be only a new part in an existing stack. + +1.5.2 Existing modules +Existing components will continue to use the coding standard they are already using (there is still some differences between the various stacks). + +When updating to the new coding standard, especially from a naming convention perspective, it will be required to provide a compatibility layer. Exceptions will only be made for stack/modules with a valid, documented justification as well as agreement from the various stakeholders. An exception could be made either to have a partial compatibility layer or none at all. + +Some modules left in 'maintenance mode' or currently deprecated (exact list to be provided) might never be updated, and that is acceptable. Examples of this would include the SLEEP Driver, RTCDRV, several parts of Base, etc. + +2 General Guidelines +2.1 General Guidelines +We can't put everything into these guidelines, for things not covered in the guidelines, try to make your code blend in with the code you are editing. Use your best judgment! + +2.1.1 Use peer review +A coworker should review all code. In practice, pull requests are encouraged as it allows people to comment on your work easily and it makes it possible to have good discussions about specific lines of code. + +2.1.2 Fix what you break +If your changes break anything, then you are responsible for correcting the problem. This means that if you break an automated or manual testing job by committing something, you should strive to fix it as soon as possible. Other people depend on being able to build! + +2.1.3 Be a Boy Scout +Leave the source code in a better condition than you found it! + +2.1.4 Avoid reinventing the Wheel +If somebody has implemented some functionality before, you should use that rather than developing it again from scratch. This could be a function in a standard library, or a module that was internally developed. Silicon Labs is a large company with many different groups developing software for various use. What you need might already exist! If the existing code doesn't suit your needs exactly but is close, consider whether the required changes would make it more generally useful. If so, change it. + +2.1.5 Refactor code +Try to refactor code instead of duplicating it. Extract common functionality into functions, parameterize or abstract differences, etc. + +2.2 Testing +2.2.1 Testability +Design the code in a modular fashion that allows functional testing. If possible, create unit tests for your software. + +2.2.2 Regression Test +It is encouraged to add a decent level of automated regression tests. + +2.3 Embedded Coding +2.3.1 Write energy friendly code +The code should be energy friendly. This means taking advantage of hardware features available and always going down to the lowest energy mode possible. Try to always keep this in mind when writing energy aware code: + +Make sure all hardware modules or functions that are not needed by the application are disabled or shut down as often as possible +Use DMA whenever possible and put the device in the lowest possible sleep mode +Faster code = more time to sleep +Avoid busy waiting unless absolutely necessary! +Remember: everything matters! +Energy aware code can get complicated and difficult to debug. That is why it adds more value! +Use Simplicity Studio or similar tool to profile the energy usage of your code. The results are often surprising. +2.3.2 Interrupts +Interrupts shall have as minimal processing as possible. If possible it should just send an event to a task for later processing. Having long interrupt processing times might cause problems when other time-critical pieces of code are blocked from executing (radio protocols being a prime example). + +3 C Specific Guidelines +3.1 Compilers +3.1.1 C standards version (Required) +For 32-bit MCUs and Wireless SoCs (Cortex-Mx), we use C99. + +For 8-bit MCUs (8051), we use C90. Since the Keil PK51 development tool is the default build tool for our 8051 devices, we have to make sure that we comply with the C90 exceptions Keil implemented in their PK51. These exceptions can be found here: + +[http://www.keil.com/support/man/docs/c51/c51_xa.htm] keil + +Even though we are restricted to C90 code for 8051 MCUs, we still use C99 standard integer types (uint8_t, etc). We provide our own stdint.h and stdbool.h in our SDK. + +If a project is intended to run on both 8-bit and 32-bit platforms, use the lowest common denominator (i.e. C90 with compatible extensions). + +3.1.2 Support mixing C++ and C (Recommended) +C++ is increasing in popularity. To make sure that our libraries and code are compatible with C++ code, functions in header files should be defined inside an extern "C" block. This makes it possible to call C functions from C++. + +Example + +#ifdef __cplusplus +extern "C" { +#endif + +void foo(void); + +// other functions ... + +#ifdef __cplusplus +} +#endif +Comment: Do not add an extra layer of indentation between the opening and closing braces in this case. This is also an exception to the rule that requires braces to be on line by themselves. + +3.1.3 Multiple build tool support (Recommended) +Most of our 8051 and Cortex-M source code can be built with more than one build tool chain. To make the porting job easier between toolchains we will use header files that define macros/functions for how to access register, intrinsic functions and other parts of the device that differs between the different tool chains. + +For Cortex-M, this is defined by CMSIS and located in cmsis_compiler.h. For 8051 MCUs we use the sl_iec60730_toolchain.h file. + +3.1.4 Compile with warnings (Required) +Compiler warnings often indicate bugs that will only be seen at runtime and that may be very difficult to find during testing. For example, the compiler may warn you about using an uninitialized variable. This can be difficult to find during testing. + +Use the compiler option -Wall to enable all warnings. + +3.1.5 Treat warnings as errors (Required) +Warnings should be treated as errors so that the build does not complete until the warning if fixed. Having a zero tolerance for warnings will help keep our code cleaner and contain fewer bugs. + +Use the compiler option -Werror to treat warnings as errors. This applies to builds that are part of "make test". It does not apply to build mechanisms passed through to customer projects. + +Exceptions to Werror have to be approved by the module owner and have their rationale documented. Exceptions should disable errors, but leave warning intact (-wno-error=some-kind-of-warning) unless the warning is so noisy as flood build output. In that case it should be disabled entirely. (-wno-some-kind-of-warning) + +3.2 Preprocessor +3.2.1 Use header file guards (Required) +A header file guard must cover all header files unless they are intended to be included multiple times from the same source file (which should be rare and justified). The name of the guard is of the form: + +upper case file name + +where characters in the file name other than alphanumerics are replaced with underscores and leading underscores are stripped. Guards should guard all other code in the file except comment headers. In particular, they should guard extern declarations and #include statements. + +Example + +#ifndef MY_FILE_H +#define MY_FILE_H + +#include + +extern volatile uint64_t jiffies; + +// ... + +#endif // MY_FILE_H +3.2.2 Preprocessor conditional compilation (Recommended) +Limit the use of preprocessor conditional compile statements like #if and #ifdef. If used, avoid using preprocessor conditions inside functions. + +Example + +#if !defined(LINUX_DBG) +#define sl_enable_interrupts() __restore_interrupt() +#define sl_disable_interrupts() __disable_interrupt() +#else +#define sl_enable_interrupts() (void)0 +#define sl_disable_interrupts() (void)0 +#endif + +void sl_do_something(void) +{ + sl_enable_interrupts(); + sl_do_atomic_operation(); + sl_disable_interrupts(); +} +Comment: The above is a cleaner way to write code that in this example has more than one way to enable/disable interrupts. Below is the original, not so clean, code from the example above. + +void sl_do_something(void) +{ +#if !defined(LINUX_DBG) + __disable_interrupt(); +#endif + sl_do_atomic_operation(); +#ifndef LINUX_DBG + __restore_interrupt(); +#endif +} +3.2.3 Use of preprocessor directive #error (Recommended) +Use #error when #defines can only be set to certain values, or other configuration problems. + +Example + +#if (DEFAULT_SAMPLE_RATE8 == 44) +#define DEFAULT_SAMPLE_FREQ 44100 +#elif (DEFAULT_SAMPLE_RATE8 == 48) +#define DEFAULT_SAMPLE_FREQ 48000 +#else +#error Invalid value: DEFAULT_SAMPLE_RATE8 +#endif +3.2.4 Use of preprocessor directive #include (Recommended) +Header files should generally list their dependencies explicitly. The preferred way is to #include prerequisite header files. Alternatively, the header file may validate that an appropriate macro is defined. + +Preferred + +#include "sl_foo.h" + +void sl_bar(sl_foo_t baz); // sl_foo_t is defined in sl_foo.h +Alternative + +// sl_foo_t is defined in sl_foo.h +#ifndef FOO_T_DEFINED +#error This source file needs to #include sl_foo.h +#endif + +void sl_bar(sl_foo_t baz); // sl_foo_t is defined in sl_foo.h +You should strive to not include more header files than you really require in a given C file. Having more than you need increases compilation time and increases the chance of unintended side effects. <> and "" are used by the compiler to change the search path for included files. In general, <> should only be used for C standard libraries. #include should generally not be used for C files. + +Example + +#include +#include "SI_C8051F850_Register_Enums.h" +#include "SI_Bluetooth_Init.h" +3.2.5 Use of preprocessor directive #undef (Recommended) +Using #undef should be avoided as it can lead to weird behaviors that are often fairly difficult to detect and solve. For example, errors can occur only when compiling files in a certain order. + +3.2.6 Use of preprocessor 'stringify' and concatenation (Recommended) +Use of the preprocessor 'stringify' or string concatenation operations should be avoided or kept to a minimum. Manipulations such as these can quickly become quite complex to understand, maintain or debug and should be avoided whenever possible. + +3.2.7 General use of preprocessor (Recommended) +The preprocessor should be used reasonably, mostly for usual operations such as doing conditional compilation including that described in section 3.2.2, including files, reporting an error, etc. Using the preprocessor to do complex or unusual operations should normally be avoided. + +3.3 Standard Libraries +3.3.1 Use of stdint.h and stdbool.h (Required) +Use stdint.h and stdbool.h types whenever possible. This makes types unambiguous, more portable and opens up compiler optimizations. + +This means that you should always use C99 types like uint8_t. Do not use other types such as U8 or UINT8 unless needed to maintain compatibility with older code or third party library. + +3.3.2 Use of stdlib (Recommended) +You can use the stdlib functions memset, memcpy, memmove, memcmp, strcmp, etc. instead of writing your own for-loops. In code bases where these functions have been abstracted (e.g., by MEMSET, MEMCMP, and friends in the base repo), it is recommended to use those abstractions. Otherwise, for Cortex-M class devices it is recommended to use the stdlib versions as they are often heavily optimized. + +3.3.3 Use of dynamic memory / the heap (Recommended) +Dynamic memory allocation with malloc() and free() should generally not be used. Some of our customers have strict rules in their QA procedures that dictate that malloc() cannot be used in embedded software. If we use it, then our libraries become unusable for them. The problem with malloc()/free() is fragmentation. Because our micros are memory constrained and have no virtual memory, malloc() can over time fragment memory, which in turn can cause a malloc() to fail down the road. + +3.3.4 Do not use the standard C assert() (Required) +It is strongly recommended to not use the assert() function that comes with the standard C/C++ library. If the Silicon Labs libraries used in your project contains assert function(s), then use them. If no Silicon Labs specific assert function is available, then use the code from the example below. The rationale for this rule is that a number of toolchains will bring in their standard library versions of printf and friends in order to implement assert. This can bring in unwanted side effects, such as code size increases. + +Example + +// void user_assert (int file, int line); /* declaration */ +// #define USER_ASSERT(file, line) user_assert(file, line) /* definition */ + +void sl_assert(const char *file, int line) +{ + (void)file; // Unused parameter + (void)line; // Unused parameter + // Wait forever until the watchdog fires + while (1); +} + +#if defined(NDEBUG) +#define SL_ASSERT(expr) +#else +#if defined(USER_ASSERT) +#define SL_ASSERT(expr) ((expr) ? ((void)0) : USER_ASSERT(__FILE__, __LINE__)) +#else +#define SL_ASSERT(expr) ((expr) ? ((void)0) : sl_assert(__FILE__, __LINE__)) +#endif +#endif +Comment: Below are the steps to overwrite Silicon Labs assert function with a user defined assert. + +Define a void user_assert(const char *, int) function +Uncomment the two lines below (marked "declaration" and "definition"). +assert() is a void function and never return any value. If you like a function to return a value depending on the evaluation of an expression, then feel free to create a new function for that purpose. + +3.4 Keywords +3.4.1 The "volatile" keyword (Recommended) +Be careful using the volatile keyword. Access to a volatile variable/constant can never be optimized away. Only variable/constants that can have side effects and/or that can change value from outside the embedded application should be declared volatile. Typically Special Function Registers (SFRs) are volatile. + +Delay loops using volatile are usually a bad idea since they consume both CPU time and energy. It is better to implement delays with for example timer/counter interrupts. But there are exceptions when using a volatile variable may be favorable, such as: + +Very short delays when timer setup and interrupt handling is time consuming, especially when the latency is longer than the delay period itself. +Applications that are constrained on timer resources. +As an example, the Gecko "udelay.c" file in kits/common/drivers is a good example of a "busy wait" delay loop, and is used successfully in the Sharp Memory LCD device driver where we need delays of down to 2 microseconds. + +3.4.2 The "inline" keyword (Recommended) +The inline keyword is supported in C99, which is the language standard use for our 32-bit MCUs and Wireless SoCs, but behaves differently compared to inline in C++. Inline was also added/used by some C89/C90 compilers and those implementations might also differ compared to the C99 standard. + +So adding inline to your code is usually not a problem. Moving code that uses inline and was built with a C++ or C89/C90 compiler might change the behavior of your application. + +For Cortex-Mx devices, use the CMSIS __INLINE macro since this will expand to whatever keyword is used by the supported set of build tools. + +3.4.3 The "static" keyword (Recommended) +For file global variables (variables that are global to a file but not visible outside the file) should always use the static keyword. This should also apply to any functions that are used only within a single file. + +Keep in mind the difference between a static variable at the file scope level, and a static variable declared within a function. + +Example + +// A variable that is only visible within a file +static uint32_t my_local_variable = 0xFF; + +// A function that is used only within a file +static void do_something(void) +{ + // ... +} +For Cortex-Mx devices, use the CMSIS __STATIC_INLINE macro if you need something to be both static and inline. + +3.5 Data Types +3.5.1 Avoid enums in arrays, structures, or unions (Required) +This is especially important for aggregate types shared between pre-built libraries (e.g. RAIL) and customer-compiled code (e.g. emlib). The problem is that the size of enums is not standardized, but is compiler-defined. Even within the same compiler, there could be options to select one style vs. another. Libraries built with one compiler or options will not interface properly to non-library code built with a different compiler or options -- field offsets and structure / array sizes could mismatch. + +Example + +// sl_lib.h include file: + +typedef enum { + SL_LIB_OPTION_A, // 0 + SL_LIB_OPTION_B, // 1 + SL_LIB_OPTION_C, // 2 +} sl_lib_option_t; + +typedef struct { + sl_lib_option_t default_option; + uint8_t some_other_field; +} sl_lib_config_t; + +extern void sl_lib_init(sl_lib_config_t *config); +extern void sl_lib_set_options(sl_lib_option_t *option_list, uint32_t option_count); + +// sl_lib.c implementation: +// +// Built with compiler or options where enums are the smallest type +// able to represent all of its defined values, so: +// sizeof(sl_lib_option_t) == 1 (int8_t can represent 0..2) +// sizeof(sl_lib_config_t) == 2, offsetof(some_other_field) == 1 + +// Customer application code: +// +// This code might be built with compiler or options where enums are +// of type int (i.e. int32_t on an I32 platform). + +#include "sl_lib.h" + +const sl_lib_config_t SL_LIB_CONFIG = { + .default_option = SL_LIB_OPTION_A, + .some_other_field = 10, +} + +void sl_lib_use_lib(void) +{ + sl_lib_option_t lib_options[] = { SL_LIB_OPTION_B, SL_LIB_OPTION_C }; + + // sizeof(SL_LIB_CONFIG) == 8, offsetof(some_other_field) == 4 + sl_lib_init(&SL_LIB_CONFIG); + + // sizeof(lib_options) == 8, sizeof(*lib_options) == 4 + sl_lib_set_options(lib_options, sizeof(lib_options)/sizeof(*lib_options)); +} +3.5.2 Avoid bitfields in structures/unions (Required) +This is also especially important for aggregate types shared between libraries and customer-compiled code. As with enums, the size and bit layout of bitfields is not standardized, but is compiler-defined or subject to compiler options. Libraries built with one compiler or options will not interface properly to non-library code built with a different compiler or options. + +Example + +// sl_lib.h include file: + +typedef struct { + bool ena : 1; + uint8_t some_setting : 5; +} sl_lib_struct_t; + +// Library could be built such that this structure is laid out in a byte: +// 7 6 5 4 3 2 1 0 +// [ x | x | some_setting |ena] +// while application could be built such that this structure is laid out +// across two bytes, or in different endian order: +// 7 6 5 4 3 2 1 0 +// [ena| x | x | x | x | x | x | x ] +// [ some_setting | x | x | x ] +3.6 Variables +3.6.1 Using global variables (Recommended) +Minimize use of global variables. It is hard for a compiler to optimize code using them. The compiler (usually) only sees one C file at the time and does not know if the global has been changed between accesses. + +A way around this might be to copy the global to a static/auto variable and use the copy in your code. + +Global variables can also easily become a source for confusion and errors in the application code as time goes on. As different developers work on the code they might use the global in slightly different ways and accidentally break something in parts of the code they are not working on. This recommendation should be evaluated at an architecture/project level to determine if it applies. + +8051 Note: The 8051 compiler will often produce more efficient code when using a project global instead of sharing global data through a handle pointer or other mechanism. This trade-off should be taken into account when writing code targeted for 8051. As much as possible, steps should still be taken to minimize the use of global variables. + +3.7 Functions +3.7.1 Prototype functions (Required) +Make sure either the full implementation or a prototype precedes any call to a function. For external functions, this should be done by with a #include of the appropriate header. + +3.7.2 Functions return data types (Required) +All functions that can fail should return sl_status_t. The idea is to be as consistent and predictable throughout all of our code base to make it easier for customers to know what to expect from our functions. + +There will be functions that will not return sl_status_t. For example, functions returning void; simple "getter" functions that cannot fail or that we don't need to differentiate between error cases; a function checking if a condition is true or false could return a bool; a function adding data to a string or buffer could return the number of bytes added to the string or buffer; or a callback function could return an indicator to let the stack know how to act. Other examples may exist but all of these exceptions should be used sparingly and with good reason. Please check with your team and/or manager before doing so. + +In any case, the following requirements must be complied with: + +if a function can fail, there must be a clear indication as to how to detect a failure. This is preferably done through returning sl_status, but having a special 'invalid' value returned in case of failure is also allowed. No matter how this is achieved, it must be documented in the doxygen function header. +bool must not be returned to indicate success or failure. bool should only be used to indicate if a given condition is true or false. Even then, using an enum should be considered for future-proofing the function, should it need to return more than a true/false value in the future. +Example + +// Don't do: +bool sl_do_something(sl_type_t *var) +{ + sl_status_t my_status; + // [...] + my_status = sli_do_anything(var); + // [...] + if (my_status == SL_STATUS_OK) { + return true; + } else { + return false; + } +} + +sl_status_t sl_net_is_link_up(bool *is_up) +{ + // [...] + *is_up = true; +} + +// Instead do: +sl_status_t sl_do_something(sl_type_t *var) +{ + sl_status_t my_status; + // [...] + my_status = sli_do_anything(var); + // [...] + return my_status; +} + +bool sl_net_is_link_up(void) +{ + // [...] + return true; +} + +sl_usbh_action_t sl_usbh_on_device_connection(void) +{ + // [...] + return SL_USBH_ACTION_ACCEPT; +} + +sl_usbd_handle_t sl_usbd_get_handle(uint8_t id) +{ + // [...] + if (id < max_id) { + return sli_usbd_handle_table[id]; + } else { + return SL_USBD_HANDLE_INVALID; //defined to something invalid and properly documented + } +} +3.7.3 Return values should always be checked and propagated (Recommended) +Values returned by any function should always be checked to see if an error occurred. Such return values should normally be propagated up the callers tree up to the application or to a function that can react to it. + +3.7.4 Functions replicating a standard API can follow that API (Recommended) +If a function aims to replicate a standard API (like strcpy or printf), our version of the function can replicate that standard function's API. These functions do not need to follow our coding standards' directives relating to data types, return values or status. It should still follow our naming convention. + +3.8 Macros +3.8.1 Macros with side-effects (Recommended) +Macros that may have have side-effects should be function-like and named appropriately. + +Example + +#define sl_lock() do {__acquire_mutex(&sl_top_level_mutex);} while(0) +#define sl_unlock() do {__release_mutex(&sl_top_level_mutex);} while(0) +3.8.2 Macros with statement(s) (Required) +If a macro expands into one or more full statements, make sure it consumes a subsequent semicolon. Furthermore, multiple-statement macros must be wrapped in a block. These rules ensure that the expanded macro will have the same syntax as a non-compound statement. Otherwise, it may cause undesirable parsing if a customer uses it without braces in a selection (if (...) FOO();) or iteration (while (...) FOO();) statement. + +Example + +#define SLI_FOO(x, y) \ + do { \ + ga = (x); \ + gb = (y); \ + gc = ga + gb; \ + } while (0) + +#define sli_do_nothing() (void)0 + +void sl_bar(int baz) +{ + if (baz) { + SLI_FOO(123, 321); + } else { + sli_do_nothing(); + } +} +3.8.3 Functional macros with argument(s) (Required) +Uses of arguments within macros, and the macro body itself, if it is an expression, should be wrapped in parentheses. This avoids problems stemming from unintended precedence groupings. Arguments should be used only once if possible to avoid problems when a statement or expression with side effects is passed. + +Note: In general, static inline functions are preferred to macros as they have less weird side-effects and are easier to read. + +Example + +#define sl_bar(x, y, z) (0xFFFF | ((x) & ((y) | (z)))) +3.9 goto statements +3.9.1 goto statements should only be used for cleanup purposes or early exit in case of an error, when there is no simple workaround (Required) +gotos should never be used, except when needing to cleanup (free resources, release a lock, exit a critical section, etc.) in the case an error occurred in the function. If a simple workaround can be used instead of goto, the workaround should be used instead. + +Example + +// Using goto, if no simple workaround available +void sli_usb_function(void) +{ + // Acquire lock + // [...] + if (!ok) { + goto release; + } + // [...] +release: + // Release lock +} + +// Workaround, whenever possible +void sli_usb_function(void) +{ + // Acquire lock + // [...] + if (ok) { + // [...] + } + // Release lock +} +3.9.2 gotos should only refer to a label declared after them (Required) +A goto statement should only refer to a label declared after (below) them, in the code. + +No goto shall ever cause the code to go back "up", it should always jump "down", towards the end of the function. + +Example + +// Don't do: +void sli_usb_function(void) +{ + // [...] +loop_start: + // [...] + if (loop) { + goto loop_start; + } +} + +// Instead do: +void sli_usb_function(void) +{ + // Acquire lock + // [...] + if (!ok) { + goto release; + } + // [...] +release: + // Release lock +} +3.9.3 gotos should only refer to a static label located in the same function (Required) +No computed goto statement (as available in some GCC extensions) shall be used. setjmp and longjmp should never be used. The label referred to by a goto statement needs to be in the same function as the goto statement itself. + +3.9.4 Any label referenced by a goto need to be declared in the same block or a block enclosing the goto (Required) +goto statements and labels should not be used to jump between blocks, as it can easily lead to unstructured code. goto should not be used either to jump between cases of a switch. + +Example + +// Don't do: +void sli_usb_function(uint8_t bar) +{ + if (bar > 0) { + goto label; + } + // [...] + goto label; + // [...] + if (foo > 0) { +label: + // [...] + } +} + +// Instead do: +void sli_usb_function(uint8_t bar) +{ + // [...] + goto label; + // [...] + if (bar > 0) { + goto label; + } + // [...] +label: + // [...] +} + +// Don't do: +void sli_usb_function(uint8_t bar) +{ + switch(bar) { + case 1: + if (x == y) { + goto label; + } + break; + + case 2: + doThat(); +label: + doTheOtherThing(); + break; + + default: + break; + } +} +3.10 Libraries +3.10.1 Dependencies (Required) +Be conscious about what code the library depends on. To avoid excessive code footprint, we must be aware of what external functions each library pulls in. E.g. the printf and sprintf functions are better avoided within a library as they require a large footprint + +Exception: They can be used for generating debug information as long as they are conditionally compiled in with a flag that defaults to false). + +3.10.2 Including third party code (Required) +For all open source or third party software that we include in our software releases, we need to have an acceptable license that allows us to do so. That means we need to send an email to our legal department (DL.Legal) and ask for permission before introducing new open source software into our distributions. Consult the Software Manager before including any third party software code intended to be released. + +3.10.3 Configuring libraries in source form (Required) +The customer should never have to change the original source files to configure the library (this creates problems when upgrading the library to a newer version, and also makes it impossible to have two projects with different configuration settings using the same instance of the library). Instead, it should be possible to set all configurations settings from the customer's application project. Normally this can be done with macros that allow a customer to configure library settings from within the application. + +Example + +#if !defined(EM_SETTING) // If EM_SETTING is not defined by user, +#define EM_SETTING default_value_for_em // then we set our default value/function. +#endif +3.10.4 Configuring libraries in binary form (Recommended) +If a library is provided in binary form, then macros cannot be used for configuration settings. + +A good alternative is to use callback functions or static variables. Callbacks might not be appropriate for 8-bit code, so use your judgment. + +Example + +// We call sl_custom_configuration_callback() from our library to get the +// user defined configuration. +// +int configuration = sl_custom_configuration_callback(); + +// The user have to define sl_custom_configuration_callback() and return a +// valid configuration for the application. +// +int sl_custom_configuration_callback(void) +{ + return OPT_SIZE | MAX_BUF_SIZE; +} +Comment: sl_custom_configuration_callback is defined in user application and returns different values depending on the user implementation. + +Example + +// We initialize configuration with a sensible default that is suitable +// for the largest number of applications +// +int configuration = SL_DEFAULT_CONFIGURATION; + +// The user application can customize the behavior by calling +// sl_set_configuration +// +void sl_set_configuration(int user_config) +{ + configuration = user_config; +} +3.11 Misc +3.11.1 Avoid embedding assignments in expressions (Recommended) +Embedding assignments in expressions makes for all kinds of wacky bugs. When scanning some code it is easy to miss that a complicated expression contains an assignment deep inside. + +Example + +++ceiling; +*handle = ceiling; +Comment: The above is easy to understand, hard to get wrong and most compilers today will generate the same optimized code that that example as it will for the below code; + +*handle = ++ceiling; +4 Coding style and formatting +4.1 General formatting +4.1.1 Use spaces, not tabs (Required) +For indenting files, use spaces and never tabs. A mix of tabs and spaces is never acceptable. + +4.1.2 Indents are 2 spaces per level (Required) +Indent each nested level with 2 spaces of indent. + +4.1.2.1 Preprocessor indentation (Recommended) +Preprocessor directives historically have not been indented, but they may be indented to make them less distracting to the module's code flow (though the technique described in the section 3.2.2 offers an even cleaner alternative where it makes sense). When indented, the # should remain attached to the directive and not remain in the first column -- no modern preprocessor still requires the # be in the first column. When an #if or #ifdef is indented, its #else, #elif, and #endif shall also be identically indented. The code between the preprocessor directives may also be indented. + +Example + +void sl_set_xyz_option(xyz_option_t xyz_option) +{ + #if defined( _XYZ_LFCCLKEN0_MASK ) // XYZ supports LFC clock + if (xyz_option == xyz_clock_lfc) { + xyz_clock_set_lfc(); + return; + } + #endif + #if defined( _XYZ_LFECLKSEL_MASK ) // XYZ supports LFE clock + if (xyz_option == xyz_clock_lfe) { + xyz_clock_set_lfe(); + return; + } + #endif +} +4.1.3 Lines should not be longer than 80 characters (Recommended) +We enforce an 80 characters limit per line of source code. This lets people set up their editors such that they can have multiple editors side-by-side. Although 80 characters are little by modern standards, it mixes well with existing code. + +4.1.4 Line endings (Required) +We use line ending normalization in our repositories. This means that all text files are converted to '\n' line endings when they are stored in git. However most customers are using Windows operating system which expects a CRLF line ending. Therefore, with rare exception, all source code delivered to customers should have CRLF (DOS) line endings. There are two ways to accomplish this. First, if you are using a Windows host operating system, set your git autocrlf setting as follows: + +core.autocrlf true +This will ensure all text files have DOS line endings when checked out from the repository. + +The second method is to use a release script that forces all text file line endings to CRLF when a source code release package is built by the release script. + +Exceptions: if the source code is intended for a system that >use normal line endings, for example a OS X or Linux system, then >the source line endings can be left as '\n'. + +Note: All repositories should include a .gitattributes file to explicitly specify file types for line endings. + +4.1.5 Use only plain ASCII or UTF-8 (Required) +Text files should almost always contain only plain ASCII. Specifically, avoid characters outside the usual whitespace and printable ones (0x9-0xD and 0x20-0x7E, inclusive). Internationalized strings, when used, are best placed in a resource file. + +In the rare case that other characters are needed in a text file and cannot be escaped, the file should be UTF-8 encoded with no byte-order mark. + +4.1.6 Use ISO8601 formatting for dates (Required) +If you use a date in the comments or elsewhere, specify it using the unambiguous ISO8601 format, i.e. 2013-11-26. + +4.1.7 Inserting empty and blank lines (Required) +There should never be consecutive blank rows. + +Use two slashes (C++ comment) and 77 dashes to separate logical parts of the code. Use 2 slashes and 32 dashes for minor sections. Use of section separators as shown here is optional. + +Example + +// ----------------------------------------------------------------------------- +// Here we start a new logical part in this source/header file... + +// ------------------------------- +// And here comes a new minor section... +4.1.8 Use parentheses liberally (Required) +Add parentheses if you have any doubt at all about precedence, not doing so has led to some very obscure bugs. This is especially true of the bitwise binary operators {&, |, ^} and Boolean operators {&&, ||}. + +4.1.9 Break up long expressions (Required) +Whenever there are long expressions, it should be broken into multiple lines. When a line is broken into multiple lines, each line should start with the operator that operates on that full line (single element or a group of elements within parentheses). The operator must be the first thing on the line, and it should be indented appropriately. + +Example + +int bitmask = (OPTION_1 + | OPTION_2 + | (IS_THIS_SET + ? OPTION_3 + : OPTION_4)); + +int bitmask = (OPTION_1 + | OPTION_2 + | (IS_THIS_SET ? OPTION_3 : OPTION_4)); + +int bitmask = (OPTION_1 + | OPTION_2 + | (OPTION_3 & OPTION_4)); +Comment: All the above are examples of nicely formatted long expressions. + +Below is an example how you should not format long and complex expressions. + +// Avoid this... +int no_good_formatting = (OPTION_1 + | OPTION_2 + | OPTION_3 & OPTION_4); +4.1.10 goto labels should be on column 1 (Required) +Labels referred to by gotos need to be located at column 1, disregarding any indentation. + +Example + +// Don't do: +void sli_usb_function(void) +{ + // Acquire lock + // [...] + if (!ok) { + goto release; + } + // [...] + release: + // Release lock +} + +// Instead do: +void sli_usb_function(void) +{ + // Acquire lock + // [...] + if (!ok) { + goto release; + } + // [...] +release: + // Release lock +} +4.2 Commenting code (Required) +4.2.1 Use C++ style comments ("//") +All inline code comments should use the C++ style //. However there are two exceptions to this rule. First, function and file documentation blocks use a different style (see documentation section below). + +Second, for multi-line macros using #define, C style comments /* ... */ should be used for embedded comments (see example below). + +For both kinds of comments, there should be a space following the opening comment marker. For example // My comment. + +Make sure constant values in the code are explained. Function calls with raw constants should be labeled based on the parameter that is being passed in. + +Example + +// Example for the exception +// This type is needed because using // would swallow the line continuation marker. +#define MY_CLI_COMMANDS \ + /* This command takes 3 arguments: */ \ + /* Node ID - a 2-byte node ID destination */ \ + /* Endpoint - a 1-byte node ID */ \ + /* Cluster - a 2-byte cluster ID */ \ + { "my_command", my_command_function, "vuv" }, + +// Example of how to comment constant values. +// For the function declaration below +void function(int seconds, boolean print_output); + +// we add comments after each parameter (OPTIONAL) +function(0, // seconds + FALSE); // print_output +4.3 Bracing style (Required) +Use the so called "One True Brace Style" (see [https://en.wikipedia.org/wiki/Indent_style#Variant:_1TBS]) Indent increases one level after an opening brace, and decreases one level before a closing brace. Opening braces do not go on their own separate line, except for free standing blocks and function definitions. Closing braces are on their own separate line with nothing else on these lines. + +All if/else/while/for/do-while blocks must be enclosed by braces, even if there is only one statement in the block. + +Exceptions for the above rule are; + +The typedef alias for a composite (struct/union) or enum type is on the same line as the closing brace. +In a do-while loop the condition (while (...);) is on the same line as the closing brace. +else and else if are on the same line as the closing brace. +Example + +void sl_do_something(uint8_t bar) +{ + if (foo > bar) { // The preceding brace is *required* + do_this(); + } else if (for < bar) { + do_that(); + } else { + do_another_thing(); + } + + if (foo > bar) { + do_this(); + } + + while (1) { + } + + do { + sli_do_work(); + } while (foo); +} + +typedef enum { + SL_CARD_SPADE, + SL_CARD_HEART, + SL_CARD_CLUB, + SL_CARD_DIAMOND +} sl_card_suit_t; +4.4 Switch statements and labels +4.4.1 Using labels (Required) +Switch-case labels should be indented as any other line of code would be. + +Example + +if (foo) { + sl_bsp_set_leds(0xff00); + + testing: + + sl_bsp_set_leds(0x00ff); +} +4.4.2 Labels with block (Required) +If a block is desired after a label, then the opening brace should be by itself on the line following the label, at the same indentation. + +The closing brace should be on a line by itself after the last statement in the block, at the same indent level as the opening brace. + +Example + +if (foo) { + sl_bsp_set_leds(0xff00); + + testing: + { + sl_bsp_set_leds(0x00ff); + sl_bsp_set_leds(0x0000); + } +} +4.4.3 Switch statements (Required) +The cases in switch statements should be indented one level from the enclosing braces. Separate case blocks with a blank line after each break;. All switch statements should include a default block unless there is a good reason not to. The default block can collapse into one of the other cases but it should clearly show what happens when there is no matching case. Finally, if a case block does not end with an unconditional jump, there should be a comment clearly stating that the code is intentionally meant to fall through. + +Example + +switch(baz) { + case 1: + sli_do_this(); + break; + + case 2: + sli_do_that(); + // This case is meant to fall through to the next + + case 3: { + sli_do_the_other_thing(); + break; + } + + case 0: + default: + sli_do_what(); + break; +} +4.5 Functions, operators and C keywords +4.5.1 Listing function parameters (Required) +Whenever there is a list of function parameters, they should all fit on a single line or be listed one parameter per line. If listed on separate lines, each parameter has the same indent level as the first parameter. + +Example + +void sl_do_something(int a, + int b, + int c, + const char *string1, + const char *string2) +{ + // ... +} + +void sl_do_something2(int a, int b, int c) +{ + // ... +} +4.5.2 Using function parentheses (Required) +For function declarations, definitions and calls, there shall be no spaces before or after the opening parentheses, or before the closing parentheses. + +Example + +int sl_foo(int days, int seconds); +// ... +ret = sl_foo(days, seconds); +4.5.3 Binary and ternary operators (Required) +Use spaces around binary & ternary operators in expressions. C expressions are hard enough to parse without running them altogether. + +Example + +for (j = 0; j < parameter_sizes[i]; j++) { +4.5.4 Use a single space after C keywords (Required) +C keywords (ex. for, switch, while, if, do) – should have a single space after the keyword. + +Example + +while (counter < UART_MAX_IO_BUFFER) { +4.5.5 Additional space within expressions +Use of additional whitespace within expressions to improve readability is permitted as long as it doesn't interfere with appropriate multi-line expression indentation. Such style should be consistent within the module. + +4.5.6 Identify do-nothing code (Recommended) +Avoid loops that do not make it obvious that they do nothing. Add a comment to explain the reason for the do-nothing loop. This applies to any code that does not do anything. + +Example + +// Don't do: +while (waiting_for_something); + +// Instead do: +// Useful comment explaining why you are waiting +while (waiting_for_something); +4.5.7 Pointer asterisk position (Required) +When declaring a pointer to a variable, the pointer asterisk should be placed together with the variable name, not together with the type. + +Example + +// Don't do: +char* c = (char*)a; +void sl_foo(uint32_t* bar); + +// Instead do: +char *c = (char *)a; +void sl_foo(uint32_t *bar); +4.5.8 Don't mix pointer and value type declarations (Required) +Don't mix declarations of pointer type variables and value type variables on the same line. + +Example + +// Don't do: +uint32_t *a, b; + +// Instead do: +uint32_t *a; +uint32_t b; +4.6 Naming +4.6.1 General Considerations +4.6.1.1 Use meaningful names (Required) +Special care should be taken when naming anything. The name should convey the purpose of the construct as clearly as possible. + +4.6.1.2 Avoid abbreviations (Required) +In general, use long names and avoid unclear abbreviations and other cryptic notations. + +Prefixes such as sl_ and sli_ are exceptions to this rule and therefore can and need to be used where appropriate. + +4.6.2 Namespaces (Required) +All constructs will have a prefix, with the exception of function parameters, variables local to a function and structure fields. + +The purpose of using namespace prefixes is to prevent namespace collisions and not necessarily for branding. + +The prefix will be the same for all constructs, it will only change based on whether that construct is public (can be used by end users), internal (can only be used from within Silicon Labs code) or static (local to a file). + +If a construct is public, it should be prefixed by sl_. + +If a construct is internal, it should be prefixed by sli_. + +For example, this means that no public function would refer to either a private or internal type in one of their parameters. + +Those constructs' names should then be followed by a _ prefix, that can consists of either one or two words, separated by an underscore. For example, this could be uart_ or usbd_msc_. The _ prefix can be omitted if the code is intended to be common code used by any other module and is placed in platform/common or a similar common location. + +Constants and macros will use capitalized version of these prefixes (SL_, SLI_ and _). + +As previously stated, function parameters, variables local to a function and structure fields will be prefixed by neither the sl[i]/SL[I] nor the _/ prefix. + +If a construct is static or in any way local to a single file, it is not required to have any prefix at all. If it has some kind of prefix, it should not use anything starting with sl. + +Example + +// File-local +#define SLI_READY 0x0020 + +static uint8_t next_transmit; + +static urb_t transmit_buffer(uint8_t *buffer); + +typedef struct { + uint8_t urb_size; // Struct fields do not have any prefix. + uint8_t *urb_list_next; + uint16_t array[10]; +} urb_t; + +// Internal-only +#define SLI_UNUSED_PARAMETER(param) (void)(param) + +const unsigned int SLI_MAX_UART_CONNECTIONS = 3; + +sl_usbd_endpoint sli_usbd_msc_endpoint; // Internal variable using public type. + +typedef struct { + uint8_t time_ms; + uint8_t *longer_blah_ptr; +} sli_usbd_msc_cnt_t; + +void sli_usbd_msc_tx_endpoint(sli_usbd_msc_cnt_t *buffer, + uint8_t count); + +void sli_usbd_msc_tx_endpoint(sli_usbd_msc_cnt_t *buffer, + uint8_t count) +{ + uint8_t flag; // Local variable does not have any prefix. + urb_t urb; // Referring to static type from within public function is ok. +} + +// Public + +#define SL_CREATE_HANDLE(node, id) (node).flag = ((id) | 0xFF00) + +const unsigned int SL_USBD_VERSION = 20200; + +sl_uart_channel_t sl_uart_channels_list[10]; + +sl_time_t sl_get_time(void); + +typedef struct { + uint32_t hour; + uint32_t minute; + uint32_t second; +} sl_time_t; +4.6.3 Naming (Required) +The following section (4.6.3.*) contains information on how to name anything. This acts as a default, if nothing more specific exists for a particular construct. In general, construct-specific standards should be avoided. + +4.6.3.1 Casing (Required) +Every construct's name needs to be all lower-case, with each word or abbreviation separated by an underscore. This is also known as snake case. + +Example + +// Global variable +uint8_t sl_uart_char; // Publicly available +uint8_t sli_usbd_endpoint_buffer[32]; // Internal use only + +// File-local variable +static sl_usbd_urb_t *urb_list_head; + +// Functions +void sl_led_turn_on(void); +void sli_nvic_set_priority(ADC_IRQ); + +// Data types +typedef uint32_t sli_kernel_flags_t; +typedef struct { + uint8_t *data_start; +} sl_usbd_urb_t; +4.6.3.2 Casing and acronyms (Required) +Acronyms and abbreviations are treated like any other word. Do not put in lower-case or upper-case some or all letters of an abbreviation, even if it is normally written that way. Instead, comply with the standard about that particular construct and treat acronyms as a regular word. + +Example + +static sl_usbd_urb_t *urb_list_head; + +sl_led_turn_on(); + +sl_irq_priority_t irq_priority = sl_nvic_get_priority(ADC_IRQ); +4.6.4 Naming functions and variables +4.6.4.1 Functions and variables names have the form verb_noun (Required) +When a verb and a noun the verb acts on are in a function name, the verb should come first (xxxx_get_power, not xxxx_power_get). It should feel natural to read the name. Most functions should contain both a verb and a noun and therefore need to follow this rule. Notable exceptions are functions that are callbacks, interrupt handlers and tasks, which typically do not have a verb. These functions follow their own naming convention, as stated in 4.6.4.5, 4.6.4.6 and 4.6.4.7, respectively. + +Variables and functions of boolean type should use a naming style indicating the sense of the boolean. For example sl_usbd_device_is_connected. + +Example + +// This is for legacy EM code and does not apply to 8051 +// code base. + +sl_get_power(); // Call to a new-style API function. + +// Below is an example of how to redefine old style API calls to the new syntax. +#if (SLAB_OLD_API == SLAB_REPLACE_OLD_API_CALLS) +#define power_get sl_get_power +#define power_set sl_set_power +#endif +4.6.4.2 Function parameters should not have any prefix (Required) +Do not prefix any function parameter with any sl_, sli_ or _ prefix. + +4.6.4.3 Function-local variables should not have any prefix (Required) +Do not prefix any function-local variable with any sl_, sli_ or _ prefix. + +4.6.4.4 Variable and Function Names Indicate Units for Time (Required) +When a variable is used for time, it must include the units in the name. When a function returns a value that is used for time it must include units in the name. This is important to prevent problems with accidentally utilizing one unit of time in a function or variable that takes a different unit of time. + +Variables and function names may either use abbreviations or spell out the units. If abbreviations are used, the following shall be the abbreviations: + +Full Name Abbreviation (if applicable) +Years Years +Days Days +Hours Hours +Minutes Minutes +Seconds Sec +Milliseconds Ms +Microseconds Us +Nanoseconds Ns +Example + +#define SLI_JITTER_DELAY_MS 100 + +static void restart_discovery_after_delay(uint8_t delay_ms); + +uint8_t sli_get_discovery_time_remaining_ms(void); + +4.6.4.5 Functions/stubs called on specific events/callbacks should start 'on' in their name (Required) +Whenever a function is called to indicate an event occurred, or is called in 'reaction' to an event happening, this function should have on in its name, directly after the _ prefix. This also applies to callbacks or function stubs shipped to the user. + +Example void sl_usb_on_device_connection(void); + +void sl_kernel_on_task_deletion(void); + +static void on_transmit_completed(void); +4.6.4.6 Interrupt handlers should be suffixed by 'IRQHandler' or 'irq_handler' (Required) +If a function is an interrupt handler, it should either be suffixed by IRQHandler if it needs to follow CMSIS' format or by irq_handler if it doesn't (for example, if an interrupt source is shared and multiplexed) between several handlers. + +Example void RTCC_IRQHandler(void); + +void sl_gpio_irq_handler(void); +4.6.4.7 Non-blocking functions executed periodically in a main loop should be suffixed by 'step' (Required) +If a non-blocking function (a function that doesn't pend or delay before returning) needs to be called periodically in order to check if it has something to process and then process what it can, this function needs to be suffixed with step, to indicate it executes a single round of processing. It should not be called tick, since tick can lead to confusion with timer or OS ticks. + +Example void sl_cli_step(void); + +void sli_usb_msc_step(void); +4.6.4.8 Functions that are tasks should be suffixed by 'task' (Required) +If a function is a task (in an OS environment), this function needs to be suffixed with task, to indicate it is a task and needs to loop indefinitely and never return. + +Example void sl_cli_task(void *task_argument); + +void sli_usb_task(void *task_argument); +4.6.5 Naming constants +4.6.5.1 Constants should use upper case (Required) +All constants should be named and use upper case letters. Avoid raw numbers in code. This includes #defines constants, const variables and enum values. + +All #defines that are intended to be used by applications (customers) and part of the API need to be prefixed by SL_. This includes #defines in configuration files. + +All #defines that are local to a C file or private to our products (not intended to be used by applications; present in a private header file) need to be prefixed by SLI_. This is to prevent name clashes with compiler defines (with -D) that could be specified by the user when building our source files. + +Example + +#define SLI_NET_ARP_FLAG 0x0040 +const unsigned int SL_MAX_UART_CONNECTIONS = 3; + +typedef enum { + SL_USBH_HC_TYPE_LIST, + SL_USBH_HC_TYPE_PIPE +} sl_usbh_hc_type_t; +4.6.6 Naming function-like macros +4.6.6.1 Follow the naming convention for regular functions (Required) +Functional macros that can be used in the same way as functions follow the same naming conventions as regular functions. + +4.6.6.2 Use all caps for macros that can't be functions (Required) +All caps with underscores are used for macros that cannot be made into semantically equivalent functions. + +Example + +// This is a macro function that can be used as a regular function. +#define sl_uart_init_default_uart(x) init_uart(UART0, (x)) + +// This is a macro function that cannot be used as a function. +#define SL_SOME_NUMBERS(x) {(x), ((x)+(x)), ((x)*(x))} +4.6.7 Naming types +4.6.7.1 Public typedefs (Required) +Each typedef must end with a '_t' suffix and cannot start with 'int', 'uint' or 'unicode'. + +4.6.7.2 Structure fields should be snake_case, without any prefixes (Required) +There should not be any prefix (no sl_ and no _) in the name of any structure field. + +Example + +// Don't do +typedef struct +{ + uint32_t sl_nvm_page_header_offset; + uint32_t sl_nvm_page_header_size; +} sl_nvm_page_header_t; + +// Instead do: +typedef struct +{ + uint32_t offset; + uint32_t size; +} sl_nvm_page_header_t; +4.6.7.3 Type from typedef (Optional) +If the type is a typedef, you can optionally add a type name if there is a reason the anonymous type does not work. In this case use the same name as the typedef name, without the '_t'. + +Example + +// Anonymous structure name ... +// Use this style in most cases. +typedef struct +{ + // ... +} sl_nvm_page_header_t; + +// You can use this style if the struct needs a name. +typedef struct sl_nvm_page_header +{ + // ... +} sl_nvm_page_header_t; +4.6.8 Files and directory structure +4.6.8.1 Filenames and directories use lower case (Required) +All file names are lower case and multiple words are separated with one underscore '_'. + +Example + +sl_packet_buffer.c +4.6.8.2 Avoid duplicate filenames +Avoid using the same file name for source files. + +Note: Among our entire source code there will be files with the same name. This cannot be avoided. But files with the same name should never be used in the same project/build. + +4.6.8.3 File names (Required) +File names (both for library and source) should include the namespace prefix of the module as well as the sl_ (no distinction made with sli for internal files) prefix. This includes configuration files. + +Example + +sl_simple_mpu.c +sl_status.h +sl_sleeptimer_config.h +4.6.8.4 Directory names (Required) +Directories use lower case names and underscores as word separators. Subfolder names do not need to be unique. + +4.6.9 UC-Instantiable components +The following section (4.6.9.*) defines naming format for UC-Instantiable component related information (configuration files, macros and handles) + +4.6.9.1 Configuration file names (Required) +The configuration files for every instance of an instantiable component must have the following format: sl____config.h + +Example + +// instance_name - vcom +sl_iostream_usart_vcom_config.h +// instance_name - btn0 +sl_simple_button_btn0_config.h +4.6.9.2 Configuration macros (Required) +The configuration macros for the instantiable components must have the following format: SL____CFG_VAL + +Example + +// instance_name - vcom +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 +// instance_name - btn0 +#define SL_SIMPLE_BUTTON_BTN0_POLARITY 0 +4.6.9.3 Instance handles (Required) +The handles for the instantiable components must have the following format: sl__ + +Example + +sl_iostream_vcom +sl_button_btn0 +5 Documentation +5.1 General +Write documentation so that others can easily pick up the code. It makes life easier for everyone. In particular, it makes supports job a lot easier as it will generate less support requests. + +5.2 Comments should answer the question "Why?" (Required) +Write comments that say why the code is the way it is. What the code does, and how it does it, can usually be figured out from the code itself. Why it does it, and why it does it the way that it does, cannot. If you write it the obvious way, and it doesn't work, explain in a comment why it didn't. Otherwise the next person to come along is going to convert it back to the obvious method and have to learn the same painful lesson (or even worse, force you to relearn it). + +There needs to be enough documentation that a peer can read and understand the code without having to ask the author for explanations. If a code reviewer feels the need to ask for explanations about how stuff works, then the code author should add this additional information as comments in the code. + +Comments should use correct grammar and full sentences. + +6 Doxygen Coding Style Guide +Doxygen is used to document all code that is released to customers, with a focus on functions that are part of an API. For code that is only used internally it is still strongly recommended to use Doxygen commenting as internal users will find it useful. + +For file and function comment blocks, the Javadoc style is used: + +/**************************************************************************//** + * doc comments ... + *****************************************************************************/ +For all other doc comments, the C++ style /// is used. + +Note: The reason we are using C style doxygen for this is that Eclipse (which Simplicity Studio is based on) can do correct code folding of this type of blocks. + +6.1 File comment header (Required) +All source files should have a file comment header that looks similar to the following. The actual license text will depend on the project. See section 7 for details about licenses. + +6.2 Grouping modules (@addtogroup) (Recommended) +Use the Doxygen command @addtogroup to group together source code that belongs to the same module, for example UART and SPI and so on. This will make it easier for customers to find the API documentation for the modules they are interested in. + +It is also possible to create groups hierarchies, for example to have an ADC group in the EM_Library group. + +Example + +/**************************************************************************//** + * @addtogroup EM_Library + * @{ + *****************************************************************************/ + +/// variable, constants and code belonging to EM_Library +/// (but not in the ADC module). +uint32_t sl_some_global_variable; + +/**************************************************************************//** + * @addtogroup ADC + * @brief Analog to Digital Converter (ADC) Peripheral API + * @{ + *****************************************************************************/ + +/// variable, constants and code belonging to EM_Library and ADC module +bool sl_is_adc_configured; + +/** @} (end addtogroup ADC) */ + +/** @} (end addtogroup EM_Library) */ + +/// @} (end groupName) +6.3 File/module level documentation (Recommended) +If a file is part of a module, it may be desirable to include file-level documentation. For example, the file level documentation may provide an overview of how to use an API. To provide file-level documentation, a Javadoc style Doxygen comment block should follow the file include statements. + +Example + +/**************************************************************************//** + * + * @addtogroup adc_group ADC API + * + * @brief Brief one-sentence description of ADC module. + * + * The rest of this section can be multi paragraph explanation of the + * module. It can include tables and code examples. End the description + * as shown below and this will collect the remaining API documentation + * into this group. + * + * @{ + * + *****************************************************************************/ +If a group is created as shown above, it needs to be closed at the end of the file using one of the two methods shown below: + +// The following is used if there is only one group in a file or +// groups are not nested. + +/// @} end adc_group + +// The following is used when groups are nested. This is needed so +// that doxygen does not pick up the "end adc_group" as part of a doc +// comment for a following or enclosing group. + +/** @} end adc_group */ +Comment: The method used is optional. If in doubt about whether the second method is needed, run Doxygen on your file and see if the "end" comment is being picked up in the documentation. + +6.4 Function documentation (Required) +This is required for any library or module code that will be customer facing. It is also highly recommended to document any other code in the same way, even if it is not expected to be customer-facing. Often times non-customer-facing code ends up being delivered to a customer anyway. + +Normally, functions that are part of an example (like main) or other simple functions that are part of the application and not library or module functions are not documented with Doxygen. It may still be useful to use Doxygen to provide documentation for complex examples. + +Each function definition contains at least a function brief statement and list of parameters and return value if any. Doxygen will pick up a single sentence at the start of the comment block as the brief description, so the @brief tag is not necessary. + +If the function contains parameters and a return value, then these parameters and return value must also be documented in Doxygen. + +Optionally the @note command can be used to highlight anything that the user should pay extra attention to when using this function. + +It is useful to read the Doxygen documentation about how you can write good documentation for your functions. Besides @note, there are other tags that can also be used. For example @sa (see also) can be used to create a link to another documented section. If you put a full function name or variable name that Doxygen knows about, it will automatically create a link to the documentation for that other function or variable. For macros you can add the @ref tag before the item name and a link will be generated. + +Example + +/**************************************************************************//** + * Brief description of function. + * + * @param myParam1 is a parameter that is most excellent + * @param myParam2 is not such a good parameter + * @returns Returns true on Tuesdays or whenever it is raining. + * + * Detailed description here. Can be multiple sentences. Can + * contain markdown (tables, code examples, bulleted lists) + * + * Can add as many additional paragraphs as needed. + * + * @note A note if the API needs a note. + *****************************************************************************/ + uint8_t sl_my_public_function(uint8_t my_param1, uint16_t my_param2) + { + // ... + } +6.5 Variable documentation (Required) +All public variables that are part of an API must be documented. It is also recommended to document all file-level global variables even if they are not public. + +Note: It is not necessary to document local (automatic) variables. + +Many variable will only require a single line or brief comment. In this case you should use a C++ style doxygen comment ///. You can use this same style even for several lines of a documenting comment. However, if the variable requires a large documentation block or needs to be visually separated from other sections of the source code file, then use the Javadoc style blocks as used for functions. + +Example + +/// A brief description of this variable. +uint8_t sl_meaningful_variable_name; + +/// This variable has a brief line of documentation. +/// Then it also has some additional lines of documentation. +uint32_t sl_another_variable; + +/**************************************************************************//** + * Brief description of complicated variable. + * Additional extra documentation for this complicated variable that + * needs a bigger explanation. Or perhaps I just want this variable to + * stand out in my source file so I use the large comment blocks. + *****************************************************************************/ +For fields of a structure, or a list of constants or anything that requires just a brief comment, there is another style (post) that can be used. In this case you put the doc comment on the same line as the item (instead of before it). To do this the comment needs to start like this: ///< Brief comment. + +Example + +/// A brief comment about this data type. +/// I can follow with additional explanation as needed, perhaps how +/// it is used or allowed values or constraints. +typedef struct +{ + uint8_t r; ///< Brief comment about this field. + uint8_t g; ///< Green pixel value. + uint8_t b; ///< Blue pixel value. +} sl_pixel_t; +6.6 Header file vs. implementation file (Recommended) +To keep a simple distinction between public documentation and internal documentation, all public documentation comments should be placed into the library or module header (.h) file. This allows us to just pull in header files when generating public-facing documentation and not need to worry about separation of public or private content. + +The implementation file (.c) should also be documented if there additional non- public functions or variables that are not part of the public documentation. The .c doc comments can be used for generating internal documentation. + +If a function in a .c file is already documented in the header file, then it is not necessary to repeat the documentation. However, a comment block should be used with the brief description to visually mark the function in the source file. + +Example + +/**************************************************************************//** + * Brief description of function. + *****************************************************************************/ + uint8_t sl_do_something(uint8_t my_param1, uint16_t my_param2) +If the function is a private (static) function then it should use a normal comment block (same as public function in a header file). Private variables should also be documented. + +6.7 Do not document sections (Recommended) +The Doxygen configuration file for the project should be configured to exclude undocumented objects. Therefore it is not necessary to add extra statements to exclude Doxygen processing. Simply do not add Doxygen comments to the code you do not want documented. + +Example + +/// The following variable will be picked as part of the +/// documentation. +uint8_t sl_my_public_variable; + +// This variable should also have a comment to explain it, +// but by using only double-slash, it will not get picked +// up by Doxygen. +static uint8_t my_private_variable; + +/****************************************************************************** + * This is a function that will not be documented. + * + * Note the lack of the double slash at the end of the top line. That + * means this is not a true Javadoc comment block and Doxygen will not + * see it. + *****************************************************************************/ +void sli_do_something_secret(void) +{ + // ... +} +6.8 Do not release sections (Recommended) +There may be instances where there are source files which contain sections that should not be released, for example references to an emulator or todo comments. In some build systems, you may use commented double square brackets (//[[...]] or //[[and//]]`) to hide such code. You must make sure that the build system used on said source runs the codestripper before relying on this functionality. + +Example + +//[[ +// Don't release this define +#define SL_EMULATOR_CONFIG 1 +//]] +7 Licensing +7.1 Silicon Labs Licenses +All of our released source files (.c, .h, others; generated and manually written) should fall under one of the few licenses approved by our legal team. All source files are therefore required to have a file comment header containing the correct license type. + +The default license text must be used unless otherwise specified. +The Open-Source/zlib license text is used for select software such as our CMSIS-Device header files and emlib, but can also be applied to other parts of the code. Only use this license text if the module already uses it, or with permission from the VP of Software. +The Apache 2.0 license text is used for select software, but can also be applied to other parts of the code. Only use this license text if the module already uses it, or with permission from the VP of Software. +The third-party license text is added on top of any third-party code. It does not remove the existing text. If we include any third party software, we need a way to clearly identify it as such. Yes, this is extra work, but is required by our legal team. Using and releasing third-party code has more constraints, see section 7.2 for the details. +The Micrium license text is used for any code that we charge for (i.e. the Micrium software stacks, with the exception of the kernel). +Please note that the version field in these headers is optional. If used, the version field should be used to denote the component version, not the Gecko SDK version. + +7.2 Third-Party Code +We generally favor writing and maintaining our own code when the differences (in effort, quality, market acceptance, etc.) with an open-source one are small. + +The VP of Software must give his consent before any kind of third-party code is allowed to be used, as special care must be taken when dealing with this type of code. Specifically, content licensed to us under a "copyleft" license (GPL and other viral open-source licenses) must not be released, including in compiled form (such as a library or binary). + +New copyleft content should not be added. Existing copyleft released content must be audited against this rule, documented and flagged to the VP of Software for quick resolution. Whenever feasible and regardless of whether it is being released or is a documented exception, existing copyleft content should be replaced. + +Content that is "multi-licensed" (offered to us under our choice of more than one license) is not considered copyleft if at least one of the offered licenses is not copyleft. + + +@endverbatim + +@} + ******************************************************************************/ diff --git a/lib/inc/efr32_iec60730_release_notes.h b/lib/inc/efr32_iec60730_release_notes.h new file mode 100644 index 00000000..0905017e --- /dev/null +++ b/lib/inc/efr32_iec60730_release_notes.h @@ -0,0 +1,73 @@ +/***************************************************************************/ /** + * @file + * @brief Release Notes + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** + @addtogroup efr32_iec60730 + @{ + @addtogroup IEC60730_EXTRA + @{ + @addtogroup iec60730_release_notes + @{ + @verbatim + Silicon Laboratories EFR32 IEC60730 Library Release Notes + Copyright (C) 2023 Silicon Laboratories, Inc. + + This release contains the following components: + ----------------------------------------------- + * Library (source files) + - /Releases/src + - /Releases/inc + - /Releases/asm + * Library Dependencies (header files) + - /Lib/CMSIS + - /Lib/Device//Include + Note: Refer to the Silabs GSDK package for the latest version of + the dependencies files. + + * Examples + * Documentation + * SDK extension files + + Revision History + ---------------- + 1.2.0 Release + + - Supported Devices: EFR32xG24, EFM32xG12 + - Supported Compilers: GCC, IAR + - Added GSDK extension for the IEC60730 Library. + - Integrated demo app to the GSDK extension. + + ---------------- + 1.1.0 Release + + - Supported IEC60730 standard + - Supported Devices: EFR32xG22, EFM32PG22 + - Supported Compilers: GCC, IAR + + ---------------- + 1.0.0 Release + + - Supported IEC60730 standard + - Supported Devices: EFR32xG21, EFR32xG23 + - Supported Compilers: GCC, IAR + + @endverbatim + ******************************************************************************/ + +/** @} (end addtogroup iec60730_release_notes) */ +/** @} (end addtogroup IEC60730_EXTRA) */ +/** @} (end addtogroup EFR32_iec60730) */ diff --git a/lib/inc/silabs_license_agreement.h b/lib/inc/silabs_license_agreement.h new file mode 100644 index 00000000..15ed7e88 --- /dev/null +++ b/lib/inc/silabs_license_agreement.h @@ -0,0 +1,360 @@ +/***************************************************************************/ /** + * @file + * @brief License Agreement + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** +@addtogroup efr32_iec60730 +@{ +@addtogroup IEC60730_EXTRA +@{ +@addtogroup iec60730_license_agreement +@{ +@verbatim +END-USER LICENSE AGREEMENT +IMPORTANT: READ CAREFULLY +BEFORE AGREEING TO TERMS + +THIS MASTER SOFTWARE LICENSE AGREEMENT (“AGREEMENT”) GOVERNS YOUR USE OF THE LICENSED MATERIALS. INSTALLING, COPYING OR OTHERWISE USING THE SOFTWARE, INDICATES YOUR ACCEPTANCE OF THE TERMS OF THIS AGREEMENT REGARDLESS OF WHETHER YOU CLICK THE “ACCEPT” BUTTON. IF YOU DO NOT AGREE WITH THESE TERMS AND CONDITIONS OR IF YOU ARE NOT AUTHORIZED TO ACCEPT THE TERMS OF THIS LICENSE ON BEHALF OF YOUR EMPLOYER, DECLINE THE LICENSE TERMS AND DO NOT USE THE SOFTWARE OR DOCUMENTATION. THESE TERMS GOVERN YOUR CONTINUED USE OF THE LICENSED MATERIALS THAT YOU DOWNLOAD NOW OR IN THE FUTURE, INCLUDING SUCH ADDITIONAL SOFTWARE MADE AVAILABLE TO YOU THROUGH THE LICENSED MATERIALS YOU HAVE SELECTED, AND ALL UPDATES AND VERSIONS OF SUCH SOFTWARE. + +1. Definitions. +“Application” means a product developed by Licensee, or for Licensee by a third party, that contains Licensed Programs. + +“Authorized Application” means an Application that contains, integrates, is packaged with, or functions with a Silicon Labs Device in Licensee’s Application. This includes a Licensed Program embedded in a network co-processor or host processor that operates in conjunction with a Silicon Labs Device. + +“Authorized Subcontractor” means a third-party subcontractor that you engage to design or manufacture Authorized Applications and has executed an agreement that is consistent with the terms of this Agreement, including its confidentiality provisions. At all times, you shall remain responsible for the actions or non-actions of you Authorized Subcontractors the same as if the action on non-action was committed by you. + +“Beta Software” means Software, including Software included within an SDK, that is undergoing testing or further development, and has not reached the generally available (GA) stage of development. + +“Commercial License” means an executed, in effect, software license agreement between Licensee and Silicon Labs that governs Licensee’s rights and obligations with respect to Licensee’s use of Micrium Software. + +"Commercial Purpose” means embedding Micrium Software in any Application that you sell or license to End Users or plan to do so. + +“Derivative Works” means a work based upon the Source Code version of the Software, such as a revision, modification, translation, abridgment, condensation, expansion or any other form in which such Software may be recast, transformed or adapted, and that, if prepared without authorization from Silicon Labs, would constitute copyright infringement. + +“Development Tool” means a software provided by Silicon Labs to enable development of Authorized Applications, configuration of Silicon Labs Devices and Software. + +“Documentation” means Silicon Labs technical documentation related to the Software, excluding advertising or marketing materials. + +“Embedded Stacks” means Software (other than Micrium Software) that is stack libraries, application layers, and example code. + +“End User” means a purchaser, sublicensee, recipient and/or user of an Application obtained directly or indirectly from Licensee. + +“External Manufacturers” means a third-party manufacturer, including such manufacturer's subcontractors and agents, which is authorized by Licensee to design and/or manufacture the Applications and to use, install, and test the Applications and the Licensed Programs. + +“Firmware” means executable or binary code that is embedded in the Silicon Labs Device in ROM or flash memory and cannot be modified by Licensee. + +“Licensee” or “you” means the acquirer of the license rights granted by this Agreement. If you are an individual working solely on your own behalf, then you are the Licensee. If you are an employee working on behalf of your employer, then your employer is the Licensee and you confirm that you are authorized to accept the terms of this Agreement on behalf of your Employer. + +“Licensed Programs” means Software in Object Code form that was either originally in Object Code form or was compiled from the Software or Derivative Works and is designed to operate in Applications in Authorized Applications. + +“Licensed Materials” means Software and the related Documentation including all updates and upgrades of the foregoing. + +“Micrium Software” means the Micrium real time kernel within the Micrium real time operating system (Micrium OS). + +“Modified Open Source Software” means Silicon Labs' modifications to Open Source Software that was created by a third party. +“Object Code” means computer programming code in binary form suitable for machine execution by a processor without the intervening steps of interpretation or compilation. + +“Open Source Software” means the Source Code version of software that may be freely used, modified or distributed without payment of a license fee or royalties subject to the terms of a publicly available software license, excluding Modified Open Source Software, the use of which is subject to the terms of this Agreement. + +“Personal Information” means data concerning an individual user, including but not limited to a user’s activity on a Silicon Labs website, location, IP address, mobile device ID, name, or biometric data collected, stored or transmitted by a Silicon Lab Device or Software. + +“SDK” means software development kit (other than Micrium Software). + +“Silicon Labs” means Silicon Laboratories Inc., a Delaware corporation located at 400 W. Cesar Chavez, Austin, TX 78701 if you are physically located within the United States. If you are physically located outside of the United States, Silicon Labs means Silicon Laboratories International Pte Ltd., a Singapore corporation located at No. 18 Tai Seng Street, #05-01, 18 Tai Seng, Singapore 539775. + +"Silicon Labs Devices” means Silicon Labs branded integrated circuit chips purchased from Silicon Labs or one of its authorized distributors. + +“Silicon Labs Open Source Code” means Software created by Silicon Labs and which is (a) delivered to Licensee in Source Code format, (b) is identified as open source code and (c) states that use of the software is subject to the terms of this Agreement. + +“Software” means the computer programming code that was downloaded or otherwise distributed to Licensee and which is the subject of this Agreement. Software may be in Object Code or Source Code form or may be embedded as Firmware in a Silicon Labs Device. Software includes Embedded Stacks, SDKs and Development Tools. Your rights are different depending on whether the Software is delivered to you in Object Code, Source Code or Firmware. Software that is Micrium Software is subject to specific terms and conditions defined in Section 2. + +“Source Code” means the computer programming code in an uncompiled form readable by humans which cannot be executed by a processor unless it is compiled into binary form. + +“Third Party Software” means any software that Silicon Labs has licensed from a third party. + +“Warranty Period” means the period of time ending thirty (30) days after the first delivery of the Software to the Licensee, whether such delivery is in the form of a download or actual physical delivery. + +“Unauthorized Use” means use or inclusion of the Licensed Materials in (a) life support, aeronautical, aerospace, medical, military or nuclear applications; (b) FDA Class III or other devices for which FDA premarket approval is required; (c) implantable devices; (d) life support or life endangering applications where failure or inaccuracy might cause death or personal injury; and (e) automotive or transportation applications or environments unless the specific Silicon Labs Device has been designated by Silicon Labs as compliant with ISO/TS 16949 requirements. + + +2. Micrium Software. +The terms and conditions in this Section 2 apply only to Micrium Software and take precedence over any other conflicting terms of this Agreement. + +2.1. Grant of Micrium Software License. Upon accepting this Agreement and downloading the Micrium Software, subject to your compliance with the terms of this Agreement, Silicon Labs hereby grants you a limited, non-exclusive, nontransferable license for the Term (as described in Section 23), as follows: + +2.1.1. You and your Authorized Subcontractors may modify the Source Code version of Micrium Software for the sole purpose of adapting the Micrium Software to your application. + +2.1.2. You may embed the Micrium Software exclusively in products developed by you or by your Authorized Subcontractors on your behalf during the Term that embed the Micrium Software into Silicon Labs Devices (the “End Products”). + +2.1.3. You may distribute copies of the Object Code version of the Micrium Software solely to the extent that such copies are embedded in End Products. + +2.2. Micrium Software License Restrictions. Your use of the Micrium Software is subject to the following restrictions: + +2.2.1. You may allow Authorized Subcontractors to access and use the Micrium Software solely to the extent necessary to adapt the Micrium Software to your application. + +2.2.2. Except as provided in this Agreement, neither you, your Authorized Subcontractors, nor any of your downstream customers may sell, transfer, sublicense, distribute, or disseminate in any way the Object Code or executable code of the Micrium Software in any written or electronic manner. + +2.2.3. Neither you, your Authorized Subcontractors, nor any of your downstream customers may distribute the Source Code version of Micrium Software to any third party under any circumstances. You shall ensure that each of your employees and Authorized Subcontractors that work with Micrium Software are aware of this restriction. + +2.2.4. Except as permitted in this Agreement, neither you, your Authorized Subcontractors, nor any of your downstream customer may embed the Micrium Software in any integrated circuit device that is not a Silicon Labs Device. + +2.3. End User Support. You agree to be fully responsible for all End User support services and warranty costs for all End Products. + +2.4. Commercial Purpose. You are permitted to use the Micrium Software for a Commercial Purpose only if you embed the Micrium Software into a Silicon Labs Device. You may not embed the Micrium Software in a non-Silicon Labs Device unless you and Silicon Labs execute a separate Commercial License Agreement expressly permitting such use. + +2.5. Ownership. Silicon Labs is and shall remain the sole and exclusive owner of the Micrium Software and all Documentation, media, manuals, specifications, instructions and printed materials, and any copies or portions thereof, furnished by Silicon Labs for use with the Micrium Software. You own any improvements or modifications to the Micrium Software made by you or your Authorized Subcontractor on your behalf to adapt Micrium Software for use in your End Products. + +2.6. Maintenance and Support. Standard maintenance and technical support, such as bug fixes, correction of failures, updates and maintenance patches is provided to you at no cost for one year from date that you download the Micrium Software. Silicon Labs may use a variety of methods, including but not limited to telephone, Internet and/or e-mail, to provide such maintenance and support. + + +3. 8051 SDK. +The terms and condition in this Section 3 apply only to the 8051 SDK and take precedence over any other conflicting terms of this Agreement. + +3.1. 8051 SDK. The 8051 SDK consists of the following items: + +3.1.1. Drivers; + +3.1.2. Peripheral libraries (excluding CSLIB); and + +3.1.3. Example application code. + +3.2. Installation and Use Rights. + +3.2.1. You may download and install the 8051 SDK on one or more computers and make any number of copies. + +3.2.2. You may internally evaluate the 8051 SDK. If you elect to use the 8051 SDK for any other purpose, including modification and distribution, then the following additional terms apply to you. + +3.2.3. You may modify any files for your own use. + +3.2.4. You may redistribute to your customers applications that you develop using the 8051 SDK. Your redistribution may be in any form, including executable binary code, source code, physical media and Internet downloads. + +3.3. Restrictions. + +3.3.1. You may not use the 8051 SDK with any integrated circuit products other than those designed and manufactured by Silicon Labs. + +3.3.2. Except as provided above, you may not redistribute, sublicense, assign, rent or lease any portion of the 8051 SDK to any third party. + +3.3.3. You may not modify or distribute the 8051 SDK so that all or any part of it becomes Open Source Software. + +3.3.4. You may not obscure or remove any product identification, copyright or other notices that appear on or in the 8051 SDK, including any notices from third parties. + +3.3.5. You may not redistribute any modified or unmodified version of the 8051 SDK to any third party as a standalone product. + +3.4. Ownership. Silicon Labs is and shall remain the owner of the 8051 SDK at all times. Applications that you develop using the 8051 SDK shall belong to you. + + +4. License Grant. +Silicon Labs hereby grants Licensee a limited, non-transferable, non-exclusive, perpetual license to use the Licensed Materials solely under the following terms and condition: + +4.1. Object Code. With respect to Software (other than Micrium Software) that is delivered to Licensee by Silicon Labs in Object Code format, Licensee may: + +4.1.1. (a) if the Software is an Embedded Stack, you may install one copy of the Software and its components all together on a single computer, and if the Software is copied onto another computer, the original copy must be deleted or otherwise made irreversibly inoperable; (b) if the Software is an SDK or a Development Tool, you may make multiple copies of the Software for your own internal use; + +4.1.2. store one copy of the Software for archival (non-operational) purposes only, so long as access to such copy is restricted; + +4.1.3. use the Licensed Materials to develop applications to be used to program Silicon Labs Devices; + +4.1.4. incorporate the Licensed Materials into Authorized Applications; + +4.1.5. facilitate the integration of the Licensed Materials and Silicon Labs Devices into Authorized Applications; and + +4.1.6. distribute copies of the Licensed Materials to Licensee’s end-user customers, to the extent such copies are in Object Code form only and are incorporated into Authorized Applications. + +4.2. Source Code. With respect to Software (other than Micrium Software and Silicon Labs Open Source Software) that is delivered to Licensee by Silicon Labs in Source Code format, Licensee may: + +4.2.1. use the sample application software in Source Code format to develop and compile applications for use in Authorized Applications; + +4.2.2. copy, prepare Derivative Works of, compile and modify Source Code of the Silicon Labs Software, solely to enable Licensee to design, develop, modify, test, support and/or debug Derivative Works and/or Licensed Programs that are intended to operate in Authorized Applications; + +4.2.3. reproduce and distribute Derivative Works to Authorized Subcontractors under agreements consistent with Licensee’s rights and obligations under this Agreement solely (a) to modify for Licensee’s use in developing and maintaining the Licensed Programs; and (b) to enable Licensee to distribute Licensed Programs externally to End Users in accordance with Section 4.2.5 below; + +4.2.4. reproduce and distribute Licensed Programs internally and to Licensee’s External Manufacturers under agreements consistent with Licensee’s rights and obligations under this Agreement, solely (a) for Licensee’s use in developing and maintaining the Licensed Programs; and (b) to enable Licensee to distribute Licensed Programs externally to End Users in accordance with Section 4.2.5 below; and + +4.2.5. distribute Licensed Programs externally to Licensee’s End Users, either directly or through Licensee’s distribution channels and methods, but only for use with Authorized Applications and not on a standalone basis. + + +5. License Restrictions. +The Licensed Materials shall only be used as permitted by this Agreement. Any use of the Licensed Materials not specifically authorized by this Agreement is prohibited. + +5.1. Without limiting the foregoing restriction, and except as authorized by this Agreement, Licensee shall not: + +5.1.1. assign, sublicense, or otherwise transfer the Licensed Materials to any third party; + +5.1.2. reverse compile, disassemble, alter, add to, delete from, or otherwise modify Software delivered to Licensee in Object Code form or in libraries in the Licensed Materials; + +5.1.3. publish the Licensed Materials in any manner that would cause it to become part of the public domain or otherwise become subject to the terms of an Open Source Software license; + +5.1.4. use the Licensed Materials except in conjunction with Silicon Labs Devices; + +5.1.5. distribute the Source Code form of Software to any third party, in whole or in part; or + +5.1.6. remove any copyright, trademark, patent or other proprietary notices from the Licensed Materials or any portion thereof. + +5.2. Licensee shall not use the Licensed Materials in any way to further the development or improvement of any product that does or would compete with any Silicon Labs Device. + +5.3. If the Software is provided to demonstrate the capability of Silicon Labs Devices, it shall be used only for this purpose. Incorporation of the demonstration version of Silicon Labs Software into Applications is solely at Licensee’s risk and liability. + +5.4. Any subsequent distribution or transfer of the Licensed Programs to End Users shall remain subject to the terms and conditions of this Agreement. Whether by execution of an end-user license agreement or other commercially reasonable means, Licensee shall ensure that its End Users’ use of the Licensed Programs shall only be permitted if they are incorporated into Authorized Applications. Licensee shall prohibit any further sublicensing, distribution, sale, marketing, reproduction, modification, reverse engineering or decompiling of the Licensed Programs. + +5.5. Licensor may include features in the Software to restrict use of the Software that does not comply with the terms of this Agreement. + + +6. Unauthorized Use. +The Licensed Materials are not licensed, designed, intended, authorized, or warranted for Unauthorized Use. Licensee shall be solely and exclusively responsible for any Unauthorized Uses by Licensee, Licensee’s Authorized Subcontractors, Licensee’s End Users or other sublicensees, and any Unauthorized Use by such Authorized Subcontractors, End Users or sublicensees, with or without the knowledge of Licensee, shall be attributed to Licensee. Licensee agrees to defend and indemnify Silicon Labs for all third-party claims and for all damages, costs and fees, including Silicon Labs’ attorneys’ fees, arising from any such Unauthorized Use of the Licensed Materials. + + +7. Open Source Software. +7.1. If the Software includes any Open Source Software, such Software and the relevant Open Source Software license under which such Software is licensed are disclosed at www.silabs.com. All use of such Open Source Software by Licensee is subject to the terms of the relevant open source software license and Licensee’s use of such Software is expressly conditioned upon Licensee’s compliance with the term of such license. + +7.2. If the Software is Silicon Labs Open Source Code, then the following provisions apply: + +7.2.1. Silicon Labs hereby grants to Licensee a perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable copyright license to reproduce, prepare Derivative Works of, publicly display, publicly perform, sublicense, and distribute Silicon Labs Open Source Code and such Derivative Works in Source Code or Object Code form. + +7.2.2. Silicon Labs hereby grants to Licensee a perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable (except as stated in this section) patent license to make, have made, use, offer to sell, sell, import, and otherwise transfer the Silicon Labs Open Source Code, where such license applies only to those patent claims licensable by Silicon Labs that are necessarily infringed by Licensee’s use of the Silicon Labs Open Source Code or by combination with any other device or software. + +7.2.3. Licensee may add Licensee’s own copyright statement to Licensee’s modifications of Silicon Labs Open Source Software and may provide additional or different license terms and conditions for use, reproduction, or distribution of such modifications, or for any such Derivative Works as a whole, provided Licensee’s use, reproduction, and distribution of the Silicon Labs Open Source Software otherwise complies with the conditions stated in this License. + +7.2.4. Licensee may reproduce and distribute copies of the Silicon Labs Open Source Code or Derivative Works thereof in any medium, with or without modifications, and in Source Code or Object Code form, provided that Licensee meets the following conditions: (a) Licensee must give any other recipients of the Silicon Labs Open Source Code or Derivative Works a copy of this License; and (b) Licensee must cause any modified files to carry prominent notices stating that Licensee changed the files; and (c) Licensee must retain, in the Source Code form of any Derivative Works that Licensee distributes, all copyright, patent, trademark, and attribution notices from the Source Code form of the Silicon Labs Open Source Code, excluding those notices that do not pertain to any part of the Derivative Works; and (d) If the Silicon Labs Open Source Code includes a "NOTICE" text file as part of its distribution, then any Derivative Works that Licensee distributes must include a readable copy of the attribution notices contained within such NOTICE file, excluding those notices that do not pertain to any part of the Derivative Works, in at least one of the following places: within a NOTICE text file distributed as part of the Derivative Works; within the Source Code form or documentation, if provided along with the Derivative Works; or, within a display generated by the Derivative Works, if and wherever such third-party notices normally appear. The contents of the NOTICE file are for informational purposes only and do not modify the License. Licensee may add Licensee’s own attribution notices within Derivative Works that Licensee distributes, alongside or as an addendum to the NOTICE text from the Silicon Labs Open Source Code, provided that such additional attribution notices cannot be construed as modifying the License. + +7.3. With respect to Software that is not Open Source Software, Licensee shall not: + +7.3.1. cause the Software to become subject to any Open Source Software license, including but limited to the general public license (GPL) or the lesser general public license (LGPL); + +7.3.2. cause the Software to be disclosed into the public domain or to any third party except for those third parties to whom License is authorized to distribute Licensed Programs under Sections 4.1.6 or 4.2.5; or + +7.3.3. cause any part of the Software to become a derivative of any Open Source Software. + +7.4. Licensee shall not enable or permit any of its End Users to breach the provisions of this Section 7, and shall include similar restrictive provisions in its end user license agreement with such End Users. If Licensee breaches this Section 7, Licensee shall indemnify and hold Silicon Labs harmless from all costs, claims, settlements and judgments incurred by Silicon Labs, including attorneys’ fees, in the process of defending, challenging and/or settling any demand, claim or order that the Software is subject to an Open Source Software license or must be disclosed into the public domain or to any third party. + + +8. Modified Open Source Software. +Notwithstanding the terms of the Open Source Software license under which the Open Source Software is licensed, the following terms apply to modifications to such Open Source Software that constitute Modified Open Source Software, as defined in this Agreement. The following terms apply regardless of how the Modified Open Source Software was delivered to you. + +8.1.1. You may not use Modified Open Source Software except for use with Licensed Programs that are intended to operate in Authorized Applications. + +8.1.2. You may not obscure, modify or remove copyright notices, files or statements concerning ownership by Silicon Labs or reference to the terms of this Agreement. + +8.1.3. Subject to Sections 8.1.1 and 8.1.2: + +8.1.3.1. You may copy and compile the Source Code of the Modified Open Source Software. + +8.1.3.2. You may reproduce the Object Code and Source Code versions of Modified Open Source Software and distribute the same through multiple levels of distributions, including to your External Manufacturers. + +8.1.3.3. You may modify Modified Open Source Software and create Derivative Works of Modified Open Source Software. + + +9. Third Party Software. +9.1. If the Software contains any Third Party Software, all use of such Third Party Software shall be subject to the terms of the license from such third party to Silicon Labs or a separate end user license agreement, if available, which may be set forth in the header files of the Third Party Software. You agree to comply with all terms and conditions for use of Third Party Software. + +9.2. Silicon Labs has licensed the BLE Homekit from Apple. You may not download or use the BLE Homekit software unless you have executed a MFi License with Apple. + +9.3. Silicon Labs has licensed emWin software, including libraries and executables and related documentation (collectively “emWin Library”) from Segger Microcontroller GmbH. You are entitled to use the emWin Library free of charge, subject to the following conditions, which you accept by virtue of accepting the terms of this Agreement: (a) you may use the emWin library exclusively with EFM 32-bit microcontrollers and EFR radios; (b) you may not use the emWin Library to create or develop software that is similar to or competitive with the emWin Library; and (c) you may not modify the documentation that accompanies the emWin Library. + +9.4. Silicon Labs does not make any endorsements or representations concerning Third Party Software and disclaims all implied warranties concerning Third Party Software. Third Party Software is offered “AS IS.” + + +10. Inspection Rights. +Silicon Labs shall have the right, upon reasonable advance notice, to inspect Licensee's records and facilities with respect to the manufacture of Applications and to receive sample units of Applications in order to verify that such manufacturing is within the scope of this Agreement, that there are appropriate security procedures to protect Silicon Labs’ Confidential Information, and that Licensee is in compliance with its other obligations under this Agreement. + + +11. No Other Licenses. +The licenses granted under this Agreement are specifically set forth herein, and no licenses are granted by Silicon Labs to Licensee by implication or estoppel, and no licenses shall be granted by the parties’ course of doing business. + + +12. Beta Software. +Beta Software, whether Object Code or Source Code (a) can only be used for internal development, demonstration or testing purposes; (b) cannot be included within Licensee’s or End-Users’ products that are intended for general release or high-volume production; and (c) cannot be used to support Z-Wave certification of Silicon Labs Devices. Silicon Labs does not offer any warranties on Beta Software and disclaims all implied warranties including, but not limited to merchantability, fitness for use and noninfringement. Beta Software is offered “AS IS.” Under no circumstances will Silicon Labs incur any liability or obligation to you related to your use of Beta Software. Any use of Beta Software by you in violation of the terms of this Agreement shall automatically terminate your right to use Beta Software for any purpose whatsoever. + + +13. Upgrades, Updates, New Versions. +Although it has no obligation to do so, Silicon Labs may introduce updates, upgrades or new versions of the Software from time to time. Licensee is under no obligation to download or use the updates, upgrade or new version of Software; however, if Licensee elects to do so, the licenses granted to Licensee pursuant to this Agreement shall be deemed to include such updates, upgrades and new versions. In the case of any bug fix, improvement, work-around, or correction made to the Software by Licensee, Licensee agrees to provide to Silicon Labs, at no cost, the source code and any documentation reasonably required for Silicon Labs to be able to incorporate such changes into the Silicon Labs Software. + + +14. Regulatory Compliance. +Silicon Labs does not warrant that Software or any Application will comply with the regulatory requirements of the United States or any other country. Licensee is solely responsible for complying with such requirements and for obtaining necessary government certifications, if any. + + +15. License Fee and Royalties. +Unless Licensee has executed a Commercial License with Silicon Labs, Licensee is not obligated to pay any license fees or royalties to Silicon Labs so long as Licensee complies with the terms of the licenses set forth herein. If Licensee has executed a Commercial License, Licensee agree to pay all license fees, maintenance fees and subscription fees described in such Commercial License. + + +16. No Resale Fees. +Licensee may not directly or indirectly charge any fee or otherwise require or accept any type of monetary compensation solely for redistributing the Licensed Materials which is in excess of any amount paid to Silicon Labs for the same Licensed Materials. This does not apply to the sale of hardware products having the Licensed Materials in object code form embedded within. + + +17. Proprietary Rights. +All rights and title in and to the Licensed Materials, including without limitation, patents, copyrights, moral rights, trademarks and trade secret rights, belong to Silicon Labs or its licensors. Except for the rights expressly granted herein, no other rights are granted to Licensee with respect to the Licensed Materials. + + +18. Confidential Information. +You agree that the Licensed Materials contain confidential information, including trade secrets, know-how and other information, that comprise the exclusive property of Silicon Labs or its licensors. During the period this Agreement is in effect and at all times after its termination, you shall maintain the confidentiality of this information and shall not sell, license, sublicense, publish, display, distribute, disclose or otherwise make available this information to any third party nor use such information except as authorized by this Agreement. + + +19. Limited Warranty and Remedies. +Silicon Labs warrants that, during the Warranty Period, the Software will function substantially in accordance with the Documentation when used with Silicon Labs Devices and that the media on which the Software is furnished will be free from defects in material and workmanship, under normal use and service, when correctly installed and maintained. Silicon Labs does not warrant that the functions in the Licensed Materials will meet Licensee’s specific requirements or that the operation of the Software will be uninterrupted or error free. Silicon Labs does not warrant that the Software does not contain any viruses or bugs. If Licensee notifies Silicon Labs, during the Warranty Period, of a failure of the Software to conform to the limited warranty stated in this section, Silicon Labs’ sole obligation, and Licensee’s sole remedy, will be, at Silicon Labs’ sole discretion: (i) replacement of the Software, or part thereof, with a functionally equivalent software product or part, or (ii) repair of the Software. Without limiting any term or condition stated in this Agreement, this warranty does not apply to any nonconformance caused by (A) improper or inadequate maintenance or calibration, or (B) software or interfacing equipment, parts or supplies not supplied by Silicon Labs or its authorized distributor, (C) modifications to the Software or (D) Unauthorized Use of the Software. + + +20. WARRANTY DISCLAIMER. +EXCEPT AS PROVIDED ABOVE IN SECTION 19, THE LICENSED MATERIALS ARE PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT AND THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE LICENSED MATERIALS IS WITH LICENSEE. SILICON LABS DOES NOT WARRANT THAT THE LICENSED MATERIALS ARE FREE FROM DEFECTS THAT COULD CAUSE VULNERABILITY TO CYBER-ATTACK, DATA BREACH OR PRIVACY VIOLATIONS. SILICON LABS DISCLAIMS ALL LIABILITY RELATED TO LICENSEE’S DATA THAT MAY BE RECEIVED, STORED OR USED BY SILICON LABS DEVICES OR SOFTWARE OR INTERCEPTED BY THIRD PARTIES. SILICON LABS DISCLAIMS ALL LIABILITY FOR DAMAGES CAUSED BY THIRD PARTIES, INCLUDING MACILICOUS USE OF, OR INTERFERENCE WITH TRANSMISSION OF, LICENSEE’S DATA. + + +21. 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Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_H +#define SL_IEC60730_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include "sl_iec60730_config.h" +#include "sl_iec60730_toolchain.h" +#include "em_device.h" +#include "em_core.h" +#include "em_gpcrc.h" +#include SL_IEC60730_BOARD_HEADER + +#define IE60730_LIBRARY_VERSION { 1, 2, 0 } + +#ifdef DOXYGEN +/// User SHOULD define #SL_IEC60730_BOARD_HEADER definition for using IMC and VMC modules. +/// This definition SHOULD be a header file. In this header file SHOULD be +/// definitions listed in IMC and VMC modules. In our example we defined +/// the #SL_IEC60730_BOARD_HEADER definition is sl_iec60730_board.h. Our definitions +/// in #SL_IEC60730_BOARD_HEADER is an example that you can reference. Of course, user CAN +/// redefine the #SL_IEC60730_BOARD_HEADER definition to any header file. +#define SL_IEC60730_BOARD_HEADER + +#else +#define IEC60370_CM4 0 +#define IEC60370_CM33 1 +#if defined(__CM4_REV) +#define IEC60370_CPU IEC60370_CM4 +#elif defined(__CM33_REV) +#define IEC60370_CPU IEC60370_CM33 +#else +#error "Unknown Core type!" +#endif + +#endif /* DOXYGEN */ + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup sl_iec60730_post + * @{ + *****************************************************************************/ +typedef struct { + uint8_t major; ///< Major version + uint8_t minor; ///< Minor version + uint8_t revision; ///< Revision +} sl_iec60730_library_version_t; + +/// Global variable which holds the IEC60370 library version. +extern const sl_iec60730_library_version_t SL_IEC60730_LIBRARY_VERSION; + +/// The result of a test. +typedef enum { + SL_IEC60730_TEST_FAILED = 0, ///< test result failed + SL_IEC60730_TEST_PASSED = 1, ///< test result passed + SL_IEC60730_TEST_IN_PROGRESS = 2, ///< test is still in progress +} sl_iec60730_test_result_t; + +/// Cause of failure passed to Safe State function. +typedef enum { + SL_IEC60730_NO_FAILURE = 0, ///< No failure detected + SL_IEC60730_TEST_VERIFY = 1, ///< Special case used for automated verification testing + SL_IEC60730_WATCHDOG_POST_FAIL = 2, ///< Watchdog POST test failed + SL_IEC60730_VMC_FAIL = 3, ///< Variable Memory Check detected a failure + SL_IEC60730_IMC_FAIL = 4, ///< Invariable Memory Check detected a failure + SL_IEC60730_CPU_REGISTERS_FAIL = 5, ///< CPU Registers Check detected a failure + SL_IEC60730_CLOCK_FAIL = 6, ///< System Clock Check detected a failure + SL_IEC60730_INTERRUPT_FAIL = 7, ///< Interrupt Plausibility Check detected a failure + SL_IEC60730_PROGRAM_COUNTER_FAIL = 8, ///< Program Counter Check detected a failure + SL_IEC60730_GPIO_FAIL = 9, ///< GPIO Plausibility Check detected a failure + SL_IEC60730_ANALOG_FAIL = 10, ///< Analog Plausibility Check detected a failure + SL_IEC60730_CS0_FAIL = 11, ///< CSEN0 detected a failureLESENSE + SL_IEC60730_LESENSE0_FAIL = 12, ///< LESENSE0 detected a failure + SL_IEC60730_RADIO_FAIL = 13, ///< Radio comms detected a failure + SL_IEC60730_I2C0_FAIL = 14, ///< I2C0 comms channel detected a failure + SL_IEC60730_I2C1_FAIL = 15, ///< I2C1 comms channel detected a failure + SL_IEC60730_USART0_FAIL = 16, ///< USART0 comms channel detected a failure + SL_IEC60730_USART1_FAIL = 17, ///< USART1 comms channel detected a failure + SL_IEC60730_USART2_FAIL = 18, ///< USART2 comms channel detected a failure + SL_IEC60730_USART3_FAIL = 19, ///< USART3 comms channel detected a failure + SL_IEC60730_LEUART0_FAIL = 20, ///< LEUART comms channel detected a failure + SL_IEC60730_EUART0_FAIL = 21, ///< EUART comms channel detected a failure + SL_IEC60730_PDM0_FAIL = 22, ///< PDM comms channel detected a failure + SL_IEC60730_OEM_FAIL_1 = 23, ///< OEM defined failure + SL_IEC60730_OEM_FAIL_2 = 24, ///< OEM defined failure + SL_IEC60730_OEM_FAIL_3 = 25, ///< OEM defined failure + SL_IEC60730_OEM_FAIL_4 = 26, ///< OEM defined failure + SL_IEC60730_SAFETY_CHECK_FAIL = 0XFF, ///< iec60730_safety_check detected some failure +} sl_iec60730_test_failure_t; + +/// Useful macro for avoiding compiler warnings related to unused function +/// arguments or unused variables. +#ifndef UNUSED_VAR +#define UNUSED_VAR(x) (void) (x) +#endif /* UNUSED_VAR */ + +#ifndef __CONCAT +#define __CONCAT(x, y) x##y +#endif + +#define CONCAT(x, y) __CONCAT(x, y) + +#define STR(x) #x +#define XSTR(x) STR(x) + +/// The #LABEL_DEF macro is used to generate label for break points. Using this +/// macro avoids label removal by the compiler's optimize levels. +#ifndef LABEL_DEF +#define LABEL_DEF(NAME) LB_ASM volatile(LB_XSTR(NAME)) +#endif /* LABEL_DEF */ + +#ifdef DOXYGEN +/// The #__no_init macro is used for compatibility between +/// GCC and IAR compiler. +#define __no_init +#else // !DOXYGEN +#ifndef __no_init +#define __no_init +#endif /* __no_init */ +#endif // DOXYGEN + +/// The #DEC_CLASSB_VARS definition is used for declaring pair of classsb_ram +/// variables. +#define DEC_CLASSB_VARS(vartype, name) \ + __no_init vartype name __CLASSB_RAM; \ + __no_init vartype CONCAT(name, _inv) __CLASSB_RAM + +/// The #EXTERN_DEC_CLASSB_VARS definition is extern of pair of +/// #DEC_CLASSB_VARS +#define EXTERN_DEC_CLASSB_VARS(vartype, name) \ + extern __no_init vartype name __CLASSB_RAM; \ + extern __no_init vartype CONCAT(name, _inv) __CLASSB_RAM + +/// The #sl_static_dec_classb_vars definition used for declaring static pair +/// #DEC_CLASSB_VARS +#define sl_static_dec_classb_vars(vartype, name) \ + static __no_init vartype name __CLASSB_RAM; \ + static __no_init vartype CONCAT(name, _inv) __CLASSB_RAM + +/// The #INV_CLASSB_VAR macro is used to inverse a Inv value of pair +/// #DEC_CLASSB_VARS +#define INV_CLASSB_VAR(vartype, name) \ + CONCAT(name, _inv) = (vartype) (~(vartype) name) + +/// The #INV_CLASSB_PVAR macro is used to inverse a Inv value of pointer pair +/// #DEC_CLASSB_VARS +#define INV_CLASSB_PVAR(vartype, name) \ + CONCAT(name, _inv) = (vartype *) (~(vartype) name) + +#if ((defined UNIT_TEST_IEC60730_VARIABLE_MEMORY_ENABLE) || defined (UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE)) +#define CHECK_INTEGRITY(vartype, x) unit_test_mock_check_integrity() +#else +/// The #CHECK_INTEGRITY definition used for checking integrity of pair of +/// variables stored in *.classb_ram* section. +#define CHECK_INTEGRITY(vartype, x) \ + ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, _inv))) +#endif // (UNIT_TEST_IEC60730_VARIABLE_MEMORY_ENABLE || UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE) + +/** @} (end addtogroup sl_iec60730_post) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_INVARIABLE_MEMORY_Test + * @{ + *****************************************************************************/ + +#ifdef DOXYGEN +/// Support for cleaner code. +/// * If user use the #SL_IEC60730_USE_CRC_32_ENABLE == 1, #sl_iec60730_crc_t is uint32_t. +/// * Otherwise, #sl_iec60730_crc_t is uint16_t. +#define sl_iec60730_crc_t + +/// The #SL_IEC60730_INVAR_BLOCKS_PER_BIST desribles maximum number of loops that perform +/// the CRC calculation each time the #sl_iec60730_imc_bist is invoked. We provide +/// default value for this definition in sl_iec60730.h file. +#define SL_IEC60730_INVAR_BLOCKS_PER_BIST + +#else // !DOXYGEN + +#if (SL_IEC60730_USE_CRC_32_ENABLE == 1) +typedef uint32_t sl_iec60730_crc_t; +#else /* !SL_IEC60730_USE_CRC_32_ENABLE */ +typedef uint16_t sl_iec60730_crc_t; +#endif /* SL_IEC60730_USE_CRC_32_ENABLE */ + +#endif // DOXYGEN + +/// The end address of Flash is specified by the address of the #check_sum +/// variable. This variable is provided by linker in GCC or generated by +/// configurations in IAR. +extern sl_iec60730_crc_t check_sum; + +/// The #SL_IEC60730_ROM_SIZE definition describes the size of Flash calculated CRC value. +/// This calculation based on #SL_IEC60730_ROM_END, and #SL_IEC60730_ROM_START definitions. +#define SL_IEC60730_ROM_SIZE ((uint32_t) SL_IEC60730_ROM_END - (uint32_t) SL_IEC60730_ROM_START) + +/// The #STEPS_NUMBER definitionn WILL be defined base on #SL_IEC60730_ROM_SIZE and +/// #SL_IEC60730_FLASH_BLOCK definition. User SHOULD not change it. +#define STEPS_NUMBER ((uint32_t) SL_IEC60730_ROM_SIZE / SL_IEC60730_FLASH_BLOCK) + +/// The #SL_IEC60730_ROM_SIZE_INWORDS definitionn WILL be defined base on #SL_IEC60730_ROM_SIZE definition. +/// User SHOULD not change it. +#define SL_IEC60730_ROM_SIZE_INWORDS ((uint32_t) SL_IEC60730_ROM_SIZE / 4U) + +/// The #SL_IEC60730_FLASH_BLOCK_WORDS definitionn WILL be defined base on #SL_IEC60730_ROM_SIZE_INWORDS +/// and #STEPS_NUMBER definitions. User SHOULD not change it. +#define SL_IEC60730_FLASH_BLOCK_WORDS ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS / STEPS_NUMBER)) + +/// The #SL_IEC60730_ROM_SIZE_TEST definition describes the size of region Flash calculated CRC value. +/// This calculation based on #end address, and #start address region is transmitted. +/// definitions. +#define SL_IEC60730_ROM_SIZE_TEST(start, end) \ + ((uint32_t) end - (uint32_t) start) + +/// The #STEPS_NUMBER_TEST definitionn WILL be defined base on #SL_IEC60730_ROM_SIZE_TEST and +/// #SL_IEC60730_FLASH_BLOCK definition. User SHOULD not change it. +#define STEPS_NUMBER_TEST(start, end) \ + ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / SL_IEC60730_FLASH_BLOCK) + +/// The #SL_IEC60730_ROM_SIZE_INWORDS_TEST definitionn WILL be defined base on #SL_IEC60730_ROM_SIZE_TEST definition. +/// User SHOULD not change it. +#define SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / 4U) + +/// The #SL_IEC60730_FLASH_BLOCK_WORDS_TEST definitionn WILL be defined base on #SL_IEC60730_ROM_SIZE_TEST +/// and #STEPS_NUMBER definitions. User SHOULD not change it. +#define SL_IEC60730_FLASH_BLOCK_WORDS_TEST(start, end) ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) / STEPS_NUMBER_TEST(start, end))) + +/// The #SL_IEC60730_REF_CRC definition describes variable that address of this variable +/// store CRC value that is calculated by \ref gcc_crcXY in Post Build. We use +/// #check_sum so in our example #SL_IEC60730_REF_CRC definition is #check_sum. +#ifndef SL_IEC60730_REF_CRC +#define SL_IEC60730_REF_CRC (check_sum) +#endif + +/** @} (end addtogroup IEC60730_INVARIABLE_MEMORY_Test) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_VARIABLE_MEMORY_Test + * @{ + *****************************************************************************/ + +/// The #BLOCKSIZE definition MUST be 4 as our example for the algorithm to +/// work properly. +#define BLOCKSIZE (4) + +/// The #RT_BLOCK_OVERLAP definition is used to present the size of +/// #iec60730_ram_test_overlap buffer. The variable #iec60730_ram_test_overlap has a size of +/// (2 * #RT_BLOCK_OVERLAP). For the algorithm (March-X/March-C) to work +/// properly this definition MUST take the value 1 as in our example. +#define RT_BLOCK_OVERLAP (1) + +/// The definition of #RT_BLOCKSIZE is taken from the definition of #BLOCKSIZE +/// and #RT_BLOCK_OVERLAP. +#define RT_BLOCKSIZE (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1)) + +/// The #BACKGROUND definition is background used to testing. In our sample, +/// value 0x00000000uL is used value for background. Of course, we can define +/// another value. We recommend using definition like ours (0x00000000uL) because +/// it accurately describes the steps of the March-X/March-C algorithm +/// described above. +#ifndef BACKGROUND +#define BACKGROUND ((uint32_t) 0x00000000uL) +#endif + +/** @} (end addtogroup IEC60730_VARIABLE_MEMORY_Test) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_SAFE_STATE + * @{ + * The Safe State function must be written by the OEM to configure the + * system to prevent any potential negative effects from occurring. GPIOs and + * communications channels must be configured appropriately. + * + * Once any configuration is complete, the function loops to restart the watchdog. + * This prevents any resets until the end-user power-cycles the device. + * + *****************************************************************************/ + +/**************************************************************************/ /** + * public IEC60730 Safe State + * + * @param failure Enum with the failing test, can be preserved for debug. + * See \link #sl_iec60730_test_failure_t sl_iec60730_test_failure_t \endlink + * + * @return Never. + * + * When a validation failure is detected, the Safe State function is + * executed to prevent further system failures. + * @note This is an example; an OEM must fully implement this according + * to their system needs. + *****************************************************************************/ +void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure); +/** @} (end addtogroup IEC60730_SAFE_STATE) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_PROGRAM_COUNTER + * @{ + *****************************************************************************/ + +/// Global variable used by BIST to determine if modules are running +/// frequently enough to meet maximum fault time. +/// +/// sl_iec60730_program_counter_test() resets all bits to 0. Each module +/// then sets its assigned bit once it has completed testing. Before the +/// maximum fault time, sl_iec60730_program_counter_test() verifies that the +/// value is @ref IEC60730_ALL_COMPLETE_BITS. +extern uint16_t sl_iec60730_program_counter_check; + +/// Mask bit used for Variable Memory Checks completed +#define IEC60730_VMC_COMPLETE (1 << 0) +/// Mask bit used for Invariable Memory Checks completed +#define IEC60730_IMC_COMPLETE (1 << 1) +/// Mask bit used for CPU Clocks Checks completed +#define IEC60730_CPU_CLOCKS_COMPLETE (1 << 2) +/// Mask bit used for CPU Register Checks completed +#define IEC60730_CPU_REGS_COMPLETE (1 << 3) +/// Mask bit used for Interrupt Checks completed +#define IEC60730_INTERRUPT_COMPLETE (1 << 4) +/// Mask bit used for GPIO Plausibility Checks completed +#define IEC60730_GPIO_COMPLETE (1 << 5) +/// Mask bit used for Analog Plausibility Checks completed +#define IEC60730_ANALOG_COMPLETE (1 << 6) +/// Mask bit used for Communications Plausibility Checks completed +#define IEC60730_COMMS_COMPLETE (1 << 7) +/// Mask bit used for OEM Check 0 completed +#define IEC60730_OEM0_COMPLETE (1 << 8) +/// Mask bit used for OEM Check 1 completed +#define IEC60730_OEM1_COMPLETE (1 << 9) +/// Mask bit used for OEM Check 2 completed +#define IEC60730_OEM2_COMPLETE (1 << 10) +/// Mask bit used for OEM Check 3 completed +#define IEC60730_OEM3_COMPLETE (1 << 11) +/// Mask bit used for OEM Check 4 completed +#define IEC60730_OEM4_COMPLETE (1 << 12) +/// Mask bit used for OEM Check 5 completed +#define IEC60730_OEM5_COMPLETE (1 << 13) +/// Mask bit used for OEM Check 6 completed +#define IEC60730_OEM6_COMPLETE (1 << 14) +/// Mask bit used for OEM Check 7 completed +#define IEC60730_OEM7_COMPLETE (1 << 15) +/// Mask used for checking that all bits are set +#define IEC60730_ALL_COMPLETE_BITS \ + (IEC60730_VMC_COMPLETE | IEC60730_IMC_COMPLETE \ + | IEC60730_CPU_CLOCKS_COMPLETE | IEC60730_CPU_REGS_COMPLETE \ + | IEC60730_INTERRUPT_COMPLETE | IEC60730_GPIO_COMPLETE \ + | IEC60730_ANALOG_COMPLETE | IEC60730_COMMS_COMPLETE \ + | IEC60730_OEM0_COMPLETE | IEC60730_OEM1_COMPLETE | IEC60730_OEM2_COMPLETE \ + | IEC60730_OEM3_COMPLETE | IEC60730_OEM4_COMPLETE | IEC60730_OEM5_COMPLETE \ + | IEC60730_OEM6_COMPLETE | IEC60730_OEM7_COMPLETE) + +/** @} (end addtogroup IEC60730_PROGRAMME_COUNTER) */ + +/**************************************************************************/ /** + * @addtogroup sl_iec60730_post + * @{ + * sl_iec60730_post() validates system health before starting execution + * of the main loop. + * It must be called first in the main() function. If the result of a test + * routine is a failure, sl_iec60730_safe_state() is called. + *****************************************************************************/ + +/**************************************************************************/ /** + * public IEC60730 Power On Self Test + * + * @returns None. If validation fails function never returns. If validation + * passes, function returns. + * + * Each module is tested, and if a failure is detected sl_iec60730_safe_state() + * is called. + *****************************************************************************/ +void sl_iec60730_post(void); +/** @} (end addtogroup sl_iec60730_post) */ + +/**************************************************************************/ /** + * @addtogroup sl_iec60730_bist + * @{ + * sl_iec60730_bist() confirms correct operation of the device during + * main loop execution. If a module validation fails, sl_iec60730_safe_state() + * is called. + * + * Longer functions such as variable and non-variable memory checks + * have critical sections that disable interrupts. To minimize disruption + * to interrupt service routines, these functions break up validation + * into smaller pieces. This allows pending interrupts to be + * serviced while validating. + * + * OEM code must call #sl_iec60730_safety_check_error_occur to + * set #iec60730_safety_check to one of the failure conditions in #sl_iec60730_test_failure_t + * if the code determines a failure has occurred. This can be used for + * communications channels or to trigger SafeState entry due to a failure within an interrupt. + * + * The validation time for the full memory varies between + * devices depending on the size of memory available, and how frequent + * sl_iec60730_bist() is called by the main loop. For details see + * @ref bist_frequency. + * + * Periodic BIST execution is shown in \link bist_flowchart Figure 1\endlink + * + * @anchor bist_flowchart + * @image html BIST_flowchart.png "Figure 1 Flow chart of Periodic BIST execution" + *****************************************************************************/ + +/// typedef struct used to relay +/// and remember status as bit field is type of local variable #iec60730_safety_check save +/// IEC60730 safety code error. When a failure is detected, function +/// #sl_iec60730_safety_check_error_occur is called by OEM and +/// interrupt check functions to set #iec60730_safety_check to type of sl_iec60730_test_failure_t. +typedef struct { + uint32_t error; + uint8_t number_error; +} sl_iec60730_safety_check_t; + +/**************************************************************************/ /** + * public IEC60730 save error to variable #iec60730_safety_check + * + * @param failure Enum with the failing test, can be preserved for debug. + * + * @returns None. + * + * Called by OEM and interrupt check functions to set #iec60730_safety_check + * to #SL_IEC60730_TEST_FAILED. + *****************************************************************************/ +void sl_iec60730_safety_check_error_occur(sl_iec60730_test_failure_t failure); + +/**************************************************************************/ /** + * public IEC60730 reset value local #iec60730_safety_check + * + * @returns None + * + * Called by OEM when wanting to reset local variable value #iec60730_safety_check + * which containing the errors that occurred and the number of errors + *****************************************************************************/ +void sl_iec60730_safety_check_reset_error(void); + +/**************************************************************************/ /** + * public IEC60730 return value variable #iec60730_safety_check + * + * @returns pointer type sl_iec60730_safety_check_t point to variable containing + * the errors that occurred and the number of errors + * + * Called by OEM in sl_iec60730_safe_state functions to get value #iec60730_safety_check, + * so OEM can get all #SL_IEC60730_TEST_FAILED occur + *****************************************************************************/ +sl_iec60730_safety_check_t* sl_iec60730_safety_check_get_error(void); + +/**************************************************************************/ /** + * public IEC60730 Built In Self Test + * + * + * @returns None. If validation fails function never returns. If validation + * passes, function returns. + * + * Each module is tested, and if a failure is detected sl_iec60730_safe_state() + * is called. If a test failure occurs outside this function (such as comms), + * called function #sl_iec60730_safety_check_error_occur set #iec60730_safety_check + * to #SL_IEC60730_TEST_FAILED. + *****************************************************************************/ +void sl_iec60730_bist(void); +/** @} (end addtogroup sl_iec60730_bist) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_WDOG_Test + * @{ + *****************************************************************************/ + +/**************************************************************************/ /** + * public IEC60730 Watchdog Restart + * + * @returns None. + * + * This function abstracts the differences between the EFR32 family watchdog + * timers. OEMs can call it during long duration executions to restart + * the watchdog timer. + *****************************************************************************/ +void sl_iec60730_restart_watchdogs(void); + +/** @} (end addtogroup IEC60730_WDOG_Test) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_SYSTEM_CLOCK_Test + * @{ + *****************************************************************************/ + +/// Enable/disable switch for system timer test +typedef enum { + SL_IEC60730_TIMER_TEST_DISABLE = 0, ///< timer tests will not execute + SL_IEC60730_TIMER_TEST_ENABLE = 1, ///< timer tests will execute +} sl_iec60730_timer_test_control_t; + +/// OEMs use the defines SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ and SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE +/// in the config file to define the expected tolerance and clock frequency +/// of executions for each test clock tick included in a project. +/// OEM code need to disable ISR-based timer test execution when +/// in safe states. +/// This local variable allows OEM code to test when events occur. +/// static uint16_t sl_iec60730_number_test_timer_tick; +/// Provides the expected ratio of system clock to test clock ticks +/// Allows OEM code to run tests using timer tick. +/// Must be defined as system clock (faster clock) / test clock (slower clock). +/// The ratio value cannot exceed 0xFFFF. +/// +/// This local variable allows customers to stop ISR-based tests +/// when code enters a safe state where BIST is not being called because the +/// code is not safety critical. Tests whose execution is gated by this +/// value are the system clock test, the interrupt plausibility +/// test, and the BIST execution frequency test. +/// static uint8_t sl_iec60730_timer_test_control +/// +/// This local variable allows customers to know the number of times +/// the function sl_iec60730_test_clock_tick is called, used for customers testing +/// static uint16_t sl_iec60730_number_test_timer_tick + +/**************************************************************************/ /** + * public IEC60730 System Clock Tick + * + * @returns None. + * + * This function increments a system clock counter #sl_iec60730_sys_clock_count, + * which is compared to a test clock counter as part of the system clock frequency check. + * It should be called in the timer interrupt service routine designated as the system + * clock timer in oem_iec60730_timer.c. + *****************************************************************************/ +void sl_iec60730_sys_clock_count_tick(void); + +/**************************************************************************/ /** + * public IEC60730 Test Clock Tick + * + * @returns None. + * + * This function increments a test clock counter. The function executes + * all interrupt service routine-based IEC60730 tests, including the system + * clock frequency check. It should be called in the timer interrupt + * service routine designated as the test clock timer in oem_iec60730_timer.c. + *****************************************************************************/ +void sl_iec60730_test_clock_tick(void); + +/**************************************************************************/ /** + * public IEC60730 Initialize iec60730 timer tick variables + * + * @returns None. + * + * This function should be called within the #sl_iec60730_test_clock_tick + * callback. During the initialization of the test clock timers, this + * function resets the internal test clock and system clock tick variables + * to known reset states. + *****************************************************************************/ +void sl_iec60730_sys_clock_count_reset(void); + +/** @} (end addtogroup IEC60730_SYSTEM_CLOCK_Test) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_IRQ_Test + * @{ + *****************************************************************************/ + +// The maximum number of interrupted users that can be used for testing. +// The param passed to the init function sl_iec60730_irq_init must have a size value +// smaller than this value +#define IEC60730_MAX_IRQ_CHECK 32 + +/// OEMs use this structure to define the expected min and max number +/// of executions for each interrupt included in a project. +typedef struct { + SL_IEC60730_IRQ_TYPE_VARIABLE + min; ///< Minimum expected executions of ISR. Can be 0-255, must be less than or equal to max. + SL_IEC60730_IRQ_TYPE_VARIABLE + max; ///< Maximum executed executions of ISR. Can be 0-255, must be greater than or equal to min +} sl_iec60730_irq_execution_bounds_t; + +/// Struct contains information about the IRQ number and +/// the location of the failed IRQ in the order of the OEM array +// registered to check. +typedef struct { + uint32_t irq_fail; + uint8_t num_irq_fail; +} sl_iec60730_irq_fail_t; + +/// Struct contains a pointer variable point to the number of execution interrupts and +/// the boundary of each interrupt count variable +/// OEMs use this structure to init value +/// Defines IEC60730_IRQ_NUM_CHECK_FREQ_BOUNDS using for number of interrupt entries in sl_iec60730_irq_check +/// Defines SL_IEC60730_IRQ_TYPE_VARIABLE using for set type variable #irq_count +/// This count is used by the test to step through each entry in +/// #irq_bounds to determine if the count for each interrupt +/// exceeds expected min/max bounds. OEM code is responsible for +/// incrementing the element of this array corresponding to the IRQ described +/// by the corresponding element in #irq_bounds. The +/// incrementing instruction should only be placed inside the IRQ referred +/// to by the element. The element will be reset to 0 by the interrupt +/// plausibility check executing in #sl_iec60730_test_clock_tick. +/// Defines expected interrupt min/max boundaries for plausibility testing +/// +/// This OEM-defined structure defines the expected minimum and maximum +/// number of executions for every test clock period. The interrupt +/// plausibility test, which executes at the end of a test clock period, +/// compares the number of ISR executions for each ISR as defined in the +/// #irq_count array. A count outside the defined bounds results +/// in a safe state entry. +typedef struct { + volatile SL_IEC60730_IRQ_TYPE_VARIABLE* irq_count; + const sl_iec60730_irq_execution_bounds_t* irq_bounds; + uint8_t size; +}sl_iec60730_irq_cfg_t; +/** @} (end addtogroup IEC60730_IRQ_Test) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_INVARIABLE_MEMORY_Test + * @{ + *****************************************************************************/ + +// Enter ATOMIC section. +#define SL_IEC60370_ENTER_ATOMIC() CORE_ENTER_ATOMIC() +// Exit ATOMIC section. +#define SL_IEC60370_EXIT_ATOMIC() CORE_EXIT_ATOMIC() +// Allocate storage for PRIMASK or BASEPRI value +#define SL_IEC60370_DECLARE_IRQ_STATE CORE_DECLARE_IRQ_STATE; + +// Enter ATOMIC section of IMC Post +#define SL_IEC60730_IMC_POST_ENTER_ATOMIC() \ + CORE_DECLARE_IRQ_STATE; \ + CORE_ENTER_ATOMIC() + +// Exit ATOMIC section of VMC Post +#define SL_IEC60730_IMC_POST_EXIT_ATOMIC() CORE_EXIT_ATOMIC() + +// Enter ATOMIC section of IMC Bist +#define SL_IEC60730_IMC_BIST_ENTER_ATOMIC() \ + CORE_DECLARE_IRQ_STATE; \ + CORE_ENTER_ATOMIC() + +// Exit ATOMIC section of VMC Bist +#define SL_IEC60730_IMC_BIST_EXIT_ATOMIC() CORE_EXIT_ATOMIC() + +#define SL_IEC60730_CRC_INIT(crc, init) GPCRC_Init(crc, init) +#define SL_IEC60730_CRC_RESET(crc) GPCRC_Reset(crc) +#define SL_IEC60730_CRC_START(crc) GPCRC_Start(crc) +#define SL_IEC60730_CRC_INPUTU32(crc, d) GPCRC_InputU32(crc, d) +#define SL_IEC60730_CRC_INPUTU16(crc, d) GPCRC_InputU16(crc, d) +#define SL_IEC60730_CRC_INPUTU8(crc, d) GPCRC_InputU8(crc, d) +#define SL_IEC60730_CRC_DATA_READ(crc) GPCRC_DataRead(crc) +#define SL_IEC60730_CRC_DATA_READ_BIT_REVERSED(crc) GPCRC_DataReadBitReversed(crc) +#define SL_IEC60730_CRC_DATA_READ_BYTE_REVERSED(crc) GPCRC_DataReadByteReversed(crc) + +// CRC +typedef GPCRC_TypeDef sl_iec60730_crc_typedef; +typedef GPCRC_Init_TypeDef sl_iec60730_crc_init_typedef; + +/// The way to read CRC value when using function #sl_iec60730_update_crc_with_data_buffer +typedef uint8_t sl_iec60730_read_type_t; +enum { + SL_IEC60730_IMC_DATA_READ = 0, ///< use function GPCRC_DataRead to read CRC + SL_IEC60730_IMC_DATA_READ_BIT_REVERSED = + 1, ///< use function GPCRC_DataReadBitReversed to read CRC + SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED = + 2, ///< use function GPCRC_DataReadByteReversed to read CRC +}; + +/// This structure is used as configuration for IMC testing, that holds GPCRC Register +typedef struct { + sl_iec60730_crc_typedef *gpcrc; ///< GPCRC Register +} sl_iec60730_imc_params_t; + +/// This structure is used as configuration for CRC Buffer calculation. +/// It used when using function #sl_iec60730_update_crc_with_data_buffer +/// @note: struct #CRC_INIT_TypeDef defined in header file oem_iec60730.h +typedef struct { +#if (SL_IEC60730_CRC_USE_SW_ENABLE == 0) + sl_iec60730_imc_params_t hal; ///< struct #sl_iec60730_imc_params_t that contain GPCRC Register + sl_iec60730_crc_init_typedef init; ///< CRC initialization structure. + sl_iec60730_read_type_t readType; ///< The way to read calculated CRC value +#endif /* SL_IEC60730_CRC_USE_SW_ENABLE */ + sl_iec60730_crc_t xorOut; ///< XOR with calculated CRC value +} sl_iec60730_update_crc_params_t; + +/// This structure is used as configuration for IMC testing +typedef struct { + uint32_t *start; ///< Start address of RAM to check + uint32_t *end; ///< End address of RAM to check +} sl_iec60730_imc_test_region_t; + +/// This structure is used as multiple test regions for IMC testing +typedef struct { + const sl_iec60730_imc_test_region_t *region; + uint8_t number_of_test_regions; ///< Number of test regions +} sl_iec60730_imc_test_multiple_regions_t; + +#ifdef DOXYGEN +/// This macro is the default of GPCRC Register. +/// * Default #SL_IEC60730_DEFAULT_GPRC is GPCRC (also GPCRC_S). +/// * If the #SL_IEC60730_NON_SECURE_ENABLE is enable, #SL_IEC60730_DEFAULT_GPRC is GPCRC_NS. +#define SL_IEC60730_DEFAULT_GPRC +#else +#ifndef SL_IEC60730_DEFAULT_GPRC +#if (_SILICON_LABS_32B_SERIES == 2) +#if ((defined SL_IEC60730_NON_SECURE_ENABLE) || (!defined(SL_TRUSTZONE_SECURE))) +#define SL_IEC60730_DEFAULT_GPRC GPCRC_NS +#else +#define SL_IEC60730_DEFAULT_GPRC GPCRC +#endif +#else // (_SILICON_LABS_32B_SERIES == 2) +#define SL_IEC60730_DEFAULT_GPRC GPCRC +#endif // (_SILICON_LABS_32B_SERIES == 2) +#endif // !SL_IEC60730_DEFAULT_GPRC +#endif // DOXYGEN + +/// This macro is the sample test buffer used for testing CRC algorithm. This +/// value is used in development phase. User DOES NOT take care this definition. +#define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST "123456789" + +#ifdef DOXYGEN +/// This macro is the initial value used for CRC calculations. +/// User DOES NOT change this value +/// * CRC-16: 0x0000 (SW) CRC-32: 0xFFFFFFFFuL (SW) +/// * CRC-16: 0xFFFF (HW) CRC-32: 0xFFFFFFFFuL (HW) +#define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE + +/// This macro is the value that will XOR with calculated CRC value to get CRC +/// output value. User DOES NOT change this value +/// * CRC-16: 0x0000 (SW) CRC-32: 0xFFFFFFFFuL (SW) +/// * CRC-16: 0x0000 (HW) CRC-32: 0xFFFFFFFFuL (HW) +#define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT + +/// This macro is the expected CRC value with input buffer that equal to +/// "123456789". These value are only used in development phase. User DOES NOT +/// take care this definition. +/// * CRC-16: 0x29B1 CRC-32: 0xCBF43926 +#define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT + +/// This macro is the default value of struct #sl_iec60730_update_crc_params_t. User DOES NOT +/// change this value +#define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT + +#else + +#if (SL_IEC60730_CRC_USE_SW_ENABLE == 1) +#if (SL_IEC60730_USE_CRC_32_ENABLE == 1) +#define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE +#define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0xFFFFFFFFuL) +#define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0xCBF43926) +#define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT { SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT } +#else /* !SL_IEC60730_USE_CRC_32_ENABLE */ +#define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE +#define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0x0000) +#define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0x31C3) +#define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT { SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT } +#endif /* SL_IEC60730_USE_CRC_32_ENABLE */ +#else /* !SL_IEC60730_CRC_USE_SW_ENABLE */ +#if (SL_IEC60730_USE_CRC_32_ENABLE == 1) +#define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE +#define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0xFFFFFFFFuL) +#define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0xCBF43926) +#define SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT \ + { \ + 0x04C11DB7UL, \ + SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE, \ + false, \ + false, \ + false, \ + false, \ + true, \ + } + +#define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT \ + { { SL_IEC60730_DEFAULT_GPRC }, \ + SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT, \ + SL_IEC60730_IMC_DATA_READ, \ + SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT } +#else /* !SL_IEC60730_USE_CRC_32_ENABLE */ +#define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE +#define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0x0000) +#define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0x31C3) +#define SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT \ + { \ + 0x1021UL, \ + SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE, \ + false, \ + true, \ + false, \ + false, \ + true, \ + } +#define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT \ + { { SL_IEC60730_DEFAULT_GPRC }, \ + SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT, \ + SL_IEC60730_IMC_DATA_READ_BIT_REVERSED, \ + SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT } +#endif /* SL_IEC60730_USE_CRC_32_ENABLE */ +#endif /* SL_IEC60730_CRC_USE_SW_ENABLE */ + +#endif // DOXYGEN + +/**************************************************************************/ /** + * public IEC60730 Invariable Memory Check (IMC) Init + * + * @param params input parameter of struct #sl_iec60730_imc_params_t form + * + * @return void + * + * Performs a initialization of global variables and hardware configuration in + * case hardware support. + *****************************************************************************/ +void sl_iec60730_imc_init(sl_iec60730_imc_params_t *params, sl_iec60730_imc_test_multiple_regions_t *test_config); + +/**************************************************************************/ /** + * public IEC60730 Update CRC git pull with Data Buffer + * + * @param params input parameter of struct #sl_iec60730_update_crc_params_t form + * @param crc The CRC to be updated. The initial value of crc is also initial + * value of CRC calculation. + * @param buffer A contiguous array of 1-byte values to be used to update the CRC. + * @param size The number of bytes stored in the buffer. + * + * @returns #sl_iec60730_test_result_t. + * * If test fails, returns #SL_IEC60730_TEST_FAILED; + * * Otherwise, return #SL_IEC60730_TEST_PASSED. + * + * This routine takes a CRC and updates it using a buffer of one or more + * bytes of data. For details on the CRC polynomial used, see + * @ref imc_hardware_architecture + *****************************************************************************/ +sl_iec60730_test_result_t +sl_iec60730_update_crc_with_data_buffer(sl_iec60730_update_crc_params_t *params, + sl_iec60730_crc_t *crc, + uint8_t *buffer, + uint32_t size); + +/** @} (end addtogroup IEC60730_INVARIABLE_MEMORY_Test) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_VARIABLE_MEMORY_Test + * @{ + *****************************************************************************/ + +// Enter ATOMIC section of VMC Post +#define SL_IEC60730_VMC_POST_ENTER_CRITICAL() \ + CORE_DECLARE_IRQ_STATE; \ + CORE_ENTER_CRITICAL() + +// Exit ATOMIC section of VMC Post +#define SL_IEC60730_VMC_POST_EXIT_CRITICAL() CORE_EXIT_CRITICAL() + +// Enter ATOMIC section of VMC Bist +#define SL_IEC60730_VMC_BIST_ENTER_CRITICAL() \ + CORE_DECLARE_IRQ_STATE; \ + CORE_ENTER_CRITICAL() + +// Exit ATOMIC section of VMC Bist +#define SL_IEC60730_VMC_BIST_EXIT_CRITICAL() CORE_EXIT_CRITICAL() + +/// This structure is used as configuration for VMC testing +typedef struct { + uint32_t *start; ///< Start address of RAM to check + uint32_t *end; ///< End address of RAM to check +} sl_iec60730_vmc_test_region_t; + +/// This structure is used as multiple test regions for VMC testing +typedef struct { + const sl_iec60730_vmc_test_region_t *region; + uint8_t number_of_test_regions; ///< Number of test regions +} sl_iec60730_vmc_test_multiple_regions_t; + +/**************************************************************************/ /** + * public IEC60730 Variable Memory Check (VMC) Initialize + * + * @param params input parameter of struct #sl_iec60730_vmc_test_multiple_regions_t form + * + * @return void + * + * Performs a initialization of global variables. This function SHOULD call + * before calling #sl_iec60730_vmc_bist + *****************************************************************************/ +void sl_iec60730_vmc_init(sl_iec60730_vmc_test_multiple_regions_t *test_config); + +/** @} (end addtogroup IEC60730_VARIABLE_MEMORY_Test) */ + +#if (_SILICON_LABS_32B_SERIES == 2) +// Write to backup ram module +// buram_inst: Pointer to BURAM instance +// idx: BURAM Reg index +// val: write value +#define SL_IEC60730_BURAM_WRITE(buram_inst, idx, val) \ + do { \ + buram_inst->RET[idx].REG = val; \ + } while (0) + +// Read from backup ram module +// buram_inst: Pointer to BURAM instance +// idx: BURAM Reg index +#define SL_IEC60730_BURAM_READ(buram_inst, idx) (buram_inst->RET[idx].REG) +#endif + +/** @} (end addtogroup efr32_iec60730) */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* SL_IEC60730_H */ diff --git a/lib/inc/sl_iec60730_board.h b/lib/inc/sl_iec60730_board.h new file mode 100644 index 00000000..aeea78e2 --- /dev/null +++ b/lib/inc/sl_iec60730_board.h @@ -0,0 +1,110 @@ +/***************************************************************************/ /** + * @file iec60730_board + * @brief Internal definitions + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_BOARD_H +#define SL_IEC60730_BOARD_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +// Standard libraries +#include +#include +#include + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_INVARIABLE_MEMORY_Test + * @{ + *****************************************************************************/ + +/* Invariable Memory */ +extern uint32_t flash_start; + +/// The #SL_IEC60730_ROM_START definition describes the start address of Flash for CRC +/// calculation. This definition MUST be alignment of #SL_IEC60730_FLASH_BLOCK and can be +/// changed by user so that the value DOES NOT exceed the end address of Flash +/// (the #SL_IEC60730_ROM_END definition). Otherwise, #sl_iec60730_imc_post and #sl_iec60730_imc_bist +/// return #SL_IEC60730_TEST_FAILED. The default value of the #SL_IEC60730_ROM_START can be found in +/// sl_iec60730.h file. +/// +/// In case you change value of this definition then you SHOULD change the 5th +/// parameter of the script \ref gcc_crcXY when running the Post Build. +/// +/// In our example, we use the variable flash_start provided by the linker file +/// to simply define the start address of Flash. User can redefine #SL_IEC60730_ROM_START +/// as follows. +/// ``` +/// #define SL_IEC60730_ROM_START ((uint32_t *)(&flash_start)) +/// ``` +#ifndef SL_IEC60730_ROM_END +#define SL_IEC60730_ROM_START ((uint32_t *) (&flash_start)) +#endif + +/// The #SL_IEC60730_ROM_END definition describes the end address of Flash. It is the +/// address of #check_sum variables. In this version, users SHOULD not +/// change this definition. Refer to the example in +/// \ref invariable_memory_check_example_flowchart, to better understand the +/// #SL_IEC60730_ROM_START, and #SL_IEC60730_ROM_END definitions. +#ifndef SL_IEC60730_ROM_END +#define SL_IEC60730_ROM_END ((uint32_t *) (&check_sum)) +#endif + +/** @} (end addtogroup IEC60730_INVARIABLE_MEMORY_Test) */ + +/**************************************************************************/ /** + * @addtogroup IEC60730_VARIABLE_MEMORY_Test + * @{ + *****************************************************************************/ + +/* Variable Memory */ +extern uint32_t classb_start; +extern uint32_t classb_end; +extern uint32_t __StackTop; +extern uint32_t ram_start; +extern uint32_t class_b_limit; + +#if defined(__GNUC__) +extern uint32_t stack_check; +#define STACK_CHECK ((uint32_t *) (&stack_check)) +#elif defined(__ICCARM__) +#pragma section = ".stack_bottom" +#define STACK_CHECK __section_begin(".stack_bottom") +#else // unknown toolchain +#error Unrecognized toolchain in sl_iec60730_toolchain.h +#endif + +#define RAM_START ((uint32_t *) (&ram_start)) +#define RAM_END ((uint32_t *) ((uint32_t) RAM_BACKUP - 1)) +#define RAM_BACKUP ((uint32_t *) (&__StackTop)) + +#define CLASSB_START ((uint32_t *) (&classb_start)) +#define CLASSB_END ((uint32_t *) ((uint32_t) (&class_b_limit) - 1)) + +#define RAMTEST_START CLASSB_START +#define RAMTEST_END CLASSB_END + +/** @} (end addtogroup IEC60730_VARIABLE_MEMORY_Test) */ +/** @} (end addtogroup efr32_iec60730) */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* SL_IEC60730_BOARD_H */ diff --git a/lib/inc/sl_iec60730_comm.h b/lib/inc/sl_iec60730_comm.h new file mode 100644 index 00000000..2c3a1859 --- /dev/null +++ b/lib/inc/sl_iec60730_comm.h @@ -0,0 +1,113 @@ +/***************************************************************************/ /** + * @file + * @brief Comm check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_COMM_H +#define SL_IEC60730_COMM_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_OEM_COMM_Test + * @{ + * @section communications_hardware_architecture Hardware Architecture + * For communications interfaces to be IEC compliant, they must meet + * the following conditions: + * 1. Provide address redundancy, transmitting the sender's unique address + * 2. CRC coverage of transmission bytes + * 3. Scheduled transmission + * + * Each type of hardware-implemented serial interface supported by a + * device must meet the three above communications requirements using + * a combination of hardware features and firmware-implemented support. + * + * For I2C interfaces, the protocol requires that a transaction begin + * with a slave address identifying the intended recipient of the message, which + * meets requirement 1. Each message transferred must end with a 2-byte + * CRC covering all transmitted bytes. Hardware CRC generation is available + * on some devices and a buffer of bytes can generate a CRC using the @ref sl_iec60730_update_crc_with_data_buffer + * provided, which meets requirement #2. Requirement #3 can be met by + * initiating a periodic transaction using the test timer allocated for + * the system clock plausibility check. + * + * A SPI interface meets the requirements above in a way that is similar to + * the I2C interface, except that an address must be included through + * firmware, because the protocol and the hardware do not support a slave + * address inherently. + * + * A UART interface meets requirements similar to a SPI interface, where the + * address must be transmitted through firmware implemented protocol. + * + * @section communications_failure_risks Failure Risks + * + * A disruption of the serial interface signals/clocks could cause a bit error + * or a timing-related issue. This will result in a CRC mismatch when + * the receiver of the message processes the packet, and safe state entrance. + * + * If the device sending status packets to a host gets somehow stuck in such + * a state where it is unable to transmit status packets, the receiver + * expecting periodic packets will enter safe state after a bounded amount + * of time, likely governed by a bist frequency check that determines no + * status packets have been received within a frequency check interval. + * Based on suggested configuration of the bist frequency check period, the + * upper limit for time between reception of a status packet would be + * 1 second. Based on suggested configuration of the test timer, typically + * the status packet will be transmitted once every 100 ms. + * + * All serial interfaces require some amount of port configuration to ensure + * that correct pins are digital inputs and outputs, open drain or push-pull. Without + * these requirements being met, the device will be unable to transmit and receive + * data packets properly, which will result in a safe state entrance by one or + * both of the devices communicating across a serial interface. + * + * @section communications_software_architecture Software Architecture + * + * The library provides a support function sl_iec60730_update_crc_with_data_buffer() + * to generate the CRC of a buffer being transmitted. OEM firmware is + * responsible for interfacing with serial communication hardware to send + * packets that begin with address information to identify the sender + * and end with a 2-byte CRC. + * + * In order to transmit a status packet, the device needs to allocate + * an on-chip timer, or use the test timer already allocated for the + * system clock plausibility check. + * + * Devices receiving status packets rely on a bist frequency check where + * one requirement for the comm plausibility test to have executed successfully + * is the reception of a valid status packet. + * + * \link comm_plausibility_check Figure 1\endlink shows the main components of + * both a receiver and a transmitter of a compliant serial interface. Note that + * received packages are processed by checking for an address and a valid CRC. Additionally, + * a bist frequency check determines whether status packets are being received at an + * acceptable rate. For transmission, all data payloads go through firmware that + * adds required address and CRC information. Additionally, the test timer interrupt + * service routine initiates a periodic transmission of a status packet. + * + * \image html comm_plausibility_check.png "Figure 1 comm plausibility check flowchart" \anchor comm_plausibility_check + *****************************************************************************/ +/** @} (end addtogroup IEC60730_OEM_COMM_Test) */ +/** @} (end addtogroup efr32_iec60730) */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* SL_IEC60730_COMM_H */ diff --git a/lib/inc/sl_iec60730_cpu_registers.h b/lib/inc/sl_iec60730_cpu_registers.h new file mode 100644 index 00000000..1d1bdc31 --- /dev/null +++ b/lib/inc/sl_iec60730_cpu_registers.h @@ -0,0 +1,140 @@ +/***************************************************************************/ /** + * @file + * @brief CPU Registers check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_CPU_REGISTERS_H +#define SL_IEC60730_CPU_REGISTERS_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include "sl_iec60730_internal.h" + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_CPUREG_Test + * @{ + * @section cpureg_hardware_architecture Hardware Architecture + * The CM33 CPU registers include the following registers: + * General-purpose registers: + * • R0-R12 + * Stack pointer registers: + * • MSP + MSPLIM (secure/non-secure) + * • PSP + PSPLIM (secure/non-secure) + * Special registers: + * • APSR • CONTROL (secure/non-secure) + * • PRIMASK (secure/non-secure) + * • FAULTMASK (secure/non-secure) + * • BASEPRI (secure/non-secure) + * Link register: + * • LR + * FPU registers: + * • FPSCR + * • S0 – S31 + * There is a set of tests performed once after the MCU reset and also during + * runtime. + * + * @section cpureg_failure_risks Failure Risks + * The primary risks with the CPU registers are stuck bits and shorted bits. + * The CPU register tests will verify that bits can be set high and low, and + * adjacent bits are not shorted. + * + * @section cpureg_software_architecture Software Architecture + * Because internal CPU registers are being tested, the code must be written + * using assembly language. + * + * The identification of safety errors is ensured by the specific FAIL return + * if some registers have the stuck-at fault. Assess the return value of every + * function. If the value equals the FAIL return, then a jump into the safety + * error handling function should occur. The safety error handling function may + * be specific to the application and it is not a part of the library. The main + * purpose of this function is to put the application into a safe state. + * + * In some special cases, the error is not reported by the FAIL return, because + * it would require the action of a corrupt register. In that case, the function + * waits for reset in an endless loop. The principle of the stuck-at error test + * of the CPU registers is to write and compare two test patterns in every + * register. The content of the register is compared with the constant or with + * the value written into another register that was tested before. Most of the + * time, R0, R1, and R2 are used as auxiliary registers. Patterns are defined + * to check the logical one and logical zero values in all register bits. + * + * Due to the Arm TrustZone support, some core registers are banked between the + * security states. The Secure (S) or Non-Secure (NS) sets of the corresponding + * registers are accessible during execution (depending on the current security + * state). Both register versions are accessible during the S state, but not + * during the NS state. This is the reason why the NXP Safety Library must be + * executed in a secure mode. All of the banked registers are listed above. + * + * For the EFR32 IEC60730 implementation, \link cpu_registers_check_flowchart Figure 1\endlink + * shows the logic flow chart of the CPU registers check during BIST and POST. + * + * \image html cpu_registers_check_flowchart.png "Figure 1 CPU registers check flowchart" \anchor cpu_registers_check_flowchart + * + *****************************************************************************/ + +/**************************************************************************/ /** + * public IEC60730 CPU Registers Built In Self Test + * + * @returns #sl_iec60730_test_result_t + * @returns #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function will do a test of all the CPU core registers in non-secure state + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns(void); + +/**************************************************************************/ /** + * public IEC60730 CPU Registers Built In Self Test + * + * @returns #sl_iec60730_test_result_t + * @returns #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function will do a test of all the CPU core registers in secure state + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s(void); + +/**************************************************************************/ /** + * public IEC60730 CPU Registers Built In Self Test + * + * @returns #sl_iec60730_test_result_t + * @returns #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function will do a test of all the CPU core registers. + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist(void); + +/**************************************************************************/ /** + * public IEC60730 CPU Registers Power On Self Test + * + * @returns #sl_iec60730_test_result_t + * + * This function simply calls the sl_iec60730_cpu_registers_bist() function. + *****************************************************************************/ +sl_iec60730_test_result_t sl_ec60730_cpu_registers_post(void); + +/** @} (end addtogroup IEC60730_CPUREG_Test) */ +/** @} (end addtogroup efr32_iec60730) */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* SL_IEC60730_CPU_REGISTERS_H */ diff --git a/lib/inc/sl_iec60730_internal.h b/lib/inc/sl_iec60730_internal.h new file mode 100644 index 00000000..f89fddc4 --- /dev/null +++ b/lib/inc/sl_iec60730_internal.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file + * @brief Internal definitions + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_INTERNAL_H +#define SL_IEC60730_INTERNAL_H + +// Standard libraries +#include +#include + +// Header files needed for publics +#include "sl_iec60730.h" + +// Header files needed for privates +#include "sl_iec60730_watchdog.h" +#include "sl_iec60730_invariable_memory.h" +#include "sl_iec60730_variable_memory.h" +#include "sl_iec60730_cpu_registers.h" +#include "sl_iec60730_system_clock.h" +#include "sl_iec60730_program_counter.h" +#include "sl_iec60730_irq.h" + +// Disable warnings on unused labels. Labels are used to set breakpoints for +// automated testing. +#if defined(__GNUC__) +#pragma GCC diagnostic ignored "-Wunused-label" +#endif + +#endif /* SL_IEC60730_INTERNAL_H */ diff --git a/lib/inc/sl_iec60730_invariable_memory.h b/lib/inc/sl_iec60730_invariable_memory.h new file mode 100644 index 00000000..7701828b --- /dev/null +++ b/lib/inc/sl_iec60730_invariable_memory.h @@ -0,0 +1,289 @@ +/***************************************************************************/ /** + * @file + * @brief Invariable memory check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_INVARIABLE_MEMORY_H +#define SL_IEC60730_INVARIABLE_MEMORY_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include "sl_iec60730.h" +#include SL_IEC60730_BOARD_HEADER + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_INVARIABLE_MEMORY_Test + * @{ + * @details + * @section imc_hardware_architecture Hardware Architecture + * + * In the current version, the calculation of CRC for Flash is calculated + * starting from the starting address of the Flash (that value can be changed) + * to the end address whose value is specified by the address of the + * #check_sum variable. Currently, the #check_sum variable is set to the end + * address of user code that uses IEC Library. + * + * To test the Flash memory, a Cyclic Redundancy Check (CRC) is computed and + * compared with a value stored in Flash. Any change in the Flash will cause + * the CRC not to match the stored value. + * + * We support multiple calculation modes. These modes are selected by the user. + * User adds definitions to use these modes. Please reference to definitions + * #SL_IEC60730_CRC_DEBUG_ENABLE, #SL_IEC60730_CRC_USE_SW_ENABLE, and #SL_IEC60730_USE_CRC_32_ENABLE for more detail. + * + * @section imc_failure_risks Failure Risks + * As electrically eraseable memories, the primary risk with Flash is losing + * charge. Normal memory concerns such as stuck-at, coupling, and address + * faults may also occur. All these faults will be detected by a CRC across + * the region. Another risk is the hardware CRC module operating + * incorrectly. In this case, the CRC comparison will fail and + * #sl_iec60730_safe_state() will begin. + * + * @section imc_software_architecture Software Architecture + * The Invariable Memory Check (IMC) validates that the Flash memory storing the + * firmware and any persistent configuration information has not been + * corrupted. The IMC calculates a CRC across designated areas to verify + * their contents. + * + * We support calculation CRC by using hardware and software. The default CRC is + * hardware calculation. User CAN use the #SL_IEC60730_CRC_USE_SW_ENABLE definition in case using + * CRC software. + * + * With case CRC software is chosen, the default is calculate CRC-table in + * initialization process. User CAN use the #SL_IEC60730_SW_CRC_TABLE definition in case + * using pre-defined table. + * + * We support both CRC-16 and CRC-32 mode. With CRC-16, the CRC engine is + * configured to use the CRC-16/XMODEM polynominal 0x1021. With CRC-32, the CRC + * engine is configured to use the CRC-32 polynominal 0x04C11DB7. The default is + * CRC-16 mode. In case using CRC-32, user SHOULD define the #SL_IEC60730_USE_CRC_32_ENABLE + * definition. + * + * We also provide scripts named gcc_crc16.sh (for CRC-16 mode) and gcc_crc32.sh + * (for CRC-32 mode) which is used in Post Build process to calculate CRC value + * of the Flash and place this CRC value at the end of user code determined by + * address of #check_sum variable. We WILL call these scripts with the common + * name \ref gcc_crcXY. Don't worry about the gcc prefix, these scripts + * work for both GCC and IAR compiler. To use these scripts, user SHOULD install + * srecord that can be downloaded (.exe) file for Window OS or run command as + * below for Linux OS. + * + * ``` + * $sudo apt install srecord + * ``` + * \anchor gcc_crcXY + * Script @ref gcc_crcXY requires the following parameters + * \param #$1: Name of your project. + * \param #$2: Directory of building. This directory MUST contain *.hex file and + * *.map file. The *.map file MUST contains #check_sum variable. + * \param #$3: Path of srecord. With Linux OS, it SHOULD be blank. With Win OS, + * it SHOULD be the path to install folder of srecord. For example: + * 'C:\srecord-1.64-win32' in Win OS. + * \param #$4: Compiler: GCC or IAR. + * \param #$5: Start address of Flash. + * \param #$6: True for non-secure. False otherwise. + * + * The struct #sl_iec60730_imc_params_t is used to manage hardware configuration of CRC. + * In case using CRC software (define #SL_IEC60730_CRC_USE_SW_ENABLE), you can pass NULL pointer + * to function use this struct. + * + * We use a pair of variables to check intergrity. Using the following macros + * in case you want to work with pair of variables need to be checked intergrity. + * These macros are defined in sl_iec60730.h file. + * + * * #DEC_CLASSB_VARS is used to declare a pair of variables. + * * #EXTERN_DEC_CLASSB_VARS is used to mark pair of variable to be extern. + * * #sl_static_dec_classb_vars is used to declare a static pair of variables. + * * #INV_CLASSB_VAR is used to inverse value of a variable. + * * #INV_CLASSB_PVAR is used to inverse value of a pointer. + * + * Some detail about implementing of IMC and using variables for testing purpose. + * These ariables are also used in the test cases (TC) of the IMC module. + * + * \anchor iec60730_ref_crc + * * Variable \ref iec60730_ref_crc is variable that is stored on (*.classb_ram*) section. + * In case user use definition #SL_IEC60730_CRC_DEBUG_ENABLE for debug purpose, \ref iec60730_ref_crc + * variable is useful for debug purpose. Value of \ref iec60730_ref_crc is calculated in + * #sl_iec60730_imc_post function. This value SHOULD be equal value that stored in + * address of #check_sum. + * + * \anchor iec60730_cur_crc + * * Variable \ref iec60730_cur_crc is variable that stores on (*.classb_ram*) section. + * This variable is CRC calculated value after each function call + * #sl_iec60730_imc_bist. That means this value will be accumulated for each step + * of BIST. After checking all Flash, the final value of \ref iec60730_cur_crc under + * normal conditions, no exception SHOULD be equal to the value stored in Flash. + * + * \anchor iec60730_run_crc + * * Variable \ref iec60730_run_crc is variable that stores on (*.classb_ram*) section. + * This is pointer that point to start address of testing process. In case + * \ref iec60730_run_crc is less than #SL_IEC60730_ROM_END, every time function #sl_iec60730_imc_bist is + * invoked, the value of \ref iec60730_run_crc increases by #SL_IEC60730_FLASH_BLOCK_WORDS. Otherwise, + * calculating \ref iec60730_cur_crc and compare it with value of \ref iec60730_ref_crc or value + * stored in #SL_IEC60730_REF_CRC. + * + * To provide complete definitions of IMC modules, in #SL_IEC60730_BOARD_HEADER file, + * user SHOULD pay attention to the #SL_IEC60730_ROM_START definition. The #STEPS_NUMBER, + * #SL_IEC60730_ROM_SIZE_INWORDS, and #SL_IEC60730_FLASH_BLOCK_WORDS definitions SHOULD use our default + * definitions. The #SL_IEC60730_FLASH_BLOCK, #SL_IEC60730_ROM_END, and #SL_IEC60730_REF_CRC definitions can be + * redefined by the user but SHOULD not be recommended unless the user has + * knowledge of linker and Flash configuration. + * + * Figure 1 describes a Flash with multiple applications on that. These + * applications are named Application 1, Application 2, ..., Application N, and + * Application (N+1). Where Application N is a main application that uses the + * IEC library. + * + * \anchor invariable_memory_check_example_flowchart + * \image html invariable_memory_check_example_flowchart.png "Figure 1 Example of calculating CRC" + * + * The #SL_IEC60730_ROM_START definition can be placed anywhere that guarantees the + * description of #SL_IEC60730_ROM_START. As you can see in Figure 1, it is possible that + * #SL_IEC60730_ROM_START is either #SL_IEC60730_ROM_START (1) or #SL_IEC60730_ROM_START (N). + * + * The #SL_IEC60730_ROM_END definition as described at the address of the variable + * #check_sum. As the linker files is used in our example will be at + * address the end of Application (N). The CRC calculation will go from address + * #SL_IEC60730_ROM_START to #SL_IEC60730_ROM_END. + * + * With #SL_IEC60730_ROM_START (1) we calculate CRC (1) and with #SL_IEC60730_ROM_START (N) we calculate + * CRC (N). The CRC value is calculated and placed at the location of the + * variable #check_sum. Calculating and placing are implemented by script + * \ref gcc_crcXY. + * + * In this example you see that Application (N + 1) is an application that does + * not use the IEC library. Our reference solutions DO NOT support customizing + * #check_sum anywhere in Flash. Therefore, the CRC calculation WILL not + * cover the Flash area of Application (N + 1). + * + * In case the user edits their linker to let the #check_sum variable go + * to any location (of course larger than #SL_IEC60730_ROM_START), the IMC modules WILL + * still work normally. For example, the user adjust the address of + * #check_sum to the end address of Flash of Application (N + 1), then the + * CRC calculation WILL completely cover Application (N + 1). + * + * Function #sl_iec60730_imc_post() checks for all the invariable memory areas have + * been configured. + * + * On BIST, partial memory sections are tested to keep overall BIST test + * time reasonable. Global variables store the current location being tested + * and other information. Each call to #sl_iec60730_imc_bist() it checks + * #SL_IEC60730_INVAR_BLOCKS_PER_BIST. If after the calculation, the CRC does not match the + * expected value #SL_IEC60730_TEST_FAILED is returned. If it does match, the + * global variables are configured for the next CRC entry. If all areas are + * complete, #SL_IEC60730_TEST_PASSED is returned. If all areas are not complete, + * #SL_IEC60730_TEST_IN_PROGRESS is returned. + * + * \anchor invariable_memory_check_post_flowchart + * \image html invariable_memory_check_post_flowchart.png "Figure 2 Flow chart of Invariable Memory Check BIST&POST" + * + *****************************************************************************/ + +#ifdef DOXYGEN + +/// If using #SL_IEC60730_CRC_USE_SW_ENABLE definition then the #SL_IEC60730_SW_CRC_TABLE definition is used for +/// using pre-defined table for calculating. +#define SL_IEC60730_SW_CRC_TABLE + +/// Use this definition in case the user use CRC-32 for calculating the CRC value. +/// The default CRC-16 is used. +#define SL_IEC60730_USE_CRC_32_ENABLE + +/// This macro is the initial value used for CRC calculations. +/// * If the #SL_IEC60730_USE_CRC_32_ENABLE definition is used then #SL_IEC60730_IMC_INIT_VALUE definition +/// SHOULD be 0xFFFFFFFFuL. +/// * Otherwise, the definition SHOULD be 0x0000 +#define SL_IEC60730_IMC_INIT_VALUE + +/// This macro is the value that will XOR with calculated CRC value to get CRC +/// output value. +/// * If the #SL_IEC60730_USE_CRC_32_ENABLE definition is used then #SL_IEC60730_IMC_INIT_VALUE definition +/// SHOULD be 0xFFFFFFFFuL. +/// * Otherwise, the definition SHOULD be 0x0000 +#define SL_IEC60730_IMC_XOROUTPUT + +/// This macro is the default value of struct #CRC_INIT_TypeDef. In our library, +/// The #CRC_INIT_TypeDef struct WILL be #GPCRC_Init_TypeDef struct, a struct +/// is defined for CRC by Silicon Labs. +#define SL_IEC60730_IMC_INIT_DEFAULT + +#else + +#if (SL_IEC60730_USE_CRC_32_ENABLE == 1) +#define SL_IEC60730_IMC_INIT_VALUE (0xFFFFFFFFuL) +#define SL_IEC60730_IMC_XOROUTPUT (0xFFFFFFFFuL) +#define SL_IEC60730_IMC_INIT_DEFAULT \ + { \ + 0x04C11DB7UL, /* CRC32 Polynomial value. */ \ + SL_IEC60730_IMC_INIT_VALUE, /* Initialization value. */ \ + false, /* Byte order is normal. */ \ + false, /* Bit order is not reversed on output. */ \ + false, /* Disable byte mode. */ \ + false, /* Disable automatic initialization on data read. */ \ + true, /* Enable GPCRC. */ \ + } +#else /* !SL_IEC60730_USE_CRC_32_ENABLE */ +#define SL_IEC60730_IMC_INIT_VALUE (0x0000) +#define SL_IEC60730_IMC_XOROUTPUT (0x0000) +#define SL_IEC60730_IMC_INIT_DEFAULT \ + { \ + 0x1021UL, \ + SL_IEC60730_IMC_INIT_VALUE, \ + false, \ + true, \ + false, \ + false, \ + true, \ + } +#endif /* SL_IEC60730_USE_CRC_32_ENABLE */ +#endif // DOXYGEN + +/**************************************************************************/ /** + * public IEC60730 Invariable Memory Check POST + * + * @returns #sl_iec60730_test_result_t. + * * If test fails, returns #SL_IEC60730_TEST_FAILED; + * * Otherwise, return #SL_IEC60730_TEST_PASSED. + * + * Performs a CRC check across all defined memory areas. + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_imc_post(void); + +/**************************************************************************/ /** + * public IEC60730 Invariable Memory Check BIST + * + * @returns #sl_iec60730_test_result_t. + * * If test fails, return #SL_IEC60730_TEST_FAILED; + * * Else if not complete, return #SL_IEC60730_TEST_IN_PROGRESS + * * Otherwise, return #SL_IEC60730_TEST_PASSED. + * + * Performs a CRC check across all defined memory areas. For details + * how #sl_iec60730_imc_bist work, please refer to @ref imc_software_architecture + * + * Requires #sl_iec60730_imc_init to be called first to setup global variables. + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_imc_bist(void); + +/** @} (end addtogroup IEC60730_INVARIABLE_MEMORY_Test) */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* SL_IEC60730_INVARIABLE_MEMORY_H */ diff --git a/lib/inc/sl_iec60730_irq.h b/lib/inc/sl_iec60730_irq.h new file mode 100644 index 00000000..92a52929 --- /dev/null +++ b/lib/inc/sl_iec60730_irq.h @@ -0,0 +1,180 @@ +/***************************************************************************/ /** + * @file + * @brief Interrupt check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_IRQ_H +#define SL_IEC60730_IRQ_H + +#include "sl_iec60730_toolchain.h" +#include +#include "sl_iec60730.h" + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_IRQ_Test + * @{ + * @details The interrupt plausibility test checks that enabled interrupts + * are executing at a frequency that is within expected minimum and maximum + * bounds every test timer period. + * + * OEM firmware is responsible for setting expected minimum and maximum + * bounds for each enabled interrupt in the #iec60730_IRQFreqBounds + * structure. The OEM is also responsible for incrementing the element + * in the #iec60730_IRQExecCount array inside each enabled interrupt. + * In #sl_iec60730_irq_check(), which executes as part of the test timer-driven + * tests of the BIST, this counter array is compared with the defined + * bounds to determine whether each interrupt is operating within safe parameters. + * + * @section irq_hardware_architecture Hardware Architecture + * Most hardware-implemented peripherals in Silicon Labs EFR32 devices + * offer the ability to vector to an interrupt service routine in order + * to quickly respond peripheral-related events and state updates. + * + * In order to vector to an interrupt from executing foreground code, + * hardware pushes the program counter to the stack and vectors to a + * hardware-defined entry in a vector table stored in non-volatile memory + * in a region of Flash. The code of the interrupt service routine is + * either stored directly within this table entry, or stored elsewhere in + * memory and accessed through a jump instruction placed in the vector + * table, depending on the size of the interrupt service routine. + * + * Once the function body of the interrupt service routine has completed + * executing, the program counter is pop from the stack and + * returns to foreground code to continue execution. + * + * Each interrupt has a flag in a register that must be cleared inside the + * interrupt service routine function to signal that the interrupt has been + * processed in firmware. Failure to clear this flag inside the function + * body will result in the hardware immediately vectoring back to + * the interrupt. + * + * @section irq_failure_risks Failure Risks + * It is the OEM's responsibility to accurately estimate the frequency of + * each enabled interrupt in a firmware project. For interrupts that are + * asynchronous and may not execute at all within a test timer period, + * the lower bounds for the interrupt should be set to 0. + * + * It is also the OEM's responsibility to increment values in + * #iec60730_IRQExecCount once and only once per interrupt execution. + * Failure to include this incrementing command will result in an + * interrupt that appears to be executing below minimum defined + * bounds, which will force safe state entry. + * + * The OEM should also be mindful of all hardware-related constraints of + * each interrupt. Failure to clear an interrupt flag inside an interrupt + * service routine will cause the routine to execute repeatedly, + * which will increment an #iec60730_IRQExecCount entry beyond upper bounds + * and cause a safe state entry. + * + * The OEM must also perform a bounds check on the element in + * #iec60730_IRQExecCount being incremented to ensure that the counter + * does not exceed the upper bounds defined by its data type and overflow + * back to 0. Failure to perform this bounds check could have the effect + * of creating a passing IRQ plausibility test when the interrupt is + * actually running outside of defined limits. + * + * @section irq_software_architecture Software Architecture + * The interrupt plausibility test function relies on an array of counters + * called #iec60730_IRQExecCount, stored in volatile memory and an array + * of struct #sl_iec60730_irq_execution_bounds_t found in non-volatile memory + * and called #iec60730_IRQFreqBounds. OEM firmware increments bytes in + * #iec60730_IRQExecCount during execution of each enabled interrupt + * service routine. When the test timer interrupt occurs, + * #sl_iec60730_irq_check() executes. Inside this function, firmware compares + * the count values to the bound values, and sets #iec60730_safety_check + * by called function #sl_iec60730_safety_check_error_occur to #SL_IEC60730_INTERRUPT_FAIL + * if a count exceeds either the minimum or maximum bounds. + * The next execution of the BIST routine will detect the #SL_IEC60730_TEST_FAILED + * state and enter safe state. A flowchart of this functionality + * is shown in \link irq_plausibility_test_flowchart Figure 1\endlink. + * + * For more information on configuration of the test timer, please see + * @ref IEC60730_SYSTEM_CLOCK_Test. + * + * \anchor irq_plausibility_test_flowchart\ + * \image html irq_plausibility_test_flowchart.png "Figure 1 Flow chart of interrupt plausibility check" + * + *****************************************************************************/ + +/**************************************************************************/ /** + * public IEC60730 Reset IRQ Failed Results + * + * @returns None. + * + * This function reset irq failed results + *****************************************************************************/ +void sl_iec60730_irq_reset_fail_result(void); + +/**************************************************************************/ /** + * public IEC60730 Get The Location Of The Failed IRQ + * + * @returns pointer type sl_iec60730_irq_fail_t point to variable containing + * the errors that occurred and the number of errors + * + * This function return a pointer that point to iec60730_irq_fail_result + * which capacity which contains index location iec60730_irq_count failed. + *****************************************************************************/ +sl_iec60730_irq_fail_t* sl_iec60730_get_irq_index_failed(void); + +/**************************************************************************/ /** + * public IEC60730 Interrupt Init + * + * @param irq_cfg_ptr input pointer point to value config by user + * + * @param irq_cfg_ptr input pointer point to value config irq + * + * @returns None. + * + * This function set #iec60730_IRQFreqBounds min and max and set iec60730_IRQExecCount + *****************************************************************************/ +void sl_iec60730_irq_init(sl_iec60730_irq_cfg_t* irq_cfg_ptr); + +/**************************************************************************/ /** + * public IEC60730 Interrupt Reset Counter + * + * @returns None. + * + * This function reset counter #iec60730_IRQExecCount to 0 + *****************************************************************************/ +void sl_iec60730_irq_reset_counter(void); + +/**************************************************************************/ /** + * public IEC60730 Interrupt Plausibility Check + * + * @returns None. + * + * This function compares each entry in #iec60730_IRQExecCount + * with its corresponding bounds defined in #iec60730_IRQFreqBounds. If the + * entry is found to exceed the defined bounds, #iec60730_safety_check is + * set to #SL_IEC60730_INTERRUPT_FAIL. + * Otherwise no action is taken. The function ends by setting + * #IEC60730_INTERRUPT_COMPLETE in #sl_iec60730_program_counter_check. + *****************************************************************************/ +void sl_iec60730_irq_check(void); + +/** @} (end addtogroup IEC60730_IRQ_Test) */ +/** @} (end addtogroup efr32_iec60730) */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* SL_IEC60730_IRQ_H */ diff --git a/lib/inc/sl_iec60730_library_documentation.h b/lib/inc/sl_iec60730_library_documentation.h new file mode 100644 index 00000000..7f3c2c42 --- /dev/null +++ b/lib/inc/sl_iec60730_library_documentation.h @@ -0,0 +1,642 @@ +/***************************************************************************/ /** + * @file + * @brief Library Documentation + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +// This file is a centralized location for documentation on OEM functions. +// It contains no source. + +/**************************************************************************/ /** + * @defgroup efr32_iec60730 EFR32 IEC60730 Library + * @brief EFR32 IEC60730 Library + * @{ + * @section introduction Introduction + * The IEC60730 library for EFR32 provides a basic implementation required to + * support the necessary requirements found in Table H.1 in the IEC60730 + * specification. It includes all the Power On Self Test (POST) functions + * executed when a device is first powered on, as well as Built In Self Test + * (BIST) functions that are called periodically to ensure correct operation. + * Certain portions of the requirements require a detailed understanding of + * the system under development. Callback functions must be completed by + * the developer to guarantee meeting the full specification. These include a + * Safe State function used when validation detects an anomaly, properly + * implemented communications channels (redundancy, error detection, periodic + * communications), and Plausibility functions to validate system state (internal + * variables and inputs/outputs). + * + * @section license License + * @ref iec60730_license_agreement + * + * @section release_notes Release Notes + * @ref iec60730_release_notes + * + * @section certificate IEC60730 Certificate + * The final certificate and detailed report shall be provided for the specific + * devices. + * + * @section oem_testing OEM Testing + * + * Once OEMs have completed integrating their system with the IEC60730 Library, + * they will need to certify their device with a qualified certification house. + * + * \subsection families_sec Supported Families + * + * This library supports all EFR32 devices listed in the + * Selector Guide. + * + * @section software_requirements Software Requirements + * The IEC 60730 library dependencies: + * -# CMSIS package. + * -# Silicon Labs Devices header files. + * + * User could get dependency source files from the GSDK suite (platform) or from /Lib/Device/<...>/Include. + * The dependency source files on IEC60730 project repository supports only version GSDK V3.x. + * To get the latest version of GSDK, please refer + * Gecko SDK. + * + * @note The IEC 60730 library support extension for GSDK using + * Simplicity Studio 5. + * + * Details on the validation test setup used internally by Silicon Labs can + * be found at \link IEC60730_VERIFICATION IEC60730 Test Specification\endlink. + * Test results can be found inside each module. + * + * Currently tested on Windows and Linux platforms. + * + * @subsection installation_steps Building the IEC60730 Demo + * + * To use Simplicity Studio to generate and build a demo IEC60730 and OEM Customization, refer to the IEC60730 Safety Library Integration Manual in the Doc folder for more details. + * + * See \link OEM_customization OEM Customization \endlink for details on + * customizing the project and adding custom code. + * + * @warning While source code is provided for the IEC60730 library, + * Silicon Labs recommends using the certified library file. + * When applying for certification, the certified library file will + * reduce the certification time. + * + * @note The Simplicity Studio debugger will allow breakpoints and code tracing + * into the IEC60730 library, except for sl_iec60730_cpu_registers_bist(), since + * that test requires special compiler commands. To set breakpoints or + * trace inside sl_iec60730_cpu_registers_bist(), set a breakpoint inside + * sl_iec60730_bist() at the line with sl_iec60730_cpu_registers_bist(), and + * single-step into the function. + * + * @section doxygen Generate document + * + * Using Doxygen to generate HTML documentation, the documents will be generated in `Doc/html/EFR32_ICE60730_Libraries` + * + *```sh + $ sudo apt-get install doxygen + $ doxygen qat.doxygen + *``` + * + * @section pre-commit Coding convention tool + * + * @subsection features Features + * - Automatically fixes end-of-file issues. + * - Removes trailing whitespace from lines. + * - Identifies and suggests fixes for common spelling errors using codespell. + * - Formats code according to specified clang-format rules base on Silabs's coding standard. + * - Checks code for potential errors and style issues using cppcheck. + * + * @subsection installation Installation + * + *```sh + $ pip install pre-commit + $ sudo apt install clang-format clang-tidy cppcheck + *``` + * + * @subsection run Run + * + *```sh + $ pre-commit install + $ pre-commit run --all-files + *``` + * + * @section compilers Compiler specifications + * The C compilers: + * -# GNU GCC V12.2 + * -# IAR EW for ARM V9.2 + * + * @section tool_chains Tools specification + * Test frame work tools: + * -# Python V3.11 + * + * Simplicity Studio Commander + * -# Simplicity Commander version 1v16p8b1613 + * + * Support check coding convention by pre-commit + * -# pre-commit 3.5.0 + * -# clang-format version 19.0.0 + * -# Cppcheck 1.90 + * + * Source code control: + * -# GIT V2.39 + * -# JIRA V8.22.2 + * + * @section system_architecture_spec System Architecture + * + * This library has two primary components. The + * \link sl_iec60730_post POST component\endlink is run immediately after + * power on, validating system state before entering the main + * execution loop. + * + * The \link sl_iec60730_bist BIST component\endlink is run periodically in the + * main execution loop. + * + * Validation for IEC 60730 also requires external communications validation. + * Every OEM application has unique external communications requirements. + * This library provides an example UART communications library that meets + * IEC 60730 requirements. OEMs must adapt their communications + * to IEC60730 requirements. + * + * oem_iec60730_functions.c includes functions and variables that OEMs must + * modify for their system. + * + * This EFR32 IEC60730 library fulfills the requirements for a Class B device. + * \link iec60730_table1 Table 1\endlink lists the firmware requirements + * that must be met by controls. This is taken from Table 1 in IEC 60730, + * including new entries from Annex H. + * + * \link iec60730_tableh1 Table 2\endlink lists the firmware-specific + * requirements for software based controls taken from Table H.1 in IEC 60730. + * + *
    Table 1 Requirements that must be met by controls
    \anchor iec60730_table1 + * Information | Clause | Method [1] | Notes specific to this library [2] + * ------------|--------|------------|----------------------------------- + * 36 Limits of activating quantity | 11.3.2 H.11.4.15 H.17.14 H.18.1.5 H.27.1.1 H.28 | X | Not Applicable + * 52 Minimum parameters of any heat dissipator | 14 | X | Not Applicable + * 53 Type of output waveform if other than sinusoidal | H.25 | X | Not Applicable + * 54 Details of the leakage current waveform produced after failure of the basic insulation | H.27 | X | Not Applicable + * 55 Relevant parameters of electronic devices unlikely to fail | H.27 | X | Not Applicable + * 56 Type of output waveform produced after failure of an electronic device | H.27 | X | Not Applicable + * 57 The effect on controlled outputs after electronic circuit component failure | H.27 | X | To be provided by OEM + * 58b The effect on controlled outputs after a failure to operate as a result of tests | H.26.2 H.26.15 | X | Not Applicable + * 66 Software sequence documentation | H.11.12.2.9 | D | Covered by this documentation + * 67 Program documentation | H.11.12.2.9 H.11.12.2.12 | D | Covered by this documentation + * 68 Software fault analysis | H.11.12 H.27.1.1.4 | D | Covered by this documentation + * 69 Software class(es) and structure | H.11.12.2 H.11.12.3 H.27.1.2.2.1 H.27.1.2.3.1 | D | Covered by this documentation + * 70 Analytical measure and fault/error control techniques employed | H.11.12.1.2 | D | Covered by this documentation + * 71 Software fault/error detection times for controls | H.2.17.10 | X | Provided by OEM timer ticks. Example uses 1 second. + * 72 Control responses in case of detected fault/error | H.11.12.2.7 | X | Must be provided by OEM + * 73 Controls subjected to a second fault analysis and declared condition as a result of the second fault | H.27.1.2.3 | X | Must be provided by OEM + * 74. External load and emission control measures to be used for test purposes | H.23.1.1 | X | Not Applicable + * 91 Fault reaction time |H.2.23.2 H.27.1.2.2.2 H.27.1.2.2.3 H.27.1.2.3.2 H.27.1.2.3.3 H.27.1.2.4.2 H.27.1.2.4.3 | X | Provided by OEM timer ticks. Example uses 1 second. + * 92 Class or classes of control functions | H.6.18 H.27.1.2.2 H.27.1.2.3 | D | This library is for Class B control functions + * 93 Maximum number of reset actions within a time period | H.11.12.4.3.6 H.11.12.4.3.4 | X | Not Applicable + * 94 Number of remote reset actions | H.17.1.4.3 | X | Not Applicable + * + * 1. Methods (See IEC60730 documentation for additional details): + * - C - Marking + * - D - Hard copy + * - E - Documentation on electronic media, internal or external + * - X - Declaration on materials provided to certification body + * 2. OEMs are still responsible for providing any documentation for software outside the IEC60730 library. + * + *
    Table 2 Measures to address software fault/errors
    \anchor iec60730_tableh1 + * + * Component | Measure Used | Notes + * ----------|-------------|----- + * \link IEC60730_CPUREG_Test 1.1 Registers\endlink | Periodic self-test using a Static memory test | Provided by library + * 1.2 Instruction decoding and execution | None | Not required for Class B + * \link IEC60730_PROGRAMME_COUNTER 1.3 Program counter\endlink / \link IEC60730_WDOG_Test Watchdog\endlink | Logical monitoring of the program sequence. Code execution sets flag that is periodically checked. Watchdog timer prevents runaway program execution. | Provided by library, see example for integration sample + * 1.4 Addressing | None | Not required for Class B + * 1.5 Data paths Instruction decoding | None | Not required for Class B + * \link IEC60730_IRQ_Test 2 Interrupt handling and execution\endlink | Time-slot monitoring(upper and lower limit) | Provided by library, see example for integration sample + * \link IEC60730_SYSTEM_CLOCK_Test 3 Clock\endlink | Reciprocal Comparison. Use separate oscillator to monitor SYSCLK - Calculate ratio and determine range based on accuracy | Provided by library, see example for integration sample + * \link IEC60730_INVARIABLE_MEMORY_Test 4.1 Invariable memory\endlink | Periodic 16 bit CRC | Provided by library, see example for integration sample + * \link IEC60730_VARIABLE_MEMORY_Test 4.2 Variable memory\endlink | Periodic static memory test using March-C & stack guard. | Provided by library, see example for integration sample + * 4.3 Addressing (variable and invariable memory) | | 4.1 and 4.2 provide coverage for this component + * 5.1 Internal data path | | 4.1 and 4.2 provide coverage for this component + * 5.2 Internal addressing | | 4.1 and 4.2 provide coverage for this component + * \link IEC60730_OEM_COMM_Test 6 External Communication \endlink | | Provided by OEM, UART example in library + * \link IEC60730_OEM_COMM_Test 6.1 External Communications - Data \endlink | 16 bit CRC | CRC check provided by library + * \link IEC60730_OEM_COMM_Test 6.2 External Communications - Addressing \endlink | 16 bit CRC including the address | OEM must include in protocol proper address verification - see UART example in library + * \link IEC60730_OEM_COMM_Test 6.3 External Communications - Timing (UART example)\endlink | Scheduled transmission | OEM must include in protocol proper timing measures - see UART example in library + * \link IEC60730_GPIO_PLAUSIBILTY_Test 7 Input/output periphery / 7.1 Digital I/O\endlink | Plausibility check | Provided by OEM + * \link IEC60730_ADC_PLAUSIBILTY_Test 7.2 Analog I/O / 7.2.1 A/D and D/A converter\endlink | Plausibility check | Provided by OEM + * \link IEC60730_ADC_PLAUSIBILTY_Test 7.2.2 Analog multiplexer\endlink| Plausibility check | Provided by OEM + * 8 Monitoring device and comparators | None | Not needed for class B + * 9 Custom chips | None | Not Applicable + * + * \section test_specifications Test Specifications + * \link IEC60730_VERIFICATION Test Specifications\endlink provide detailed + * specifications for verification testing. + * + * @section coding_standard Coding Standard + * The IEC60730 library follows @ref iec60730_coding_standard + * + * @section support Support + * Customers with support questions can begin with the + * Silicon Labs support page. + * Customers can also post their questions to the Silicon Labs + * Community Forums + * for help from other Silicon Labs customers. + * + * If a customer needs help with a complex issue, create a Support Request on + * the support page and the Silicon Labs MCU Applications Engineering + * team will assist with duplicating the issue, and understanding + * the root cause. + * + * @section update Change Control and Update process + * The IEC60730 library is a complex software project, and will need support + * and updates in the future. This section provides details on how Silicon + * Labs will help customers with their implementation, and release updates + * to the IEC60730 library. + * + * Once an issue is confirmed to be a problem with the IEC60730 Library, + * a JIRA ticket must be filed within the Developer Services Team project + * (DS) with a title starting with "IEC60730: ". Each issue is + * assessed by the IEC60730 team lead and given a severity, with the + * options being: + * - Blocker (Customer cannot move forward/is lines-down) + * - Critical (Customer can proceed, but with major inconvenience/no workaround) + * - High (Customer can proceed with minor inconvenience/workaround) + * - Low (Customer can proceed with no inconvenience, no workaround necessary). + * Information about the impact of the change on the library is also added + * to the ticket, along with an estimated schedule to implement the change. + * + * The issue is assigned to the Developer Services Team manager. At their + * discretion, they will call a meeting with the IEC60730 Change Control + * Board (DS team lead) to discuss open JIRA tickets against the IEC60730 Library. + * At the conclusion of the meeting, each JIRA ticket will be voted on to + * fix or no-fix. Each ticket will be updated to reflect its + * status. Work will be assigned to appropriate Firmware team members. + * Work will be placed in a separate branch from Main within the Git + * Version Control System. + * + * Once the updated firmware is complete, the developer will check in + * that firmware into the Silicon Labs Git version control system and + * create a Code Review JIRA ticket. The review developer will + * review the code and ensure it follows the Coding Standard. + * If possible, a Git Pull Request will be created between the two revisions + * of the source code. Any comments from the review developer will be + * added to a Git branch of the IEC60730 project. The Git commit ID will be + * attached to the Code Review JIRA ticket. The developer will address + * the comments from the code review, noting any declined changes with + * reasons behind the decline. + * + * The IEC60730 library version will be incremented. Any issues fixed will + * have an automated test created to duplicate the issue with the previous + * library, and prove the issue is no longer present in the new library. + * The developer must also verify the Python code is operating correctly + * when the original tests are run. + * + * If an issue cannot be validated using the automated testing + * infrastructure, a special waiver must be granted by the Change Control + * Board and instructions for manual testing included in documentation for the + * affected module. A full automated and manual validation cycle must pass + * before the updated library is ready for release. This is done by kicking + * off a Daily Firmware build job in the Jenkins build & test environment + * using the Git branch as the source. + * + * Once the Daily Firmware build job and any necessary manual tests + * verify correct firmware operation, the branch will be merged back into + * the master branch. A Release Build is kicked off in Jenkins using the + * new release version and the master branch. + * + * The MCU FW Team Manager must sign off on the validation results via JIRA. + * + * Once the library completes validation, the updated library with a + * change list is submitted to the certification house for re-certification. + * After the library completes re-certification, an Errata document listing + * all the issues will be created/updated with the new fix/no-fix issues, + * and any workarounds. + * + * The new library, along with the Errata document and updated Readme file with + * the new version number, will be uploaded to the Silicon Labs downloads site + * and available through Simplicity Studio. + * + * @section OEM_customization OEM Customization and Integration + * An OEM must be aware of these items when integrating the IEC60730 library + * into their final product. + * + * @warning Any certification image must use the Release source files of the IEC60730 + * library. + * + * @subsection Safe_state_integration Safe state + * OEMs must customize the sl_iec60730_safe_state() function according to their + * system configuration . Safe State must configure any external signals and + * communications channels such that the system will not cause damage or + * unexpected operation. The function may attempt external notification, + * however it must be done cautiously to prevent further deterioration + * of the system. + * + * @subsection POST_integration POST + * sl_iec60730_post() is normally called after system initialization is complete, + * but before beginning primary operating mode. It includes a Watchdog test + * that resets the system to verify Watchdog operation. OEMs must expect + * initialization code before sl_iec60730_post() to execute twice. Initialization + * code execution time must be short enough that the watchdog can be refreshed + * in sl_iec60730_post() before expiration. + * + * @subsection BIST_integration BIST + * sl_iec60730_bist() is executed as part of the main system loop., typically at + * the end. Systems with long execution times will require manual watchdog + * refresh, and adjustment of sl_iec60730_test_clock_tick() frequency to ensure + * sl_iec60730_program_counter_test() passes, or calling sl_iec60730_bist() at + * multiple locations in the main system loop. + * + * When in safety-critical code where POST and BIST are executing, interrupts + * should remain globally enabled. If interrupts must be disabled for a + * critical section of firmware, the critical section should follow best + * practices and be as short as possible. The time in the critical section + * must be shorter than the fastest clock timer interrupt (usually 10ms), or + * #iec60730_timerTestControl must be used to disable the timer tests. + * + * @subsection Programme_counter_integration Program counter + * #IEC60730_GPIO_COMPLETE and #IEC60730_ANALOG_COMPLETE must be set by OEM + * validation code. Usage examples are provided. + * + * OEMs can use #IEC60730_OEM0_COMPLETE - #IEC60730_OEM7_COMPLETE OR'ed into + * #sl_iec60730_program_counter_check to verify their own test algorithms are + * executing at least once per every call to sl_iec60730_program_counter_test(). + * Unused flags must be set to 1. + * + * @warning sl_iec60730_bist() can take several ms to execute, see + * \link resources_used Execution Time \endlink for details. If the + * execution time is longer than the system can tolerate, customize the + * sl_iec60730_bist() routine or split it up into individual calls in + * the main system loop. + * + * @subsection Watchdog_integration Watchdog + * User should setup the internal watchdog as user's design expectation. + * + * When in a long latency loop, use sl_iec60730_restart_watchdogs() to prevent a + * watchdog reset. Minimize the time in the loop as much as possible. + * + * @warning Call sl_iec60730_restart_watchdogs() to re-enable + * the watchdog once the flash erase has completed. During the flash erase + * time, any control signals must remain in a safe configuration. + * \link IEC60730_WDOG_Test Watchdog Test \endlink provides details. + * + * @subsection IRQ_integration IRQ + * OEMs must update #iec60730_IRQFreqBounds for their system use. Interrupt + * service routines must include code for incrementing + * #iec60730_IRQExecCount; for an example, see oem_iec60730_timer.c. OEMs + * must choose and enumerate the index values for #iec60730_IRQExecCount. + * + * @warning Interrupts are disabled during portions of the + * \link IEC60730_INVARIABLE_MEMORY_Test + * Invariable Memory Test \endlink and \link IEC60730_VARIABLE_MEMORY_Test + * Variable Memory Test \endlink. Interrupts must be tolerant of the latency + * times these tests introduce to servicing an interrupt. + * + * @subsection Clock_integration Clock + * OEMs can modify the default System Clock and Timer Clock configurations + * in oem_iec60730_timer.c according to their system requirements. + * + * @subsection Invariable_memory_integration Invariable memory + * OEMs must modify the #iec60730_Invariable structure to align with their + * memory usage. #iec60730_Invar_Crc or similar must be modified to store + * the CRC values. + * + * During the CRC generation for a block of memory, the CPU is halted and + * unable to respond to interrupt requests. + * + * For a typical system, the amount of invariable memory checked will + * determine the fault reaction time. + * + * @subsection Variable_memory_integration Variable memory + * More safety critical variables should be placed in IDATA, since IDATA is + * fully validated every call to iec60730_VmcBist(). + * + * If not all of XDATA is used, #iec60730_XdataNumPartitions can be decreased + * to cover only the used portions of memory. This will decrease the time to + * check the used XDATA space. + * + * @subsection external_communications_integration External communications + * OEMs must write their safety-related communications protocol according to + * the IEC60730 requirements. The demo provides an example protocol test for + * UART 0. + * + * @subsection GPIO_integration GPIO + * iec60730_GpioInit() must be replaced by OEMs with GPIO configuration for + * their system usage. + * + * iec60730_GpioCheck() must be customized by OEMs to reflect their system + * usage, and expected/plausible values for their configuration. + * + * OEMs must manually add this check to their main system loop where + * appropriate. It is not run as part of sl_iec60730_bist(). + * + * @subsection ADC_integration ADC + * iec60730_AnalogCheck() must be customized by OEMs to reflect their system + * usage, and expected/plausible values for their configuration. + * + * OEMs must manually add this check to their main system loop where + * appropriate. It is not run as part of sl_iec60730_bist(). + * + * @subsection ADC_mux_integration ADC mux + * OEMs must manually add this check to their main system loop where + * appropriate. It is not run as part of sl_iec60730_bist(). For more details + * see iec60730_AnalogCheck(). + * + * @subsection additional_oem_tests Additional OEM safety checks + * OEMs can implement additional safety checks and call sl_iec60730_safe_state() + * with custom #SL_IEC60730_OEM_FAIL_1 settings. + * + * \subsection resources_used Resources Used + * The sizes given below are for the example programs demo provided by extension with the SDK. + * + * OEM devices that do not use a communications channel(~400 bytes), or + * have simple plausilbity functions (~200 bytes), will use less space. + * + * OEMs can use these numbers for planning purposes, but must verify against + * their implementation. + * + * + * @subsection bist_frequency BIST call frequency + * All tests must complete execution before sl_iec60730_program_counter_test() + * is called. The example code calls sl_iec60730_program_counter_test() once per + * second. + * + * The test requiring the most iterations to complete is the Invariable + * Memory Test. With large memories, it may require frequent calls to + * sl_iec60730_bist() to guarantee all the invariable memory areas are checked + * before sl_iec60730_program_counter_test() is called. This table assumes the + * largest invariable memory size for each device, and a check across + * the whole memory area. + * + * The number of blocks per BIST call #SL_IEC60730_INVAR_BLOCKS_PER_BIST is chosen to + * get the time between BIST calls close to the watchdog timeout. + * + * Number of sl_iec60730_bist() calls/second = Size of memory / (Size of CRC block * number of blocks per BIST call) + * + * Maximum time between BIST calls= 1 / (Number of sl_iec60730_bist calls) + * + * + * Checking against smaller areas increase the time between BIST calls. + * + * @subsection fault_reaction_time Fault Reaction Time + * The default Fault Reaction Time for the IEC60730 library is 1 second. + * Because of the BIST call frequency configuration above, a full invariable + * memory test can take 1 second to run on the largest memory EFR32 devices. + * The \ref Programme_counter_integration check runs once per second by + * default, and all completion bits must be set. OEMs can modify the + * \ref Clock_integration according to their needs to increase the + * Fault Reaction Time. + * + * @subsection oem_time OEM time + * BIST execution time will vary depending upon the state of the invariable + * memory tests. These numbers are measured assuming the invariable memory + * test is working on an area with the maximum remainder. + * + * The lower of watchdog timeout or BIST call frequency determine how much + * available processing time is left for OEM functions. + * + * OEM processing time = lowest( watchdog time, time between BIST calls) - measured BIST execution time + * + * OEM time % = OEM processing time / (lowest( watchdog time, time between BIST calls) + * + * These numbers assume a full invariable memory check against a maximum size EFR32 + * device. + * + * + * OEM time is the maximum time for non-IEC60730 functions in the main + * while(1) loop. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_EXTRA EFR32 IEC60730 Library Extra Files + * @{ + * @brief Extra files for the EFR32 IEC Library. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup IEC60730_EXTRA + * @{ + * @defgroup iec60730_coding_standard Silicon Labs Coding Standard + * @{ + * @brief Silicon Labs Coding Standard + * @} + * @defgroup iec60730_release_notes Release Notes + * @{ + * @brief Release Notes for the IEC60730 Library + * @} + * @defgroup iec60730_license_agreement Silicon Labs Software License Agreement + * @{ + * @brief License Agreement for the IEC60730 Library + * @} + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup sl_iec60730_post POST + * @{ + * @brief Power On Self Test - Executed once during power up. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup sl_iec60730_bist BIST + * @{ + * @brief Built In Self Test - Executed periodically. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_PROGRAMME_COUNTER Programme Counter Check + * @{ + * @brief Verifies all tests have completed on time. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_WDOG_Test Watchdog Test + * @{ + * @brief Monitors CPU execution. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_IRQ_Test IRQ Test + * @{ + * @brief Verifies interrupt frequency is within bounds. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_GPIO_PLAUSIBILTY_Test GPIO Plausibility Test + * @{ + * @brief Verifies GPIOs work properly. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_ADC_PLAUSIBILTY_Test ADC Plausibility Test + * @{ + * @brief Verifies analog components work properly. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_INVARIABLE_MEMORY_Test Invariable Memory Check + * @{ + * @brief Verifies contents of flash memory. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_VARIABLE_MEMORY_Test Variable Memory Check + * @{ + * @brief Verifies RAM is working correctly. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_CPUREG_Test CPU Register Check + * @{ + * @brief Verifies CPU registers are working correctly. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_SYSTEM_CLOCK_Test System clock plausibility test + * @{ + * @brief Verifies that system clocks are within expected frequencies. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_OEM_COMM_Test OEM External Communications Example using UART + * @{ + * @brief Verifies communication channel is operating as expected. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_SAFE_STATE Safe State + * @{ + * @brief When incorrect behavior is detected, this state prevents further execution. + * @} + *****************************************************************************/ + +/**************************************************************************/ /** + * @defgroup IEC60730_VERIFICATION IEC60730 Test Specification + * @{ + * @brief Automated tests for validating correct firmware operation. + * @} + *****************************************************************************/ + +/** @} (end addtogroup efr32_iec60730) */ diff --git a/lib/inc/sl_iec60730_program_counter.h b/lib/inc/sl_iec60730_program_counter.h new file mode 100644 index 00000000..4aebef54 --- /dev/null +++ b/lib/inc/sl_iec60730_program_counter.h @@ -0,0 +1,89 @@ +/***************************************************************************/ /** + * @file sl_iec60730_program_counter.h + * @brief Program Counter check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_PROGRAMME_COUNTER_H +#define SL_IEC60730_PROGRAMME_COUNTER_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include "sl_iec60730_internal.h" + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_PROGRAM_COUNTER + * @{ + * @details + * The frequency of test execution must be checked to ensure that tests + * are being run in time. + * + * @section programme_counter_hardware_architecture Hardware Architecture + * The programme counter check requires that each BIST test set a bit in a + * bit array whenever an iteration of testing completes. + * The programme counter check uses the test clock timer configured + * in the system clock plausibility test to determine when to execute. See + * @ref IEC60730_SYSTEM_CLOCK_Test for system clock plausibility details. + * The programme counter test executes at 1/10 the frequency of the system clock + * plausibility test. Best practice recommendations and example OEM code + * configure the system clock plausibility test to run at 100 ms intervals, + * resulting in BIST frequency check intervals of 1s. + * + * Bits within #sl_iec60730_program_counter_check are set as tests pass. OEMs can determine + * how fast their tests are running by checking this variable. If a bit is still + * clear, that test has not completed. + * + * @section programme_counter_suggested_OEM_configuration Suggested OEM Configuration + * OEM configuration of this test is dependent on system clock plausibility + * configuration. Please see @ref IEC60730_SYSTEM_CLOCK_Test for details. + * + * @section programme_counter_failure_risks Failure Risks + * The library's BIST execution frequency test will force entry into + * safe state if a period of time defined by 1/10 test clock test frequency + * passes without all BIST tests completing their test execution. It is + * the OEM's responsibility to call the BIST in the main() loop with enough + * frequency to execute all tests within the required time period. + * + * If the system clock test's test timer is not configured as expected, so that + * 1/10 test clock frequency is unexpectedly fast, the system may fall into safe state + * because tests have not had enough time to execute to completion. + * + * @section programme_counter_software_architecture Software Architecture + * + * For the IEC60730 implementation, \link programme_counter_check Figure 1\endlink + * + * \image html programme_counter_check.png "Figure 1 Programme Counter Check Flowchart" \anchor programme_counter_check + * + *****************************************************************************/ + +/// private IEC60730 Programme Counter Test +/// +/// Checks flags in #sl_iec60730_program_counter_check set by each BIST test to determine if BIST is +/// executing within a specified period. +/// @return #sl_iec60730_test_result_t. If test fails, returns #SL_IEC60730_TEST_FAILED; +/// otherwise #SL_IEC60730_TEST_PASSED. +void sl_iec60730_program_counter_test(void); + +/** @} (end addtogroup IEC60730_PROGRAMME_COUNTER) */ +/** @} (end addtogroup efr32_iec60730) */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* SL_IEC60730_PROGRAMME_COUNTER_H */ diff --git a/lib/inc/sl_iec60730_system_clock.h b/lib/inc/sl_iec60730_system_clock.h new file mode 100644 index 00000000..42b44091 --- /dev/null +++ b/lib/inc/sl_iec60730_system_clock.h @@ -0,0 +1,154 @@ +/***************************************************************************/ /** + * @file + * @brief Clock check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_SYSTEM_CLOCK_H +#define SL_IEC60730_SYSTEM_CLOCK_H + +#include +#include "sl_iec60730_toolchain.h" + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_SYSTEM_CLOCK_Test + * @{ + * @details + * For IEC 60730, a plausibility check must be performed to check that the + * system clock is running at a frequency with an expected bounds. This + * check requires that the system clock frequency be compared against a second, + * independent clock's frequency (test clock). + * + * @section system_clock_hardware_architecture Hardware Architecture + * EFR32 family devices provide a high frequency internal oscillator as well + * as a low frequency internal oscillator. The devices also provide timers + * modules that can be configured to use either oscillator as a clock + * source. These peripherals can be configured to vector code to interrupt + * service routines when the counter incremented by the peripheral and clocked + * by one of the clock sources meets certain criteria. + * + * For timers, the criteria is a counter overflow event. The frequency of + * this overflow is defined by a reload value configured in firmware that hardware + * automatically loads into the timer's counter upon overflow. + * + * Some timers offer a special mode where the timer's clock source is gated + * by a falling edge of the low frequency oscillator. In these cases, the + * system clock can be used as the clock source, and the number of timer counter + * ticks captured during the low frequency oscillator's logic low phase expresses + * the relationship between the two clocks. + * + * The define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ holds the ratio value between system clock timer interrupt period and + * test clock timer interrupt period, this value is used to compare with the system clock counter. The ratio value is divided by slow + * timer period (test clock timer interrupt period) and fast timer period (system clock timer interrupt period). + * + * The tolerance of test (OEM set value of the define, example: SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE) is typical (+/-) 10%-49% of the SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ. + * + * @section system_clock_suggested_OEM_configuration Suggested OEM Configuration + * Not every EFR32 device offers the same types of timers and clock sources. For this + * reason, the optimal resource usage on each device family varies. The following + * chart offers a suggested configuration for each EFR32 family. + * Firmware examples configure system and test timers as in \link system_clock_test_suggested_oem_configuration_chart Table 1\endlink + * + *
    Table 1 Suggested system and test timer configuration on EFR32 device families
    \anchor system_clock_test_suggested_oem_configuration_chart + * + *
    EFR32 device System timer Test timer + *
    Series 1
    • TIMERn clocked by system clock HFCLK which is the master clock of the + * core and other peripherals.
      • + *
    • Special case: If the ADC module is clocked by AUXHFRCO then OEM could + * use IRQCheck to measure clock indirectly via sample rate interrupt.
    + *
    • LETIMER0 clocked by internal fixed clock + * (LFRCO or ULFRCO) with configurable prescaler.
    + *
    Series 2
    • TIMERn clocked by one of the HFXO, HFRCODPLL, HFRCOEM23, FSRCO clock + * sources that could be used to test for CPU, high speed peripherals + * (SYSCLK), Radio module (HFXO) and IADC module (HFRCOEM23).
      • + *
    • WDOGn clocked by HCLK when system clock (SYSCLK) is selected as CLKIN0
    + *
    • LETIMERn clocked by internal fixed clock + * (LFRCO or ULFRCO).
    + *
    + * + * @section system_clock_failure_risks Failure Risks + * The library's system clock plausibility test will force entry into + * safe state if the frequency relationship between the system clock and + * the test clock exceeds upper and lower bounds. + * + * The library examines the relationship between the two clocks using calls + * that the OEM must place in OEM-defined timer interrupt service routines. + * Code examples for each EFR32 device provide drop-in firmware solutions for + * OEMs for timer initialization and ISR source code. OEMs must ensure that + * timer ISRs are able to be serviced promptly during operation. + * + * Additionally, the OEM is responsible for leaving the system clock at + * a constant and defined operating frequency throughout all OEM firmware. + * + * Finally, the OEM is responsible for setting sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_DISABLE + * within safety-critical code by calling function sl_iec60730_sys_clock_test_disable. This value is only used in cases + * where the system is executing non-safety-critical code, where the BIST routine is also not being called. + * When returning to normal operation, clear all interrupt counters in + * iec60730_IRQExecCount, reset the timer clock tick and system clock tick timers, + * and set sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_ENABLE. + * + * @section system_clock_software_architecture Software Architecture + * + * \link iec60730_wdog_info Table 1\endlink + * + * For the EFR32 IEC60730 implementation, \link BIST_system_clock_frequency Figure 1\endlink + * shows the logic flow chart of the system clock frequency check during BIST. The test + * executes in the test timer interrupt, which runs as foreground calls to OEM functions and + * the foreground BIST test continuously execute. + * + * \image html BIST_system_clock_frequency.png "Figure 1 System clock frequency check flowchart" \anchor BIST_system_clock_frequency + * + *****************************************************************************/ + +/**************************************************************************/ /** + * public IEC60730 Get Timer Tick + * + * @returns sl_iec60730_number_test_timer_tick. + * + * Function get value sl_iec60730_number_test_timer_tick, used for OEM testing + *****************************************************************************/ +uint16_t sl_iec60730_get_number_test_timer_tick(void); + +/**************************************************************************/ /** + * public IEC60730 Enable Timer Test + * + * @returns None. + * + * Function set sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_ENABLE. + *****************************************************************************/ +void sl_iec60730_sys_clock_test_enable(void); + +/**************************************************************************/ /** + * public IEC60730 Disable Timer Test + * + * @returns None. + * + * Function set sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_DISABLE. + *****************************************************************************/ +void sl_iec60730_sys_clock_test_disable(void); + +/** @} (end addtogroup IEC60730_SYSTEM_CLOCK_Test) */ +/** @} (end addtogroup efr32_iec60730) */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* SL_IEC60730_SYSTEM_CLOCK_H */ diff --git a/lib/inc/sl_iec60730_toolchain.h b/lib/inc/sl_iec60730_toolchain.h new file mode 100644 index 00000000..45448475 --- /dev/null +++ b/lib/inc/sl_iec60730_toolchain.h @@ -0,0 +1,144 @@ +/***************************************************************************/ /** + * @file + * @brief Compiler abstraction + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_TOOLCHAIN_H +#define SL_IEC60730_TOOLCHAIN_H + +/**************************************************************************/ /** + * + * @addtogroup toolchain_group Toolchain Abstraction + * + * @brief Macros for toolchain abstraction. + * + * # Introduction # + * + * This header file contains macros that are used to provide an abstraction + * for toolchain use in source code. The EFR32 compiler requires C-language + * extensions in order to fully use features of the EFR32 architecture. All + * compilers for EFR32 implement a set of extensions but use different names + * and ways of implementing those extensions. This header file provides + * macros that are defined for each supported toolchain and can be used in + * the source code. This allows the source code to use EFR32 extensions and + * remain independent of which toolchain is used for compilation. + * + * ## Prior Toolchain Abstraction Header File ## + * + * ## Supported Toolchains ## + * + * - GNU GCC + * - IAR ICCARM + * + * @{ + * + *****************************************************************************/ + +// Make sure there is a NULL defined if the toolchain does not provide it. +#ifndef NULL +#define NULL ((void *) 0) +#endif + +// ------------------------------- +// GCC for ARM Cortex-M +// +#if defined(__GNUC__) + +// __NOP should be declared in cmsis header core_cmInstr.h +// extern void __NOP(void); +/// Macro to insert a no-operation (NOP) instruction. +#define NOP() __NOP() + +// No init at startup +#define IEC60730_VAR_NO_INIT __attribute__((section(".noinit"))) +// No clear at startup +#define IEC60730_DATA_NO_CLEAR __attribute__((section(".ram_no_clear"))) + +/// The #__STACK_BOTTOM macro is used to define +/// (.stack_bottom) section. +#ifndef __STACK_BOTTOM +#define __STACK_BOTTOM __attribute__((section(".stack_bottom"))) +#endif /* __STACK_BOTTOM */ + +/// The #__CLASSB_RAM macro is used to define +/// (.classb_ram) section. +#ifndef __CLASSB_RAM +#define __CLASSB_RAM __attribute__((section(".classb_ram"))) +#endif /* __CLASSB_RAM */ + +/// The #__RT_BUF macro is used to define +/// (.rt_buf) section. +#ifndef __RT_BUF +#define __RT_BUF __attribute__((section(".rt_buf"))) +#endif /* __RT_BUF */ + +/// The #__OVERLAP macro is used to define +/// (.overlap) section. +#ifndef __OVERLAP +#define __OVERLAP __attribute__((section(".overlap"))) +#endif /* __OVERLAP */ + +#define LB_ASM __asm__ +#define LB_XSTR(x) XSTR(x:) + +// ------------------------------- +// IAR for ARM Cortex-M +// +#elif defined(__ICCARM__) + +// __NOP should be declared in cmsis header core_cmInstr.h +// extern void __NOP(void); +/// Macro to insert a no-operation (NOP) instruction. +#define NOP() __NOP() + +// No init at startup +#define IEC60730_VAR_NO_INIT __attribute__((section(".noinit"))) +// No clear at startup +#define IEC60730_DATA_NO_CLEAR __attribute__((section(".ram_no_clear"))) + +/// The #__STACK_BOTTOM macro is used to define +/// (.stack_bottom) section. +#ifndef __STACK_BOTTOM +#define __STACK_BOTTOM __attribute__((section(".stack_bottom"))) +#endif /* __STACK_BOTTOM */ + +/// The #__CLASSB_RAM macro is used to define +/// (.classb_ram) section. +#ifndef __CLASSB_RAM +#define __CLASSB_RAM __attribute__((section(".classb_ram"))) +#endif /* __CLASSB_RAM */ + +/// The #__RT_BUF macro is used to define +/// (.rt_buf) section. +#ifndef __RT_BUF +#define __RT_BUF __attribute__((section(".rt_buf"))) +#endif /* __RT_BUF */ + +/// The #__OVERLAP macro is used to define +/// (.overlap) section. +#ifndef __OVERLAP +#define __OVERLAP __attribute__((section(".overlap"))) +#endif /* __OVERLAP */ + +#define LB_ASM __asm +#define LB_XSTR(x) XSTR(x::) + +#else // unknown toolchain +#error Unrecognized toolchain in sl_iec60730_toolchain.h +#endif + +/** @} */ + +#endif /* SL_IEC60730_TOOLCHAIN_H */ diff --git a/lib/inc/sl_iec60730_variable_memory.h b/lib/inc/sl_iec60730_variable_memory.h new file mode 100644 index 00000000..7c8edafc --- /dev/null +++ b/lib/inc/sl_iec60730_variable_memory.h @@ -0,0 +1,251 @@ +/***************************************************************************/ /** + * @file + * @brief Variable memory check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_VARIABLE_MEMORY_H +#define SL_IEC60730_VARIABLE_MEMORY_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include "sl_iec60730.h" +#include SL_IEC60730_BOARD_HEADER + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_VARIABLE_MEMORY_Test + * @{ + * @details + * @section vmc_hardware_architecture Hardware Architecture + * Depending on using the definitation, the testing process takes place through + * different steps and different region RAM memory. + * + * @section vmc_failure_risks Failure Risks + * + * There are several potential sources of failure in the variable memory hardware + * * Stuck bits that do not change (either 0 or 1) + * * Coupled bits that change based on a neighbor + * * Address lines that couple or disconnect, activating an incorrect location + * * Single Event Upset (SEU) that toggle a bit or bits without permanent + * damage to the memory hardware + * + * The variable memory check can detect the first three types of errors using + * the March-X algorithm. The VMC is based on a word-oriented March-X algorithm + * from . + * + * SEU failures are not detected in a class B control, and would + * require class C level of validation to detect - data duplication, error- + * detecting-and-correcting memory, etc. A failure of this type will be detected + * once it causes a secondary failure such as missing a watchdog restart or + * incorrect clock frequency. + * + * @section vmc_software_architecture Software Architecture + * + * As show in @ref vmc_software_architecture, there are 3 test processes happen. + * In the case POST testing, the algorithm used is March-C. In the BIST testing, + * the algorithm used is March-X by default. If user DOES NOT use the #SL_IEC60730_USE_MARCHX_ENABLE + * definition, the algorithm used is March-C. March-X algorithm is faster than + * March-C because March-X algorithm is only March-C algorithm that omits some + * steps (Step 3, 4). The March-C algorithm (van de Goor,1991) is described as + * below steps + * + * * STEP 1: Write all zeros to array + * * STEP 2: Starting at lowest address, read zeros, write ones, increment up array + * * STEP 3: Starting at lowest address, read ones, write zeros, increment up array. + * * STEP 4: Starting at highest address, read zeros, write ones, decrement down array. + * * STEP 5: Starting at highest address, read ones, write zeros, decrement down array. + * * STEP 6: Read all zeros from array. + * + * Some detail about implementing of Variable Memory Check (VMC) and used + * variables. These variables are also used in the test cases (TC) of the + * VMC module. + * + * To make sure the VMC module as well as the IMC module work properly, it is + * necessary to ensure the location of the ram area for these modules. The + * sections SHOULD be placed in the correct order: (*.rt_buf*) -> (*.overlap*). + * DO NOT change this order. Please refer to our example linker for more details. + * + * User need declare a variable of struct #sl_iec60730_vmc_test_region_t. In the initialization + * step, We need to assign the start address and end address to this variable for + * executing the VMC. We will call the starting address #RAMTEST_START and the + * ending address #RAMTEST_END to make it easier to describe later. + * + * \anchor iec60730_bk_buf + * * Variable \ref iec60730_bk_buf is a buffer used to backup data during testing process + * and is placed at (*.rt_buf*) section. The size of this variable is defined in + * #SL_IEC60730_BOARD_HEADER (i.e #RT_BLOCKSIZE definition). The #RT_BLOCKSIZE definition + * will be mentioned later. + * + * \anchor iec60730_ram_test_overlap + * * Variable \ref iec60730_ram_test_overlap is a buffer used to ensure that the + * algorithm runs at #sl_iec60730_vmc_bist function is correct. This variable is + * placed at (*.overlap*) section. + * + * \anchor iec60730_rt_check + * * Variable \ref iec60730_rt_check is pointer that point to start address of testing + * process and is placed at (*.classb_ram*) section. In case \ref iec60730_rt_check is + * less than #RAMTEST_END, every time function #sl_iec60730_vmc_bist is invoked and + * test is done, then the value of \ref iec60730_rt_check increases by #BLOCKSIZE. The + * #BLOCKSIZE definition is defined in #SL_IEC60730_BOARD_HEADER and will be mentioned + * later. Otherwise, we test the backup buffer (i.e the iec60730_bk_buf variable is + * mentioned above). + * + * Before performing the RAM test, we provide a callback function named + * #sl_iec60730_vmc_pre_run_marchxc_step. After performing the RAM test, we also provide a + * callback function named #sl_iec60730_vmc_post_run_marchxc_step, and the user decides what + * to do after the RAM test is over. + * + * As mentioned about #SL_IEC60730_BOARD_HEADER in @ref IEC60730_INVARIABLE_MEMORY_Test + * module, the definition #SL_IEC60730_BOARD_HEADER also has the necessary information + * for VMC module to run. The #RAMTEST_START and #RAMTEST_END definitions are used to + * assigned to start, and end member of a variable of type #sl_iec60730_vmc_test_region_t. Two + * definitions are optional because the user can directly assign values to the + * start and end member of a variable as long as these values satisfy the + * conditions describled of the #RAMTEST_START, and #RAMTEST_END definitions. The + * #BACKGROUND, #BLOCKSIZE, #RT_BLOCK_OVERLAP, and #RT_BLOCKSIZE SHOULD use our + * default definitions. + * + * Currently we also support stack test to check for stack overflow using pattern + * (here is an array with 4 elements) placed at the bottom of the stack. You can + * refer to the (*.stack_bottom*) section in our linker example. The initialization + * values of this array are initialized when calling the function + * #sl_iec60730_vmc_init. Every time when executing #sl_iec60730_vmc_bist will check the + * value of this array and based on the check results will return + * #SL_IEC60730_TEST_FAILED nor not. + * + * \anchor iec60730_stack_test_over_flow + * * Variable \ref iec60730_stack_test_over_flow is buffer that store values defined by + * #SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0, #SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1, + * #SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2, and #SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3. + * + * sl_iec60730_vmc_post() + * + * \anchor variable_memory_check_post_flowchart + * \image html variable_memory_check_post_flowchart.png "Figure 1 Flow chart of Variable Memory Check POST" + * + * sl_iec60730_vmc_bist() + * + * \anchor variable_memory_check_bist_flowchart + * \image html variable_memory_check_bist_flowchart.png "Figure 2 Flow chart of Variable Memory Check BIST" + * + * Figure 3 shows two examples of RAM configurations. The figure on the left can + * be found in our examples. The figure on the right is a possible scenario. + * We will analyze these cases as below. + * + * \anchor variable_memory_check_example_flowchart + * \image html variable_memory_check_example_flowchart.png "Figure 3 Example of RAM memory configuration" + * + * + * With the figure on the left, as mentioned above (*.rt_buf*) and (*.overlap*) + * are placed in fixed order, namely Ram Backup and Overlap as + * shown in the Figure. The #RAMTEST_START can start the next Overlap. This + * figure also describes the algorithm of testing. The RAM area under test is + * defined starting from #RAMTEST_START to #RAMTEST_END, and split into multiple + * BLOCKs. Each block has a size determined by #BLOCKSIZE. In the first test + * step, the BLOCK (1) and Overlap are tested. The Ram Backup is + * used to back up the data in the BLOCK being tested, and will restore it after + * the test in BLOCKs competletey. In the second test step, BLOCK (2) is tested + * and a part of BLOCK (1) is also tested. There is an area in BLOCK (1), also + * called overlap, which will be tested twice. This makes the test even more + * secure. Continue like this until the test reaches BLOCK (N), the last block, + * then return to test the Ram Backup. + * + * The image on the right is slightly different when, the tested area (from + * #RAMTEST_START to #RAMTEST_END) contains RamBackup and Overlap. + * In order to ensure the algorithm works properly, in the case like the figure + * on the right at the starting position (#RAMTEST_START) it is necessary to + * create an overlap area. As mentioned above this overlap is also tested so user + * DOES NOT need to worry. Next, the test process is the same as said, will test + * the BLOCKs (from BLOCK (1) to BLOCK (N)). Here is a point to note when + * testing to Ram Backup, it will be ignored because this Ram Backup + * WILL be tested after the test of the last block (BLOCK (N)). + * + * In case the tested area has the address of #RAMTEST_START smaller than the + * address of RamBackup, the test process is similar to the figure on the + * right. + * + *****************************************************************************/ + +/**************************************************************************/ /** + * public IEC60730 Variable Memory Check (VMC) POST + * + * @param params input parameter of struct #sl_iec60730_vmc_test_region_t form + * + * @returns #sl_iec60730_test_result_t. + * * If test fails, returns #SL_IEC60730_TEST_FAILED + * * Otherwise, returns #SL_IEC60730_TEST_PASSED. + * + * Performs a variable memory check in defined area. For details how + * #sl_iec60730_vmc_bist work, please refer to @ref vmc_software_architecture + * + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_vmc_post(void); + +/**************************************************************************/ /** + * public IEC60730 Variable Memory Check (VMC) BIST + * + * @param params input parameter of struct #sl_iec60730_vmc_test_region_t form + * + * @returns #sl_iec60730_test_result_t. + * * If test fails, return #SL_IEC60730_TEST_FAILED; + * * If not complete, returns #SL_IEC60730_TEST_IN_PROGRESS + * * Otherwise, returns #SL_IEC60730_TEST_PASSED. + * + * Performs a variable memory check in defined area. + * For details how #sl_iec60730_vmc_bist work, please refer to + * @ref vmc_software_architecture + * + * Requires #sl_iec60730_vmc_init to be called first to setup global variables. + * + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_vmc_bist(void); + +/**************************************************************************/ /** + * @brief This function is called before performing the RAM check. Depending on + * the RAM region will be checked to give reasonable actions. + * + * @param addr The starting address of the ram under test + * @param size The size of the ram area to be tested. This parameter + * is #BLOCKSIZE + * + * @return bool + * * true - allow running RAM test + * * false - not allow + * + *****************************************************************************/ +bool sl_iec60730_vmc_pre_run_marchxc_step(uint32_t *addr, uint32_t size); + +/**************************************************************************/ /** + * @brief After testing the RAM, you can restore the previous work. + * + * @param addr The starting address of the ram under test + * @param size The size of the ram area to be tested. This parameter + * + * @return void + * + *****************************************************************************/ +void sl_iec60730_vmc_post_run_marchxc_step(uint32_t *addr, uint32_t size); + +/** @} (end addtogroup IEC60730_VARIABLE_MEMORY_Test) */ +/** @} (end addtogroup efr32_iec60730) */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* SL_IEC60730_VARIABLE_MEMORY_H */ diff --git a/lib/inc/sl_iec60730_watchdog.h b/lib/inc/sl_iec60730_watchdog.h new file mode 100644 index 00000000..c7b021f3 --- /dev/null +++ b/lib/inc/sl_iec60730_watchdog.h @@ -0,0 +1,306 @@ +/***************************************************************************/ /** + * @file + * @brief Watchdog check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SL_IEC60730_WATCHDOG_H +#define SL_IEC60730_WATCHDOG_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include +#include "em_wdog.h" +#include "sl_iec60730.h" + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_WDOG_Test + * @{ + * @details + * For IEC 60730, a watchdog timer must be enabled to validate proper + * operation of the Program Counter. A watchdog timer resets the device if it + * has not been restarted. + * @section watchdog_hardware_architecture Hardware Architecture + * The second implementation has a dedicated watchdog peripheral WDOG0, WDOG1 + * watchdog timers in the EFR32 family. + * + * + * @warning - The watchdog timer must be disabled during flash page erase. + * + * @section watchdog_failure_risks Failure Risks + * The watchdog timer will force entry into Safe State if the firmware program + * execution does not return to the BIST quick enough. This will detect a + * failure that causes the CPU to halt or enter an infinite loop. + * The watchdog timer POST verifies that a watchdog timer reset is possible. + * + * OEMs must ensure that their system works reliably in all modes of operation + * using the watchdog timeout. Insufficient testing may allow for firmware + * states that inadvertently trigger a watchdog reset. + * + * @section watchdog_software_architecture Software Architecture + * + * For the EFR32 IEC60730 implementation, \link watchdog_flowchart Figure 1\endlink + * shows the logic flow chart of the Watchdog Timer during POST. The POST test + * determines if the reset source was a power-on, and if so, validates that a + * watchdog reset can occur. If the reset source was a watchdog reset, it + * determines if the watchdog reset was expected as part of POST testing, or + * unexpected. An unexpected reset causes immediate sl_iec60730_safe_state() entry. + * Otherwise normal operation continues. + * + * \image html Watchdog_flowchart.png "Figure 1 Flow chart of Watchdog Timer POST validation" \anchor watchdog_flowchart + * + * The main loop must execute sl_iec60730_bist() faster than the nominal + * timeout, or call sl_iec60730_restart_watchdogs(). After sl_iec60730_bist() has + * confirmed all modules are operating correctly it restarts the Watchdog Timer + * with sl_iec60730_restart_watchdogs(). If a module is not operating correctly, + * sl_iec60730_bist() calls sl_iec60730_safe_state(). sl_iec60730_safe_state() will call + * sl_iec60730_restart_watchdogs() continuously. The system must be powered down and + * restarted to resume normal operation. + * + * The function iec60730_watchdog_post will set the timeout period (PERSEL) to minimum + * when check watchdog units to avoid wasting time. + * + * @section watchdog_configuration Software Configuration + * + * The number of Watchdog units which are tested by lib should be defined by user code + * by defining the macros "SL_IEC60730_WDOGINST_NUMB" and IEC60730_ENABLE_WDOGx (x = 0, 1). + * The number of Watchdog unit depends on target EFR32 series. + * Example for series 1: + * #define SL_IEC60730_WDOGINST_NUMB 1 + * #define SL_IEC60730_WDOG0_ENABLE 1 + * + * User can define macro SL_IEC60730_WDOG_INST(n) to select appropriate Watchdog peripheral. + * User can define macro SL_IEC60730_RST to select appropriate Reset peripheral. + * + * If these macros are not defined then the default configuration will be used. + * + * To clear reset cause flags in the RSTCASUES register after watchdog testing + * completed -> Enable the definition of macro "#define SL_IEC60730_RSTCAUSES_CLEAR_ENABLE" + * on file sl_iec60730_config.h. By default this feature is disabled. + * + * If the Watchdog module is build in non-secure mode then the macro "SL_IEC60730_NON_SECURE_ENABLE" + * must be defined to enable the lib using non-secure address of the Watchdog peripheral. + * + * @warning - The static variable iec60730_watchdog_count must be located at memory + * location that is not cleared when system startup (section ".ram_no_clear"). + * - The global variable iec60730_watchdog_state must be located at memory + * location that is not cleared when system startup. And it should be located at + * section ram_no_clear in RAM block that is available on EFR32 Series 1 devices (section ".ram_ret_no_clear"). + * This will avoid the missing contain of the variable when device returns from + * the power saving mode EM4. + * + * On EFR32 Series 2 devices, they have backup RAM (BURAM) + * that could be used to save value of the variable. + * To enable saving iec60730_watchdog_state to backup RAM on Series 2, enable the macro + * "#define SL_IEC60730_SAVE_STAGE_ENABLE" on file sl_iec60730_config.h. By default it will be disabled. + * Define macro "SL_IEC60730_BURAM_IDX" to select which register of the BURAM will be used. + * The default value is 0x0. + *****************************************************************************/ +/// Watchdog component configuration structure +typedef struct { + WDOG_TypeDef *const SL_WDOG; ///< Pointer to Watchdog instance + uint32_t rst; ///< Watchdog reset cause value +} sl_iec60730_watchdog_t; + +/// State of watchdog testing +typedef enum { + SL_IEC60730_WATCHDOG_INVALID = 0, ///< Watchdog POST test not done + SL_IEC60730_WATCHDOG_TESTING = 1, ///< Watchdog POST testing in progress + SL_IEC60730_WATCHDOG_VALID = 2, ///< Watchdog POST test complete, watchdog valid +} sl_iec60730_test_watchdog_t; + +// Default configuration number of enabled watchdog SL_IEC60730_WDOGINST_NUMB +#if ((SL_IEC60730_WDOG0_ENABLE == 1) && (SL_IEC60730_WDOG1_ENABLE == 1)) +#define SL_IEC60730_WDOGINST_NUMB 2 +#elif ((SL_IEC60730_WDOG0_ENABLE == 0) && (SL_IEC60730_WDOG1_ENABLE == 0)) +#warning No watchdogs have been selected for testing! +#define SL_IEC60730_WDOGINST_NUMB 0 +#else +#define SL_IEC60730_WDOGINST_NUMB 1 +#endif + +#ifndef SL_IEC60730_WDOG_WAIT_TIMEOUT +#define SL_IEC60730_WDOG_WAIT_TIMEOUT (uint32_t) 0x0000FFFFUL +#endif + +#ifndef SL_IEC60730_WDOG_INST +#if (_SILICON_LABS_32B_SERIES == 2) +#if ((defined SL_IEC60730_NON_SECURE_ENABLE) || (!defined(SL_TRUSTZONE_SECURE))) +#define SL_IEC60730_WDOG_INST(n) WDOG##n##_NS +#else +#define SL_IEC60730_WDOG_INST(n) WDOG##n +#endif +#else // Series 1 devices +#define SL_IEC60730_WDOG_INST(n) WDOG##n +#endif //(_SILICON_LABS_32B_SERIES == 2) +#endif + +#if (_SILICON_LABS_32B_SERIES < 2) +#ifndef SL_IEC60730_RST +#define SL_IEC60730_RST RMU +#endif + +#define SL_IEC60730_RSTCAUSE_POR RMU_RSTCAUSE_PORST +#define SL_IEC60730_RSTCAUSE_EM4 RMU_RSTCAUSE_EM4RST +#define SL_IEC60730_RSTCAUSE_WDOG0 RMU_RSTCAUSE_WDOGRST +#define SL_IEC60730_RSTCAUSE_WDOG1 RMU_RSTCAUSE_WDOGRST + +#ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE +#define SL_IEC60730_RSTCAUSES_CLEAR() \ + do { \ + SL_IEC60730_RST->CMD |= RMU_CMD_RCCLR; \ + } while (0) +#else +#define SL_IEC60730_RSTCAUSES_CLEAR() unit_test_iec60730_watchdog_mock_rstcause_clear() +#endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE +#else // Series 2 devices +#ifndef SL_IEC60730_RST +#if ((defined SL_IEC60730_NON_SECURE_ENABLE) || (!defined(SL_TRUSTZONE_SECURE))) +#define SL_IEC60730_RST EMU_NS +#else +#define SL_IEC60730_RST EMU +#endif +#endif + +#define SL_IEC60730_RSTCAUSE_POR EMU_RSTCAUSE_POR +#define SL_IEC60730_RSTCAUSE_EM4 EMU_RSTCAUSE_EM4 +#define SL_IEC60730_RSTCAUSE_WDOG0 EMU_RSTCAUSE_WDOG0 +#define SL_IEC60730_RSTCAUSE_WDOG1 EMU_RSTCAUSE_WDOG1 + +#ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE +#ifdef WDOG_HAS_SET_CLEAR +#define SL_IEC60730_RSTCAUSES_CLEAR() \ + do { \ + SL_IEC60730_RST->CMD_SET = EMU_CMD_RSTCAUSECLR; \ + } while (0) +#else +#define SL_IEC60730_RSTCAUSES_CLEAR() \ + do { \ + SL_IEC60730_RST->CMD |= EMU_CMD_RSTCAUSECLR; \ + } while (0) +#endif // WDOG_HAS_SET_CLEAR +#else +#define SL_IEC60730_RSTCAUSES_CLEAR() unit_test_iec60730_watchdog_mock_rstcause_clear() +#endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE +#endif // (_SILICON_LABS_32B_SERIES < 2) + +#ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE +#define SL_IEC60730_RSTCAUSE (SL_IEC60730_RST->RSTCAUSE) +#else +#define SL_IEC60730_RSTCAUSE unit_test_iec60730_watchdog_mock_rstcause() +#endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE + +#ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE +#define SL_IEC60730_RST_POR (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_POR) +#define SL_IEC60730_RST_EM4 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_EM4) +#else +#define SL_IEC60730_RST_POR unit_test_iec60730_watchdog_mock_rst_por() +#define SL_IEC60730_RST_EM4 unit_test_iec60730_watchdog_mock_rst_em4() +#endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE + +#ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE +#if (SL_IEC60730_WDOG0_ENABLE == 1) +#define SL_IEC60730_RST_WDOG0 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG0) +#else +#define SL_IEC60730_RST_WDOG0 0 +#endif // (SL_IEC60730_WDOG0_ENABLE == 1) +#if (SL_IEC60730_WDOG1_ENABLE == 1) +#define SL_IEC60730_RST_WDOG1 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG1) +#else +#define SL_IEC60730_RST_WDOG1 0 +#endif // (SL_IEC60730_WDOG1_ENABLE == 1) +#else +#if (SL_IEC60730_WDOG0_ENABLE == 1) +#define SL_IEC60730_RST_WDOG0 unit_test_iec60730_watchdog_mock_rst_wdog0() +#else +#define SL_IEC60730_RST_WDOG0 0 +#endif // (SL_IEC60730_WDOG0_ENABLE == 1) +#if (SL_IEC60730_WDOG1_ENABLE == 1) +#define SL_IEC60730_RST_WDOG1 unit_test_iec60730_watchdog_mock_rst_wdog1() +#else +#define SL_IEC60730_RST_WDOG1 0 +#endif // (SL_IEC60730_WDOG1_ENABLE == 1) +#endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE + +#define SL_IEC60730_RST_WDOGS (SL_IEC60730_RST_WDOG0 || SL_IEC60730_RST_WDOG1) + +#ifndef SL_IEC60730_BURAM +#if (_SILICON_LABS_32B_SERIES == 2) +#if ((defined SL_IEC60730_NON_SECURE_ENABLE) || (!defined(SL_TRUSTZONE_SECURE))) +#define SL_IEC60730_BURAM BURAM_NS +#else +#define SL_IEC60730_BURAM BURAM +#endif +#endif // (_SILICON_LABS_32B_SERIES == 2) +#endif + +#ifndef SL_IEC60730_BURAM_IDX +#define SL_IEC60730_BURAM_IDX 0UL +#endif + +/// Global variable used to track watchdog testing state. +/// +/// @warning Must be placed in a memory area not cleared to 0x0 on start! +extern volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state IEC60730_DATA_NO_CLEAR; + +#ifdef UNIT_TEST_IEC60730_WATCHDOG_ENABLE +/**************************************************************************/ /** + * public Support unit test for reset local variable iec60730_watchdog_count. + * + * @returns None + + *****************************************************************************/ +void sl_iec60730_watchdog_count_reset(void); + +/**************************************************************************/ /** + * public Support unit test for set local variable iec60730_watchdog_count. + * + * @returns None + + *****************************************************************************/ +void sl_iec60730_watchdog_count_set(uint8_t count); + +#endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE + +/**************************************************************************/ /** + * public IEC60730 Watchdog Power On Self Test + * + * @returns #sl_iec60730_test_result_t If a non-watchdog reset occurred, + * test watchdog (will not return). + * Otherwise determine if watchdog reset was planned or unplanned. + * Unplanned watchdog resets result in failure and entry to Safe State. + * Planned watchdog resets return #SL_IEC60730_TEST_PASSED. + * + * This function will test the watchdog timer by forcing a watchdog reset + * on the first power-up. Any subsequent watchdog reset forces entry into + * #sl_iec60730_safe_state(). + * + * @warning Remove all accesses to Watchdog Timer hardware from InitDevice. + * Reset state of pins must be safe for the device. During POST test, device pins + * will be kept in reset state while validating watchdog reset. + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_watchdog_post(void); + +/** @} (end addtogroup IEC60730_WDOG_Test) */ +/** @} (end addtogroup efr32_iec60730) */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* SL_IEC60730_WATCHDOG_H */ diff --git a/lib/src/sl_iec60730_bist.c b/lib/src/sl_iec60730_bist.c new file mode 100644 index 00000000..4345eb42 --- /dev/null +++ b/lib/src/sl_iec60730_bist.c @@ -0,0 +1,99 @@ +/***************************************************************************/ /** + * @file + * @brief Build In Self Test + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "sl_iec60730_internal.h" + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup sl_iec60730_bist + * @{ + *****************************************************************************/ + +static sl_iec60730_safety_check_t iec60730_safety_check = { SL_IEC60730_NO_FAILURE, 0 }; + +__WEAK void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure) +{ + UNUSED_VAR(failure); + + CORE_ATOMIC_IRQ_DISABLE(); + SL_IEC60730_RSTCAUSES_CLEAR(); + while (1) { + sl_iec60730_restart_watchdogs(); + } +} + +void sl_iec60730_safety_check_reset_error(void) +{ + iec60730_safety_check.error = SL_IEC60730_NO_FAILURE; + iec60730_safety_check.number_error = 0; +} + +void sl_iec60730_safety_check_error_occur(sl_iec60730_test_failure_t failure) +{ + iec60730_safety_check.error |= (1 << failure); + iec60730_safety_check.number_error++; +} + +sl_iec60730_safety_check_t* sl_iec60730_safety_check_get_error(void) +{ + sl_iec60730_safety_check_t* result = NULL; + + result = &iec60730_safety_check; + + return result; +} + +void sl_iec60730_bist(void) +{ + sl_iec60730_test_result_t + result; ///< Temporary storage of the result of each test + + result = sl_iec60730_imc_bist(); + if (result == SL_IEC60730_TEST_FAILED) { + sl_iec60730_safety_check_error_occur(SL_IEC60730_IMC_FAIL); + sl_iec60730_safe_state(SL_IEC60730_IMC_FAIL); + } + LABEL_DEF(IEC60730_IMC_BIST_END_BKPT); + + result = sl_iec60730_vmc_bist(); + if (SL_IEC60730_TEST_FAILED == result) { + sl_iec60730_safety_check_error_occur(SL_IEC60730_VMC_FAIL); + sl_iec60730_safe_state(SL_IEC60730_VMC_FAIL); + } + + // CPU Register Check + result = sl_iec60730_cpu_registers_bist(); + if (result == SL_IEC60730_TEST_FAILED) { + sl_iec60730_safety_check_error_occur(SL_IEC60730_CPU_REGISTERS_FAIL); + sl_iec60730_safe_state(SL_IEC60730_CPU_REGISTERS_FAIL); + } + + LABEL_DEF(IEC60730_RESTART_WATCHDOG_BKPT); + + if (iec60730_safety_check.number_error == SL_IEC60730_NO_FAILURE) { + // Pet the watchdog + sl_iec60730_restart_watchdogs(); + } else { + // Enter Safe State and secure the system + sl_iec60730_safe_state(SL_IEC60730_SAFETY_CHECK_FAIL); + } + return; +} + +/** @} (end addtogroup sl_iec60730_bist) */ +/** @} (end addtogroup efr32_iec60730) */ diff --git a/lib/src/sl_iec60730_comm.c b/lib/src/sl_iec60730_comm.c new file mode 100644 index 00000000..e95995ba --- /dev/null +++ b/lib/src/sl_iec60730_comm.c @@ -0,0 +1,21 @@ +/***************************************************************************/ /** + * @file + * @brief Communication check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "sl_iec60730_internal.h" + +/** @} (end addtogroup IEC60730_OEM_COMM_Test) */ +/** @} (end addtogroup efm8_iec60730) */ diff --git a/lib/src/sl_iec60730_cpu_registers.c b/lib/src/sl_iec60730_cpu_registers.c new file mode 100644 index 00000000..b9a361d5 --- /dev/null +++ b/lib/src/sl_iec60730_cpu_registers.c @@ -0,0 +1,1717 @@ +/***************************************************************************/ /** + * @file sl_iec60730_cpu_registers.c + * @brief CPU Registers check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ +#include "sl_iec60730_cpu_registers.h" + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_CPUREG_Test + * @{ + *****************************************************************************/ + +#ifdef UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE +extern sl_iec60730_test_result_t unit_test_iec60730_cpu_registers_bist_mock(void); +#endif // UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE + +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_core(void); + +#if (IEC60370_CPU == IEC60370_CM4) +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_msp(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_psp(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_control(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_primask(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_basepri(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_faultmask(void); +#endif //(IEC60370_CPU == IEC60370_CM4) + +#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) \ + && (defined(__FPU_USED) && (__FPU_USED == 1U))) +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_fpu_fpscr(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_fpu_fpsx(void); +#endif // ((defined (__FPU_PRESENT) && (__FPU_USED == 1U)) + +/**************************************************************************/ /** + * public IEC60730 CPU Registers Built In Self Test + * + * @returns #sl_iec60730_test_result_t + * @returns #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function will do a test of all the CPU core registers. + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + /* Test core register: APSR, R0-R12, LR */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_core()) { + goto CPU_REGISTERS_BIST_DONE; + } + +#if (IEC60370_CPU == IEC60370_CM33) +#if defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) + +#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + /* Test cpu register non-secure */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_bist_ns()) { + goto CPU_REGISTERS_BIST_DONE; + } + /* Test cpu register secure */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_bist_s()) { + goto CPU_REGISTERS_BIST_DONE; + } + +#endif +#else +#error the CM33 without TZ is not supported +#endif // defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) +#endif // (IEC60370_CPU == IEC60370_CM33) + +#if (IEC60370_CPU == IEC60370_CM4) + /* Test Main Stack Pointer */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_msp()) { + goto CPU_REGISTERS_BIST_DONE; + } + + /* Test Process Stack Pointer */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_psp()) { + goto CPU_REGISTERS_BIST_DONE; + } + + /* Test Control register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_control()) { + goto CPU_REGISTERS_BIST_DONE; + } + + /* Test Primask register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_primask()) { + goto CPU_REGISTERS_BIST_DONE; + } + + /* Test BasePri register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_basepri()) { + goto CPU_REGISTERS_BIST_DONE; + } + + /* Test FaultMask register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_faultmask()) { + goto CPU_REGISTERS_BIST_DONE; + } +#endif + + /* Test FPU FPSCR register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_fpu_fpscr()) { + goto CPU_REGISTERS_BIST_DONE; + } + + /* Test FPU So-S31 register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_fpu_fpsx()) { + goto CPU_REGISTERS_BIST_DONE; + } + +#ifdef UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE + if (SL_IEC60730_TEST_FAILED == unit_test_iec60730_cpu_registers_bist_mock()) { + goto CPU_REGISTERS_BIST_DONE; + } +#endif // UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE + + result = SL_IEC60730_TEST_PASSED; + sl_iec60730_program_counter_check |= (IEC60730_CPU_REGS_COMPLETE); + + CPU_REGISTERS_BIST_DONE: + + return result; +} + +/**************************************************************************/ /** + * public IEC60730 CPU Registers Power On Self Test + * + * @returns #sl_iec60730_test_result_t + * + * This function simply calls the sl_iec60730_cpu_registers_bist() function. + *****************************************************************************/ +sl_iec60730_test_result_t sl_ec60730_cpu_registers_post(void) +{ + return sl_iec60730_cpu_registers_bist(); +} + +/**************************************************************************/ /** + * private IEC60730 CPU Registers Core Check + * + * @returns #sl_iec60730_test_result_t + * @returns #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the following CPU registers in a sequence: APSR, R0-R12, + * LR + * Test patterns: R0�R12, LR: 0xAAAAAAAA, 0x55555555 + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_cpu_registers_core(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + /* Safe critical registers. According calling convention. */ + "STMDB SP!, {R4, R5, R6, R7, R8, R9, R10, R11, R14} \n" + + /* Register APSR */ + "MOVS R0, #0x0000 \n" /* Set Z(ero) Flag */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_Z_FLAG_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_Z_FLAG_ASM_BKPT:: \n" +#endif + " BNE.W IEC60730_FAIL_ENDLESS_LOOP_CORE \n" /* Fails if Z clear */ + " SUBS R0,#1 \n" /* Set N(egative) Flag */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_N_FLAG_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_N_FLAG_ASM_BKPT:: \n" +#endif + " BPL.W IEC60730_FAIL_ENDLESS_LOOP_CORE \n" /* Fails if N clear */ + " ADDS R0,#2 \n" /* Set C(array) Flag and do not set Z*/ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_C_FLAG_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_C_FLAG_ASM_BKPT:: \n" +#endif + " BCC.W IEC60730_FAIL_ENDLESS_LOOP_CORE \n" /* Fails if C clear */ + " LDR R0, =0x80000000 \n" /* Prepares Overflow test */ + " ADDS R0, R0, R0 \n" /* Set V(overflow) Flag */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_V_FLAG_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_V_FLAG_ASM_BKPT:: \n" +#endif + " BVC.W IEC60730_FAIL_ENDLESS_LOOP_CORE \n" /* Fails if V clear */ + " LDR R0, =0xFFFFFFFF \n" /* Prepares Saturation test */ + " USAT R1,#10,R0 \n" /* Set Q(saturation) Flag */ + " MRS R0, APSR \n" /* Get Status register */ + " CMP R0, #0x78000000 \n" /* Verifies that Z=C=V=Q=1 */ + " BNE.W IEC60730_FAIL_ENDLESS_LOOP_CORE \n" /* Fails if Z=C=V=Q clear */ + /* Register R0 (holds value returned by the function) */ + " LDR R0, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R0_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R0_ASM_BKPT:: \n" +#endif + " CMP R0, #0xAAAAAAAA \n" + " BNE.W IEC60730_FAIL_ENDLESS_LOOP_CORE \n" + " LDR R0, =0x55555555 \n" + " CMP R0, #0x55555555 \n" + " BNE.W IEC60730_FAIL_ENDLESS_LOOP_CORE \n" + + /* Register R1 */ + " LDR.W R1, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R1_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R1_ASM_BKPT:: \n" +#endif + " CMP R1, #0xAAAAAAAA \n" + " BNE.W IEC60730_FAIL_ENDLESS_LOOP_CORE \n" + " LDR.W R1, =0x55555555 \n" + " CMP R1, #0x55555555 \n" + " BNE.W IEC60730_FAIL_ENDLESS_LOOP_CORE \n" + + /* Register R2 */ + " LDR R2, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R2_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R2_ASM_BKPT:: \n" +#endif + " CMP R2, #0xAAAAAAAA \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + " LDR R2, =0x55555555 \n" + " CMP R2, #0x55555555 \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + + /* Register R3 */ + " LDR R3, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R3_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R3_ASM_BKPT:: \n" +#endif + " CMP R3, #0xAAAAAAAA \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + " LDR R3, =0x55555555 \n" + " CMP R3, #0x55555555 \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + + /* Register R4 */ + " LDR R4, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R4_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R4_ASM_BKPT:: \n" +#endif + " CMP R4, #0xAAAAAAAA \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + " LDR R4, =0x55555555 \n" + " CMP R4, #0x55555555 \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + + /* Register R5 */ + " LDR R5, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R5_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R5_ASM_BKPT:: \n" +#endif + " CMP R5, #0xAAAAAAAA \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + " LDR R5, =0x55555555 \n" + " CMP R5, #0x55555555 \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + + /* Register R6 */ + " LDR R6, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R6_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R6_ASM_BKPT:: \n" +#endif + " CMP R6, #0xAAAAAAAA \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + " LDR R6, =0x55555555 \n" + " CMP R6, #0x55555555 \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + + /* Register R7 */ + " LDR R7, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R7_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R7_ASM_BKPT:: \n" +#endif + " CMP R7, #0xAAAAAAAA \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + " LDR R7, =0x55555555 \n" + " CMP R7, #0x55555555 \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + + /* Register R8 */ + " LDR R8, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R8_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R8_ASM_BKPT:: \n" +#endif + " CMP R8, #0xAAAAAAAA \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + " LDR R8, =0x55555555 \n" + " CMP R8, #0x55555555 \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + + /* Register R9 */ + " LDR R9, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R9_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R9_ASM_BKPT:: \n" +#endif + " CMP R9, #0xAAAAAAAA \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + " LDR R9, =0x55555555 \n" + " CMP R9, #0x55555555 \n" + " BNE.W IEC60730_CPU_REGS_CORE_FAIL \n" + + /* Register R10 */ + " LDR R10, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R10_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R10_ASM_BKPT:: \n" +#endif + " CMP R10, #0xAAAAAAAA \n" + " BNE IEC60730_CPU_REGS_CORE_FAIL \n" + " LDR R10, =0x55555555 \n" + " CMP R10, #0x55555555 \n" + " BNE IEC60730_CPU_REGS_CORE_FAIL \n" + + /* Register R11 */ + " LDR R11, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R11_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R11_ASM_BKPT:: \n" +#endif + " CMP R11, #0xAAAAAAAA \n" + " BNE IEC60730_CPU_REGS_CORE_FAIL \n" + " LDR R11, =0x55555555 \n" + " CMP R11, #0x55555555 \n" + " BNE IEC60730_CPU_REGS_CORE_FAIL \n" + + /* Register R12 */ + " LDR R12, =0xAAAAAAAA \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_R12_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_R12_ASM_BKPT:: \n" +#endif + " CMP R12, #0xAAAAAAAA \n" + " BNE IEC60730_CPU_REGS_CORE_FAIL \n" + " LDR R12, =0x55555555 \n" + " CMP R12, #0x55555555 \n" + " BNE IEC60730_CPU_REGS_CORE_FAIL \n" + + /* Register LR (R14) */ + " LDR.W R1, =0xAAAAAAAA \n" + " MOV LR, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_LR_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_LR_ASM_BKPT:: \n" +#endif + " MOV R2, LR \n" + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_CORE \n" + " LDR.W R1, =0x55555555 \n" + " MOV LR, R1 \n" + " MOV R2, LR \n" + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_CORE \n" + " B IEC60730_CPU_REGS_CORE_PASS_ASM_BKPT \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_FAIL_ENDLESS_LOOP_CORE: \n" +#else + "IEC60730_FAIL_ENDLESS_LOOP_CORE:: \n" +#endif + " B IEC60730_CPU_REGS_CORE_FAIL \n" + +/*Test passed, return 1 instead of 0 in global variable*/ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CORE_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " B IEC60730_CPU_REGS_CORE_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_FAIL: \n" +#else + "IEC60730_CPU_REGS_CORE_FAIL:: \n" +#endif + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +/* Restore critical registers */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CORE_DONE: \n" +#else + "IEC60730_CPU_REGS_CORE_DONE:: \n" +#endif + " LDMIA SP!, {R4, R5, R6, R7, R8, R9, R10, R11,R14} \n" + : "=r" (result)::"memory"); /* set output variable result*/ + + return result; +} + +/**************************************************************************/ /** + * private IEC60730 CPU Register MSP Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the MSP (Main Stack Pointer) register. + * If MSP is corrupted, the function stucks in an endless loop with + * interrupts disabled. This state must be observed by another safety mechanism + * (for example, watchdog). + * Test patterns: 0xAAAAAAA8, 0x55555554 + * @warning This function cannot be interrupted. + *****************************************************************************/ +#if (IEC60370_CPU == IEC60370_CM4) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_msp(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R3, CONTROL \n" /* Save Control value */ + " MRS R0, MSP \n" /* Save stack value */ + " LDR R1, =0xAAAAAAA8 \n" + " MSR MSP, R1 \n" /* load stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSP_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_MSP_S_ASM_BKPT:: \n" +#endif + " MRS R2, MSP \n" /* Get back stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_MSP_S \n" + " LDR R1, =0x55555554 \n" + " MSR MSP, R1 \n" /* load stack value */ + " MRS R2, MSP \n" /* Get back stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_MSP_S \n" + " MSR MSP, R0 \n" /* Restore stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " B IEC60730_CPU_REGS_MSP_S_PASS_ASM_BKPT \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_FAIL_ENDLESS_LOOP_MSP_S: \n" +#else + "IEC60730_FAIL_ENDLESS_LOOP_MSP_S:: \n" +#endif + " MSR MSP, R0 \n" /* Restore stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + " B IEC60730_CPU_REGS_MSP_S_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSP_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_MSP_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSP_S_DONE: \n" +#else + "IEC60730_CPU_REGS_MSP_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); /* set output variable result*/ + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register PSP Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the PSP (Process Stack Pointer) register. + * If PSP is corrupted, the function stucks in an endless loop with + * interrupts disabled. This state must be observed by another safety mechanism + * (for example, watchdog). + * Test patterns: 0xAAAAAAA8, 0x55555554 + * @warning This function cannot be interrupted. + *****************************************************************************/ +#if (IEC60370_CPU == IEC60370_CM4) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_psp(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R3, CONTROL \n" /* Save Control value */ + " MRS R0, PSP \n" /* Save process stack value */ + " LDR R1, =0xAAAAAAA8 \n" + " MSR PSP, R1 \n" /* load process stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSP_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PSP_S_ASM_BKPT:: \n" +#endif + " MRS R2, PSP \n" /* Get back process stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_PSP_S \n" + " LDR R1, =0x55555554 \n" + " MSR PSP, R1 \n" /* load process stack value */ + " MRS R2, PSP \n" /* Get back process stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_PSP_S \n" + " MSR PSP, R0 \n" /* Restore process stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " B IEC60730_CPU_REGS_PSP_S_PASS_ASM_BKPT \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_FAIL_ENDLESS_LOOP_PSP_S: \n" +#else + "IEC60730_FAIL_ENDLESS_LOOP_PSP_S:: \n" +#endif + " MSR PSP, R0 \n" /* Restore stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + " B IEC60730_CPU_REGS_PSP_S_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSP_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PSP_S_PASS_ASM_BKPT:: \n" +#endif + + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSP_S_DONE: \n" +#else + "IEC60730_CPU_REGS_PSP_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register Control Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the Control register. + * Test patterns: 0x00000002, 0x00000004 + * @warning This function cannot be interrupted. + *****************************************************************************/ +#if (IEC60370_CPU == IEC60370_CM4) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_control(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, CONTROL \n" + " MOVW R1, #0x0002 \n" + " MSR CONTROL, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_SPSEL_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_SPSEL_ASM_BKPT:: \n" +#endif + " MRS R2, CONTROL \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_CONTROL_S_FAIL \n" + " MOVW R1, #0x0004 \n" + " MSR CONTROL, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_FPCA_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_FPCA_ASM_BKPT:: \n" +#endif + " MRS R2, CONTROL \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_CONTROL_S_FAIL \n" + " MSR CONTROL, R0 \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_CONTROL_S_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_FAIL: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_FAIL:: \n" +#endif +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_FAIL_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_FAIL_ASM_BKPT:: \n" +#endif + " MSR CONTROL, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_DONE: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register PriMask Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the PriMask register. + * Test patterns: 0x00000001, 0x00000000 + * @warning This function cannot be interrupted. + *****************************************************************************/ +#if (IEC60370_CPU == IEC60370_CM4) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_primask(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, PRIMASK \n" + " MOVW R1, #0x0001 \n" + " MSR PRIMASK, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_S_ASM_BKPT:: \n" +#endif + " MRS R2, PRIMASK \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_PRIMASK_S_FAIL \n" + " MOVW R1, #0x0000 \n" + " MSR PRIMASK, R1 \n" + " MRS R2, PRIMASK \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_PRIMASK_S_FAIL \n" + " MSR PRIMASK, R0 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_PRIMASK_S_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_S_FAIL: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_S_FAIL:: \n" +#endif + " MSR PRIMASK, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_S_DONE: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register BasePri Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the BASEPRI register. + * Test patterns: 0x000000A0, 0x00000040 + * @warning This function cannot be interrupted. + *****************************************************************************/ +#if (IEC60370_CPU == IEC60370_CM4) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_basepri(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, BASEPRI \n" + " MOV R1, #0xA0 \n" + " MSR BASEPRI, R1 \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_S_ASM_BKPT:: \n" +#endif + " MRS R2, BASEPRI \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_BASEPRI_S_FAIL \n" + " MOV R1, #0x40 \n" + " MSR BASEPRI, R1 \n" + " MRS R2, BASEPRI \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_BASEPRI_S_FAIL \n" + " MSR BASEPRI, R0 \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_BASEPRI_S_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_S_FAIL: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_S_FAIL:: \n" +#endif + " MSR BASEPRI, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_S_DONE: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register FaultMask Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the FAULTMASK register. + * Test patterns: 0x00000001, 0x00000000 + * @warning This function cannot be interrupted. + *****************************************************************************/ +#if (IEC60370_CPU == IEC60370_CM4) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_faultmask(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, FAULTMASK \n" + " MOV R1, #1 \n" + " MSR FAULTMASK, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_S_ASM_BKPT:: \n" +#endif + " MRS R2, FAULTMASK \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FAULTMASK_S_FAIL \n" + " MOV R1, #0 \n" + " MSR FAULTMASK, R1 \n" + " MRS R2, FAULTMASK \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FAULTMASK_S_FAIL \n" + " MSR FAULTMASK, R0 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_FAULTMASK_S_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_S_FAIL: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_S_FAIL:: \n" +#endif + " MSR FAULTMASK, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_S_DONE: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) \ + && (defined(__FPU_USED) && (__FPU_USED == 1U))) +/**************************************************************************/ /** + * private IEC60730 FPU Register FPSCR Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the FPSCR (Floating-point Status and Control) register. + * Test patterns: 0x55400015, 0xA280008A + * @warning The core must be in the secure state.Only for devices with the + * Floating Point Unit (FPU). + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_cpu_registers_fpu_fpscr(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " STMDB SP!, {R4, R5, R6} \n" + " LDR R0, =0xE000ED88 \n" + " LDR R5, [R0, #0] \n" /* Save CPACR to R5 */ + " LDR R0, =0xE000EF34 \n" + " LDR R6, [R0, #0] \n" /* Save FPCCR to R6 */ + " VMRS R4, FPSCR \n" /* Save FPSCR register to R4 */ + " MOV R1, R6 \n" /* Copy FPCCR to R1 */ + " ORR R1, R1, #0xC0000000 \n" /* Set ASPEN_MASK and LSPEN_MASK */ + " STR R1, [R0, #0] \n" /* Write back to FPCCR */ + " MOV R1, R5 \n" /* Load CPACR value from R5 */ + " ORR R1, R1, #0xF00000 \n" /* Enable FPU on CPACR */ + " LDR R0, =0xE000ED88 \n" + " STR R1, [R0, #0] \n" /* Write back to CPACR */ + " LDR R1, =0x55400015 \n" + " VMSR FPSCR, R1 \n" /* load process stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_FPSCR_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_FPSCR_ASM_BKPT:: \n" +#endif + " VMRS R2, FPSCR \n" /* Get back process stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_CPU_REGS_FPU_FPSCR_FAIL \n" + " LDR R1, =0xA280008A \n" + " VMSR FPSCR, R1 \n" + " VMRS R2, FPSCR \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_FPSCR_FAIL \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_FPSCR_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_FPSCR_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " B IEC60730_CPU_REGS_FPU_FPSCR_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_FPSCR_FAIL: \n" +#else + "IEC60730_CPU_REGS_FPU_FPSCR_FAIL:: \n" +#endif +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_FPSCR_FAIL_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_FPSCR_FAIL_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_FPSCR_DONE: \n" +#else + "IEC60730_CPU_REGS_FPU_FPSCR_DONE:: \n" +#endif + " LDR R1, =0xE000ED88 \n" + " STR R5, [R1, #0] \n" /* Restore CPACR */ + " LDR R1, =0xE000EF34 \n" + " STR R6, [R1, #0] \n" /* Restore FPCCR */ + " VMSR FPSCR, R4 \n" /* Restore FPSCR */ + " LDMIA SP!, {R4, R5, R6} \n" + " CPSIE i \n" /*Enable IRQ Interrupts*/ + : "=r" (result)::"memory"); +#endif + +#if (IEC60370_CPU == IEC60370_CM4) + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " STMDB SP!, {R4, R5, R6} \n" + " MOVW R1, #0x0004 \n" + " MSR CONTROL, R1 \n" + " LDR.W R0, =0xE000ED88 \n" + " LDR R5, [R0, #0] \n" /* Save CPACR to R5 */ + " LDR R0, =0xE000EF34 \n" + " LDR R6, [R0, #0] \n" /* Save FPCCR to R6 */ + " VMRS R4, FPSCR \n" /* Save FPSCR register to R4 */ + " MOV R1, R6 \n" /* Copy FPCCR to R1 */ + " ORR R1, R1, #0xC0000000 \n" /* Set ASPEN_MASK and LSPEN_MASK */ + " STR R1, [R0, #0] \n" /* Write back to FPCCR */ + " MOV R1, R5 \n" /* Load CPACR value from R5 */ + " ORR R1, R1, #0xF00000 \n" /* Enable FPU on CPACR */ + " LDR R0, =0xE000ED88 \n" + " STR R1, [R0, #0] \n" /* Write back to CPACR */ + " LDR R1, =0x55400015 \n" + " VMSR FPSCR, R1 \n" /* load process stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_FPSCR_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_FPSCR_ASM_BKPT:: \n" +#endif + " VMRS R2, FPSCR \n" /* Get back process stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_CPU_REGS_FPU_FPSCR_FAIL \n" + " LDR R1, =0xA280008A \n" + " VMSR FPSCR, R1 \n" + " VMRS R2, FPSCR \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_FPSCR_FAIL \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_FPSCR_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_FPSCR_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " B IEC60730_CPU_REGS_FPU_FPSCR_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_FPSCR_FAIL: \n" +#else + "IEC60730_CPU_REGS_FPU_FPSCR_FAIL:: \n" +#endif +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_FPSCR_FAIL_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_FPSCR_FAIL_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_FPSCR_DONE: \n" +#else + "IEC60730_CPU_REGS_FPU_FPSCR_DONE:: \n" +#endif + " LDR R1, =0xE000ED88 \n" + " STR R5, [R1, #0] \n" /* Restore CPACR */ + " LDR R1, =0xE000EF34 \n" + " STR R6, [R1, #0] \n" /* Restore FPCCR */ + " VMSR FPSCR, R4 \n" /* Restore FPSCR */ + " LDMIA SP!, {R4, R5, R6} \n" + " CPSIE i \n" /*Enable IRQ Interrupts*/ + : "=r" (result)::"memory"); +#endif + + return result; +} + +/**************************************************************************/ /** + * private IEC60730 FPU Registers FPS0-FPS31 Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the FPS0-FPS31 register. + * Test patterns: 0x55555555, 0xAAAAAAAA + * @warning The core must be in the secure state.Only for devices with the + * Floating Point Unit (FPU). + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_cpu_registers_fpu_fpsx(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; +#if (IEC60370_CPU == IEC60370_CM4) \ + || ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " STMDB SP!, {R4, R5, R6} \n" + " LDR.W R0, =0xE000ED88 \n" + " LDR R5, [R0, #0] \n" /* Save CPACR to R5 */ + " LDR.W R0, =0xE000EF34 \n" + " LDR R6, [R0, #0] \n" /* Save FPCCR to R6 */ + " VMRS R4, FPSCR \n" /* Save FPSCR register to R4 */ + " MOV R1, R6 \n" /* Copy FPCCR to R1 */ + " ORR R1, R1, #0xC0000000 \n" /* Set ASPEN_MASK and LSPEN_MASK */ + " STR R1, [R0, #0] \n" /* Write back to FPCCR */ + " MOV R1, R5 \n" /* Load CPACR value from R5 */ + " ORR R1, R1, #0xF00000 \n" /* Enable FPU on CPACR */ + " LDR.W R0, =0xE000ED88 \n" + " STR R1, [R0, #0] \n" /* Write back to CPACR */ + " VMOV R0, S0 \n" /*S0 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S0, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S0_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S0_ASM_BKPT:: \n" +#endif + " VMOV R2, S0 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S0_S3_FAIL \n" + " LDR.W R1, =0xAAAAAAAA \n" + " VMOV S0, R1 \n" + " VMOV R2, S0 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S0_S3_FAIL \n" + " VMOV S0, R0 \n" + + " VMOV R0, S1 \n" /* S1 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S1, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S1_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S1_ASM_BKPT:: \n" +#endif + " VMOV R2, S1 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S0_S3_FAIL \n" + " LDR.W R1, =0xAAAAAAAA \n" + " VMOV S1, R1 \n" + " VMOV R2, S1 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S0_S3_FAIL \n" + " VMOV S1, R0 \n" + + " VMOV R0, S2 \n" /* S2 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S2, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S2_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S2_ASM_BKPT:: \n" +#endif + " VMOV R2, S2 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S0_S3_FAIL \n" + " LDR.W R1, =0xAAAAAAAA \n" + " VMOV S2, R1 \n" + " VMOV R2, S2 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S0_S3_FAIL \n" + " VMOV S2, R0 \n" + + " VMOV R0, S3 \n" /* S3 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S3, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S3_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S3_ASM_BKPT:: \n" +#endif + " VMOV R2, S3 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S0_S3_FAIL \n" + " LDR.W R1, =0xAAAAAAAA \n" + " VMOV S3, R1 \n" + " VMOV R2, S3 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S0_S3_FAIL \n" + " VMOV S3, R0 \n" + + " B IEC60730_CPU_REGS_FPU_S0_S3_PASS \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S0_S3_FAIL: \n" +#else + "IEC60730_CPU_REGS_FPU_S0_S3_FAIL:: \n" +#endif + " B IEC60730_CPU_REGS_FPU_S4_S7_FAIL \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S0_S3_PASS: \n" +#else + "IEC60730_CPU_REGS_FPU_S0_S3_PASS:: \n" +#endif + + " VMOV R0, S4 \n" /* S4 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S4, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S4_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S4_ASM_BKPT:: \n" +#endif + " VMOV R2, S4 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S4_S7_FAIL \n" + " LDR.W R1, =0xAAAAAAAA \n" + " VMOV S4, R1 \n" + " VMOV R2, S4 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S4_S7_FAIL \n" + " VMOV S4, R0 \n" + + " VMOV R0, S5 \n" /* S5 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S5, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S5_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S5_ASM_BKPT:: \n" +#endif + " VMOV R2, S5 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S4_S7_FAIL \n" + " LDR.W R1, =0xAAAAAAAA \n" + " VMOV S5, R1 \n" + " VMOV R2, S5 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S4_S7_FAIL \n" + " VMOV S5, R0 \n" + + " VMOV R0, S6 \n" /* S6 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S6, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S6_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S6_ASM_BKPT:: \n" +#endif + " VMOV R2, S6 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S4_S7_FAIL \n" + " LDR.W R1, =0xAAAAAAAA \n" + " VMOV S6, R1 \n" + " VMOV R2, S6 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S4_S7_FAIL \n" + " VMOV S6, R0 \n" + + " VMOV R0, S7 \n" /* S7 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S7, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S7_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S7_ASM_BKPT:: \n" +#endif + " VMOV R2, S7 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S4_S7_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S7, R1 \n" + " VMOV R2, S7 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S4_S7_FAIL \n" + " VMOV S7, R0 \n" + + " B IEC60730_CPU_REGS_FPU_S4_S7_PASS \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S4_S7_FAIL: \n" +#else + "IEC60730_CPU_REGS_FPU_S4_S7_FAIL:: \n" +#endif + " B IEC60730_CPU_REGS_FPU_S8_S11_FAIL \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S4_S7_PASS: \n" +#else + "IEC60730_CPU_REGS_FPU_S4_S7_PASS:: \n" +#endif + + " VMOV R0, S8 \n" /* S8 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S8, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S8_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S8_ASM_BKPT:: \n" +#endif + " VMOV R2, S8 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S8_S11_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S8, R1 \n" + " VMOV R2, S8 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S8_S11_FAIL \n" + " VMOV S8, R0 \n" + + " VMOV R0, S9 \n" /* S9 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S9, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S9_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S9_ASM_BKPT:: \n" +#endif + " VMOV R2, S9 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S8_S11_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S9, R1 \n" + " VMOV R2, S9 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S8_S11_FAIL \n" + " VMOV S9, R0 \n" + + " VMOV R0, S10 \n" /* S10 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S10, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S10_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S10_ASM_BKPT:: \n" +#endif + " VMOV R2, S10 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S8_S11_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S10, R1 \n" + " VMOV R2, S10 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S8_S11_FAIL \n" + " VMOV S10, R0 \n" + + " VMOV R0, S11 \n" /* S11 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S11, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S11_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S11_ASM_BKPT:: \n" +#endif + " VMOV R2, S11 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S8_S11_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S11, R1 \n" + " VMOV R2, S11 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S8_S11_FAIL \n" + " VMOV S11, R0 \n" + + " B IEC60730_CPU_REGS_FPU_S8_S11_PASS \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S8_S11_FAIL: \n" +#else + "IEC60730_CPU_REGS_FPU_S8_S11_FAIL:: \n" +#endif + " B IEC60730_CPU_REGS_FPU_S12_S15_FAIL \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S8_S11_PASS: \n" +#else + "IEC60730_CPU_REGS_FPU_S8_S11_PASS:: \n" +#endif + + " VMOV R0, S12 \n" /* S12 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S12, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S12_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S12_ASM_BKPT:: \n" +#endif + " VMOV R2, S12 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S12_S15_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S12, R1 \n" + " VMOV R2, S12 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S12_S15_FAIL \n" + " VMOV S12, R0 \n" + + " VMOV R0, S13 \n" /* S13 */ + " LDR R1, =0x55555555 \n" + " VMOV S13, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S13_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S13_ASM_BKPT:: \n" +#endif + " VMOV R2, S13 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S12_S15_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S13, R1 \n" + " VMOV R2, S13 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S12_S15_FAIL \n" + " VMOV S13, R0 \n" + + " VMOV R0, S14 \n" /* S14 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S14, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S14_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S14_ASM_BKPT:: \n" +#endif + " VMOV R2, S14 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S12_S15_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S14, R1 \n" + " VMOV R2, S14 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S12_S15_FAIL \n" + " VMOV S14, R0 \n" + + " VMOV R0, S15 \n" /* S15 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S15, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S15_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S15_ASM_BKPT:: \n" +#endif + " VMOV R2, S15 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S12_S15_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S15, R1 \n" + " VMOV R2, S15 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S12_S15_FAIL \n" + " VMOV S15, R0 \n" + + " B IEC60730_CPU_REGS_FPU_S12_S15_PASS \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S12_S15_FAIL: \n" +#else + "IEC60730_CPU_REGS_FPU_S12_S15_FAIL:: \n" +#endif + " B IEC60730_CPU_REGS_FPU_S16_S19_FAIL \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S12_S15_PASS: \n" +#else + "IEC60730_CPU_REGS_FPU_S12_S15_PASS:: \n" +#endif + + " VMOV R0, S16 \n" /* S16 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S16, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S16_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S16_ASM_BKPT:: \n" +#endif + " VMOV R2, S16 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S16_S19_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S16, R1 \n" + " VMOV R2, S16 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S16_S19_FAIL \n" + " VMOV S16, R0 \n" + + " VMOV R0, S17 \n" /* S17 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S17, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S17_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S17_ASM_BKPT:: \n" +#endif + " VMOV R2, S17 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S16_S19_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S17, R1 \n" + " VMOV R2, S17 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S16_S19_FAIL \n" + " VMOV S17, R0 \n" + + " VMOV R0, S18 \n" /* S18 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S18, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S18_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S18_ASM_BKPT:: \n" +#endif + " VMOV R2, S18 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S16_S19_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S18, R1 \n" + " VMOV R2, S18 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S16_S19_FAIL \n" + " VMOV S18, R0 \n" + + " VMOV R0, S19 \n" /* S19 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S19, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S19_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S19_ASM_BKPT:: \n" +#endif + " VMOV R2, S19 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S16_S19_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S19, R1 \n" + " VMOV R2, S19 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S16_S19_FAIL \n" + " VMOV S19, R0 \n" + + " B IEC60730_CPU_REGS_FPU_S16_S19_PASS \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S16_S19_FAIL: \n" +#else + "IEC60730_CPU_REGS_FPU_S16_S19_FAIL:: \n" +#endif + " B IEC60730_CPU_REGS_FPU_S20_S23_FAIL \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S16_S19_PASS: \n" +#else + "IEC60730_CPU_REGS_FPU_S16_S19_PASS:: \n" +#endif + + " VMOV R0, S20 \n" /* S20 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S20, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S20_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S20_ASM_BKPT:: \n" +#endif + " VMOV R2, S20 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S20_S23_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S20, R1 \n" + " VMOV R2, S20 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S20_S23_FAIL \n" + " VMOV S20, R0 \n" + + " VMOV R0, S21 \n" /* S21 */ + " LDR R1, =0x55555555 \n" + " VMOV S21, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S21_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S21_ASM_BKPT:: \n" +#endif + " VMOV R2, S21 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S20_S23_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S21, R1 \n" + " VMOV R2, S21 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S20_S23_FAIL \n" + " VMOV S21, R0 \n" + + " VMOV R0, S22 \n" /* S22 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S22, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S22_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S22_ASM_BKPT:: \n" +#endif + " VMOV R2, S22 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S20_S23_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S22, R1 \n" + " VMOV R2, S22 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S20_S23_FAIL \n" + " VMOV S22, R0 \n" + + " VMOV R0, S23 \n" /* S23 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S23, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S23_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S23_ASM_BKPT:: \n" +#endif + " VMOV R2, S23 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S20_S23_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S23, R1 \n" + " VMOV R2, S23 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S20_S23_FAIL \n" + " VMOV S23, R0 \n" + + " B IEC60730_CPU_REGS_FPU_S20_S23_PASS \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S20_S23_FAIL: \n" +#else + "IEC60730_CPU_REGS_FPU_S20_S23_FAIL:: \n" +#endif + " B IEC60730_CPU_REGS_FPU_S24_S27_FAIL \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S20_S23_PASS: \n" +#else + "IEC60730_CPU_REGS_FPU_S20_S23_PASS:: \n" +#endif + + " VMOV R0, S24 \n" /* S24 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S24, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S24_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S24_ASM_BKPT:: \n" +#endif + " VMOV R2, S24 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S24_S27_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S24, R1 \n" + " VMOV R2, S24 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S24_S27_FAIL \n" + " VMOV S24, R0 \n" + + " VMOV R0, S25 \n" /* S25 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S25, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S25_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S25_ASM_BKPT:: \n" +#endif + " VMOV R2, S25 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S24_S27_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S25, R1 \n" + " VMOV R2, S25 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S24_S27_FAIL \n" + " VMOV S25, R0 \n" + + " VMOV R0, S26 \n" /* S26 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S26, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S26_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S26_ASM_BKPT:: \n" +#endif + " VMOV R2, S26 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S24_S27_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S26, R1 \n" + " VMOV R2, S26 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S24_S27_FAIL \n" + " VMOV S26, R0 \n" + + " VMOV R0, S27 \n" /* S27 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S27, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S27_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S27_ASM_BKPT:: \n" +#endif + " VMOV R2, S27 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S24_S27_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S27, R1 \n" + " VMOV R2, S27 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_S24_S27_FAIL \n" + " VMOV S27, R0 \n" + + " B IEC60730_CPU_REGS_FPU_S24_S27_PASS \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S24_S27_FAIL: \n" +#else + "IEC60730_CPU_REGS_FPU_S24_S27_FAIL:: \n" +#endif + " B IEC60730_CPU_REGS_FPU_Sx_FAIL \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S24_S27_PASS: \n" +#else + "IEC60730_CPU_REGS_FPU_S24_S27_PASS:: \n" +#endif + + " VMOV R0, S28 \n" /* S28 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S28, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S28_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S28_ASM_BKPT:: \n" +#endif + " VMOV R2, S28 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_Sx_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S28, R1 \n" + " VMOV R2, S28 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_Sx_FAIL \n" + " VMOV S28, R0 \n" + + " VMOV R0, S29 \n" /* S29 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S29, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S29_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S29_ASM_BKPT:: \n" +#endif + " VMOV R2, S29 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_Sx_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S29, R1 \n" + " VMOV R2, S29 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_Sx_FAIL \n" + " VMOV S29, R0 \n" + + " VMOV R0, S30 \n" /* S30 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S30, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S30_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S30_ASM_BKPT:: \n" +#endif + " VMOV R2, S30 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_Sx_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S30, R1 \n" + " VMOV R2, S30 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_Sx_FAIL \n" + " VMOV S30, R0 \n" + + " VMOV R0, S31 \n" /* S31 */ + " LDR.W R1, =0x55555555 \n" + " VMOV S31, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_S31_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_S31_ASM_BKPT:: \n" +#endif + " VMOV R2, S31 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_Sx_FAIL \n" + " LDR R1, =0xAAAAAAAA \n" + " VMOV S31, R1 \n" + " VMOV R2, S31 \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FPU_Sx_FAIL \n" + " VMOV S31, R0 \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_Sx_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FPU_Sx_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " B IEC60730_CPU_REGS_FPU_Sx_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_Sx_FAIL: \n" +#else + "IEC60730_CPU_REGS_FPU_Sx_FAIL:: \n" +#endif + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FPU_Sx_DONE: \n" +#else + "IEC60730_CPU_REGS_FPU_Sx_DONE::\n" +#endif + " LDR.W R1, =0xE000ED88 \n" + " STR R5, [R1, #0] \n" /* Restore CPACR */ + " LDR.W R1, =0xE000EF34 \n" + " STR R6, [R1, #0] \n" /* Restore FPCCR */ + " VMSR FPSCR, R4 \n" /* Restore FPSCR */ + " LDMIA SP!, {R4, R5, R6} \n" + " CPSIE i \n" /*Enable IRQ Interrupts*/ + : "=r" (result)::"memory"); +#endif + return result; +} +#endif // ((defined (__FPU_PRESENT) && (__FPU_USED == 1U)) + +/** @} (end addtogroup IEC60730_CPUREG_Test) */ +/** @} (end addtogroup efr32_iec60730) */ diff --git a/lib/src/sl_iec60730_cpu_registers_ns.c b/lib/src/sl_iec60730_cpu_registers_ns.c new file mode 100644 index 00000000..c0e934d7 --- /dev/null +++ b/lib/src/sl_iec60730_cpu_registers_ns.c @@ -0,0 +1,674 @@ +/***************************************************************************/ /** + * @file sl_iec60730_cpu_registers_ns.c + * @brief CPU Registers check non-secure + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ +#include "sl_iec60730_cpu_registers.h" + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_CPUREG_Test + * @{ + *****************************************************************************/ +#ifdef UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE +extern sl_iec60730_test_result_t unit_test_iec60730_cpu_registers_bist_ns_mock(void); +#endif // UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE + +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_msp_ns(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_psp_ns(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_msplim_ns(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_psplim_ns(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_control_ns(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_primask_ns(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_basepri_ns(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_faultmask_ns(void); +#endif + +/**************************************************************************/ /** + * public IEC60730 CPU Registers Built In Self Test + * + * @returns #sl_iec60730_test_result_t + * @returns #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function will do a test of all the CPU core registers non-secure + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; +#if (IEC60370_CPU == IEC60370_CM33) +#if defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) + +#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + /* Test Main Stack Pointer Non Secure */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_msp_ns()) { + goto CPU_REGISTERS_BIST_NS_DONE; + } + + /* Test Process Stack Pointer Non Secure */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_psp_ns()) { + goto CPU_REGISTERS_BIST_NS_DONE; + } + + /* Test Main Stack Pointer Limit Non Secure */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_msplim_ns()) { + goto CPU_REGISTERS_BIST_NS_DONE; + } + + /* Test Process Stack Pointer Limit None Secure */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_psplim_ns()) { + goto CPU_REGISTERS_BIST_NS_DONE; + } + + /* Test Control None Secure register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_control_ns()) { + goto CPU_REGISTERS_BIST_NS_DONE; + } + + /* Test Primask Non Secure register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_primask_ns()) { + goto CPU_REGISTERS_BIST_NS_DONE; + } + + /* Test BasePri Non Secure register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_basepri_ns()) { + goto CPU_REGISTERS_BIST_NS_DONE; + } + + /* Test FaultMask Non Secure register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_faultmask_ns()) { + goto CPU_REGISTERS_BIST_NS_DONE; + } + +#ifdef UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE + if (SL_IEC60730_TEST_FAILED == unit_test_iec60730_cpu_registers_bist_ns_mock()) { + goto CPU_REGISTERS_BIST_NS_DONE; + } +#endif // UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE + + result = SL_IEC60730_TEST_PASSED; + + CPU_REGISTERS_BIST_NS_DONE: + +#endif +#else +#error the CM33 without TZ is not supported +#endif // defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) +#endif // (IEC60370_CPU == IEC60370_CM33) + + return result; +} + +/**************************************************************************/ /** + * private IEC60730 CPU Register MSP Non-Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the MSP_NS (Main Stack Pointer, Non-Secure) register. + * If MSP_NS is corrupted, the function stucks in an endless loop with + * interrupts disabled. This state must be observed by another safety mechanism + * (for example, watchdog). + * Test patterns: 0xAAAAAAA8, 0x55555554 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_msp_ns(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R3, CONTROL_NS \n" /*Save Control value */ + " MRS R0, MSP_NS \n" /*Save stack value */ + " LDR R1, =0xAAAAAAA8 \n" + " MSR MSP_NS, R1 \n" /*load stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSP_NS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_MSP_NS_ASM_BKPT:: \n" +#endif + " MRS R2, MSP_NS \n" /*Get back stack value */ + " CMP R2, R1 \n" /*Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_MSP_NS \n" + " LDR R1, =0x55555554 \n" + " MSR MSP_NS, R1 \n" /* load stack value */ + " MRS R2, MSP_NS \n" /* Get back stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_MSP_NS \n" + " MSR MSP_NS, R0 \n" /* Restore stack value */ + " MSR CONTROL_NS, R3 \n" /* Restore Control value */ + " B IEC60730_CPU_REGS_MSP_NS_PASS_ASM_BKPT \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_FAIL_ENDLESS_LOOP_MSP_NS: \n" +#else + "IEC60730_FAIL_ENDLESS_LOOP_MSP_NS:: \n" +#endif + " MSR MSP_NS, R0 \n" /* Restore stack value */ + " MSR CONTROL_NS, R3 \n" /* Restore Control value */ + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + " B IEC60730_CPU_REGS_MSP_NS_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSP_NS_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_MSP_NS_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSP_NS_DONE: \n" +#else + "IEC60730_CPU_REGS_MSP_NS_DONE:: \n" +#endif + : "=r" (result)::"memory"); /* set output variable result*/ + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register PSP Non-Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the PSP_NS (Process Stack Pointer, Non-Secure) register. + * If PSP_NS is corrupted, the function stucks in an endless loop with + * interrupts disabled. This state must be observed by another safety mechanism + * (for example, watchdog). + * Test patterns: 0xAAAAAAA8, 0x55555554 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_psp_ns(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R3, CONTROL_NS \n" /* Save Control value */ + " MRS R0, PSP_NS \n" /* Save process stack value */ + " LDR R1, =0xAAAAAAA8 \n" + " MSR PSP_NS, R1 \n" /* load process stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSP_NS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PSP_NS_ASM_BKPT:: \n" +#endif + " MRS R2, PSP_NS \n" /* Get back process stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_PSP_NS \n" + " LDR R1, =0x55555554 \n" + " MSR PSP_NS, R1 \n" /* load process stack value */ + " MRS R2, PSP_NS \n" /* Get back process stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_PSP_NS \n" + " MSR PSP_NS, R0 \n" /* Restore process stack value */ + " MSR CONTROL_NS, R3 \n" /* Restore Control value */ + " B IEC60730_CPU_REGS_PSP_NS_PASS_ASM_BKPT \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_FAIL_ENDLESS_LOOP_PSP_NS: \n" +#else + "IEC60730_FAIL_ENDLESS_LOOP_PSP_NS:: \n" +#endif + " MSR MSP_NS, R0 \n" /* Restore stack value */ + " MSR CONTROL_NS, R3 \n" /* Restore Control value */ + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + " B IEC60730_CPU_REGS_PSP_NS_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSP_NS_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PSP_NS_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSP_NS_DONE: \n" +#else + "IEC60730_CPU_REGS_PSP_NS_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register MSPLIM Non-Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the MSPLIM_NS (Main Stack Pointer Limit, Non-Secure) + * register. If MSPLIM_NS is corrupted, the function stucks in an endless loop + * with interrupts disabled. This state must be observed by another safety + * mechanism (for example, watchdog). + * Test patterns: 0xAAAAAAA8, 0x55555550 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_msplim_ns(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R3, CONTROL_NS \n" /* Save Control value */ + " MRS R0, MSPLIM_NS \n" /* Save stack value */ + " LDR R1, =0xAAAAAAA8 \n" + " MSR MSPLIM_NS, R1 \n" /* load stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSPLIM_NS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_MSPLIM_NS_ASM_BKPT:: \n" +#endif + " MRS R2, MSPLIM_NS \n" /* Get back stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_MSPLIM_NS \n" + " LDR R1, =0x55555550 \n" + " MSR MSPLIM_NS, R1 \n" /* load stack value */ + " MRS R2, MSPLIM_NS \n" /* Get back stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_MSPLIM_NS \n" + " MSR MSPLIM_NS, R0 \n" /* Restore stack value */ + " MSR CONTROL_NS, R3 \n" /* Restore Control value */ + " B IEC60730_CPU_REGS_MSPLIM_NS_PASS_ASM_BKPT \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_FAIL_ENDLESS_LOOP_MSPLIM_NS: \n" +#else + "IEC60730_FAIL_ENDLESS_LOOP_MSPLIM_NS:: \n" +#endif + " MSR MSPLIM, R0 \n" /* Restore stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + " B IEC60730_CPU_REGS_MSPLIM_NS_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSPLIM_NS_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_MSPLIM_NS_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSPLIM_NS_DONE: \n" +#else + "IEC60730_CPU_REGS_MSPLIM_NS_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register PSPLIM Non-Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the PSPLIM_NS (Process Stack Pointer Limit, Non-Secure) + * register. If PSPLIM_NS is corrupted, the function stucks in an endless loop + * with interrupts disabled. This state must be observed by another safety + * mechanism (for example, watchdog). + * Test patterns: 0xAAAAAAA8, 0x55555550 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_psplim_ns(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R3, CONTROL_NS \n" /* Save Control value */ + " MRS R0, PSPLIM_NS \n" /* Save stack value */ + " LDR R1, =0xAAAAAAA8 \n" + " MSR PSPLIM_NS, R1 \n" /* load stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSPLIM_NS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PSPLIM_NS_ASM_BKPT:: \n" +#endif + " MRS R2, PSPLIM_NS \n" /* Get back process stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_PSPLIM_NS \n" + " LDR R1, =0x55555550 \n" + " MSR PSPLIM_NS, R1 \n" /* load stack value */ + " MRS R2, PSPLIM_NS \n" /* Get back stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_PSPLIM_NS \n" + " MSR PSPLIM_NS, R0 \n" /* Restore stack value */ + " MSR CONTROL_NS, R3 \n" /* Restore Control value */ + " B IEC60730_CPU_REGS_PSPLIM_NS_PASS_ASM_BKPT \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_FAIL_ENDLESS_LOOP_PSPLIM_NS: \n" +#else + "IEC60730_FAIL_ENDLESS_LOOP_PSPLIM_NS:: \n" +#endif + " MSR PSPLIM_NS, R0 \n" /* Restore stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + " B IEC60730_CPU_REGS_PSPLIM_NS_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSPLIM_NS_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PSPLIM_NS_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSPLIM_NS_DONE: \n" +#else + "IEC60730_CPU_REGS_PSPLIM_NS_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register Control Non-Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the Control_NS (Control, Non-Secure) register. + * Test patterns: 0x00000002, 0x00000004 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_control_ns(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, CONTROL_NS \n" + " MOVS R1, #0x2 \n" + " MSR CONTROL_NS, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_NS_SPSEL_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_NS_SPSEL_ASM_BKPT:: \n" +#endif + " MRS R2, CONTROL_NS \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_CONTROL_NS_FAIL \n" + " MOVW R1, #0x4 \n" + " MSR CONTROL_NS, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_NS_FPCA_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_NS_FPCA_ASM_BKPT:: \n" +#endif + " MRS R2, CONTROL_NS \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_CONTROL_NS_FAIL \n" + " MSR CONTROL_NS, R0 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_NS_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_NS_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_CONTROL_NS_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_NS_FAIL: \n" +#else + "IEC60730_CPU_REGS_CONTROL_NS_FAIL:: \n" +#endif +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_NS_FAIL_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_NS_FAIL_ASM_BKPT:: \n" +#endif + " MSR CONTROL_NS, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_NS_DONE: \n" +#else + "IEC60730_CPU_REGS_CONTROL_NS_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register PriMask Non-Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the PriMask_NS (PriMask, Non-Secure) register. + * Test patterns: 0x00000001, 0x00000000 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_primask_ns(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, PRIMASK_NS \n" + " MOVW R1, #0x0001 \n" + " MSR PRIMASK_NS, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_NS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_NS_ASM_BKPT:: \n" +#endif + " MRS R2, PRIMASK_NS \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_PRIMASK_NS_FAIL \n" + " MOVW R1, #0x0000 \n" + " MSR PRIMASK_NS, R1 \n" + " MRS R2, PRIMASK_NS \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_PRIMASK_NS_FAIL \n" + " MSR PRIMASK_NS, R0 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_NS_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_NS_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_PRIMASK_NS_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_NS_FAIL: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_NS_FAIL:: \n" +#endif + " MSR PRIMASK_NS, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_NS_DONE: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_NS_DONE: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register BasePri Non-Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the BASEPRI_NS (BasePri, Non-Secure) register. + * Test patterns: 0x000000A0, 0x00000040 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_basepri_ns(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, BASEPRI_NS \n" + " MOV R1, #0xA0 \n" + " MSR BASEPRI_NS, R1 \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_NS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_NS_ASM_BKPT:: \n" +#endif + " MRS R2, BASEPRI_NS \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_BASEPRI_NS_FAIL \n" + " MOV R1, #0x40 \n" + " MSR BASEPRI_NS, R1 \n" + " MRS R2, BASEPRI_NS \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_BASEPRI_NS_FAIL \n" + " MSR BASEPRI_NS, R0 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_NS_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_NS_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_BASEPRI_NS_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_NS_FAIL: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_NS_FAIL:: \n" +#endif + " MSR BASEPRI_NS, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_NS_DONE: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_NS_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register FaultMask Non-Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the FAULTMASK_NS (FaultMask, Non-Secure) register. + * Test patterns: 0x00000001, 0x00000000 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_faultmask_ns(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, FAULTMASK_NS \n" + " MOV R1, #1 \n" + " MSR FAULTMASK_NS, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_NS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_NS_ASM_BKPT:: \n" +#endif + " MRS R2, FAULTMASK_NS \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FAULTMASK_NS_FAIL \n" + " MOV R1, #0 \n" + " MSR FAULTMASK_NS, R1 \n" + " MRS R2, FAULTMASK_NS \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FAULTMASK_NS_FAIL \n" + " MSR FAULTMASK_NS, R0 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_NS_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_NS_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_FAULTMASK_NS_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_NS_FAIL: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_NS_FAIL:: \n" +#endif + " MSR FAULTMASK_NS, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_NS_DONE: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_NS_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif diff --git a/lib/src/sl_iec60730_cpu_registers_s.c b/lib/src/sl_iec60730_cpu_registers_s.c new file mode 100644 index 00000000..05a9e77a --- /dev/null +++ b/lib/src/sl_iec60730_cpu_registers_s.c @@ -0,0 +1,679 @@ +/***************************************************************************/ /** + * @file sl_iec60730_cpu_registers_s.c + * @brief CPU Registers check secure + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ +#include "sl_iec60730_cpu_registers.h" + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_CPUREG_Test + * @{ + *****************************************************************************/ +#ifdef UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE +extern sl_iec60730_test_result_t unit_test_iec60730_cpu_registers_bist_s_mock(void); +#endif // UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE + +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_msp_s(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_psp_s(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_msplim_s(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_psplim_s(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_control_s(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_primask_s(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_basepri_s(void); +static sl_iec60730_test_result_t sl_iec60730_cpu_registers_faultmask_s(void); +#endif + +/**************************************************************************/ /** + * public IEC60730 CPU Registers Built In Self Test + * + * @returns #sl_iec60730_test_result_t + * @returns #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function will do a test of all the CPU core registers secure + *****************************************************************************/ +sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + +#if (IEC60370_CPU == IEC60370_CM33) +#if defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) + +#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + /* Test Main Stack Pointer Secure */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_msp_s()) { + goto CPU_REGISTERS_BIST_S_DONE; + } + + /* Test Process Stack Pointer Secure */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_psp_s()) { + goto CPU_REGISTERS_BIST_S_DONE; + } + + /* Test Main Stack Pointer Limit Secure */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_msplim_s()) { + goto CPU_REGISTERS_BIST_S_DONE; + } + + /* Test Process Stack Pointer Limit Secure */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_psplim_s()) { + goto CPU_REGISTERS_BIST_S_DONE; + } + + /* Test Control Secure register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_control_s()) { + goto CPU_REGISTERS_BIST_S_DONE; + } + + /* Test Primask Secure register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_primask_s()) { + goto CPU_REGISTERS_BIST_S_DONE; + } + + /* Test BasePri Secure register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_basepri_s()) { + goto CPU_REGISTERS_BIST_S_DONE; + } + + /* Test FaultMask Secure register */ + if (SL_IEC60730_TEST_FAILED == sl_iec60730_cpu_registers_faultmask_s()) { + goto CPU_REGISTERS_BIST_S_DONE; + } + +#ifdef UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE + if (SL_IEC60730_TEST_FAILED == unit_test_iec60730_cpu_registers_bist_s_mock()) { + goto CPU_REGISTERS_BIST_S_DONE; + } +#endif // UNIT_TEST_IEC60730_CPU_REGISTERS_ENABLE + + result = SL_IEC60730_TEST_PASSED; + + CPU_REGISTERS_BIST_S_DONE: + +#endif +#else +#error the CM33 without TZ is not supported +#endif // defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) +#endif // (IEC60370_CPU == IEC60370_CM33) + + return result; +} + +/**************************************************************************/ /** + * private IEC60730 CPU Register MSP Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the MSPS (Main Stack Pointer, Secure) register. + * If MSP_S is corrupted, the function stucks in an endless loop with + * interrupts disabled. This state must be observed by another safety mechanism + * (for example, watchdog). + * Test patterns: 0xAAAAAAA8, 0x55555554 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_msp_s(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R3, CONTROL \n" /* Save Control value */ + " MRS R0, MSP \n" /* Save stack value */ + " LDR R1, =0xAAAAAAA8 \n" + " MSR MSP, R1 \n" /* load stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSP_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_MSP_S_ASM_BKPT:: \n" +#endif + " MRS R2, MSP \n" /* Get back stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_MSP_S \n" + " LDR R1, =0x55555554 \n" + " MSR MSP, R1 \n" /* load stack value */ + " MRS R2, MSP \n" /* Get back stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_MSP_S \n" + " MSR MSP, R0 \n" /* Restore stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " B IEC60730_CPU_REGS_MSP_S_PASS_ASM_BKPT \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_FAIL_ENDLESS_LOOP_MSP_S: \n" +#else + "IEC60730_FAIL_ENDLESS_LOOP_MSP_S:: \n" +#endif + " MSR MSP, R0 \n" /* Restore stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + " B IEC60730_CPU_REGS_MSP_S_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSP_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_MSP_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSP_S_DONE: \n" +#else + "IEC60730_CPU_REGS_MSP_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); /* set output variable result*/ + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register PSP Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the PSP_S (Process Stack Pointer, Secure) register. + * If PSP_S is corrupted, the function stucks in an endless loop with + * interrupts disabled. This state must be observed by another safety mechanism + * (for example, watchdog). + * Test patterns: 0xAAAAAAA8, 0x55555554 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_psp_s(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R3, CONTROL \n" /* Save Control value */ + " MRS R0, PSP \n" /* Save process stack value */ + " LDR R1, =0xAAAAAAA8 \n" + " MSR PSP, R1 \n" /* load process stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSP_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PSP_S_ASM_BKPT:: \n" +#endif + " MRS R2, PSP \n" /* Get back process stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_PSP_S \n" + " LDR R1, =0x55555554 \n" + " MSR PSP, R1 \n" /* load process stack value */ + " MRS R2, PSP \n" /* Get back process stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_PSP_S \n" + " MSR PSP, R0 \n" /* Restore process stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " B IEC60730_CPU_REGS_PSP_S_PASS_ASM_BKPT \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_FAIL_ENDLESS_LOOP_PSP_S: \n" +#else + "IEC60730_FAIL_ENDLESS_LOOP_PSP_S:: \n" +#endif + " MSR PSP, R0 \n" /* Restore stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + " B IEC60730_CPU_REGS_PSP_S_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSP_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PSP_S_PASS_ASM_BKPT:: \n" +#endif + + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSP_S_DONE: \n" +#else + "IEC60730_CPU_REGS_PSP_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register MSPLIM Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the MSPLIM_S (Main Stack Pointer Limit, Secure) + * register. If MSPLIM_S is corrupted, the function stucks in an endless loop + * with interrupts disabled. This state must be observed by another safety + * mechanism (for example, watchdog). + * Test patterns: 0xAAAAAAA8, 0x55555550 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_msplim_s(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R3, CONTROL \n" /* Save Control value */ + " MRS R0, MSPLIM \n" /* Save stack value */ + " LDR R1, =0xAAAAAAA8 \n" + " MSR MSPLIM, R1 \n" /* load stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSPLIM_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_MSPLIM_S_ASM_BKPT:: \n" +#endif + " MRS R2, MSPLIM \n" /* Get back stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_MSPLIM_S \n" + " LDR R1, =0x55555550 \n" + " MSR MSPLIM, R1 \n" /* load stack value */ + " MRS R2, MSPLIM \n" /* Get back stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_MSPLIM_S \n" + " MSR MSPLIM, R0 \n" /* Restore stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " B IEC60730_CPU_REGS_MSPLIM_S_PASS_ASM_BKPT \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_FAIL_ENDLESS_LOOP_MSPLIM_S: \n" +#else + "IEC60730_FAIL_ENDLESS_LOOP_MSPLIM_S:: \n" +#endif + " MSR MSPLIM, R0 \n" /* Restore stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + " B IEC60730_CPU_REGS_MSPLIM_S_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSPLIM_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_MSPLIM_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_MSPLIM_S_DONE: \n" +#else + "IEC60730_CPU_REGS_MSPLIM_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register PSPLIM Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the PSPLIM_S (Process Stack Pointer Limit, Secure) + * register. If PSPLIM_S is corrupted, the function stucks in an endless loop + * with interrupts disabled. This state must be observed by another safety + * mechanism (for example, watchdog). + * Test patterns: 0xAAAAAAA8, 0x55555550 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_psplim_s(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R3, CONTROL \n" /* Save Control value */ + " MRS R0, PSPLIM \n" /* Save process stack value */ + " LDR R1, =0xAAAAAAA8 \n" + " MSR PSPLIM, R1 \n" /* load process stack value */ +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSPLIM_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PSPLIM_S_ASM_BKPT:: \n" +#endif + " MRS R2, PSPLIM \n" /* Get back process stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_PSPLIM_S \n" + " LDR R1, =0x55555550 \n" + " MSR PSPLIM, R1 \n" /* load process stack value */ + " MRS R2, PSPLIM \n" /* Get back process stack value */ + " CMP R2, R1 \n" /* Verify value */ + " BNE IEC60730_FAIL_ENDLESS_LOOP_PSPLIM_S \n" + " MSR PSPLIM, R0 \n" /* Restore process stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " B IEC60730_CPU_REGS_PSPLIM_S_PASS_ASM_BKPT \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_FAIL_ENDLESS_LOOP_PSPLIM_S: \n" +#else + "IEC60730_FAIL_ENDLESS_LOOP_PSPLIM_S:: \n" +#endif + " MSR PSPLIM, R0 \n" /* Restore stack value */ + " MSR CONTROL, R3 \n" /* Restore Control value */ + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + " B IEC60730_CPU_REGS_PSPLIM_S_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSPLIM_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PSPLIM_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PSPLIM_S_DONE: \n" +#else + "IEC60730_CPU_REGS_PSPLIM_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register Control Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the Control_S (Control, Secure) register. + * Test patterns: 0x0000000A, 0x00000004 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_control_s(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, CONTROL \n" + " MOVW R1, #0x000A \n" + " MSR CONTROL, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_SPSEL_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_SPSEL_ASM_BKPT:: \n" +#endif + " MRS R2, CONTROL \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_CONTROL_S_FAIL \n" + " MOVW R1, #0x4 \n" + " MSR CONTROL, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_FPCA_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_FPCA_ASM_BKPT:: \n" +#endif + " MRS R2, CONTROL \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_CONTROL_S_FAIL \n" + " MSR CONTROL, R0 \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_CONTROL_S_DONE \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_FAIL: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_FAIL:: \n" +#endif +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_FAIL_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_FAIL_ASM_BKPT:: \n" +#endif + " MSR CONTROL, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_CONTROL_S_DONE: \n" +#else + "IEC60730_CPU_REGS_CONTROL_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register PriMask Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the PriMask_S (PriMask, Secure) register. + * Test patterns: 0x00000001, 0x00000000 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_primask_s(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, PRIMASK \n" + " MOVW R1, #0x0001 \n" + " MSR PRIMASK, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_S_ASM_BKPT:: \n" +#endif + " MRS R2, PRIMASK \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_PRIMASK_S_FAIL \n" + " MOVW R1, #0x0000 \n" + " MSR PRIMASK, R1 \n" + " MRS R2, PRIMASK \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_PRIMASK_S_FAIL \n" + " MSR PRIMASK, R0 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_PRIMASK_S_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_S_FAIL: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_S_FAIL:: \n" +#endif + " MSR PRIMASK, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_PRIMASK_S_DONE: \n" +#else + "IEC60730_CPU_REGS_PRIMASK_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register BasePri Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the BASEPRI (BasePri, Secure) register. + * Test patterns: 0x000000A0, 0x00000040 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_basepri_s(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, BASEPRI \n" + " MOV R1, #0xA0 \n" + " MSR BASEPRI, R1 \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_S_ASM_BKPT:: \n" +#endif + " MRS R2, BASEPRI \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_BASEPRI_S_FAIL \n" + " MOV R1, #0x40 \n" + " MSR BASEPRI, R1 \n" + " MRS R2, BASEPRI \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_BASEPRI_S_FAIL \n" + " MSR BASEPRI, R0 \n" + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_BASEPRI_S_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_S_FAIL: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_S_FAIL:: \n" +#endif + " MSR BASEPRI, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_BASEPRI_S_DONE: \n" +#else + "IEC60730_CPU_REGS_BASEPRI_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif + +/**************************************************************************/ /** + * private IEC60730 CPU Register FaultMask Secure Check + * + * @returns #sl_iec60730_test_result_t + * #SL_IEC60730_TEST_FAILED means test failed, + * #SL_IEC60730_TEST_PASSED means test passed. + * + * This function tests the FAULTMASK (FaultMask, Secure) register. + * Test patterns: 0x00000001, 0x00000000 + * @warning This function cannot be interrupted. The core must be in the + * secure state. + *****************************************************************************/ +#if ((IEC60370_CPU == IEC60370_CM33) && defined(__TZ_PRESENT) \ + && (__TZ_PRESENT == 1)) \ + && defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +sl_iec60730_test_result_t sl_iec60730_cpu_registers_faultmask_s(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_PASSED; + + __asm volatile( + " CPSID i \n" /*Disable IRQ Interrupts*/ + " MRS R0, FAULTMASK \n" + " MOV R1, #1 \n" + " MSR FAULTMASK, R1 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_S_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_S_ASM_BKPT:: \n" +#endif + " MRS R2, FAULTMASK \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FAULTMASK_S_FAIL \n" + " MOV R1, #0 \n" + " MSR FAULTMASK, R1 \n" + " MRS R2, FAULTMASK \n" + " CMP R2, R1 \n" + " BNE IEC60730_CPU_REGS_FAULTMASK_S_FAIL \n" + " MSR FAULTMASK, R0 \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_S_PASS_ASM_BKPT: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_S_PASS_ASM_BKPT:: \n" +#endif + " MOVS %0, #0x1 \n" /* result equal SL_IEC60730_TEST_PASSED*/ + " CPSIE i \n" /*Enable IRQ Interrupts*/ + " B IEC60730_CPU_REGS_FAULTMASK_S_DONE \n" +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_S_FAIL: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_S_FAIL:: \n" +#endif + " MSR FAULTMASK, R0 \n" + " MOVS %0, #0x0 \n" /* result equal SL_IEC60730_TEST_FAILED*/ + +#ifndef IAR_TESTING /* GCC */ + "IEC60730_CPU_REGS_FAULTMASK_S_DONE: \n" +#else + "IEC60730_CPU_REGS_FAULTMASK_S_DONE:: \n" +#endif + : "=r" (result)::"memory"); + + return result; +} +#endif diff --git a/lib/src/sl_iec60730_invariable_memory.c b/lib/src/sl_iec60730_invariable_memory.c new file mode 100644 index 00000000..22514e0c --- /dev/null +++ b/lib/src/sl_iec60730_invariable_memory.c @@ -0,0 +1,594 @@ +/***************************************************************************/ /** + * @file + * @brief Invariable memory check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include +#ifdef UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE +#include "unit_test_iec60730_invariable_memory.h" +#endif +#include "sl_iec60730_internal.h" + +static __no_init sl_iec60730_imc_test_multiple_regions_t iec60730_imc_test_config __CLASSB_RAM; +/// definition check_sum +void *def_checksum = SL_IEC60730_ROM_END; +static bool iec60730_imc_init_flag = false; + +#if (SL_IEC60730_CRC_USE_SW_ENABLE == 1) +sl_static_dec_classb_vars(sl_iec60730_crc_t, iec60730_cur_crc); +sl_static_dec_classb_vars(sl_iec60730_crc_t, iec60730_ref_crc); +sl_static_dec_classb_vars(uint8_t *, iec60730_run_crc); + +#if (SL_IEC60730_SW_CRC_TABLE_ENABLE == 1) +#if (SL_IEC60730_USE_CRC_32_ENABLE == 1) +static const sl_iec60730_crc_t iec60730_crc_table[256] = { + 0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA, 0x076DC419, 0x706AF48F, + 0xE963A535, 0x9E6495A3, 0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988, + 0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91, 0x1DB71064, 0x6AB020F2, + 0xF3B97148, 0x84BE41DE, 0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7, + 0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC, 0x14015C4F, 0x63066CD9, + 0xFA0F3D63, 0x8D080DF5, 0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172, + 0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B, 0x35B5A8FA, 0x42B2986C, + 0xDBBBC9D6, 0xACBCF940, 0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59, + 0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116, 0x21B4F4B5, 0x56B3C423, + 0xCFBA9599, 0xB8BDA50F, 0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924, + 0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D, 0x76DC4190, 0x01DB7106, + 0x98D220BC, 0xEFD5102A, 0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433, + 0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818, 0x7F6A0DBB, 0x086D3D2D, + 0x91646C97, 0xE6635C01, 0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E, + 0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457, 0x65B0D9C6, 0x12B7E950, + 0x8BBEB8EA, 0xFCB9887C, 0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65, + 0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2, 0x4ADFA541, 0x3DD895D7, + 0xA4D1C46D, 0xD3D6F4FB, 0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0, + 0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9, 0x5005713C, 0x270241AA, + 0xBE0B1010, 0xC90C2086, 0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F, + 0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4, 0x59B33D17, 0x2EB40D81, + 0xB7BD5C3B, 0xC0BA6CAD, 0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A, + 0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683, 0xE3630B12, 0x94643B84, + 0x0D6D6A3E, 0x7A6A5AA8, 0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1, + 0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE, 0xF762575D, 0x806567CB, + 0x196C3671, 0x6E6B06E7, 0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC, + 0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5, 0xD6D6A3E8, 0xA1D1937E, + 0x38D8C2C4, 0x4FDFF252, 0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B, + 0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60, 0xDF60EFC3, 0xA867DF55, + 0x316E8EEF, 0x4669BE79, 0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236, + 0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F, 0xC5BA3BBE, 0xB2BD0B28, + 0x2BB45A92, 0x5CB36A04, 0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D, + 0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A, 0x9C0906A9, 0xEB0E363F, + 0x72076785, 0x05005713, 0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38, + 0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21, 0x86D3D2D4, 0xF1D4E242, + 0x68DDB3F8, 0x1FDA836E, 0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777, + 0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C, 0x8F659EFF, 0xF862AE69, + 0x616BFFD3, 0x166CCF45, 0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2, + 0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB, 0xAED16A4A, 0xD9D65ADC, + 0x40DF0B66, 0x37D83BF0, 0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9, + 0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6, 0xBAD03605, 0xCDD70693, + 0x54DE5729, 0x23D967BF, 0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94, + 0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D, +}; +#else /* !SL_IEC60730_USE_CRC_32_ENABLE */ +static const sl_iec60730_crc_t iec60730_crc_table[256] = { + 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7, 0x8108, + 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF, 0x1231, 0x0210, + 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6, 0x9339, 0x8318, 0xB37B, + 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE, 0x2462, 0x3443, 0x0420, 0x1401, + 0x64E6, 0x74C7, 0x44A4, 0x5485, 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, + 0xF5CF, 0xC5AC, 0xD58D, 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, + 0x5695, 0x46B4, 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, + 0xC7BC, 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823, + 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B, 0x5AF5, + 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12, 0xDBFD, 0xCBDC, + 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A, 0x6CA6, 0x7C87, 0x4CE4, + 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41, 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, + 0xAD2A, 0xBD0B, 0x8D68, 0x9D49, 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, + 0x2E32, 0x1E51, 0x0E70, 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, + 0x9F59, 0x8F78, 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, + 0xE16F, 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067, + 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E, 0x02B1, + 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256, 0xB5EA, 0xA5CB, + 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D, 0x34E2, 0x24C3, 0x14A0, + 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, 0xA7DB, 0xB7FA, 0x8799, 0x97B8, + 0xE75F, 0xF77E, 0xC71D, 0xD73C, 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, + 0x7676, 0x4615, 0x5634, 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, + 0xB98A, 0xA9AB, 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, + 0x28A3, 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A, + 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92, 0xFD2E, + 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9, 0x7C26, 0x6C07, + 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1, 0xEF1F, 0xFF3E, 0xCF5D, + 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8, 0x6E17, 0x7E36, 0x4E55, 0x5E74, + 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0, +}; +#endif /* SL_IEC60730_USE_CRC_32_ENABLE */ +#endif /* SL_IEC60730_SW_CRC_TABLE_ENABLE */ + +static sl_iec60730_crc_t sli_iec_60730_cal_crc(sl_iec60730_crc_t crc, uint8_t *buf, uint32_t len); + +void sl_iec60730_imc_init(sl_iec60730_imc_params_t *params, sl_iec60730_imc_test_multiple_regions_t *test_config) +{ + UNUSED_VAR(params); + if ((NULL == test_config) || (test_config->region == NULL) + || (test_config->number_of_test_regions == 0)) { + return; + } + + iec60730_imc_test_config.region = test_config->region; + iec60730_imc_test_config.number_of_test_regions = test_config->number_of_test_regions; + // Don't use macro in this case + #ifndef UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE + iec60730_run_crc = (uint8_t *) iec60730_imc_test_config.region[0].start; + #else + iec60730_run_crc = (uint8_t *) unit_test_iec60730_imc_mock_init_run_crc(); + #endif // UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE + iec60730_run_crc_inv = ((uint8_t *) ~((uint32_t) iec60730_run_crc)); + + iec60730_cur_crc = SL_IEC60730_IMC_INIT_VALUE; + INV_CLASSB_VAR(sl_iec60730_crc_t, iec60730_cur_crc); + iec60730_imc_init_flag = true; +} + +sl_iec60730_test_result_t sl_iec60730_imc_post(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + uint32_t iec60730_rom_size = 0; + uint8_t current_test_region = 0; + + if (!iec60730_imc_init_flag) { + goto IMC_POST_DONE; + } + + while (current_test_region < iec60730_imc_test_config.number_of_test_regions) { + if ((uint32_t) iec60730_imc_test_config.region[current_test_region].start + >= (uint32_t) iec60730_imc_test_config.region[current_test_region].end) { + goto IMC_POST_DONE; + } + current_test_region++; + } + + iec60730_ref_crc = 0; + current_test_region = 0; + LABEL_DEF(IEC60730_IMC_POST_START_BKPT); + + iec60730_ref_crc = SL_IEC60730_IMC_INIT_VALUE; + // Calculate CRC + while (current_test_region < iec60730_imc_test_config.number_of_test_regions) { + iec60730_rom_size = SL_IEC60730_ROM_SIZE_TEST(iec60730_imc_test_config.region[current_test_region].start, + iec60730_imc_test_config.region[current_test_region].end); + iec60730_ref_crc = sli_iec_60730_cal_crc(iec60730_ref_crc, + (uint8_t *) iec60730_imc_test_config.region[current_test_region].start, + iec60730_rom_size); + current_test_region++; + } + iec60730_ref_crc ^= SL_IEC60730_IMC_XOROUTPUT; + INV_CLASSB_VAR(sl_iec60730_crc_t, iec60730_ref_crc); + LABEL_DEF(IEC60730_IMC_POST_IEC60730_REF_CRC_BKPT); + +// Compare calculated CRC with stored CRC +#if (SL_IEC60730_CRC_DEBUG_ENABLE == 1) + if (iec60730_ref_crc == 0) { +#else /* SL_IEC60730_CRC_DEBUG_ENABLE */ + if (iec60730_ref_crc != *((sl_iec60730_crc_t *) &SL_IEC60730_REF_CRC)) { +#endif /* !SL_IEC60730_CRC_DEBUG_ENABLE */ + goto IMC_POST_DONE; + } + sl_iec60730_imc_init(NULL, &iec60730_imc_test_config); + result = SL_IEC60730_TEST_PASSED; + + IMC_POST_DONE: + + return result; +} + +sl_iec60730_test_result_t sl_iec60730_imc_bist(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + uint32_t iec60730_flash_block_words = 0; + uint8_t current_test_region = 0; + + while (current_test_region < iec60730_imc_test_config.number_of_test_regions) { + if ((uint32_t) iec60730_imc_test_config.region[current_test_region].start + >= (uint32_t) iec60730_imc_test_config.region[current_test_region].end) { + goto IMC_BIST_DONE; + } + current_test_region++; + } + current_test_region = 0; + LABEL_DEF(IEC60730_IMC_BIST_START_BKPT); + + // Calculate CRC + while (current_test_region < iec60730_imc_test_config.number_of_test_regions) { + for (uint16_t i = 0; i < SL_IEC60730_INVAR_BLOCKS_PER_BIST; i++) { + if (CHECK_INTEGRITY(uint32_t, iec60730_run_crc)) { + if (iec60730_run_crc < (uint8_t *) iec60730_imc_test_config.region[current_test_region].end) { + iec60730_flash_block_words = (uint32_t)SL_IEC60730_FLASH_BLOCK_WORDS_TEST(iec60730_imc_test_config.region[current_test_region].start, + iec60730_imc_test_config.region[current_test_region].end); + iec60730_cur_crc = sli_iec_60730_cal_crc(iec60730_cur_crc, iec60730_run_crc, iec60730_flash_block_words); + INV_CLASSB_VAR(sl_iec60730_crc_t, iec60730_cur_crc); + + // Don't use macro in this case + iec60730_run_crc += iec60730_flash_block_words; + iec60730_run_crc_inv = ((uint8_t *) ~((uint32_t) iec60730_run_crc)); + LABEL_DEF(IEC60730_IMC_BIST_CRCBLOCK_BKPT); + + result = SL_IEC60730_TEST_IN_PROGRESS; + } else { + if (CHECK_INTEGRITY(sl_iec60730_crc_t, iec60730_ref_crc)) { + if (current_test_region < iec60730_imc_test_config.number_of_test_regions - 1) { + current_test_region++; + // Don't use macro in this case + iec60730_run_crc = (uint8_t *) iec60730_imc_test_config.region[current_test_region].start; + iec60730_run_crc_inv = ((uint8_t *) ~((uint32_t) iec60730_run_crc)); + } else { + iec60730_cur_crc ^= SL_IEC60730_IMC_XOROUTPUT; + INV_CLASSB_VAR(sl_iec60730_crc_t, iec60730_cur_crc); + LABEL_DEF(IEC60730_IMC_BIST_CALCRC_BKPT); +#if (SL_IEC60730_CRC_DEBUG_ENABLE == 1) + if (iec60730_cur_crc == iec60730_ref_crc) { +#else /* SL_IEC60730_CRC_DEBUG_ENABLE */ + if (iec60730_cur_crc == *((sl_iec60730_crc_t *) &SL_IEC60730_REF_CRC)) { +#endif /* !SL_IEC60730_CRC_DEBUG_ENABLE */ + sl_iec60730_program_counter_check |= (IEC60730_IMC_COMPLETE); + } else { + result = SL_IEC60730_TEST_FAILED; + goto IMC_BIST_DONE; + } + result = SL_IEC60730_TEST_PASSED; + // Reset init imc to check again + sl_iec60730_imc_init(NULL, &iec60730_imc_test_config); + goto IMC_BIST_DONE; + } + } else { + result = SL_IEC60730_TEST_FAILED; + goto IMC_BIST_DONE; + } + } + } else { + result = SL_IEC60730_TEST_FAILED; + goto IMC_BIST_DONE; + } + } + } + + IMC_BIST_DONE: + + return result; +} + +sl_iec60730_test_result_t +sl_iec60730_update_crc_with_data_buffer(sl_iec60730_update_crc_params_t *params, + sl_iec60730_crc_t *crc, + uint8_t *buffer, + uint32_t size) +{ + if ((NULL == params) || (NULL == crc) || (NULL == buffer)) { + return SL_IEC60730_TEST_FAILED; + } + + *crc = sli_iec_60730_cal_crc(*crc, buffer, size); + *crc = *crc ^ params->xorOut; + + return SL_IEC60730_TEST_PASSED; +} + +/**************************************************************************//** + * private CRC calculation + * + * @param crc - Input variable contains the crc value + * buf - Input pointer to buffer calculate + * len - Input length of buffer + * @return crc Value CRC of buffer + *****************************************************************************/ +sl_iec60730_crc_t sli_iec_60730_cal_crc(sl_iec60730_crc_t crc, uint8_t *buf, uint32_t len) +{ +#ifdef UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE + if (!unit_test_iec60730_imc_mock_sw_enable_cal_crc()) { + return SL_IEC60730_IMC_XOROUTPUT; + } +#endif // UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE + +#if (SL_IEC60730_SW_CRC_TABLE_ENABLE == 0) +#if (SL_IEC60730_USE_CRC_32_ENABLE == 1) +#define POLYNOMIAL 0xEDB88320 // 0x04C11DB7 reversed + + for (uint32_t i = 0; i < len; i++) { + crc ^= (uint32_t) buf[i]; + for (uint8_t j = 0; j < 8; j++) { + crc = ((crc & 1) != 0) ? (uint32_t) ((crc >> 1) ^ POLYNOMIAL) : crc >> 1; + } + } +#else /* !SL_IEC60730_USE_CRC_32_ENABLE */ +#define POLYNOMIAL 0x1021 + + for (uint32_t i = 0; i < len; i++) { + crc ^= (uint16_t) (buf[i] << 8); + for (uint8_t j = 0; j < 8; j++) { + crc = ((crc & 0x8000) != 0) ? (uint16_t) ((crc << 1) ^ POLYNOMIAL) + : crc << 1; + } + } +#endif /* SL_IEC60730_USE_CRC_32_ENABLE */ +#else +#if (SL_IEC60730_USE_CRC_32_ENABLE == 1) + while (len--) + crc = (sl_iec60730_crc_t) (iec60730_crc_table[(crc ^ *buf++) & 0xFF] ^ (crc >> 8)); +#else /* !SL_IEC60730_USE_CRC_32_ENABLE */ + while (len--) + crc = (uint16_t) (iec60730_crc_table[((crc >> 8) ^ *buf++) & 0xFF] ^ (crc << 8)); +#endif /* SL_IEC60730_USE_CRC_32_ENABLE */ +#endif // (SL_IEC60730_SW_CRC_TABLE_ENABLE == 0) + + return crc; +} + +#else /* !SL_IEC60730_CRC_USE_SW_ENABLE */ + +static __no_init sl_iec60730_crc_t iec60730_cur_crc __CLASSB_RAM; +static __no_init sl_iec60730_imc_params_t iec60730_gpcrc __CLASSB_RAM; +sl_static_dec_classb_vars(sl_iec60730_crc_t, iec60730_ref_crc); +sl_static_dec_classb_vars(uint32_t *, iec60730_run_crc); + +/**************************************************************************//** + * private Init GPCRC + * + * @param params - Input hardware GPCRC + * iec60730_init_value - Input value init in register GPCRC_INIT + * + * @return None + *****************************************************************************/ +static void sli_iec60730_init_gpcrc(sl_iec60730_imc_params_t *params, uint32_t iec60730_init_value); + +void sl_iec60730_imc_init(sl_iec60730_imc_params_t *params, sl_iec60730_imc_test_multiple_regions_t *test_config) +{ + if ((NULL == params) || (NULL == params->gpcrc) + || (NULL == test_config) || (test_config->region == NULL) + || (test_config->number_of_test_regions == 0)) { + return; + } + + iec60730_imc_test_config.region = test_config->region; + iec60730_imc_test_config.number_of_test_regions = test_config->number_of_test_regions; + #ifndef UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE + iec60730_run_crc = (uint32_t *) test_config->region[0].start; + #else + iec60730_run_crc = (uint32_t*) unit_test_iec60730_imc_mock_init_run_crc(); + #endif // UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE + INV_CLASSB_PVAR(uint32_t, iec60730_run_crc); + + // Store the GPCRC that used + iec60730_gpcrc.gpcrc = params->gpcrc; + + // Reset Current CRC + iec60730_cur_crc = (sl_iec60730_crc_t) SL_IEC60730_IMC_INIT_VALUE; + + // Init CRC + sli_iec60730_init_gpcrc(params, SL_IEC60730_IMC_INIT_VALUE); + iec60730_imc_init_flag = true; +} + +sl_iec60730_test_result_t sl_iec60730_imc_post(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + uint32_t iec60730_rom_size_inwords = 0; + uint8_t current_test_region = 0; + + SL_IEC60730_IMC_POST_ENTER_ATOMIC(); + if (!iec60730_imc_init_flag) { + goto IMC_POST_DONE; + } + + while (current_test_region < iec60730_imc_test_config.number_of_test_regions) { + if (((uint32_t) iec60730_imc_test_config.region[current_test_region].start + >= (uint32_t) iec60730_imc_test_config.region[current_test_region].end)) { + goto IMC_POST_DONE; + } + current_test_region++; + } + + iec60730_ref_crc = 0; + current_test_region = 0; + LABEL_DEF(IEC60730_IMC_POST_START_BKPT); + + // Init CRC + sli_iec60730_init_gpcrc(&iec60730_gpcrc, SL_IEC60730_IMC_INIT_VALUE); + + // Calculate CRC + while (current_test_region < iec60730_imc_test_config.number_of_test_regions) { + iec60730_rom_size_inwords = (uint32_t)SL_IEC60730_ROM_SIZE_INWORDS_TEST(iec60730_imc_test_config.region[current_test_region].start, + iec60730_imc_test_config.region[current_test_region].end); + for (uint32_t i = 0; i < iec60730_rom_size_inwords; i++) { + SL_IEC60730_CRC_INPUTU32(iec60730_gpcrc.gpcrc, *((uint32_t *) iec60730_imc_test_config.region[current_test_region].start + i)); + } + iec60730_ref_crc = (sl_iec60730_crc_t) SL_IEC60730_CRC_DATA_READ_BIT_REVERSED(iec60730_gpcrc.gpcrc) ^ SL_IEC60730_IMC_XOROUTPUT; + current_test_region++; + } + +#if (SL_IEC60730_USE_CRC_32_ENABLE == 1) + iec60730_ref_crc = SL_IEC60730_CRC_DATA_READ(iec60730_gpcrc.gpcrc) ^ SL_IEC60730_IMC_XOROUTPUT; +#else /* SL_IEC60730_USE_CRC_32_ENABLE */ + iec60730_ref_crc = (sl_iec60730_crc_t) SL_IEC60730_CRC_DATA_READ_BIT_REVERSED(iec60730_gpcrc.gpcrc) ^ SL_IEC60730_IMC_XOROUTPUT; +#endif /* SL_IEC60730_USE_CRC_32_ENABLE */ + + INV_CLASSB_VAR(sl_iec60730_crc_t, iec60730_ref_crc); + + LABEL_DEF(IEC60730_IMC_POST_IEC60730_REF_CRC_BKPT); + +// Compare calculated CRC with stored CRC +#if (SL_IEC60730_CRC_DEBUG_ENABLE == 1) + if (iec60730_ref_crc == 0) { +#else /* SL_IEC60730_CRC_DEBUG_ENABLE */ + if (iec60730_ref_crc != *((sl_iec60730_crc_t *) &SL_IEC60730_REF_CRC)) { +#endif /* !SL_IEC60730_CRC_DEBUG_ENABLE */ + // Init CRC + goto IMC_POST_DONE; + } + result = SL_IEC60730_TEST_PASSED; + // Reset out GPCRC_DATA + SL_IEC60730_CRC_START(iec60730_gpcrc.gpcrc); + + IMC_POST_DONE: + + SL_IEC60730_IMC_POST_EXIT_ATOMIC(); + return result; +} + +sl_iec60730_test_result_t sl_iec60730_imc_bist(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + uint8_t current_test_region = 0; + uint32_t iec60730_flash_block_words = 0; + SL_IEC60730_IMC_BIST_ENTER_ATOMIC(); + + while (current_test_region < iec60730_imc_test_config.number_of_test_regions) { + if (((uint32_t) iec60730_imc_test_config.region[current_test_region].start >= (uint32_t) iec60730_imc_test_config.region[current_test_region].end)) { + goto IMC_BIST_DONE; + } + current_test_region++; + } + + current_test_region = 0; + LABEL_DEF(IEC60730_IMC_BIST_START_BKPT); + + // Calculate CRC + while (current_test_region < iec60730_imc_test_config.number_of_test_regions) { + for (uint16_t i = 0; i < SL_IEC60730_INVAR_BLOCKS_PER_BIST; i++) { + if (CHECK_INTEGRITY(uint32_t, iec60730_run_crc)) { + if (iec60730_run_crc < (uint32_t *) iec60730_imc_test_config.region[current_test_region].end) { + iec60730_flash_block_words = (uint32_t)SL_IEC60730_FLASH_BLOCK_WORDS_TEST(iec60730_imc_test_config.region[current_test_region].start, + iec60730_imc_test_config.region[current_test_region].end); + for (uint32_t j = 0; j < iec60730_flash_block_words; j++) { + SL_IEC60730_CRC_INPUTU32(iec60730_gpcrc.gpcrc, *(iec60730_run_crc + j)); + } + + // Restore DATA to current CRC Value + iec60730_cur_crc = (sl_iec60730_crc_t) SL_IEC60730_CRC_DATA_READ(iec60730_gpcrc.gpcrc); + + iec60730_run_crc += iec60730_flash_block_words; + INV_CLASSB_PVAR(uint32_t, iec60730_run_crc); + + LABEL_DEF(IEC60730_IMC_BIST_CRCBLOCK_BKPT); + + result = SL_IEC60730_TEST_IN_PROGRESS; + } else { + if (CHECK_INTEGRITY(sl_iec60730_crc_t, iec60730_ref_crc)) { +#if (SL_IEC60730_USE_CRC_32_ENABLE == 1) + iec60730_cur_crc = SL_IEC60730_CRC_DATA_READ(iec60730_gpcrc.gpcrc) ^ SL_IEC60730_IMC_XOROUTPUT; +#else /* !SL_IEC60730_USE_CRC_32_ENABLE */ + iec60730_cur_crc = + (sl_iec60730_crc_t) SL_IEC60730_CRC_DATA_READ_BIT_REVERSED(iec60730_gpcrc.gpcrc) ^ SL_IEC60730_IMC_XOROUTPUT; +#endif /* SL_IEC60730_USE_CRC_32_ENABLE */ + + LABEL_DEF(IEC60730_IMC_BIST_CALCRC_BKPT); + + if (current_test_region < iec60730_imc_test_config.number_of_test_regions - 1) { + current_test_region++; + iec60730_run_crc = (uint32_t *) iec60730_imc_test_config.region[current_test_region].start; + INV_CLASSB_PVAR(uint32_t, iec60730_run_crc); + } else { +#if (SL_IEC60730_CRC_DEBUG_ENABLE == 1) + if (iec60730_cur_crc == iec60730_ref_crc) { +#else /* SL_IEC60730_CRC_DEBUG_ENABLE */ + if (iec60730_cur_crc == *((sl_iec60730_crc_t *) &SL_IEC60730_REF_CRC)) { +#endif /* !SL_IEC60730_CRC_DEBUG_ENABLE */ + sl_iec60730_program_counter_check |= (IEC60730_IMC_COMPLETE); + } else { + result = SL_IEC60730_TEST_FAILED; + goto IMC_BIST_DONE; + } + + result = SL_IEC60730_TEST_PASSED; + // Reset init imc to check again + sl_iec60730_imc_init(&iec60730_gpcrc, &iec60730_imc_test_config); + goto IMC_BIST_DONE; + } + } else { + result = SL_IEC60730_TEST_FAILED; + goto IMC_BIST_DONE; + } + } + } else { + result = SL_IEC60730_TEST_FAILED; + goto IMC_BIST_DONE; + } + } + } + + IMC_BIST_DONE: + + SL_IEC60730_IMC_BIST_EXIT_ATOMIC(); + return result; +} + +sl_iec60730_test_result_t +sl_iec60730_update_crc_with_data_buffer(sl_iec60730_update_crc_params_t *params, + sl_iec60730_crc_t *crc, + uint8_t *buffer, + uint32_t size) +{ + if ((NULL == params) || (NULL == params->hal.gpcrc)) { + return SL_IEC60730_TEST_FAILED; + } + + // Init GPCRC + sli_iec60730_init_gpcrc(¶ms->hal, params->init.initValue); + + for (uint32_t i = 0; i < size; i++) { + SL_IEC60730_CRC_INPUTU8(params->hal.gpcrc, buffer[i]); + } + + if (SL_IEC60730_IMC_DATA_READ == params->readType) { + *crc = (sl_iec60730_crc_t) SL_IEC60730_CRC_DATA_READ(params->hal.gpcrc); + } else if (SL_IEC60730_IMC_DATA_READ_BIT_REVERSED == params->readType) { + *crc = (sl_iec60730_crc_t) SL_IEC60730_CRC_DATA_READ_BIT_REVERSED(params->hal.gpcrc); + } else if (SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED == params->readType) { + *crc = (sl_iec60730_crc_t) SL_IEC60730_CRC_DATA_READ_BYTE_REVERSED(params->hal.gpcrc); + } else { + // MISRA requires ..else if.. to have terminating else. + } + *crc = *crc ^ params->xorOut; + + // Reset out GPCRC_DATA + SL_IEC60730_CRC_START(params->hal.gpcrc); + + return SL_IEC60730_TEST_PASSED; +} + +/**************************************************************************/ /** + * public Init Group CRC + * + *****************************************************************************/ +void sli_iec60730_init_gpcrc(sl_iec60730_imc_params_t *params, uint32_t iec60730_init_value) +{ + if ((NULL == params) || (NULL == params->gpcrc)) { + return; + } + + SL_IEC60730_CRC_RESET(params->gpcrc); + + // Declare init structs + sl_iec60730_crc_init_typedef init = SL_IEC60730_IMC_INIT_DEFAULT; + + init.initValue = iec60730_init_value; + + #ifdef UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE + init.enable = unit_test_iec60730_imc_mock_enable_gpcrc(); + #endif // UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE + + // Initialize GPCRC + SL_IEC60730_CRC_INIT(params->gpcrc, &init); + + // Reset out GPCRC_DATA + SL_IEC60730_CRC_START(params->gpcrc); +} + +#endif /* SL_IEC60730_CRC_USE_SW_ENABLE */ diff --git a/lib/src/sl_iec60730_irq.c b/lib/src/sl_iec60730_irq.c new file mode 100644 index 00000000..63bb39c8 --- /dev/null +++ b/lib/src/sl_iec60730_irq.c @@ -0,0 +1,112 @@ +/***************************************************************************/ /** + * @file + * @brief Interrupt check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "sl_iec60730_internal.h" + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_IRQ_Test + * @{ + *****************************************************************************/ + +// static variable save config +static sl_iec60730_irq_cfg_t* iec60730_irq_cfg = NULL; + +#if (SL_IEC60730_IRQ_STATUS_ENABLE == 1) +static sl_iec60730_irq_fail_t iec60730_irq_fail_result = { 0, 0 }; +#endif //(SL_IEC60730_IRQ_STATUS_ENABLE == 1) + +#if (SL_IEC60730_IRQ_STATUS_ENABLE == 1) + +sl_iec60730_irq_fail_t* sl_iec60730_get_irq_index_failed(void) +{ + sl_iec60730_irq_fail_t* result = NULL; + + result = &iec60730_irq_fail_result; + + return result; +} + +void sl_iec60730_irq_reset_fail_result(void) +{ + iec60730_irq_fail_result.num_irq_fail = 0; + iec60730_irq_fail_result.irq_fail = 0; +} + +/**************************************************************************/ /** + * local IEC60730 remember the location of the failed IRQ + * + * @param position input the index of the failed IRQ + * + * @returns None. + * + * This function remember the location of the failed IRQ + *****************************************************************************/ +static void sl_iec60730_irq_fail_occur(uint8_t position) +{ + iec60730_irq_fail_result.irq_fail |= (1 << position); + iec60730_irq_fail_result.num_irq_fail++; +} + +#endif // (SL_IEC60730_IRQ_STATUS_ENABLE == 1) + +void sl_iec60730_irq_init(sl_iec60730_irq_cfg_t * irq_cfg_ptr) +{ + if (irq_cfg_ptr != NULL) { + if (irq_cfg_ptr->size < IEC60730_MAX_IRQ_CHECK) { + iec60730_irq_cfg = irq_cfg_ptr; + } else { + sl_iec60730_safety_check_error_occur(SL_IEC60730_INTERRUPT_FAIL); + sl_iec60730_safe_state(SL_IEC60730_INTERRUPT_FAIL); + } + } +} + +void sl_iec60730_irq_reset_counter(void) +{ + if (iec60730_irq_cfg != NULL) { + for (uint8_t index = 0; index < iec60730_irq_cfg->size; index++) { + iec60730_irq_cfg->irq_count[index] = 0; + } + } +} + +void sl_iec60730_irq_check(void) +{ + if (iec60730_irq_cfg != NULL) { + LABEL_DEF(IEC60730_IRQ_BKPT); + for (uint8_t index = 0; index < iec60730_irq_cfg->size; index++) { + if ((iec60730_irq_cfg->irq_count[index] > iec60730_irq_cfg->irq_bounds[index].max) + || (iec60730_irq_cfg->irq_count[index] < iec60730_irq_cfg->irq_bounds[index].min)) { + #if (SL_IEC60730_IRQ_STATUS_ENABLE == 1) + sl_iec60730_irq_fail_occur(index); + #endif // (SL_IEC60730_IRQ_STATUS_ENABLE == 1) + sl_iec60730_safety_check_error_occur(SL_IEC60730_INTERRUPT_FAIL); + sl_iec60730_safe_state(SL_IEC60730_INTERRUPT_FAIL); + } + } + } else { + sl_iec60730_safety_check_error_occur(SL_IEC60730_INTERRUPT_FAIL); + sl_iec60730_safe_state(SL_IEC60730_INTERRUPT_FAIL); + } + sl_iec60730_irq_reset_counter(); + sl_iec60730_program_counter_check |= IEC60730_INTERRUPT_COMPLETE; +} + +/** @} (end addtogroup IEC60730_IRQ_Test) */ +/** @} (end addtogroup efr32_iec60730) */ diff --git a/lib/src/sl_iec60730_post.c b/lib/src/sl_iec60730_post.c new file mode 100644 index 00000000..76e322d3 --- /dev/null +++ b/lib/src/sl_iec60730_post.c @@ -0,0 +1,72 @@ +/***************************************************************************/ /** + * @file + * @brief Power On Self Test + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "sl_iec60730_internal.h" + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup sl_iec60730_post + * @{ + *****************************************************************************/ + +const sl_iec60730_library_version_t SL_IEC60730_LIBRARY_VERSION = + IE60730_LIBRARY_VERSION; + +void sl_iec60730_post(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + + // Watchdog check + result = sl_iec60730_watchdog_post(); + if (result == SL_IEC60730_TEST_FAILED) { + sl_iec60730_safety_check_error_occur(SL_IEC60730_WATCHDOG_POST_FAIL); + sl_iec60730_safe_state(SL_IEC60730_WATCHDOG_POST_FAIL); + } + + // Invariable memory check + result = sl_iec60730_imc_post(); + if (result == SL_IEC60730_TEST_FAILED) { + sl_iec60730_safety_check_error_occur(SL_IEC60730_IMC_FAIL); + sl_iec60730_safe_state(SL_IEC60730_IMC_FAIL); + } + LABEL_DEF(IEC60730_IMC_POST_END_BKPT); + + // Variable memory check + result = sl_iec60730_vmc_post(); + if (result == SL_IEC60730_TEST_FAILED) { + sl_iec60730_safety_check_error_occur(SL_IEC60730_VMC_FAIL); + sl_iec60730_safe_state(SL_IEC60730_VMC_FAIL); + } + + // CPU registers check + result = sl_ec60730_cpu_registers_post(); + if (result == SL_IEC60730_TEST_FAILED) { + sl_iec60730_safety_check_error_occur(SL_IEC60730_CPU_REGISTERS_FAIL); + sl_iec60730_safe_state(SL_IEC60730_CPU_REGISTERS_FAIL); + } + + LABEL_DEF(IEC60730_SYSTEM_CLOCK_FREQ_ADJUSTMENT_BKPT); + sl_iec60730_sys_clock_test_enable(); + + sl_iec60730_restart_watchdogs(); + + return; +} + +/** @} (end addtogroup sl_iec60730_post) */ +/** @} (end addtogroup efr32_iec60730) */ diff --git a/lib/src/sl_iec60730_program_counter.c b/lib/src/sl_iec60730_program_counter.c new file mode 100644 index 00000000..78bfe65e --- /dev/null +++ b/lib/src/sl_iec60730_program_counter.c @@ -0,0 +1,44 @@ +/***************************************************************************/ /** + * @file iec60730_programme_counter.c + * @brief Program Counter check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "sl_iec60730_internal.h" + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_PROGRAM_COUNTER + * @{ + *****************************************************************************/ + +uint16_t sl_iec60730_program_counter_check = 0; + +void sl_iec60730_program_counter_test(void) +{ + LABEL_DEF(IEC60730_PC_BKPT); + // All bits for enabled tests should be set, if not enter safe state + if (sl_iec60730_program_counter_check != IEC60730_ALL_COMPLETE_BITS) { + // Disable interrupts since we need to enter SafeState as quickly as possible + __disable_irq(); + + sl_iec60730_safety_check_error_occur(SL_IEC60730_PROGRAM_COUNTER_FAIL); + } + // Reset flags to make sure that bist is continuously executing + sl_iec60730_program_counter_check = 0; +} + +/** @} (end addtogroup IEC60730_PROGRAMME_COUNTER) */ +/** @} (end addtogroup efr32_iec60730) */ diff --git a/lib/src/sl_iec60730_system_clock.c b/lib/src/sl_iec60730_system_clock.c new file mode 100644 index 00000000..575c4119 --- /dev/null +++ b/lib/src/sl_iec60730_system_clock.c @@ -0,0 +1,90 @@ +/***************************************************************************/ /** + * @file + * @brief Clock check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "sl_iec60730_internal.h" + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_SYSTEM_CLOCK_Test + * @{ + *****************************************************************************/ + +static uint8_t sl_iec60730_sys_clock_count = 0; +static uint8_t sl_iec60730_timer_test_control = SL_IEC60730_TIMER_TEST_DISABLE; +static uint16_t sl_iec60730_number_test_timer_tick = 0; + +uint16_t sl_iec60730_get_number_test_timer_tick(void) +{ + return sl_iec60730_number_test_timer_tick; +} + +void sl_iec60730_sys_clock_test_enable(void) +{ + sl_iec60730_timer_test_control = SL_IEC60730_TIMER_TEST_ENABLE; +} + +void sl_iec60730_sys_clock_test_disable(void) +{ + sl_iec60730_timer_test_control = SL_IEC60730_TIMER_TEST_DISABLE; +} + +void sl_iec60730_sys_clock_count_tick(void) +{ + LABEL_DEF(IEC60730_SYSTEM_CLOCK_TICK_BKPT); + // Increment counter, to be compared with SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ + sl_iec60730_sys_clock_count++; +} + +void sl_iec60730_sys_clock_count_reset(void) +{ + sl_iec60730_sys_clock_count = 0; +} + +void sl_iec60730_test_clock_tick(void) +{ + static uint8_t test_clock_tick_counter = 0; + LABEL_DEF(IEC60730_TEST_CLOCK_TICK_BKPT); + // Only run test if OEM has enabled ISR-based IEC tests + if (sl_iec60730_timer_test_control == SL_IEC60730_TIMER_TEST_ENABLE) { + // System clock ticks must equal OEM-configured ratio plus or minus tolerance + if ((sl_iec60730_sys_clock_count > (SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ + + SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE)) + || (sl_iec60730_sys_clock_count < (SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ + - SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE))) { + sl_iec60730_safety_check_error_occur(SL_IEC60730_CLOCK_FAIL); + sl_iec60730_safe_state(SL_IEC60730_CLOCK_FAIL); + } + sl_iec60730_irq_check(); + // Increment multiplier, which runs bist frequency test at terminal value + test_clock_tick_counter++; + if (test_clock_tick_counter > SL_IEC60730_TEST_CLOCK_MULTIPLIER) { + sl_iec60730_program_counter_test(); + test_clock_tick_counter = 0; + } + } else { + sl_iec60730_safety_check_error_occur(SL_IEC60730_CLOCK_FAIL); + sl_iec60730_safe_state(SL_IEC60730_CLOCK_FAIL); + } + sl_iec60730_sys_clock_count_reset(); + sl_iec60730_program_counter_check |= IEC60730_CPU_CLOCKS_COMPLETE; + // count the number of times the function sl_iec60730_test_clock_tick is called + sl_iec60730_number_test_timer_tick++; +} + +/** @} (end addtogroup IEC60730_SYSTEM_CLOCK_Test) */ +/** @} (end addtogroup efr32_iec60730) */ diff --git a/lib/src/sl_iec60730_variable_memory.c b/lib/src/sl_iec60730_variable_memory.c new file mode 100644 index 00000000..a8f44455 --- /dev/null +++ b/lib/src/sl_iec60730_variable_memory.c @@ -0,0 +1,234 @@ +/***************************************************************************/ /** + * @file + * @brief Variable memory check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include + +#include "sl_iec60730_internal.h" + +#ifdef UNIT_TEST_IEC60730_VARIABLE_MEMORY_ENABLE +#include "unit_test_iec60730_variable_memory.h" +#endif // UNIT_TEST_IEC60730_VARIABLE_MEMORY_ENABLE + +#define ALIGN_ADDRESS_32 0xFFFFFFFCUL + +/* RAM location for temporary storage for run-time test */ +static uint32_t iec60730_bk_buf[RT_BLOCKSIZE + 2] __RT_BUF; +/* RAM pointer for run-time test */ +sl_static_dec_classb_vars(uint32_t *, iec60730_rt_check); +static uint32_t iec60730_stack_test_over_flow[4] __STACK_BOTTOM; +static __no_init sl_iec60730_vmc_test_multiple_regions_t iec60730_vmc_test_config __CLASSB_RAM; +static bool iec60730_vmc_init_flag = false; + +extern bool sl_iec60730_vmc_marchc_step(uint32_t *start, + uint32_t *end, + uint32_t background, + uint32_t *backup); +extern bool sl_iec60730_vmc_marchxc_step(uint32_t *start, + uint32_t *end, + uint32_t background, + uint32_t *backup); + +__WEAK bool sl_iec60730_vmc_pre_run_marchxc_step(uint32_t *addr, uint32_t size) +{ + UNUSED_VAR(addr); + UNUSED_VAR(size); + return true; +} + +__WEAK void sl_iec60730_vmc_post_run_marchxc_step(uint32_t *addr, uint32_t size) +{ + UNUSED_VAR(addr); + UNUSED_VAR(size); +} + +void sl_iec60730_vmc_init(sl_iec60730_vmc_test_multiple_regions_t *test_config) +{ + if ((NULL == test_config) || (test_config->region == NULL) + || (test_config->number_of_test_regions == 0)) { + return; + } + + iec60730_vmc_test_config.region = test_config->region; + iec60730_vmc_test_config.number_of_test_regions = test_config->number_of_test_regions; + iec60730_rt_check = (uint32_t *)((uint32_t)(test_config->region[0].start - (RT_BLOCK_OVERLAP << 1)) & ALIGN_ADDRESS_32); + INV_CLASSB_PVAR(uint32_t, iec60730_rt_check); + + iec60730_stack_test_over_flow[0] = SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0; + iec60730_stack_test_over_flow[1] = SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1; + iec60730_stack_test_over_flow[2] = SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2; + iec60730_stack_test_over_flow[3] = SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3; + iec60730_vmc_init_flag = true; +} + +sl_iec60730_test_result_t sl_iec60730_vmc_post(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + uint8_t current_test_region = 0; + + SL_IEC60730_VMC_POST_ENTER_CRITICAL(); + + if (!iec60730_vmc_init_flag) { + goto VMC_POST_DONE; + } + + while (current_test_region < iec60730_vmc_test_config.number_of_test_regions) { + iec60730_rt_check = (uint32_t *)((uint32_t)(iec60730_vmc_test_config.region[current_test_region].start - (RT_BLOCK_OVERLAP << 1)) & ALIGN_ADDRESS_32); + INV_CLASSB_PVAR(uint32_t, iec60730_rt_check); + + LABEL_DEF(IEC60730_VMC_POST_START_BKPT); + + // Check RAM region from begin to end + while (iec60730_rt_check < (uint32_t *)iec60730_vmc_test_config.region[current_test_region].end) { + if (!CHECK_INTEGRITY(uint32_t, iec60730_rt_check)) { + goto VMC_POST_DONE; + } + + // Only test iec60730_bk_buf in the last step + if (iec60730_rt_check == iec60730_bk_buf) { + iec60730_rt_check += sizeof(iec60730_bk_buf) / sizeof(iec60730_bk_buf[0]); + } + if (!sl_iec60730_vmc_marchc_step(iec60730_rt_check, + (uint32_t *)((uint8_t *)(iec60730_rt_check + RT_BLOCKSIZE) - 1), + BACKGROUND, + iec60730_bk_buf)) { + goto VMC_POST_DONE; + } + iec60730_rt_check += BLOCKSIZE; + LABEL_DEF(IEC60730_VMC_POST_MARCHC_STEP_BKPT); + INV_CLASSB_PVAR(uint32_t, iec60730_rt_check); + } + // Change the test region if the previous test region was successful + current_test_region++; + } + + LABEL_DEF(IEC60730_VMC_POST_CHECK_BKBUF_BKPT); + + // Check buffer iec60730_bk_buf + if (CHECK_INTEGRITY(uint32_t, iec60730_rt_check)) { + if (sl_iec60730_vmc_marchc_step(iec60730_bk_buf, + (uint32_t *)((uint8_t *)(iec60730_bk_buf + sizeof(iec60730_bk_buf) / sizeof(iec60730_bk_buf[0])) - 1), + BACKGROUND, + iec60730_bk_buf)) { + result = SL_IEC60730_TEST_PASSED; + } + } + + VMC_POST_DONE: + SL_IEC60730_VMC_POST_EXIT_CRITICAL(); + + return result; +} + +sl_iec60730_test_result_t sl_iec60730_vmc_bist(void) +{ + LABEL_DEF(IEC60730_VMC_BIST_START_BKPT); + + sl_iec60730_test_result_t result = SL_IEC60730_TEST_IN_PROGRESS; + uint8_t current_test_region = 0; + + SL_IEC60730_VMC_BIST_ENTER_CRITICAL(); + + iec60730_rt_check = (uint32_t *)((uint32_t)(iec60730_vmc_test_config.region[current_test_region].start - (RT_BLOCK_OVERLAP << 1)) & ALIGN_ADDRESS_32); + INV_CLASSB_PVAR(uint32_t, iec60730_rt_check); + + while (current_test_region < iec60730_vmc_test_config.number_of_test_regions) { + for (uint16_t i = 0; i < SL_IEC60730_VAR_BLOCKS_PER_BIST; i++) { + if (!CHECK_INTEGRITY(uint32_t, iec60730_rt_check)) { + result = SL_IEC60730_TEST_FAILED; + goto VMC_BIST_DONE; + } + + if (iec60730_rt_check > (uint32_t *)iec60730_vmc_test_config.region[current_test_region].end) { + LABEL_DEF(IEC60730_IMC_BIST_CHECK_BKBUF_BKPT); + + // Check backup buffer iec60730_bk_buf + if (sl_iec60730_vmc_marchxc_step(iec60730_bk_buf, + (uint32_t *)((uint8_t *)(iec60730_bk_buf + sizeof(iec60730_bk_buf) / sizeof(iec60730_bk_buf[0])) - 1), + BACKGROUND, + iec60730_bk_buf)) { + result = SL_IEC60730_TEST_PASSED; + current_test_region++; + if (current_test_region >= iec60730_vmc_test_config.number_of_test_regions) { + goto VMC_BIST_DONE; + } + } else { + result = SL_IEC60730_TEST_FAILED; + goto VMC_BIST_DONE; + } + + iec60730_rt_check = (uint32_t *)((uint32_t)(iec60730_vmc_test_config.region[current_test_region].start - (RT_BLOCK_OVERLAP << 1)) & ALIGN_ADDRESS_32); + INV_CLASSB_PVAR(uint32_t, iec60730_rt_check); + } else { + // Checking the allowance run testing + if (!sl_iec60730_vmc_pre_run_marchxc_step(iec60730_rt_check, BLOCKSIZE)) { + sl_iec60730_vmc_post_run_marchxc_step(iec60730_rt_check, BLOCKSIZE); + iec60730_rt_check += BLOCKSIZE; + // If rtCheck equal bkBuf then jump to next block + if (iec60730_rt_check == iec60730_bk_buf) { + iec60730_rt_check += sizeof(iec60730_bk_buf) / sizeof(iec60730_bk_buf[0]); + } + INV_CLASSB_PVAR(uint32_t, iec60730_rt_check); + continue; + } + + // If iec60730_rt_check equal iec60730_bk_buf then jump to next block + if (iec60730_rt_check == iec60730_bk_buf) { + iec60730_rt_check += sizeof(iec60730_bk_buf) / sizeof(iec60730_bk_buf[0]); + } + // Call MarchXC + if (sl_iec60730_vmc_marchxc_step(iec60730_rt_check, + (uint32_t *)((uint8_t *)(iec60730_rt_check + RT_BLOCKSIZE) - 1), + BACKGROUND, + iec60730_bk_buf)) { + // Implement after invoking MarchXC + sl_iec60730_vmc_post_run_marchxc_step(iec60730_rt_check, BLOCKSIZE); + // Point to next block + iec60730_rt_check += BLOCKSIZE; + LABEL_DEF(IEC60730_VMC_BIST_MARCHC_STEP_BKPT); + INV_CLASSB_PVAR(uint32_t, iec60730_rt_check); + } else { + // Implement after invoking MarchXC + sl_iec60730_vmc_post_run_marchxc_step(iec60730_rt_check, BLOCKSIZE); + // Set result failed + result = SL_IEC60730_TEST_FAILED; + goto VMC_BIST_DONE; + } + } + } + } + + VMC_BIST_DONE: + SL_IEC60730_VMC_BIST_EXIT_CRITICAL(); + + if ((result == SL_IEC60730_TEST_IN_PROGRESS) || (result == SL_IEC60730_TEST_PASSED)) { + LABEL_DEF(IEC60730_VMC_BIST_STACK_TEST_BKPT); + if ((iec60730_stack_test_over_flow[0] != SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0) + || (iec60730_stack_test_over_flow[1] != SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1) + || (iec60730_stack_test_over_flow[2] != SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2) + || (iec60730_stack_test_over_flow[3] != SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3)) { + result = SL_IEC60730_TEST_FAILED; + } else { + LABEL_DEF(IEC60730_VMC_BIST_STACK_TEST_OK_BKPT); + } + + if (result == SL_IEC60730_TEST_PASSED) { + sl_iec60730_program_counter_check |= (IEC60730_VMC_COMPLETE); + } + } + + return result; +} diff --git a/lib/src/sl_iec60730_watchdog.c b/lib/src/sl_iec60730_watchdog.c new file mode 100644 index 00000000..ee515269 --- /dev/null +++ b/lib/src/sl_iec60730_watchdog.c @@ -0,0 +1,272 @@ +/***************************************************************************/ /** + * @file + * @brief Watchdog check + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "sl_iec60730_internal.h" + +#ifdef UNIT_TEST_IEC60730_WATCHDOG_ENABLE +#include "unit_test_iec60730_watchdog.h" +#endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE + +/**************************************************************************/ /** + * @addtogroup efr32_iec60730 + * @{ + * @addtogroup IEC60730_WDOG_Test + * @{ + *****************************************************************************/ + +// Global variable to store Watchdog states +volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state IEC60730_DATA_NO_CLEAR; +// Local variable to store Watchdog instance under testing +static uint8_t iec60730_watchdog_count IEC60730_DATA_NO_CLEAR; + +// Define Watchdog configuration +#if (_SILICON_LABS_32B_SERIES < 2) +const sl_iec60730_watchdog_t SL_IEC60730_WDOG_INST_ARR[SL_IEC60730_WDOGINST_NUMB] = { +#if (SL_IEC60730_WDOG0_ENABLE == 1) + { .SL_WDOG = SL_IEC60730_WDOG_INST(0), .rst = RMU_RSTCAUSE_WDOGRST }, +#endif //(SL_IEC60730_WDOG0_ENABLE == 1) +#if (SL_IEC60730_WDOG1_ENABLE == 1) + { .SL_WDOG = SL_IEC60730_WDOG_INST(1), .rst = RMU_RSTCAUSE_WDOGRST }, +#endif //(SL_IEC60730_WDOG1_ENABLE == 1) +}; +#else +const sl_iec60730_watchdog_t SL_IEC60730_WDOG_INST_ARR[SL_IEC60730_WDOGINST_NUMB] = { +#if (SL_IEC60730_WDOG0_ENABLE == 1) + { .SL_WDOG = SL_IEC60730_WDOG_INST(0), .rst = EMU_RSTCAUSE_WDOG0 }, +#endif //(SL_IEC60730_WDOG0_ENABLE == 1) +#if (SL_IEC60730_WDOG1_ENABLE == 1) + { .SL_WDOG = SL_IEC60730_WDOG_INST(1), .rst = EMU_RSTCAUSE_WDOG0 }, +#endif //(SL_IEC60730_WDOG1_ENABLE == 1) +}; +#endif + +/**************************************************************************/ /** + * private IEC60730 Watchdog Restart + * + * @returns None. + * + * This function abstracts the differences between the EFR32 family watchdog + * timers. + *****************************************************************************/ +static void sli_iec60730_restart_watchdog(WDOG_TypeDef *wdog); + +/**************************************************************************/ /** + * private IEC60730 Set Watchdog Timeout Min + * + * @param iec60730_wachdog input pointer point to watchdog want to set timeout min + * + * @returns None. + * + * This function set config timeout for watchdog passing down the min value + *****************************************************************************/ +static void sli_iec60730_set_watchdog_timout_min(const sl_iec60730_watchdog_t* iec60730_wachdog); + +void sli_iec60730_set_watchdog_timout_min(const sl_iec60730_watchdog_t* iec60730_wachdog) +{ +#ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE +// Min value for PERSEL is zero +#if (_SILICON_LABS_32B_SERIES < 2) + do { + while ((iec60730_wachdog->SL_WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL) != 0U) { + // wait syncbusy + } + iec60730_wachdog->SL_WDOG->CTRL &= ~(uint32_t) _WDOG_CTRL_PERSEL_MASK; + } while (0); +#else // Series 2 devices +#ifdef WDOG_HAS_SET_CLEAR + do { + iec60730_wachdog->SL_WDOG->EN_CLR = WDOG_EN_EN; +#if (defined _SILICON_LABS_32B_SERIES_2_CONFIG_3) \ + || (defined _SILICON_LABS_32B_SERIES_2_CONFIG_4) + while ((iec60730_wachdog->SL_WDOG->EN & WDOG_EN_DISABLING) != 0U) { + // wait disabling watchdog + } +#endif // _SILICON_LABS_32B_SERIES_2_CONFIG_3 || _SILICON_LABS_32B_SERIES_2_CONFIG_4 + iec60730_wachdog->SL_WDOG->CFG_CLR = _WDOG_CFG_PERSEL_MASK; + iec60730_wachdog->SL_WDOG->EN_SET = WDOG_EN_EN; + } while (0); +#else + do { + iec60730_wachdog->SL_WDOG->EN &= ~_WDOG_EN_MASK; +#if (defined _SILICON_LABS_32B_SERIES_2_CONFIG_3) \ + || (defined _SILICON_LABS_32B_SERIES_2_CONFIG_4) + while ((iec60730_wachdog->SL_WDOG->EN & WDOG_EN_DISABLING) != 0U) { + // wait disabling watchdog + } +#endif // _SILICON_LABS_32B_SERIES_2_CONFIG_3 || _SILICON_LABS_32B_SERIES_2_CONFIG_4 + iec60730_wachdog->SL_WDOG->CFG &= ~(uint32_t) _WDOG_CFG_PERSEL_MASK; + iec60730_wachdog->SL_WDOG->EN |= WDOG_EN_EN; + } while (0); +#endif // WDOG_HAS_SET_CLEAR +#endif // (_SILICON_LABS_32B_SERIES < 2) +#else + (void) iec60730_wachdog; + unit_test_iec60730_watchdog_mock_set_watchdog_timout_min(); +#endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE +} + +void sli_iec60730_restart_watchdog(WDOG_TypeDef *wdog) +{ + if (NULL == wdog) { + return; + } +#if (_SILICON_LABS_32B_SERIES < 2) + // WDOG should not be fed while it is disabled. + if (!(wdog->CTRL & WDOG_CTRL_EN)) { + return; + } + + // If a previous clearing is synchronized to the LF domain, there + // is no point in waiting for it to complete before clearing over again. + // This avoids stalling the core in the typical use case where some idle loop + // keeps clearing WDOG. + if (wdog->SYNCBUSY & WDOG_SYNCBUSY_CMD) { + return; + } + // Before writing to the WDOG_CMD register, make sure that + // any previous write to the WDOG_CTRL is complete. + while ((wdog->SYNCBUSY & WDOG_SYNCBUSY_CTRL) != 0U) { + } + + wdog->CMD = WDOG_CMD_CLEAR; + +#else // Series 2 devices + + SL_IEC60370_DECLARE_IRQ_STATE + + // WDOG should not be fed while it is disabled. + if ((wdog->EN & WDOG_EN_EN) == 0U) { + return; + } + + // We need an atomic section around the check for sync and the clear command + // because sending a clear command while a previous command is being synchronized + // will cause a BusFault. + SL_IEC60370_ENTER_ATOMIC(); + if ((wdog->SYNCBUSY & WDOG_SYNCBUSY_CMD) == 0U) { + wdog->CMD = WDOG_CMD_CLEAR; + } + SL_IEC60370_EXIT_ATOMIC(); + +#endif +} + +void sl_iec60730_restart_watchdogs(void) +{ +#if (defined(WDOG0) && (SL_IEC60730_WDOG0_ENABLE == 1)) + sli_iec60730_restart_watchdog(SL_IEC60730_WDOG_INST(0)); +#endif +#if (defined(WDOG1) && (SL_IEC60730_WDOG1_ENABLE == 1)) + sli_iec60730_restart_watchdog(SL_IEC60730_WDOG_INST(1)); +#endif +} + +#ifdef UNIT_TEST_IEC60730_WATCHDOG_ENABLE +void sl_iec60730_watchdog_count_reset(void) +{ + iec60730_watchdog_count = 0; +} + +void sl_iec60730_watchdog_count_set(uint8_t count) +{ + iec60730_watchdog_count = count; +} +#endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE + +sl_iec60730_test_result_t sl_iec60730_watchdog_post(void) +{ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + volatile uint32_t time_out; + // Check for the power on reset and watchdog reset condition + if (SL_IEC60730_RST_POR && !SL_IEC60730_RST_WDOGS) { + LABEL_DEF(IEC60730_WATCHDOG_POST_POR_RESET_BKPT); + iec60730_watchdog_count = 0; + // Set watchdog state to TESTING + iec60730_watchdog_state = SL_IEC60730_WATCHDOG_TESTING; + } else { // It's not power on reset context + LABEL_DEF(IEC60730_WATCHDOG_POST_WORKING_BKPT); +#ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE +#if (SL_IEC60730_SAVE_STAGE_ENABLE == 1) && (_SILICON_LABS_32B_SERIES == 2) + if (SL_IEC60730_RST_EM4) { + iec60730_watchdog_state = + (sl_iec60730_test_watchdog_t) SL_IEC60730_BURAM_READ(SL_IEC60730_BURAM, + SL_IEC60730_BURAM_IDX); + } +#endif +#endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE + if (iec60730_watchdog_state == SL_IEC60730_WATCHDOG_TESTING) { + LABEL_DEF(IEC60730_WATCHDOG_POST_TESTING_BKPT); + // Prevent unexpected changed value when reset or + // return from power saving mode + if (iec60730_watchdog_count >= SL_IEC60730_WDOGINST_NUMB) { + goto WATCHDOG_POST_DONE; + } + // Check for the validity of the Watchdog reset reason + if (SL_IEC60730_WDOG_INST_ARR[iec60730_watchdog_count].rst & SL_IEC60730_RSTCAUSE) { + // Next Watchdog to test + iec60730_watchdog_count++; + + // If all Watchdogs are tested then finish + if (iec60730_watchdog_count >= SL_IEC60730_WDOGINST_NUMB) { + iec60730_watchdog_state = SL_IEC60730_WATCHDOG_VALID; + +#ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE +#if (SL_IEC60730_SAVE_STAGE_ENABLE == 1) && (_SILICON_LABS_32B_SERIES == 2) + // Write to backup ram + SL_IEC60730_BURAM_WRITE(SL_IEC60730_BURAM, + SL_IEC60730_BURAM_IDX, + iec60730_watchdog_state); +#endif +#endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE + result = SL_IEC60730_TEST_PASSED; +// Clear reset flags of the reset causes register +#if (SL_IEC60730_RSTCAUSES_CLEAR_ENABLE == 1) + SL_IEC60730_RSTCAUSES_CLEAR(); +#endif + } + } else { // Watchdog reset checking failed + goto WATCHDOG_POST_DONE; + } + } else { // Watchdog is not in the testing state + // If reset causes are not POR and not Watchdog reset then no action + if (!SL_IEC60730_RST_POR && !SL_IEC60730_RST_WDOGS) { + result = SL_IEC60730_TEST_PASSED; + } else { // Otherwise system has failed + goto WATCHDOG_POST_DONE; + } + } + } + + if (iec60730_watchdog_state == SL_IEC60730_WATCHDOG_TESTING) { + LABEL_DEF(IEC60730_WATCHDOG_POST_TIMEOUT_BKPT); + // Set timeout to minimum + sli_iec60730_set_watchdog_timout_min(&SL_IEC60730_WDOG_INST_ARR[iec60730_watchdog_count]); + + // Wait for watchdog reset + time_out = SL_IEC60730_WDOG_WAIT_TIMEOUT; + while (time_out > 0) { + time_out--; + } + } + LABEL_DEF(IEC60730_WATCHDOG_POST_END_BKPT); + + WATCHDOG_POST_DONE: + return result; +} + +/** @} (end addtogroup IEC60730_WDOG_Test) */ +/** @} (end addtogroup efr32_iec60730) */ diff --git a/lib/toolchain/template/GCC/linkerfile_iec60730.ld.jinja b/lib/toolchain/template/GCC/linkerfile_iec60730.ld.jinja new file mode 100644 index 00000000..8622ff19 --- /dev/null +++ b/lib/toolchain/template/GCC/linkerfile_iec60730.ld.jinja @@ -0,0 +1,620 @@ +/***************************************************************************//** + * @file linkerfile_lib.ld + * @brief GNU Linker Script for Cortex-M based device + * @version V2.2.0 + * @date 16. December 2020 + * Linker script for Silicon Labs devices + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories, Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ +{#- + Device specific sizes and addresses. These variables describes the physical + memory of the device. +#} +{%- set series = device_series | first %} +{%- set sram_addr = device_ram_addr | first | default(536870912, true) %} +{%- if device_ram_alias_addr is defined %} +{%- set sram_alias_addr = device_ram_alias_addr | first | default(536870912, true) %} +{%- endif %} +{%- set sram_size = device_ram_size | first %} +{%- set flash_addr = device_flash_addr | first | default(0, true) %} +{%- set flash_size = device_flash_size | first %} +{%- set flash_page_size = device_flash_page_size | first %} +{%- set bootloader_reset_cause_size = 4 %} + +{%- if bootloader_enable %} +{%- if memory_flash_start is defined %} +{%- set bootloader_flash_startaddr = memory_flash_start | sum %} +{%- else %} +{%- set bootloader_flash_startaddr = bootloader_flash_addr | sum %} +{%- endif %} +{%- if memory_flash_size is defined %} +{%- set bootloader_flash_size = memory_flash_size | sum %} +{%- else %} +{%- set bootloader_flash_size = bootloader_main_size | sum %} +{%- endif %} +{%- endif %} + +{#- + Application specific sizes. Here we start to calculate the application view + of the physical memory. +#} +{%- if memory_ram_start is defined %} +{%- set app_ram_start = memory_ram_start | first %} +{%- if memory_ram_alias_start is defined %} +{%- set app_ram_alias_start = memory_ram_alias_start | first %} +{%- endif %} +{%- else %} +{%- set app_ram_start = sram_addr %} +{%- if sram_alias_addr is defined %} +{%- set app_ram_alias_start = sram_alias_addr %} +{%- endif %} +{%- endif %} + +{%- if memory_ram_size is defined %} +{%- set app_ram_size = memory_ram_size | first %} +{%- else %} +{%- set app_ram_size = sram_size %} +{%- endif %} + +{%- if bootloader_enable %} +{%- set bootloader_reset_region_start = app_ram_start %} +{%- set app_ram_start = app_ram_start + bootloader_reset_cause_size %} +{%- if app_ram_alias_start is defined %} +{%- set app_ram_alias_start = app_ram_alias_start + bootloader_reset_cause_size %} +{%- endif %} +{%- set app_ram_size = app_ram_size - bootloader_reset_cause_size %} +{%- endif %} + +{%- if memory_flash_start is defined %} +{%- set app_flash_start = memory_flash_start | first %} +{%- else %} +{%- set app_flash_start = flash_addr %} +{#- + Reserve space for the bootloader at the beginning of flash. Note that + bootloader_size > 0 only for devices that place the bootloader in main flash. + On devices where the bootloader is placed in the dedicated bootloader flash + the bootloader_size value is 0. +#} +{%- set app_bootloader_size = bootloader_size | sum %} +{%- if app_bootloader_size > 0 %} +{%- set app_flash_start = app_flash_start + app_bootloader_size %} +{%- endif %} +{%- endif %} + +{%- if memory_flash_size is defined %} +{%- set app_flash_size = memory_flash_size | first %} +{%- else %} +{%- set app_flash_size = flash_size %} + +{%- if app_bootloader_size > 0 %} +{%- set app_flash_size = app_flash_size - app_bootloader_size %} +{%- endif %} + +{#- + On series-2 devices we reserve the last flash page for tokens and key storage +#} +{%- if (device_series | first) == 2 %} +{%- set app_flash_size = app_flash_size - flash_page_size %} +{%- endif %} +{%- endif %} + +{%- set rtt = 0 %} +{%- if linker_rtt_section is defined %} +{%- set rtt = 1 %} +{%- endif %} + +{%- if bootloader_enable %} + MEMORY + { + FLASH (rx) : ORIGIN = 0x{{ '%0x' % bootloader_flash_startaddr }}, LENGTH = 0x{{ '%0x' % bootloader_flash_size }} + RAM (rwx) : ORIGIN = 0x{{ '%0x' % app_ram_start }}, LENGTH = 0x{{ '%0x' % app_ram_size }} +{%- if app_ram_alias_start is defined %} + RAM_ALIAS (x) : ORIGIN = 0x{{ '%0x' % app_ram_alias_start }}, LENGTH = 0x{{ '%0x' % app_ram_size }} +{%- endif %} + BOOTLOADER_RESET_REGION (rwx) : ORIGIN = 0x{{ '%0x' % bootloader_reset_region_start }}, LENGTH = 0x{{ '%0x' % bootloader_reset_cause_size }} + } +{%- else %} + MEMORY + { + FLASH (rx) : ORIGIN = 0x{{ '%0x' % app_flash_start }}, LENGTH = 160K + {%- if iec60730_custom_linker_enable %} + RAM (rwx) : ORIGIN = 0x{{ '%0x' % (app_ram_start + 0x80) }}, LENGTH = 16K - 0x80 + CLASSBRAM (rw) : ORIGIN = 0x{{ '%0x' % app_ram_start }}, LENGTH = 0x80 + {%- else %} + RAM (rwx) : ORIGIN = 0x{{ '%0x' % app_ram_start }}, LENGTH = 0x{{ '%0x' % app_ram_size }} + {%- endif %} +{%- if app_ram_alias_start is defined %} + RAM_ALIAS (x) : ORIGIN = 0x{{ '%0x' % app_ram_alias_start }}, LENGTH = 0x{{ '%0x' % app_ram_size }} +{%- endif %} + } +{%- endif %} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * __StackSeal (only if ARMv8-M stack sealing is used) + */ + +ENTRY(Reset_Handler) + +SECTIONS +{ + +{%- if apploader_enable %} + .text_apploader : + { + KEEP(*(.binapploader*)) + } > FLASH + .text_signature : + { + . = ALIGN({{ flash_page_size }}); + } > FLASH +{%- endif %} + + .text : + { + KEEP(*(.vectors)) + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + KEEP(*(.eh_frame*)) + } > FLASH + +{%- if iec60730_custom_linker_enable %} + /* Check sum */ + .crc : + { + . = ALIGN(64); + PROVIDE (check_sum = . ); + LONG(0xAA55A55A) + } > FLASH +{%- endif %} + /* + * SG veneers: + * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address + * must be set, either with the command line option ‘--section-start’ or in a linker script, + * to indicate where to place these veneers in memory. + */ +/* +{%- if trustzone_secure %} + .gnu.sgstubs : ALIGN(32) + { + . = ALIGN(32); + linker_sg_begin = .; + KEEP(*(.gnu.sgstubs*)) + . = ALIGN(32); + } > FLASH + linker_sg_end = linker_sg_begin + SIZEOF(.gnu.sgstubs); +{%- endif %} +*/ + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + + LONG (__etext) + LONG (__data_start__) + LONG ((__data_end__ - __data_start__) / 4) + + /* Add each additional data section here */ +/* + LONG (__etext2) + LONG (__data2_start__) + LONG ((__data2_end__ - __data2_start__) / 4) +*/ + + __copy_table_end__ = .; + } > FLASH + + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + /* Add each additional bss section here */ +/* + LONG (__bss2_start__) + LONG ((__bss2_end__ - __bss2_start__) / 4) +*/ + __zero_table_end__ = .; + } > FLASH + + __etext = .; + + {%- if bootloader_enable %} + + . = ORIGIN(BOOTLOADER_RESET_REGION); + + .bootloader_reset_section (NOLOAD): + { + __ResetReasonStart__ = .; + KEEP(*(.bootloader_reset_section)) + } > BOOTLOADER_RESET_REGION + +{%- endif %} + + /* Start placing output sections which are loaded into RAM */ + . = ORIGIN(RAM); + +{%- if iec60730_custom_linker_enable == 0 %} + .stack ALIGN(8) (NOLOAD): + { + __StackLimit = .; + KEEP(*(.stack*)) + . = ALIGN(4); + __StackTop = .; + PROVIDE(__stack = __StackTop); + } > RAM +{%- endif %} + +{%- if trustzone_secure %} + /* ARMv8-M stack sealing: + to use ARMv8-M stack sealing uncomment '.stackseal' section + */ + .stackseal (COPY): + { + __StackSeal = .; + . = . + 8; + . = ALIGN(8); + } > RAM +{%- endif %} + + .noinit . (NOLOAD): + { + *(.noinit*); + } > RAM + + .data . : AT (__etext) + { + . = ALIGN(4); + __data_start__ = .; + *(vtable) + *(SORT_BY_ALIGNMENT(.data*)) + . = ALIGN(4); + + PROVIDE(__ram_func_section_start = .); + *(.ram) + PROVIDE(__ram_func_section_end = .); + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + +{%- if rtt == 1 %} + . = ALIGN(4); + *(SEGGER_RTT) +{%- endif %} + +{%- if iec60730_custom_linker_enable %} + KEEP(*(.jcr*)) +{%- endif %} + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + {%- if bootloader_enable %} + + . = ORIGIN(BOOTLOADER_RESET_REGION); + + .bootloader_reset_section (NOLOAD): + { + __ResetReasonStart__ = .; + KEEP(*(.bootloader_reset_section)) + } > BOOTLOADER_RESET_REGION + +{%- endif %} + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM AT > RAM + +{%- if iec60730_custom_linker_enable %} + .ram_no_clear (NOLOAD) : + { + . = ALIGN(4); + *(.ram_no_clear*) + . = ALIGN(4); + } > RAM + +{%- endif %} + + .stack_check (NOLOAD): + { + . = ALIGN(8); + PROVIDE (stack_check = . ); + *(.stack_bottom) + *(.stack_bottom*) + . = ALIGN(8); + } > RAM + +/* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + KEEP(*(.stack*)) + /* KEEP(*(.stackseal*))*/ + } > RAM + +/* User class B RAM region */ + .user_classb (NOLOAD) : + { + . = ALIGN(4); + *(.rt_buf) + *(.rt_buf*) + + . = ALIGN(4); + /* overlap data */ + KEEP(*(.overlap*)); + + . = ALIGN(4); + PROVIDE (classb_start = . ); + *(.classb_ram) + *(.classb_ram*) + . = ALIGN(4); + PROVIDE (classb_end = . ); + } > CLASSBRAM + +/* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + /* __StackLimit = __StackTop - SIZEOF(.stack_dummy); */ + __StackLimit = __StackTop - SIZEOF(.stack_dummy) - SIZEOF(.stack_check); + PROVIDE(__stack = __StackTop); + +/* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") + + PROVIDE(flash_start = ORIGIN(FLASH)); + PROVIDE(ram_start = ORIGIN(RAM)); + PROVIDE(class_b_limit = ORIGIN(CLASSBRAM) + LENGTH(CLASSBRAM)); + + /* Check if FLASH usage exceeds FLASH size */ + /*ASSERT( LENGTH(FLASH) >= (__etext + SIZEOF(.data)), "FLASH memory overflowed !")*/ + +{%- if bootloader_enable %} + __SL_IEC60730_ROM_END__ = __etext + SIZEOF(.data); +{%- endif %} + + __ramfuncs_start__ = .; + +{%- if (series >= 3) and (app_ram_alias_start is defined) %} + __ramfuncs_ram_offset__ = . - ORIGIN(RAM); + . = ORIGIN(RAM_ALIAS) + __ramfuncs_ram_offset__; +{%- endif %} + + __vma_ramfuncs_start__ = .; + __lma_ramfuncs_start__ = __etext + SIZEOF(.data); + +{%- if series >= 3 %} +{%- for component in code_classification_components %} + __text_{{component}}_ram_offset__ = . - __vma_ramfuncs_start__; + text_{{component}}_ram . : AT(__lma_ramfuncs_start__ + __text_{{component}}_ram_offset__) + { + __text_{{component}}_ram_start__ = .; +{%- for selection in code_classification_selections %} +{%- if selection['component'] == component %} + *(text_{{selection['component']}}_*{{selection['class']}}*) +{%- endif %} +{%- endfor %} + . = ALIGN(4); +{%- if "timecritical" in code_classification_standard_selections %} + *(text_{{component}}_*timecritical*) +{%- endif %} + . = ALIGN(4); + __text_{{component}}_ram_end__ = .; +{%- if app_ram_alias_start is defined %} + } > RAM_ALIAS +{%- else %} + } > RAM +{%- endif %} +{%- endfor %} +{%- endif %} + + __text_application_ram_offset__ = . - __vma_ramfuncs_start__; + text_application_ram . : AT(__lma_ramfuncs_start__ + __text_application_ram_offset__) + { + . = ALIGN(4); + __text_application_ram_start__ = .; + *(text_application_ram) + . = ALIGN(4); + __text_application_ram_end__ = .; +{%- if app_ram_alias_start is defined %} + } > RAM_ALIAS +{%- else %} + } > RAM +{%- endif %} + + . = ALIGN(4); + __vma_ramfuncs_end__ = .; + __lma_ramfuncs_end__ = __lma_ramfuncs_start__ + __text_application_ram_offset__ + SIZEOF(text_application_ram); + +{%- if (series >= 3) and (app_ram_alias_start is defined) %} + __heap_ram_offset__ = . - ORIGIN(RAM_ALIAS); + . = ORIGIN(RAM) + __heap_ram_offset__; +{%- endif %} + + __ramfuncs_end__ = .; + + .heap (COPY): + { + __HeapBase = .; + __end__ = .; + end = __end__; + _end = __end__; + KEEP(*(.heap*)) + __HeapLimit = .; + } > RAM + + __heap_size = __HeapLimit - __HeapBase; + __ram_end__ = 0x{{ '%0x' % app_ram_start }} + 0x{{ '%0x' % app_ram_size }}; + __main_flash_end__ = 0x{{ '%0x' % app_flash_start }} + 0x{{ '%0x' % app_flash_size }}; + + /* This is where we handle flash storage blocks. We use dummy sections for finding the configured + * block sizes and then "place" them at the end of flash when the size is known. */ + .internal_storage (DSECT) : { + KEEP(*(.internal_storage*)) + } > FLASH + + {#- + Exclude the NVM3 region for the TZ secure applications + #} + {% if trustzone_secure is not defined %} + {%- if linker_zwave_nvm is defined %} + .zwave_nvm (DSECT) : { + KEEP(*(.zwavenvm*)) + } > FLASH + {%- endif %} + + .nvm (DSECT) : { + KEEP(*(.simee*)) + } > FLASH + + linker_nvm_end = __main_flash_end__; + linker_nvm_begin = linker_nvm_end - SIZEOF(.nvm); + linker_nvm_size = SIZEOF(.nvm); + {%- if linker_zwave_nvm is defined %} + linker_zwave_nvm_end = linker_nvm_begin; + linker_zwave_nvm_begin = linker_zwave_nvm_end - SIZEOF(.zwave_nvm); + linker_zwave_nvm_size = SIZEOF(.zwave_nvm); + linker_storage_end = linker_zwave_nvm_begin; + {%- else %} + linker_storage_end = linker_nvm_begin; + {%- endif %} + __nvm3Base = linker_nvm_begin; + {%- else %} {#- trustzone_secure #} + linker_storage_end = __main_flash_end__; + {%- endif %} {#- trustzone_secure #} + + linker_storage_begin = linker_storage_end - SIZEOF(.internal_storage); + linker_storage_size = SIZEOF(.internal_storage); + +{%- if bootloader_enable %} + _app_rollback_protection_size = 0x{{ '%0x' % (app_rollback_protection_size | sum) }}; + {%- if (device_series | first) == 2 %} + ASSERT( ((ORIGIN(FLASH) + LENGTH(FLASH)) - 0x40 - _app_rollback_protection_size) >= (__etext + SIZEOF(.data)), "FLASH memory overflowed !") + {%- else %} + ASSERT( ((ORIGIN(FLASH) + LENGTH(FLASH)) - 0x4 - _app_rollback_protection_size) >= (__etext + SIZEOF(.data)), "FLASH memory overflowed !") + {%- endif %} +{%- else %} + ASSERT((linker_storage_begin >= (__etext + SIZEOF(.data))), "FLASH memory overflowed !") +{%- endif %} + +{% if trustzone_secure is not defined %} +{%- if app_flash_start and app_flash_size %} + app_flash_end = 0x{{ '%0x' % (app_flash_start) }} + 0x{{ '%0x' % (app_flash_size) }}; + ASSERT( (linker_nvm_begin + SIZEOF(.nvm)) <= app_flash_end, "NVM3 is excessing the flash size !") +{%- endif %} +{%- endif %} {#- trustzone_secure #} + +{%- if (memory_ram_start and not memory_ram_size) or (memory_ram_size and not memory_ram_start) %} + ASSERT( 0, "memory_ram_start and memory_ram_size, Should define/undefine both!") +{%- endif %} + +{%- if (memory_flash_start and not memory_flash_size) or (memory_flash_size and not memory_flash_start) %} + ASSERT( 0, "memory_flash_start and memory_flash_size, Should define/undefine both!") +{%- endif %} +} diff --git a/lib/toolchain/template/IAR/linkerfile_iec60730.icf.jinja b/lib/toolchain/template/IAR/linkerfile_iec60730.icf.jinja new file mode 100644 index 00000000..3588eefb --- /dev/null +++ b/lib/toolchain/template/IAR/linkerfile_iec60730.icf.jinja @@ -0,0 +1,419 @@ +{#- + Device specific sizes and addresses. These variables describes the physical + memory of the device. +#} +{%- set series = device_series | first %} +{%- set sram_addr = device_ram_addr | first | default(536870912, true) %} +{%- set sram_size = device_ram_size | first %} +{%- set flash_addr = device_flash_addr | first | default(0, true) %} +{%- set flash_size = device_flash_size | first %} +{%- set flash_page_size = device_flash_page_size | first %} + +{%- if bootloader_enable %} +{%- if memory_flash_start is defined %} +{%- set bootloader_flash_startaddr = memory_flash_start | sum %} +{%- else %} +{%- set bootloader_flash_startaddr = bootloader_flash_addr | sum %} +{%- endif %} +{%- if memory_flash_size is defined %} +{%- set bootloader_flash_size = memory_flash_size | sum %} +{%- else %} +{%- set bootloader_flash_size = bootloader_main_size | sum %} +{%- endif %} +{%- endif %} + +{#- + Application specific sizes. Here we start to calculate the application view + of the physical memory. +#} +{%- if memory_ram_start is defined %} +{%- set app_ram_start = memory_ram_start | first %} +{%- else %} +{%- set app_ram_start = sram_addr %} +{%- endif %} + +{%- if memory_ram_size is defined %} +{%- set app_ram_size = memory_ram_size | first %} +{%- else %} +{%- set app_ram_size = sram_size %} +{%- endif %} + +{%- if memory_flash_start is defined %} +{%- set app_flash_start = memory_flash_start | first %} +{%- else %} +{%- set app_flash_start = flash_addr %} +{#- + Reserve space for the bootloader at the beginning of flash. Note that + bootloader_size > 0 only for devices that place the bootloader in main flash. + On devices where the bootloader is placed in the dedicated bootloader flash + the bootloader_size value is 0. +#} +{%- set app_bootloader_size = bootloader_size | sum %} +{%- if app_bootloader_size > 0 %} +{%- set app_flash_start = app_flash_start + app_bootloader_size %} +{%- endif %} +{%- endif %} + +{%- if memory_flash_size is defined %} +{%- set app_flash_size = memory_flash_size | first %} +{%- else %} +{%- set app_flash_size = flash_size %} + +{%- if app_bootloader_size > 0 %} +{%- set app_flash_size = app_flash_size - app_bootloader_size %} +{%- endif %} + +{#- + On series-2 devices we reserve the last flash page for tokens and key storage +#} +{%- if (device_series | first) == 2 %} +{%- set app_flash_size = app_flash_size - flash_page_size %} +{%- endif %} +{%- endif %} + +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/* Version 4.1.1 */ + +{%- if iec60730_custom_linker_enable %} +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x{{ '%0x' % app_flash_start }}; +{%- endif %} + +/*-Memory Regions*/ +{%- if bootloader_enable %} + define symbol __ICFEDIT_region_SL_IEC60730_ROM_START__ = 0x{{ '%0x' % bootloader_flash_startaddr }}; + {%- if (device_series | first) == 2 %} + define symbol __ICFEDIT_region_SL_IEC60730_ROM_END__ = (0x{{ '%0x' % bootloader_flash_startaddr }}+0x{{ '%0x' % bootloader_flash_size }}-0x40-0x{{ '%0x' % (app_rollback_protection_size | sum) }}-1); + {%- else %} + define symbol __ICFEDIT_region_SL_IEC60730_ROM_END__ = (0x{{ '%0x' % bootloader_flash_startaddr }}+0x{{ '%0x' % bootloader_flash_size }}-0x4-0x{{ '%0x' % (app_rollback_protection_size | sum) }}-1); + {%- endif %} + define symbol __ICFEDIT_region_RAM_start__ = 0x{{ '%0x' % app_ram_start }}; + define symbol __ICFEDIT_region_RAM_end__ = (0x{{ '%0x' % app_ram_start }}+0x{{ '%0x' % app_ram_size }}-1); +{%- else %} + define symbol __ICFEDIT_region_SL_IEC60730_ROM_START__ = 0x{{ '%0x' % app_flash_start }}; + define symbol __ICFEDIT_region_SL_IEC60730_ROM_END__ = (0x{{ '%0x' % app_flash_start }}+0x{{ '%0x' % app_flash_size }}-1); + {%- if iec60730_custom_linker_enable %} + define symbol __ICFEDIT_region_RAM_start__ = 0x{{ '%0x' % (app_ram_start + 0x80) }}; + define symbol __ICFEDIT_region_RAM_end__ = (0x{{ '%0x' % app_ram_start }}+0x{{ '%0x' % app_ram_size }}-1); + define symbol __ICFEDIT_region_CLASSBRAM_start__ = 0x20000000; + define symbol __ICFEDIT_region_CLASSBRAM_end__ = (0x20000000+0x00000080-1); + {%- else %} + define symbol __ICFEDIT_region_RAM_start__ = 0x{{ '%0x' % app_ram_start }}; + define symbol __ICFEDIT_region_RAM_end__ = (0x{{ '%0x' % app_ram_start }}+0x{{ '%0x' % app_ram_size }}-1); + {%- endif %} +{%- endif %} + +{%- if iec60730_custom_linker_enable %} +/*-Sizes-*/ +if ( !isdefinedsymbol( __ICFEDIT_size_cstack__ ) ) +{ define symbol __ICFEDIT_size_cstack__ = 0x400; } +if ( !isdefinedsymbol( __ICFEDIT_size_heap__ ) ) +{ define symbol __ICFEDIT_size_heap__ = 0x800; } +define exported symbol flash_start = __ICFEDIT_region_SL_IEC60730_ROM_START__; +define exported symbol __StackTop = __ICFEDIT_region_RAM_end__; +define exported symbol ram_start = __ICFEDIT_region_RAM_start__; +define exported symbol class_b_limit = __ICFEDIT_region_CLASSBRAM_end__ + 1; +{%- endif %} + +/**** End of ICF editor section. ###ICF###*/ +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_SL_IEC60730_ROM_START__ to __ICFEDIT_region_SL_IEC60730_ROM_END__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; +define region MAIN_FLASH_region = mem:[from 0x{{ '%0x' % app_flash_start }} to (0x{{ '%0x' % app_flash_start }}+0x{{ '%0x' % app_flash_size }}-1)]; + +{%- if iec60730_custom_linker_enable %} +define region CLASSBRAM_region = mem:[from __ICFEDIT_region_CLASSBRAM_start__ to __ICFEDIT_region_CLASSBRAM_end__]; +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block CHECKSUM with alignment = 64 { section .checksum }; + +define root section classb_start { public classb_start: }; +define root section classb_end { public classb_end: }; +define block .user_classb with fixed order, alignment = 4, + + size = (__ICFEDIT_region_CLASSBRAM_end__ - __ICFEDIT_region_CLASSBRAM_start__ + 1) + + { section *.rt_buf, + + section *.rt_buf*, + + section *.overlap*, + + section classb_start, + + section *.classb_ram, + + section *.classb_ram*, + + section classb_end + + }; + +keep { section *.overlap* }; + +define block .ram_no_clear with alignment = 4 { section *.ram_no_clear* }; +define block .ram_check with alignment = 8 { section *.stack_bottom* }; +define block .stack_order with fixed order { block .ram_check, block CSTACK, block HEAP }; + +do not initialize { section *.ram_no_clear* }; +{%- endif %} + +{%- if trustzone_secure %} +define symbol STACK_SEAL_SIZE = 8; +{%- endif %} + +{%- if bootloader_enable %} +define block BOOTLOADER_RESET_REASON with size = 4, alignment = 4 +{ + section .reset_reason +}; +{%- endif %} + +{%- if iec60730_custom_linker_enable == 0 %} +define block CSTACK with alignment = 8 +{ + section .stack +}; +{%- endif %} + +{%- if trustzone_secure %} +define block STACKSEAL with size = STACK_SEAL_SIZE +{ + section .stackseal +}; +{%- endif %} + +/* Note that "expanding size" is not used yet due to failures in 8.30.1 */ +{%- if iec60730_custom_linker_enable == 0 %} +define block HEAP with alignment = 8 +{ + section .heap +}; +{%- endif %} + +{%- if apploader_enable %} +define block apploader with alignment = {{ flash_page_size }} +{ + readonly section .binapploader +}; +keep { section .binapploader }; +{%- endif %} + +{#- + Exclude the NVM3 region for the TZ secure applications +#} +{% if trustzone_secure is not defined %} +{%- if linker_zwave_nvm is defined %} +define block zwavenvm with alignment = {{ flash_page_size }} +{ + section ZWAVENVM, +}; + +keep { block zwavenvm }; +{%- endif %} + +define block nvm with alignment = {{ flash_page_size }} +{ + section SIMEE, +}; + +keep { block nvm }; +{%- endif %} {#- trustzone_secure #} +{%- if trustzone_secure %} +define block Veneer$$CMSE with alignment = {{ 32 }} +{ + section Veneer$$CMSE, +}; +keep { block Veneer$$CMSE }; +{%- endif %} + +define block storage with alignment = {{ flash_page_size }} +{ + section INTERNAL_STORAGE, +}; + +keep { block storage }; +{%- if bootloader_enable %} +define block ROM_CONTENT with fixed order { readonly, readonly section SL_IEC60730_ROM_SIZE}; +{%- else %} +define block application with fixed order +{ +{%- if iec60730_custom_linker_enable == 0 %} + readonly section .intvec, + readonly +{%- endif %} +}; + +{%- if series >= 3 %} +{%- for component in code_classification_components %} +define block text_{{component}}_ram with alignment = 8 +{ +{%- for selection in code_classification_selections %} +{%- if selection['component'] == component %} + readwrite code section text_{{selection['component']}}_*{{selection['class']}}*, +{%- endif %} +{%- endfor %} +{%- if "timecritical" in code_classification_standard_selections %} + readwrite code section text_{{component}}_*timecritical*, +{%- endif %} +}; + +define block text_{{component}}_ram_init with alignment = 8 +{ +{%- for selection in code_classification_selections %} +{%- if selection['component'] == component %} + readonly code section text_{{selection['component']}}_*{{selection['class']}}*_init, +{%- endif %} +{%- endfor %} +{%- if "timecritical" in code_classification_standard_selections %} + readonly code section text_{{component}}_*timecritical*_init, +{%- endif %} +}; + +initialize by copy +{ +{%- for selection in code_classification_selections %} +{%- if selection['component'] == component %} + readonly section text_{{selection['component']}}_*{{selection['class']}}*, +{%- endif %} +{%- endfor %} +{%- if "timecritical" in code_classification_standard_selections %} + readonly section text_{{component}}_*timecritical*, +{%- endif %} +}; +{%- endfor %} +{%- endif %} + +define block text_application_ram with alignment = 8 +{ + readwrite code section text_application_ram, +}; + +define block text_application_ram_init with alignment = 8 +{ + readonly code section text_application_ram_init, +}; + +initialize by copy +{ + readonly section text_application_ram, +}; +{%- endif %} + +define block application_ram with fixed order +{ +{%- if bootloader_enable %} + block BOOTLOADER_RESET_REASON, +{%- endif %} +{%- if iec60730_custom_linker_enable == 0 %} + block CSTACK, +{%- if trustzone_secure %} + block STACKSEAL, +{%- endif %} + readwrite, + block HEAP +{%- endif %} + +{%- if iec60730_custom_linker_enable %} +{%- if trustzone_secure %} + block STACKSEAL, +{%- endif %} +{%- endif %} +}; + +initialize by copy { readwrite }; + +do not initialize +{ +{%- if bootloader_enable %} + section .reset_reason, +{%- endif %} + section .noinit, + section .stack, +{%- if trustzone_secure %} + section .stackseal, +{%- endif %} + section .heap +}; + +keep { section .intvec }; + +{%- if iec60730_custom_linker_enable %} +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly, last block CHECKSUM }; +place in RAM_region { readwrite, + + block .ram_no_clear, + + block .stack_order }; +"CLASSB_RAM": place noload in CLASSBRAM_region { block .user_classb }; +{%- endif %} + +{%- if bootloader_enable %} +place in ROM_region +{ + block ROM_CONTENT +}; +{%- else %} +{%- if apploader_enable %} +".text_apploader": +place at start of ROM_region { block apploader }; +"application": +place in ROM_region +{ + block application, +{%- if series >= 3 %} +{%- for component in code_classification_components %} + block text_{{component}}_ram_init, +{%- endfor %} +{%- endif %} + block text_application_ram_init, +}; +{%- else %} +"application": +place at start of ROM_region +{ + block application, +{%- if series >= 3 %} +{%- for component in code_classification_components %} + block text_{{component}}_ram_init, +{%- endfor %} +{%- endif %} + block text_application_ram_init, +}; +{%- endif %} +{%- endif %} + +"storage_regions": +place at end of MAIN_FLASH_region { + block storage, +{% if trustzone_secure is not defined %} +{%- if linker_zwave_nvm is defined %} + block zwavenvm, +{%- endif %} + block nvm, +{%- endif %} {#- trustzone_secure #} +{%- if trustzone_secure %} + block Veneer$$CMSE +{%- endif %} +}; + +{%- if not bootloader_enable %} +"ram_code": +place at start of RAM_region { +{%- if series >= 3 %} +{%- for component in code_classification_components %} + block text_{{component}}_ram, +{%- endfor %} +{%- endif %} + block text_application_ram, +}; +{%- endif %} + +"application_ram": +place in RAM_region { + block application_ram, +}; diff --git a/pictures/example_unit_test.PNG b/pictures/example_unit_test.PNG new file mode 100644 index 00000000..46b9c46a Binary files /dev/null and b/pictures/example_unit_test.PNG differ diff --git a/qat.doxygen b/qat.doxygen new file mode 100644 index 00000000..909c8fe3 --- /dev/null +++ b/qat.doxygen @@ -0,0 +1,2579 @@ +# Doxyfile 1.8.17 + +# This file describes the settings to be used by the documentation system +# doxygen (www.doxygen.org) for a project. +# +# All text after a double hash (##) is considered a comment and is placed in +# front of the TAG it is preceding. +# +# All text after a single hash (#) is considered a comment and will be ignored. +# The format is: +# TAG = value [value, ...] +# For lists, items can also be appended using: +# TAG += value [value, ...] +# Values that contain spaces should be placed between quotes (\" \"). + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +# This tag specifies the encoding used for all characters in the configuration +# file that follow. The default is UTF-8 which is also the encoding used for all +# text before the first occurrence of this tag. Doxygen uses libiconv (or the +# iconv built into libc) for the transcoding. See +# https://www.gnu.org/software/libiconv/ for the list of possible encodings. +# The default value is: UTF-8. + +DOXYFILE_ENCODING = UTF-8 + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by +# double-quotes, unless you are using Doxywizard) that should identify the +# project for which the documentation is generated. This name is used in the +# title of most generated pages and in a few other places. +# The default value is: My Project. + +PROJECT_NAME = "IEC_60730" + +# The PROJECT_NUMBER tag can be used to enter a project or revision number. This +# could be handy for archiving the generated documentation or if some version +# control system is used. + +PROJECT_NUMBER = + +# Using the PROJECT_BRIEF tag one can provide an optional one line description +# for a project that appears at the top of each page and should give viewer a +# quick idea about the purpose of the project. Keep the description short. + +PROJECT_BRIEF = + +# With the PROJECT_LOGO tag one can specify a logo or an icon that is included +# in the documentation. The maximum height of the logo should not exceed 55 +# pixels and the maximum width should not exceed 200 pixels. Doxygen will copy +# the logo to the output directory. + +PROJECT_LOGO = + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path +# into which the generated documentation will be written. If a relative path is +# entered, it will be relative to the location where doxygen was started. If +# left blank the current directory will be used. + +OUTPUT_DIRECTORY = $(PWD)/Doc/html/EFR32_ICE60730_Libraries/ + +# If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub- +# directories (in 2 levels) under the output directory of each output format and +# will distribute the generated files over these directories. Enabling this +# option can be useful when feeding doxygen a huge amount of source files, where +# putting all generated files in the same directory would otherwise causes +# performance problems for the file system. +# The default value is: NO. + +CREATE_SUBDIRS = NO + +# If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII +# characters to appear in the names of generated files. If set to NO, non-ASCII +# characters will be escaped, for example _xE3_x81_x84 will be used for Unicode +# U+3044. +# The default value is: NO. + +ALLOW_UNICODE_NAMES = NO + +# The OUTPUT_LANGUAGE tag is used to specify the language in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all constant output in the proper language. +# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese, +# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States), +# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian, +# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages), +# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian, +# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian, +# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish, +# Ukrainian and Vietnamese. +# The default value is: English. + +OUTPUT_LANGUAGE = English + +# The OUTPUT_TEXT_DIRECTION tag is used to specify the direction in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all generated output in the proper direction. +# Possible values are: None, LTR, RTL and Context. +# The default value is: None. + +OUTPUT_TEXT_DIRECTION = None + +# If the BRIEF_MEMBER_DESC tag is set to YES, doxygen will include brief member +# descriptions after the members that are listed in the file and class +# documentation (similar to Javadoc). Set to NO to disable this. +# The default value is: YES. + +BRIEF_MEMBER_DESC = YES + +# If the REPEAT_BRIEF tag is set to YES, doxygen will prepend the brief +# description of a member or function before the detailed description +# +# Note: If both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the +# brief descriptions will be completely suppressed. +# The default value is: YES. + +REPEAT_BRIEF = YES + +# This tag implements a quasi-intelligent brief description abbreviator that is +# used to form the text in various listings. Each string in this list, if found +# as the leading text of the brief description, will be stripped from the text +# and the result, after processing the whole list, is used as the annotated +# text. Otherwise, the brief description is used as-is. If left blank, the +# following values are used ($name is automatically replaced with the name of +# the entity):The $name class, The $name widget, The $name file, is, provides, +# specifies, contains, represents, a, an and the. + +ABBREVIATE_BRIEF = "The $name class" \ + "The $name widget" \ + "The $name file" \ + is \ + provides \ + specifies \ + contains \ + represents \ + a \ + an \ + the + +# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then +# doxygen will generate a detailed section even if there is only a brief +# description. +# The default value is: NO. + +ALWAYS_DETAILED_SEC = NO + +# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all +# inherited members of a class in the documentation of that class as if those +# members were ordinary class members. Constructors, destructors and assignment +# operators of the base classes will not be shown. +# The default value is: NO. + +INLINE_INHERITED_MEMB = NO + +# If the FULL_PATH_NAMES tag is set to YES, doxygen will prepend the full path +# before files name in the file list and in the header files. If set to NO the +# shortest path that makes the file name unique will be used +# The default value is: YES. + +FULL_PATH_NAMES = YES + +# The STRIP_FROM_PATH tag can be used to strip a user-defined part of the path. +# Stripping is only done if one of the specified strings matches the left-hand +# part of the path. The tag can be used to show relative paths in the file list. +# If left blank the directory from which doxygen is run is used as the path to +# strip. +# +# Note that you can specify absolute paths here, but also relative paths, which +# will be relative from the directory where doxygen is started. +# This tag requires that the tag FULL_PATH_NAMES is set to YES. + +STRIP_FROM_PATH = + +# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the +# path mentioned in the documentation of a class, which tells the reader which +# header file to include in order to use a class. If left blank only the name of +# the header file containing the class definition is used. Otherwise one should +# specify the list of include paths that are normally passed to the compiler +# using the -I flag. + +STRIP_FROM_INC_PATH = + +# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but +# less readable) file names. This can be useful is your file systems doesn't +# support long names like on DOS, Mac, or CD-ROM. +# The default value is: NO. + +SHORT_NAMES = NO + +# If the JAVADOC_AUTOBRIEF tag is set to YES then doxygen will interpret the +# first line (until the first dot) of a Javadoc-style comment as the brief +# description. If set to NO, the Javadoc-style will behave just like regular Qt- +# style comments (thus requiring an explicit @brief command for a brief +# description.) +# The default value is: NO. + +JAVADOC_AUTOBRIEF = NO + +# If the JAVADOC_BANNER tag is set to YES then doxygen will interpret a line +# such as +# /*************** +# as being the beginning of a Javadoc-style comment "banner". If set to NO, the +# Javadoc-style will behave just like regular comments and it will not be +# interpreted by doxygen. +# The default value is: NO. + +JAVADOC_BANNER = NO + +# If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first +# line (until the first dot) of a Qt-style comment as the brief description. If +# set to NO, the Qt-style will behave just like regular Qt-style comments (thus +# requiring an explicit \brief command for a brief description.) +# The default value is: NO. + +QT_AUTOBRIEF = NO + +# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make doxygen treat a +# multi-line C++ special comment block (i.e. a block of //! or /// comments) as +# a brief description. This used to be the default behavior. The new default is +# to treat a multi-line C++ comment block as a detailed description. Set this +# tag to YES if you prefer the old behavior instead. +# +# Note that setting this tag to YES also means that rational rose comments are +# not recognized any more. +# The default value is: NO. + +MULTILINE_CPP_IS_BRIEF = NO + +# If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the +# documentation from any documented member that it re-implements. +# The default value is: YES. + +INHERIT_DOCS = YES + +# If the SEPARATE_MEMBER_PAGES tag is set to YES then doxygen will produce a new +# page for each member. If set to NO, the documentation of a member will be part +# of the file/class/namespace that contains it. +# The default value is: NO. + +SEPARATE_MEMBER_PAGES = NO + +# The TAB_SIZE tag can be used to set the number of spaces in a tab. Doxygen +# uses this value to replace tabs by spaces in code fragments. +# Minimum value: 1, maximum value: 16, default value: 4. + +TAB_SIZE = 4 + +# This tag can be used to specify a number of aliases that act as commands in +# the documentation. An alias has the form: +# name=value +# For example adding +# "sideeffect=@par Side Effects:\n" +# will allow you to put the command \sideeffect (or @sideeffect) in the +# documentation, which will result in a user-defined paragraph with heading +# "Side Effects:". You can put \n's in the value part of an alias to insert +# newlines (in the resulting output). You can put ^^ in the value part of an +# alias to insert a newline as if a physical newline was in the original file. +# When you need a literal { or } or , in the value part of an alias you have to +# escape them by means of a backslash (\), this can lead to conflicts with the +# commands \{ and \} for these it is advised to use the version @{ and @} or use +# a double escape (\\{ and \\}) + +ALIASES = + +# This tag can be used to specify a number of word-keyword mappings (TCL only). +# A mapping has the form "name=value". For example adding "class=itcl::class" +# will allow you to use the command class in the itcl::class meaning. + +TCL_SUBST = + +# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources +# only. Doxygen will then generate output that is more tailored for C. For +# instance, some of the names that are used will be different. The list of all +# members will be omitted, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_FOR_C = NO + +# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or +# Python sources only. Doxygen will then generate output that is more tailored +# for that language. For instance, namespaces will be presented as packages, +# qualified scopes will look different, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_JAVA = NO + +# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran +# sources. Doxygen will then generate output that is tailored for Fortran. +# The default value is: NO. + +OPTIMIZE_FOR_FORTRAN = NO + +# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL +# sources. Doxygen will then generate output that is tailored for VHDL. +# The default value is: NO. + +OPTIMIZE_OUTPUT_VHDL = NO + +# Set the OPTIMIZE_OUTPUT_SLICE tag to YES if your project consists of Slice +# sources only. Doxygen will then generate output that is more tailored for that +# language. For instance, namespaces will be presented as modules, types will be +# separated into more groups, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_SLICE = NO + +# Doxygen selects the parser to use depending on the extension of the files it +# parses. With this tag you can assign which parser to use for a given +# extension. Doxygen has a built-in mapping, but you can override or extend it +# using this tag. The format is ext=language, where ext is a file extension, and +# language is one of the parsers supported by doxygen: IDL, Java, JavaScript, +# Csharp (C#), C, C++, D, PHP, md (Markdown), Objective-C, Python, Slice, +# Fortran (fixed format Fortran: FortranFixed, free formatted Fortran: +# FortranFree, unknown formatted Fortran: Fortran. In the later case the parser +# tries to guess whether the code is fixed or free formatted code, this is the +# default for Fortran type files), VHDL, tcl. For instance to make doxygen treat +# .inc files as Fortran files (default is PHP), and .f files as C (default is +# Fortran), use: inc=Fortran f=C. +# +# Note: For files without extension you can use no_extension as a placeholder. +# +# Note that for custom extensions you also need to set FILE_PATTERNS otherwise +# the files are not read by doxygen. + +EXTENSION_MAPPING = + +# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments +# according to the Markdown format, which allows for more readable +# documentation. See https://daringfireball.net/projects/markdown/ for details. +# The output of markdown processing is further processed by doxygen, so you can +# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in +# case of backward compatibilities issues. +# The default value is: YES. + +MARKDOWN_SUPPORT = YES + +# When the TOC_INCLUDE_HEADINGS tag is set to a non-zero value, all headings up +# to that level are automatically included in the table of contents, even if +# they do not have an id attribute. +# Note: This feature currently applies only to Markdown headings. +# Minimum value: 0, maximum value: 99, default value: 5. +# This tag requires that the tag MARKDOWN_SUPPORT is set to YES. + +TOC_INCLUDE_HEADINGS = 5 + +# When enabled doxygen tries to link words that correspond to documented +# classes, or namespaces to their corresponding documentation. Such a link can +# be prevented in individual cases by putting a % sign in front of the word or +# globally by setting AUTOLINK_SUPPORT to NO. +# The default value is: YES. + +AUTOLINK_SUPPORT = YES + +# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want +# to include (a tag file for) the STL sources as input, then you should set this +# tag to YES in order to let doxygen match functions declarations and +# definitions whose arguments contain STL classes (e.g. func(std::string); +# versus func(std::string) {}). This also make the inheritance and collaboration +# diagrams that involve STL classes more complete and accurate. +# The default value is: NO. + +BUILTIN_STL_SUPPORT = NO + +# If you use Microsoft's C++/CLI language, you should set this option to YES to +# enable parsing support. +# The default value is: NO. + +CPP_CLI_SUPPORT = NO + +# Set the SIP_SUPPORT tag to YES if your project consists of sip (see: +# https://www.riverbankcomputing.com/software/sip/intro) sources only. Doxygen +# will parse them like normal C++ but will assume all classes use public instead +# of private inheritance when no explicit protection keyword is present. +# The default value is: NO. + +SIP_SUPPORT = NO + +# For Microsoft's IDL there are propget and propput attributes to indicate +# getter and setter methods for a property. Setting this option to YES will make +# doxygen to replace the get and set methods by a property in the documentation. +# This will only work if the methods are indeed getting or setting a simple +# type. If this is not the case, or you want to show the methods anyway, you +# should set this option to NO. +# The default value is: YES. + +IDL_PROPERTY_SUPPORT = YES + +# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC +# tag is set to YES then doxygen will reuse the documentation of the first +# member in the group (if any) for the other members of the group. By default +# all members of a group must be documented explicitly. +# The default value is: NO. + +DISTRIBUTE_GROUP_DOC = NO + +# If one adds a struct or class to a group and this option is enabled, then also +# any nested class or struct is added to the same group. By default this option +# is disabled and one has to add nested compounds explicitly via \ingroup. +# The default value is: NO. + +GROUP_NESTED_COMPOUNDS = NO + +# Set the SUBGROUPING tag to YES to allow class member groups of the same type +# (for instance a group of public functions) to be put as a subgroup of that +# type (e.g. under the Public Functions section). Set it to NO to prevent +# subgrouping. Alternatively, this can be done per class using the +# \nosubgrouping command. +# The default value is: YES. + +SUBGROUPING = YES + +# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions +# are shown inside the group in which they are included (e.g. using \ingroup) +# instead of on a separate page (for HTML and Man pages) or section (for LaTeX +# and RTF). +# +# Note that this feature does not work in combination with +# SEPARATE_MEMBER_PAGES. +# The default value is: NO. + +INLINE_GROUPED_CLASSES = NO + +# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions +# with only public data fields or simple typedef fields will be shown inline in +# the documentation of the scope in which they are defined (i.e. file, +# namespace, or group documentation), provided this scope is documented. If set +# to NO, structs, classes, and unions are shown on a separate page (for HTML and +# Man pages) or section (for LaTeX and RTF). +# The default value is: NO. + +INLINE_SIMPLE_STRUCTS = NO + +# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or +# enum is documented as struct, union, or enum with the name of the typedef. So +# typedef struct TypeS {} TypeT, will appear in the documentation as a struct +# with name TypeT. When disabled the typedef will appear as a member of a file, +# namespace, or class. And the struct will be named TypeS. This can typically be +# useful for C code in case the coding convention dictates that all compound +# types are typedef'ed and only the typedef is referenced, never the tag name. +# The default value is: NO. + +TYPEDEF_HIDES_STRUCT = NO + +# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This +# cache is used to resolve symbols given their name and scope. Since this can be +# an expensive process and often the same symbol appears multiple times in the +# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small +# doxygen will become slower. If the cache is too large, memory is wasted. The +# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range +# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536 +# symbols. At the end of a run doxygen will report the cache usage and suggest +# the optimal cache size from a speed point of view. +# Minimum value: 0, maximum value: 9, default value: 0. + +LOOKUP_CACHE_SIZE = 0 + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +# If the EXTRACT_ALL tag is set to YES, doxygen will assume all entities in +# documentation are documented, even if no documentation was available. Private +# class members and static file members will be hidden unless the +# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES. +# Note: This will also disable the warnings about undocumented members that are +# normally produced when WARNINGS is set to YES. +# The default value is: NO. + +EXTRACT_ALL = NO + +# If the EXTRACT_PRIVATE tag is set to YES, all private members of a class will +# be included in the documentation. +# The default value is: NO. + +EXTRACT_PRIVATE = NO + +# If the EXTRACT_PRIV_VIRTUAL tag is set to YES, documented private virtual +# methods of a class will be included in the documentation. +# The default value is: NO. + +EXTRACT_PRIV_VIRTUAL = NO + +# If the EXTRACT_PACKAGE tag is set to YES, all members with package or internal +# scope will be included in the documentation. +# The default value is: NO. + +EXTRACT_PACKAGE = NO + +# If the EXTRACT_STATIC tag is set to YES, all static members of a file will be +# included in the documentation. +# The default value is: NO. + +EXTRACT_STATIC = NO + +# If the EXTRACT_LOCAL_CLASSES tag is set to YES, classes (and structs) defined +# locally in source files will be included in the documentation. If set to NO, +# only classes defined in header files are included. Does not have any effect +# for Java sources. +# The default value is: YES. + +EXTRACT_LOCAL_CLASSES = YES + +# This flag is only useful for Objective-C code. If set to YES, local methods, +# which are defined in the implementation section but not in the interface are +# included in the documentation. If set to NO, only methods in the interface are +# included. +# The default value is: NO. + +EXTRACT_LOCAL_METHODS = NO + +# If this flag is set to YES, the members of anonymous namespaces will be +# extracted and appear in the documentation as a namespace called +# 'anonymous_namespace{file}', where file will be replaced with the base name of +# the file that contains the anonymous namespace. By default anonymous namespace +# are hidden. +# The default value is: NO. + +EXTRACT_ANON_NSPACES = NO + +# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all +# undocumented members inside documented classes or files. If set to NO these +# members will be included in the various overviews, but no documentation +# section is generated. This option has no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_MEMBERS = NO + +# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all +# undocumented classes that are normally visible in the class hierarchy. If set +# to NO, these classes will be included in the various overviews. This option +# has no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_CLASSES = NO + +# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend +# declarations. If set to NO, these declarations will be included in the +# documentation. +# The default value is: NO. + +HIDE_FRIEND_COMPOUNDS = NO + +# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any +# documentation blocks found inside the body of a function. If set to NO, these +# blocks will be appended to the function's detailed documentation block. +# The default value is: NO. + +HIDE_IN_BODY_DOCS = NO + +# The INTERNAL_DOCS tag determines if documentation that is typed after a +# \internal command is included. If the tag is set to NO then the documentation +# will be excluded. Set it to YES to include the internal documentation. +# The default value is: NO. + +INTERNAL_DOCS = NO + +# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file +# names in lower-case letters. If set to YES, upper-case letters are also +# allowed. This is useful if you have classes or files whose names only differ +# in case and if your file system supports case sensitive file names. Windows +# (including Cygwin) ands Mac users are advised to set this option to NO. +# The default value is: system dependent. + +CASE_SENSE_NAMES = YES + +# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with +# their full class and namespace scopes in the documentation. If set to YES, the +# scope will be hidden. +# The default value is: NO. + +HIDE_SCOPE_NAMES = NO + +# If the HIDE_COMPOUND_REFERENCE tag is set to NO (default) then doxygen will +# append additional text to a page's title, such as Class Reference. If set to +# YES the compound reference will be hidden. +# The default value is: NO. + +HIDE_COMPOUND_REFERENCE= NO + +# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of +# the files that are included by a file in the documentation of that file. +# The default value is: YES. + +SHOW_INCLUDE_FILES = YES + +# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each +# grouped member an include statement to the documentation, telling the reader +# which file to include in order to use the member. +# The default value is: NO. + +SHOW_GROUPED_MEMB_INC = NO + +# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include +# files with double quotes in the documentation rather than with sharp brackets. +# The default value is: NO. + +FORCE_LOCAL_INCLUDES = NO + +# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the +# documentation for inline members. +# The default value is: YES. + +INLINE_INFO = YES + +# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the +# (detailed) documentation of file and class members alphabetically by member +# name. If set to NO, the members will appear in declaration order. +# The default value is: YES. + +SORT_MEMBER_DOCS = YES + +# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief +# descriptions of file, namespace and class members alphabetically by member +# name. If set to NO, the members will appear in declaration order. Note that +# this will also influence the order of the classes in the class list. +# The default value is: NO. + +SORT_BRIEF_DOCS = NO + +# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the +# (brief and detailed) documentation of class members so that constructors and +# destructors are listed first. If set to NO the constructors will appear in the +# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS. +# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief +# member documentation. +# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting +# detailed member documentation. +# The default value is: NO. + +SORT_MEMBERS_CTORS_1ST = NO + +# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy +# of group names into alphabetical order. If set to NO the group names will +# appear in their defined order. +# The default value is: NO. + +SORT_GROUP_NAMES = NO + +# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by +# fully-qualified names, including namespaces. If set to NO, the class list will +# be sorted only by class name, not including the namespace part. +# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. +# Note: This option applies only to the class list, not to the alphabetical +# list. +# The default value is: NO. + +SORT_BY_SCOPE_NAME = NO + +# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper +# type resolution of all parameters of a function it will reject a match between +# the prototype and the implementation of a member function even if there is +# only one candidate or it is obvious which candidate to choose by doing a +# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still +# accept a match between prototype and implementation in such cases. +# The default value is: NO. + +STRICT_PROTO_MATCHING = NO + +# The GENERATE_TODOLIST tag can be used to enable (YES) or disable (NO) the todo +# list. This list is created by putting \todo commands in the documentation. +# The default value is: YES. + +GENERATE_TODOLIST = YES + +# The GENERATE_TESTLIST tag can be used to enable (YES) or disable (NO) the test +# list. This list is created by putting \test commands in the documentation. +# The default value is: YES. + +GENERATE_TESTLIST = YES + +# The GENERATE_BUGLIST tag can be used to enable (YES) or disable (NO) the bug +# list. This list is created by putting \bug commands in the documentation. +# The default value is: YES. + +GENERATE_BUGLIST = YES + +# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or disable (NO) +# the deprecated list. This list is created by putting \deprecated commands in +# the documentation. +# The default value is: YES. + +GENERATE_DEPRECATEDLIST= YES + +# The ENABLED_SECTIONS tag can be used to enable conditional documentation +# sections, marked by \if ... \endif and \cond +# ... \endcond blocks. + +ENABLED_SECTIONS = + +# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the +# initial value of a variable or macro / define can have for it to appear in the +# documentation. If the initializer consists of more lines than specified here +# it will be hidden. Use a value of 0 to hide initializers completely. The +# appearance of the value of individual variables and macros / defines can be +# controlled using \showinitializer or \hideinitializer command in the +# documentation regardless of this setting. +# Minimum value: 0, maximum value: 10000, default value: 30. + +MAX_INITIALIZER_LINES = 30 + +# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at +# the bottom of the documentation of classes and structs. If set to YES, the +# list will mention the files that were used to generate the documentation. +# The default value is: YES. + +SHOW_USED_FILES = YES + +# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This +# will remove the Files entry from the Quick Index and from the Folder Tree View +# (if specified). +# The default value is: YES. + +SHOW_FILES = YES + +# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces +# page. This will remove the Namespaces entry from the Quick Index and from the +# Folder Tree View (if specified). +# The default value is: YES. + +SHOW_NAMESPACES = YES + +# The FILE_VERSION_FILTER tag can be used to specify a program or script that +# doxygen should invoke to get the current version for each file (typically from +# the version control system). Doxygen will invoke the program by executing (via +# popen()) the command command input-file, where command is the value of the +# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided +# by doxygen. Whatever the program writes to standard output is used as the file +# version. For an example see the documentation. + +FILE_VERSION_FILTER = + +# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed +# by doxygen. The layout file controls the global structure of the generated +# output files in an output format independent way. To create the layout file +# that represents doxygen's defaults, run doxygen with the -l option. You can +# optionally specify a file name after the option, if omitted DoxygenLayout.xml +# will be used as the name of the layout file. +# +# Note that if you run doxygen from a directory containing a file called +# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE +# tag is left empty. + +LAYOUT_FILE = + +# The CITE_BIB_FILES tag can be used to specify one or more bib files containing +# the reference definitions. This must be a list of .bib files. The .bib +# extension is automatically appended if omitted. This requires the bibtex tool +# to be installed. See also https://en.wikipedia.org/wiki/BibTeX for more info. +# For LaTeX the style of the bibliography can be controlled using +# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the +# search path. See also \cite for info how to create references. + +CITE_BIB_FILES = + +#--------------------------------------------------------------------------- +# Configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +# The QUIET tag can be used to turn on/off the messages that are generated to +# standard output by doxygen. If QUIET is set to YES this implies that the +# messages are off. +# The default value is: NO. + +QUIET = NO + +# The WARNINGS tag can be used to turn on/off the warning messages that are +# generated to standard error (stderr) by doxygen. If WARNINGS is set to YES +# this implies that the warnings are on. +# +# Tip: Turn warnings on while writing the documentation. +# The default value is: YES. + +WARNINGS = YES + +# If the WARN_IF_UNDOCUMENTED tag is set to YES then doxygen will generate +# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag +# will automatically be disabled. +# The default value is: YES. + +WARN_IF_UNDOCUMENTED = YES + +# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for +# potential errors in the documentation, such as not documenting some parameters +# in a documented function, or documenting parameters that don't exist or using +# markup commands wrongly. +# The default value is: YES. + +WARN_IF_DOC_ERROR = YES + +# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that +# are documented, but have no documentation for their parameters or return +# value. If set to NO, doxygen will only warn about wrong or incomplete +# parameter documentation, but not about the absence of documentation. If +# EXTRACT_ALL is set to YES then this flag will automatically be disabled. +# The default value is: NO. + +WARN_NO_PARAMDOC = NO + +# If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when +# a warning is encountered. +# The default value is: NO. + +WARN_AS_ERROR = NO + +# The WARN_FORMAT tag determines the format of the warning messages that doxygen +# can produce. The string should contain the $file, $line, and $text tags, which +# will be replaced by the file and line number from which the warning originated +# and the warning text. Optionally the format may contain $version, which will +# be replaced by the version of the file (if it could be obtained via +# FILE_VERSION_FILTER) +# The default value is: $file:$line: $text. + +WARN_FORMAT = "$file:$line: $text" + +# The WARN_LOGFILE tag can be used to specify a file to which warning and error +# messages should be written. If left blank the output is written to standard +# error (stderr). + +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# Configuration options related to the input files +#--------------------------------------------------------------------------- + +# The INPUT tag is used to specify the files and/or directories that contain +# documented source files. You may enter file names like myfile.cpp or +# directories like /usr/src/myproject. Separate the files or directories with +# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING +# Note: If this tag is empty the current directory is searched. + +INPUT = $(PWD)/Test/test_script & $(PWD)/Lib/inc + +# This tag can be used to specify the character encoding of the source files +# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses +# libiconv (or the iconv built into libc) for the transcoding. See the libiconv +# documentation (see: https://www.gnu.org/software/libiconv/) for the list of +# possible encodings. +# The default value is: UTF-8. + +INPUT_ENCODING = UTF-8 + +# If the value of the INPUT tag contains directories, you can use the +# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and +# *.h) to filter out the source-files in the directories. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# read by doxygen. +# +# If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cpp, +# *.c++, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h, +# *.hh, *.hxx, *.hpp, *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc, +# *.m, *.markdown, *.md, *.mm, *.dox (to be provided as doxygen C comment), +# *.doc (to be provided as doxygen C comment), *.txt (to be provided as doxygen +# C comment), *.py, *.pyw, *.f90, *.f95, *.f03, *.f08, *.f, *.for, *.tcl, *.vhd, +# *.vhdl, *.ucf, *.qsf and *.ice. + +FILE_PATTERNS = *.c \ + *.cc \ + *.cxx \ + *.cpp \ + *.c++ \ + *.java \ + *.ii \ + *.ixx \ + *.ipp \ + *.i++ \ + *.inl \ + *.idl \ + *.ddl \ + *.odl \ + *.h \ + *.hh \ + *.hxx \ + *.hpp \ + *.h++ \ + *.cs \ + *.d \ + *.php \ + *.php4 \ + *.php5 \ + *.phtml \ + *.inc \ + *.m \ + *.markdown \ + *.md \ + *.mm \ + *.dox \ + *.doc \ + *.txt \ + *.py \ + *.pyw \ + *.f90 \ + *.f95 \ + *.f03 \ + *.f08 \ + *.f \ + *.for \ + *.tcl \ + *.vhd \ + *.vhdl \ + *.ucf \ + *.qsf \ + *.ice + +# The RECURSIVE tag can be used to specify whether or not subdirectories should +# be searched for input files as well. +# The default value is: NO. + +RECURSIVE = YES + +# The EXCLUDE tag can be used to specify files and/or directories that should be +# excluded from the INPUT source files. This way you can easily exclude a +# subdirectory from a directory tree whose root is specified with the INPUT tag. +# +# Note that relative paths are relative to the directory from which doxygen is +# run. + +EXCLUDE = + +# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or +# directories that are symbolic links (a Unix file system feature) are excluded +# from the input. +# The default value is: NO. + +EXCLUDE_SYMLINKS = NO + +# If the value of the INPUT tag contains directories, you can use the +# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude +# certain files from those directories. +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories for example use the pattern */test/* + +EXCLUDE_PATTERNS = + +# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names +# (namespaces, classes, functions, etc.) that should be excluded from the +# output. The symbol name can be a fully qualified name, a word, or if the +# wildcard * is used, a substring. Examples: ANamespace, AClass, +# AClass::ANamespace, ANamespace::*Test +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories use the pattern */test/* + +EXCLUDE_SYMBOLS = + +# The EXAMPLE_PATH tag can be used to specify one or more files or directories +# that contain example code fragments that are included (see the \include +# command). + +EXAMPLE_PATH = + +# If the value of the EXAMPLE_PATH tag contains directories, you can use the +# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and +# *.h) to filter out the source-files in the directories. If left blank all +# files are included. + +EXAMPLE_PATTERNS = * + +# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be +# searched for input files to be used with the \include or \dontinclude commands +# irrespective of the value of the RECURSIVE tag. +# The default value is: NO. + +EXAMPLE_RECURSIVE = NO + +# The IMAGE_PATH tag can be used to specify one or more files or directories +# that contain images that are to be included in the documentation (see the +# \image command). + +IMAGE_PATH = "Doc/images/" + +# The INPUT_FILTER tag can be used to specify a program that doxygen should +# invoke to filter for each input file. Doxygen will invoke the filter program +# by executing (via popen()) the command: +# +# +# +# where is the value of the INPUT_FILTER tag, and is the +# name of an input file. Doxygen will then use the output that the filter +# program writes to standard output. If FILTER_PATTERNS is specified, this tag +# will be ignored. +# +# Note that the filter must not add or remove lines; it is applied before the +# code is scanned, but not when the output code is generated. If lines are added +# or removed, the anchors will not be placed correctly. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# properly processed by doxygen. + +INPUT_FILTER = + +# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern +# basis. Doxygen will compare the file name with each pattern and apply the +# filter if there is a match. The filters are a list of the form: pattern=filter +# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how +# filters are used. If the FILTER_PATTERNS tag is empty or if none of the +# patterns match the file name, INPUT_FILTER is applied. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# properly processed by doxygen. + +FILTER_PATTERNS = + +# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using +# INPUT_FILTER) will also be used to filter the input files that are used for +# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES). +# The default value is: NO. + +FILTER_SOURCE_FILES = NO + +# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file +# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and +# it is also possible to disable source filtering for a specific pattern using +# *.ext= (so without naming a filter). +# This tag requires that the tag FILTER_SOURCE_FILES is set to YES. + +FILTER_SOURCE_PATTERNS = + +# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that +# is part of the input, its contents will be placed on the main page +# (index.html). This can be useful if you have a project on for instance GitHub +# and want to reuse the introduction page also for the doxygen output. + +USE_MDFILE_AS_MAINPAGE = + +#--------------------------------------------------------------------------- +# Configuration options related to source browsing +#--------------------------------------------------------------------------- + +# If the SOURCE_BROWSER tag is set to YES then a list of source files will be +# generated. Documented entities will be cross-referenced with these sources. +# +# Note: To get rid of all source code in the generated output, make sure that +# also VERBATIM_HEADERS is set to NO. +# The default value is: NO. + +SOURCE_BROWSER = NO + +# Setting the INLINE_SOURCES tag to YES will include the body of functions, +# classes and enums directly into the documentation. +# The default value is: NO. + +INLINE_SOURCES = NO + +# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any +# special comment blocks from generated source code fragments. Normal C, C++ and +# Fortran comments will always remain visible. +# The default value is: YES. + +STRIP_CODE_COMMENTS = YES + +# If the REFERENCED_BY_RELATION tag is set to YES then for each documented +# entity all documented functions referencing it will be listed. +# The default value is: NO. + +REFERENCED_BY_RELATION = NO + +# If the REFERENCES_RELATION tag is set to YES then for each documented function +# all documented entities called/used by that function will be listed. +# The default value is: NO. + +REFERENCES_RELATION = NO + +# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set +# to YES then the hyperlinks from functions in REFERENCES_RELATION and +# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will +# link to the documentation. +# The default value is: YES. + +REFERENCES_LINK_SOURCE = YES + +# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the +# source code will show a tooltip with additional information such as prototype, +# brief description and links to the definition and documentation. Since this +# will make the HTML file larger and loading of large files a bit slower, you +# can opt to disable this feature. +# The default value is: YES. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +SOURCE_TOOLTIPS = YES + +# If the USE_HTAGS tag is set to YES then the references to source code will +# point to the HTML generated by the htags(1) tool instead of doxygen built-in +# source browser. The htags tool is part of GNU's global source tagging system +# (see https://www.gnu.org/software/global/global.html). You will need version +# 4.8.6 or higher. +# +# To use it do the following: +# - Install the latest version of global +# - Enable SOURCE_BROWSER and USE_HTAGS in the configuration file +# - Make sure the INPUT points to the root of the source tree +# - Run doxygen as normal +# +# Doxygen will invoke htags (and that will in turn invoke gtags), so these +# tools must be available from the command line (i.e. in the search path). +# +# The result: instead of the source browser generated by doxygen, the links to +# source code will now point to the output of htags. +# The default value is: NO. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +USE_HTAGS = NO + +# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a +# verbatim copy of the header file for each class for which an include is +# specified. Set to NO to disable this. +# See also: Section \class. +# The default value is: YES. + +VERBATIM_HEADERS = YES + +# If the CLANG_ASSISTED_PARSING tag is set to YES then doxygen will use the +# clang parser (see: http://clang.llvm.org/) for more accurate parsing at the +# cost of reduced performance. This can be particularly helpful with template +# rich C++ code for which doxygen's built-in parser lacks the necessary type +# information. +# Note: The availability of this option depends on whether or not doxygen was +# generated with the -Duse_libclang=ON option for CMake. +# The default value is: NO. + +CLANG_ASSISTED_PARSING = NO + +# If clang assisted parsing is enabled you can provide the compiler with command +# line options that you would normally use when invoking the compiler. Note that +# the include paths will already be set by doxygen for the files and directories +# specified with INPUT and INCLUDE_PATH. +# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES. + +CLANG_OPTIONS = + +# If clang assisted parsing is enabled you can provide the clang parser with the +# path to the compilation database (see: +# http://clang.llvm.org/docs/HowToSetupToolingForLLVM.html) used when the files +# were built. This is equivalent to specifying the "-p" option to a clang tool, +# such as clang-check. These options will then be passed to the parser. +# Note: The availability of this option depends on whether or not doxygen was +# generated with the -Duse_libclang=ON option for CMake. + +CLANG_DATABASE_PATH = + +#--------------------------------------------------------------------------- +# Configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all +# compounds will be generated. Enable this if the project contains a lot of +# classes, structs, unions or interfaces. +# The default value is: YES. + +ALPHABETICAL_INDEX = YES + +# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in +# which the alphabetical index list will be split. +# Minimum value: 1, maximum value: 20, default value: 5. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +COLS_IN_ALPHA_INDEX = 5 + +# In case all classes in a project start with a common prefix, all classes will +# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag +# can be used to specify a prefix (or a list of prefixes) that should be ignored +# while generating the index headers. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +IGNORE_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the HTML output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTML tag is set to YES, doxygen will generate HTML output +# The default value is: YES. + +GENERATE_HTML = YES + +# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a +# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of +# it. +# The default directory is: html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_OUTPUT = $(PWD)/Doc/html/EFR32_ICE60730_Libraries/ +$(YOUR_DOT_PATH) +# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each +# generated HTML page (for example: .htm, .php, .asp). +# The default value is: .html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FILE_EXTENSION = .html + +# The HTML_HEADER tag can be used to specify a user-defined HTML header file for +# each generated HTML page. If the tag is left blank doxygen will generate a +# standard header. +# +# To get valid HTML the header file that includes any scripts and style sheets +# that doxygen needs, which is dependent on the configuration options used (e.g. +# the setting GENERATE_TREEVIEW). It is highly recommended to start with a +# default header using +# doxygen -w html new_header.html new_footer.html new_stylesheet.css +# YourConfigFile +# and then modify the file new_header.html. See also section "Doxygen usage" +# for information on how to generate the default header that doxygen normally +# uses. +# Note: The header is subject to change so you typically have to regenerate the +# default header when upgrading to a newer version of doxygen. For a description +# of the possible markers and block names see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_HEADER = + +# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each +# generated HTML page. If the tag is left blank doxygen will generate a standard +# footer. See HTML_HEADER for more information on how to generate a default +# footer and what special commands can be used inside the footer. See also +# section "Doxygen usage" for information on how to generate the default footer +# that doxygen normally uses. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FOOTER = + +# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style +# sheet that is used by each HTML page. It can be used to fine-tune the look of +# the HTML output. If left blank doxygen will generate a default style sheet. +# See also section "Doxygen usage" for information on how to generate the style +# sheet that doxygen normally uses. +# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as +# it is more robust and this tag (HTML_STYLESHEET) will in the future become +# obsolete. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_STYLESHEET = + +# The HTML_EXTRA_STYLESHEET tag can be used to specify additional user-defined +# cascading style sheets that are included after the standard style sheets +# created by doxygen. Using this option one can overrule certain style aspects. +# This is preferred over using HTML_STYLESHEET since it does not replace the +# standard style sheet and is therefore more robust against future updates. +# Doxygen will copy the style sheet files to the output directory. +# Note: The order of the extra style sheet files is of importance (e.g. the last +# style sheet in the list overrules the setting of the previous ones in the +# list). For an example see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_STYLESHEET = + +# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or +# other source files which should be copied to the HTML output directory. Note +# that these files will be copied to the base HTML output directory. Use the +# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these +# files. In the HTML_STYLESHEET file, use the file name only. Also note that the +# files will be copied as-is; there are no commands or markers available. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_FILES = + +# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen +# will adjust the colors in the style sheet and background images according to +# this color. Hue is specified as an angle on a colorwheel, see +# https://en.wikipedia.org/wiki/Hue for more information. For instance the value +# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300 +# purple, and 360 is red again. +# Minimum value: 0, maximum value: 359, default value: 220. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_HUE = 220 + +# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors +# in the HTML output. For a value of 0 the output will use grayscales only. A +# value of 255 will produce the most vivid colors. +# Minimum value: 0, maximum value: 255, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_SAT = 100 + +# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the +# luminance component of the colors in the HTML output. Values below 100 +# gradually make the output lighter, whereas values above 100 make the output +# darker. The value divided by 100 is the actual gamma applied, so 80 represents +# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not +# change the gamma. +# Minimum value: 40, maximum value: 240, default value: 80. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_GAMMA = 80 + +# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML +# page will contain the date and time when the page was generated. Setting this +# to YES can help to show when doxygen was last run and thus if the +# documentation is up to date. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_TIMESTAMP = NO + +# If the HTML_DYNAMIC_MENUS tag is set to YES then the generated HTML +# documentation will contain a main index with vertical navigation menus that +# are dynamically created via JavaScript. If disabled, the navigation index will +# consists of multiple levels of tabs that are statically embedded in every HTML +# page. Disable this option to support browsers that do not have JavaScript, +# like the Qt help browser. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_DYNAMIC_MENUS = YES + +# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML +# documentation will contain sections that can be hidden and shown after the +# page has loaded. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_DYNAMIC_SECTIONS = NO + +# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries +# shown in the various tree structured indices initially; the user can expand +# and collapse entries dynamically later on. Doxygen will expand the tree to +# such a level that at most the specified number of entries are visible (unless +# a fully collapsed tree already exceeds this amount). So setting the number of +# entries 1 will produce a full collapsed tree by default. 0 is a special value +# representing an infinite number of entries and will result in a full expanded +# tree by default. +# Minimum value: 0, maximum value: 9999, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_INDEX_NUM_ENTRIES = 100 + +# If the GENERATE_DOCSET tag is set to YES, additional index files will be +# generated that can be used as input for Apple's Xcode 3 integrated development +# environment (see: https://developer.apple.com/xcode/), introduced with OSX +# 10.5 (Leopard). To create a documentation set, doxygen will generate a +# Makefile in the HTML output directory. Running make will produce the docset in +# that directory and running make install will install the docset in +# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at +# startup. See https://developer.apple.com/library/archive/featuredarticles/Doxy +# genXcode/_index.html for more information. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_DOCSET = NO + +# This tag determines the name of the docset feed. A documentation feed provides +# an umbrella under which multiple documentation sets from a single provider +# (such as a company or product suite) can be grouped. +# The default value is: Doxygen generated docs. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_FEEDNAME = "Doxygen generated docs" + +# This tag specifies a string that should uniquely identify the documentation +# set bundle. This should be a reverse domain-name style string, e.g. +# com.mycompany.MyDocSet. Doxygen will append .docset to the name. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_BUNDLE_ID = org.doxygen.Project + +# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify +# the documentation publisher. This should be a reverse domain-name style +# string, e.g. com.mycompany.MyDocSet.documentation. +# The default value is: org.doxygen.Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_ID = org.doxygen.Publisher + +# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher. +# The default value is: Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_NAME = Publisher + +# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three +# additional HTML index files: index.hhp, index.hhc, and index.hhk. The +# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop +# (see: https://www.microsoft.com/en-us/download/details.aspx?id=21138) on +# Windows. +# +# The HTML Help Workshop contains a compiler that can convert all HTML output +# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML +# files are now used as the Windows 98 help format, and will replace the old +# Windows help format (.hlp) on all Windows platforms in the future. Compressed +# HTML files also contain an index, a table of contents, and you can search for +# words in the documentation. The HTML workshop also contains a viewer for +# compressed HTML files. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_HTMLHELP = NO + +# The CHM_FILE tag can be used to specify the file name of the resulting .chm +# file. You can add a path in front of the file if the result should not be +# written to the html output directory. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_FILE = + +# The HHC_LOCATION tag can be used to specify the location (absolute path +# including file name) of the HTML help compiler (hhc.exe). If non-empty, +# doxygen will try to run the HTML help compiler on the generated index.hhp. +# The file has to be specified with full path. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +HHC_LOCATION = + +# The GENERATE_CHI flag controls if a separate .chi index file is generated +# (YES) or that it should be included in the master .chm file (NO). +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +GENERATE_CHI = NO + +# The CHM_INDEX_ENCODING is used to encode HtmlHelp index (hhk), content (hhc) +# and project file content. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_INDEX_ENCODING = + +# The BINARY_TOC flag controls whether a binary table of contents is generated +# (YES) or a normal table of contents (NO) in the .chm file. Furthermore it +# enables the Previous and Next buttons. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members to +# the table of contents of the HTML help documentation and to the tree view. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +TOC_EXPAND = NO + +# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and +# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that +# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help +# (.qch) of the generated HTML documentation. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_QHP = NO + +# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify +# the file name of the resulting .qch file. The path specified is relative to +# the HTML output folder. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QCH_FILE = + +# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help +# Project output. For more information please see Qt Help Project / Namespace +# (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#namespace). +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_NAMESPACE = org.doxygen.Project + +# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt +# Help Project output. For more information please see Qt Help Project / Virtual +# Folders (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#virtual- +# folders). +# The default value is: doc. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_VIRTUAL_FOLDER = doc + +# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom +# filter to add. For more information please see Qt Help Project / Custom +# Filters (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_NAME = + +# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the +# custom filter to add. For more information please see Qt Help Project / Custom +# Filters (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_ATTRS = + +# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this +# project's filter section matches. Qt Help Project / Filter Attributes (see: +# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#filter-attributes). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_SECT_FILTER_ATTRS = + +# The QHG_LOCATION tag can be used to specify the location of Qt's +# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the +# generated .qhp file. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHG_LOCATION = + +# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be +# generated, together with the HTML files, they form an Eclipse help plugin. To +# install this plugin and make it available under the help contents menu in +# Eclipse, the contents of the directory containing the HTML and XML files needs +# to be copied into the plugins directory of eclipse. The name of the directory +# within the plugins directory should be the same as the ECLIPSE_DOC_ID value. +# After copying Eclipse needs to be restarted before the help appears. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_ECLIPSEHELP = NO + +# A unique identifier for the Eclipse help plugin. When installing the plugin +# the directory name containing the HTML and XML files should also have this +# name. Each documentation set should have its own identifier. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES. + +ECLIPSE_DOC_ID = org.doxygen.Project + +# If you want full control over the layout of the generated HTML pages it might +# be necessary to disable the index and replace it with your own. The +# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top +# of each HTML page. A value of NO enables the index and the value YES disables +# it. Since the tabs in the index contain the same information as the navigation +# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +DISABLE_INDEX = NO + +# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index +# structure should be generated to display hierarchical information. If the tag +# value is set to YES, a side panel will be generated containing a tree-like +# index structure (just like the one that is generated for HTML Help). For this +# to work a browser that supports JavaScript, DHTML, CSS and frames is required +# (i.e. any modern browser). Windows users are probably better off using the +# HTML help feature. Via custom style sheets (see HTML_EXTRA_STYLESHEET) one can +# further fine-tune the look of the index. As an example, the default style +# sheet generated by doxygen has an example that shows how to put an image at +# the root of the tree instead of the PROJECT_NAME. Since the tree basically has +# the same information as the tab index, you could consider setting +# DISABLE_INDEX to YES when enabling this option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_TREEVIEW = NO + +# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that +# doxygen will group on one line in the generated HTML documentation. +# +# Note that a value of 0 will completely suppress the enum values from appearing +# in the overview section. +# Minimum value: 0, maximum value: 20, default value: 4. +# This tag requires that the tag GENERATE_HTML is set to YES. + +ENUM_VALUES_PER_LINE = 4 + +# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used +# to set the initial width (in pixels) of the frame in which the tree is shown. +# Minimum value: 0, maximum value: 1500, default value: 250. +# This tag requires that the tag GENERATE_HTML is set to YES. + +TREEVIEW_WIDTH = 250 + +# If the EXT_LINKS_IN_WINDOW option is set to YES, doxygen will open links to +# external symbols imported via tag files in a separate window. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +EXT_LINKS_IN_WINDOW = NO + +# Use this tag to change the font size of LaTeX formulas included as images in +# the HTML documentation. When you change the font size after a successful +# doxygen run you need to manually remove any form_*.png images from the HTML +# output directory to force them to be regenerated. +# Minimum value: 8, maximum value: 50, default value: 10. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_FONTSIZE = 10 + +# Use the FORMULA_TRANSPARENT tag to determine whether or not the images +# generated for formulas are transparent PNGs. Transparent PNGs are not +# supported properly for IE 6.0, but are supported on all modern browsers. +# +# Note that when changing this option you need to delete any form_*.png files in +# the HTML output directory before the changes have effect. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_TRANSPARENT = YES + +# The FORMULA_MACROFILE can contain LaTeX \newcommand and \renewcommand commands +# to create new LaTeX commands to be used in formulas as building blocks. See +# the section "Including formulas" for details. + +FORMULA_MACROFILE = + +# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see +# https://www.mathjax.org) which uses client side JavaScript for the rendering +# instead of using pre-rendered bitmaps. Use this if you do not have LaTeX +# installed or if you want to formulas look prettier in the HTML output. When +# enabled you may also need to install MathJax separately and configure the path +# to it using the MATHJAX_RELPATH option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +USE_MATHJAX = NO + +# When MathJax is enabled you can set the default output format to be used for +# the MathJax output. See the MathJax site (see: +# http://docs.mathjax.org/en/latest/output.html) for more details. +# Possible values are: HTML-CSS (which is slower, but has the best +# compatibility), NativeMML (i.e. MathML) and SVG. +# The default value is: HTML-CSS. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_FORMAT = HTML-CSS + +# When MathJax is enabled you need to specify the location relative to the HTML +# output directory using the MATHJAX_RELPATH option. The destination directory +# should contain the MathJax.js script. For instance, if the mathjax directory +# is located at the same level as the HTML output directory, then +# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax +# Content Delivery Network so you can quickly see the result without installing +# MathJax. However, it is strongly recommended to install a local copy of +# MathJax from https://www.mathjax.org before deployment. +# The default value is: https://cdnjs.cloudflare.com/ajax/libs/mathjax/2.7.5/. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_RELPATH = https://cdnjs.cloudflare.com/ajax/libs/mathjax/2.7.5/ + +# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax +# extension names that should be enabled during MathJax rendering. For example +# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_EXTENSIONS = + +# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces +# of code that will be used on startup of the MathJax code. See the MathJax site +# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an +# example see the documentation. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_CODEFILE = + +# When the SEARCHENGINE tag is enabled doxygen will generate a search box for +# the HTML output. The underlying search engine uses javascript and DHTML and +# should work on any modern browser. Note that when using HTML help +# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET) +# there is already a search function so this one should typically be disabled. +# For large projects the javascript based search engine can be slow, then +# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to +# search using the keyboard; to jump to the search box use + S +# (what the is depends on the OS and browser, but it is typically +# , /