From 570e054c47e3a2894fd1b917bcdec35ae06ce9bf Mon Sep 17 00:00:00 2001 From: "seockho.kim" Date: Tue, 10 Sep 2024 17:22:28 +0900 Subject: [PATCH 01/11] [onert/core] Introduce RmsNorm op ONE-DCO-1.0-Signed-off-by: Seockho Kim seockho.kim@samsung.com --- .../core/include/ir/Operations.Include.h | 1 + runtime/onert/core/include/ir/Operations.lst | 1 + .../onert/core/include/ir/operation/RmsNorm.h | 65 +++++++++++++++++++ .../onert/core/src/compiler/ShapeValidator.cc | 17 +++++ .../onert/core/src/compiler/ShapeValidator.h | 1 + runtime/onert/core/src/ir/OperationDumper.cc | 8 +++ runtime/onert/core/src/ir/OperationDumper.h | 1 + .../onert/core/src/ir/operation/RmsNorm.cc | 37 +++++++++++ .../operation/UntrainableOperation.test.cc | 18 +++++ 9 files changed, 149 insertions(+) create mode 100644 runtime/onert/core/include/ir/operation/RmsNorm.h create mode 100644 runtime/onert/core/src/ir/operation/RmsNorm.cc diff --git a/runtime/onert/core/include/ir/Operations.Include.h b/runtime/onert/core/include/ir/Operations.Include.h index 6352b8ed90b..259c174498d 100644 --- a/runtime/onert/core/include/ir/Operations.Include.h +++ b/runtime/onert/core/include/ir/Operations.Include.h @@ -67,6 +67,7 @@ #include "ir/operation/ResizeBilinear.h" #include "ir/operation/ResizeNearestNeighbor.h" #include "ir/operation/Reverse.h" +#include "ir/operation/RmsNorm.h" #include "ir/operation/RNN.h" #include "ir/operation/Select.h" #include "ir/operation/Shape.h" diff --git a/runtime/onert/core/include/ir/Operations.lst b/runtime/onert/core/include/ir/Operations.lst index 1f91aecb23f..cb19a2ad9a7 100644 --- a/runtime/onert/core/include/ir/Operations.lst +++ b/runtime/onert/core/include/ir/Operations.lst @@ -69,6 +69,7 @@ OP(Reshape) OP(ResizeBilinear) OP(ResizeNearestNeighbor) OP(Reverse) +OP(RmsNorm) OP(RNN) OP(Select) OP(Shape) diff --git a/runtime/onert/core/include/ir/operation/RmsNorm.h b/runtime/onert/core/include/ir/operation/RmsNorm.h new file mode 100644 index 00000000000..b68e67dcdbb --- /dev/null +++ b/runtime/onert/core/include/ir/operation/RmsNorm.h @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2024 Samsung Electronics Co., Ltd. All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __ONERT_IR_OPERATION_RMS_NORM_H__ +#define __ONERT_IR_OPERATION_RMS_NORM_H__ + +#include "ir/Operation.h" +#include "ir/InternalType.h" + +namespace onert +{ +namespace ir +{ +namespace operation +{ + +class RmsNorm : public Operation +{ +public: + enum Input + { + INPUT = 0, + GAMMA, + BETA + }; + + struct Param + { + Activation activation; + float epsilon; + }; + +public: + RmsNorm(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs, + const Param ¶m); + +public: + void accept(OperationVisitor &v) const override; + OpCode opcode() const final { return OpCode::RmsNorm; } + +public: + const Param ¶m() const { return _param; } + +private: + Param _param; +}; + +} // namespace operation +} // namespace ir +} // namespace onert + +#endif // __ONERT_IR_OPERATION_RMS_NORM_H__ diff --git a/runtime/onert/core/src/compiler/ShapeValidator.cc b/runtime/onert/core/src/compiler/ShapeValidator.cc index 19cd3ddd89e..88c16a15e37 100644 --- a/runtime/onert/core/src/compiler/ShapeValidator.cc +++ b/runtime/onert/core/src/compiler/ShapeValidator.cc @@ -1123,5 +1123,22 @@ void ShapeValidator::visit(const ir::operation::LogSoftmax &node) OP_REQUIRES(operands.at(output_index).shape().rank() == operands.at(input_index).shape().rank()); } +void ShapeValidator::visit(const ir::operation::RmsNorm &node) +{ + const auto &operands = _graph.operands(); + const auto ofm_index{node.getOutputs().at(0)}; + if (operands.at(ofm_index).info().isDynamic()) + return; + + const auto ifm_index{node.getInputs().at(ir::operation::RmsNorm::Input::INPUT)}; + const auto gamma_index{node.getInputs().at(ir::operation::RmsNorm::Input::GAMMA)}; + const auto beta_index{node.getInputs().at(ir::operation::RmsNorm::Input::BETA)}; + + OP_REQUIRES(operands.at(ifm_index).shape().rank() == 4); + OP_REQUIRES(operands.at(ifm_index).shape() == operands.at(ofm_index).shape()); + OP_REQUIRES(operands.at(gamma_index).shape().rank() == 1); + OP_REQUIRES(operands.at(beta_index).shape().rank() == 1); +} + } // namespace compiler } // namespace onert diff --git a/runtime/onert/core/src/compiler/ShapeValidator.h b/runtime/onert/core/src/compiler/ShapeValidator.h index da83a432a83..e6ea6bcadd7 100644 --- a/runtime/onert/core/src/compiler/ShapeValidator.h +++ b/runtime/onert/core/src/compiler/ShapeValidator.h @@ -93,6 +93,7 @@ class ShapeValidator : public ir::OperationVisitor void visit(const ir::operation::Range &node) override; void visit(const ir::operation::MatrixBandPart &node) override; void visit(const ir::operation::LogSoftmax &node) override; + void visit(const ir::operation::RmsNorm &node) override; private: void checkUnaryOp(const ir::Operation &node); diff --git a/runtime/onert/core/src/ir/OperationDumper.cc b/runtime/onert/core/src/ir/OperationDumper.cc index e0f28795b9d..771724a2bf3 100644 --- a/runtime/onert/core/src/ir/OperationDumper.cc +++ b/runtime/onert/core/src/ir/OperationDumper.cc @@ -318,6 +318,14 @@ void OperationDumper::visit(const Reverse &node) dumpUnaryInputOp(node, axis); } +void OperationDumper::visit(const RmsNorm &node) +{ + std::string inputs = + "Gamma(" + std::to_string(node.getInputs().at(RmsNorm::Input::GAMMA).value()) + ") Beta(" + + std::to_string(node.getInputs().at(RmsNorm::Input::BETA).value()) + ")"; + dumpUnaryInputOp(node, inputs); +} + void OperationDumper::visit(const RNN &node) { VERBOSE(LIR) << "* RNN" << std::endl; diff --git a/runtime/onert/core/src/ir/OperationDumper.h b/runtime/onert/core/src/ir/OperationDumper.h index 99bf869d586..bcfea6d2590 100644 --- a/runtime/onert/core/src/ir/OperationDumper.h +++ b/runtime/onert/core/src/ir/OperationDumper.h @@ -70,6 +70,7 @@ class OperationDumper : public OperationVisitor void visit(const operation::ResizeBilinear &) override; void visit(const operation::ResizeNearestNeighbor &) override; void visit(const operation::Reverse &) override; + void visit(const operation::RmsNorm &) override; void visit(const operation::RNN &) override; void visit(const operation::Select &node) override; void visit(const operation::Shape &node) override; diff --git a/runtime/onert/core/src/ir/operation/RmsNorm.cc b/runtime/onert/core/src/ir/operation/RmsNorm.cc new file mode 100644 index 00000000000..8547f0e1da9 --- /dev/null +++ b/runtime/onert/core/src/ir/operation/RmsNorm.cc @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2024 Samsung Electronics Co., Ltd. All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "ir/operation/RmsNorm.h" +#include "ir/OperationVisitor.h" + +namespace onert +{ +namespace ir +{ +namespace operation +{ + +void RmsNorm::accept(OperationVisitor &v) const { v.visit(*this); } + +RmsNorm::RmsNorm(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs, + const Param ¶m) + : Operation{OperandConstraint::createExact(3u), inputs, outputs}, _param{param} +{ +} + +} // namespace operation +} // namespace ir +} // namespace onert diff --git a/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc b/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc index 4a6267b0a34..0dc4275b647 100644 --- a/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc +++ b/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc @@ -412,6 +412,15 @@ operation::Reverse generateReverse() return operation::Reverse{OperandIndexSequence{1, 2}, OperandIndexSequence{0}}; } +operation::RmsNorm generateRmsNorm() +{ + operation::RmsNorm::Param param; + param.activation = Activation::NONE; + param.epsilon = 0.f; + + return operation::RmsNorm{OperandIndexSequence{1, 2, 3}, OperandIndexSequence{0}, param}; +} + operation::RNN generateRNN() { operation::RNN::Param param; @@ -750,6 +759,9 @@ TEST(UntrainableOperation, testAllOps) const auto reverse = generateReverse(); verifyOp(reverse); + const auto rms_norm = generateRmsNorm(); + verifyOp(rms_norm); + const auto rnn = generateRNN(); verifyOp(rnn); @@ -1123,6 +1135,12 @@ TEST(UntrainableOperation, neg_TrainableOperationVisitor) EXPECT_ANY_THROW(visitor.invoke(*untrainable)); } + { + const auto rms_norm = generateRmsNorm(); + auto untrainable = generateUntrainableOperation(rms_norm); + EXPECT_ANY_THROW(visitor.invoke(*untrainable)); + } + { const auto rnn = generateRNN(); auto untrainable = generateUntrainableOperation(rnn); From 35752dbf85b720ff775e2e415316f6d5d16d668b Mon Sep 17 00:00:00 2001 From: "seockho.kim" Date: Tue, 10 Sep 2024 17:27:08 +0900 Subject: [PATCH 02/11] [onert/backend] support cpu backend RmsNorm KernelGen ONE-DCO-1.0-Signed-off-by: Seockho Kim seockho.kim@samsung.com --- compute/cker/include/cker/Types.h | 7 ++ compute/cker/include/cker/operation/RmsNorm.h | 71 +++++++++++++++++++ runtime/onert/backend/cpu/KernelGenerator.cc | 22 ++++++ runtime/onert/backend/cpu/KernelGenerator.h | 1 + runtime/onert/backend/cpu/ops/RmsNormLayer.cc | 69 ++++++++++++++++++ runtime/onert/backend/cpu/ops/RmsNormLayer.h | 61 ++++++++++++++++ 6 files changed, 231 insertions(+) create mode 100644 compute/cker/include/cker/operation/RmsNorm.h create mode 100644 runtime/onert/backend/cpu/ops/RmsNormLayer.cc create mode 100644 runtime/onert/backend/cpu/ops/RmsNormLayer.h diff --git a/compute/cker/include/cker/Types.h b/compute/cker/include/cker/Types.h index bb1434f7d4d..bca81aade39 100644 --- a/compute/cker/include/cker/Types.h +++ b/compute/cker/include/cker/Types.h @@ -316,6 +316,13 @@ struct ResizeBilinearParams bool half_pixel_centers; }; +struct RmsNormParams +{ + float epsilon; + float float_activation_min; + float float_activation_max; +}; + struct TransposeConvParams { PaddingType padding_type; diff --git a/compute/cker/include/cker/operation/RmsNorm.h b/compute/cker/include/cker/operation/RmsNorm.h new file mode 100644 index 00000000000..8db768f42bd --- /dev/null +++ b/compute/cker/include/cker/operation/RmsNorm.h @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2024 Samsung Electronics Co., Ltd. All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __NNFW_CKER_RMS_NORM_H__ +#define __NNFW_CKER_RMS_NORM_H__ + +#include "cker/Shape.h" +#include "cker/Types.h" +#include "cker/Utils.h" + +#include + +namespace nnfw +{ +namespace cker +{ + +inline void RmsNorm(const RmsNormParams ¶ms, const Shape &input_shape, const float *input_data, + const Shape &gamma_shape, const float *gamma_data, const Shape &beta_shape, + const float *beta_data, const Shape &output_shape, float *output_data) +{ + const int32_t batches = MatchingDim(input_shape, 0, output_shape, 0); + const int32_t heights = MatchingDim(input_shape, 1, output_shape, 1); + const int32_t widths = MatchingDim(input_shape, 2, output_shape, 2); + const int32_t channels = MatchingDim(input_shape, 3, output_shape, 3); + + UNUSED_RELEASE(gamma_shape); + UNUSED_RELEASE(beta_shape); + + for (int32_t batch = 0; batch < batches; batch++) + { + for (int32_t height = 0; height < heights; height++) + { + for (int32_t width = 0; width < widths; width++) + { + double square_sum = 0.0f; + for (int32_t channel = 0; channel < channels; channel++) + { + double input_val = input_data[Offset(input_shape, batch, height, width, channel)]; + square_sum += (input_val * input_val); + } + double rms = std::sqrt((square_sum / channels) + params.epsilon); + for (int32_t channel = 0; channel < channels; channel++) + { + double gamma = gamma_data[channel]; + double beta = beta_data[channel]; + output_data[Offset(output_shape, batch, height, width, channel)] = + (gamma * (input_data[Offset(input_shape, batch, height, width, channel)] / rms) + beta); + } + } + } + } +} + +} // namespace cker +} // namespace nnfw + +#endif // __NNFW_CKER_RMS_NORM_H__ diff --git a/runtime/onert/backend/cpu/KernelGenerator.cc b/runtime/onert/backend/cpu/KernelGenerator.cc index e1c6ed5289d..7a33eaf42d5 100644 --- a/runtime/onert/backend/cpu/KernelGenerator.cc +++ b/runtime/onert/backend/cpu/KernelGenerator.cc @@ -69,6 +69,7 @@ #include "ops/FusedBatchNormLayer.h" #include "ops/LogSoftMaxLayer.h" #include "ops/StatelessRandomUniformLayer.h" +#include "ops/RmsNormLayer.h" #include #include @@ -1101,6 +1102,27 @@ void KernelGenerator::visit(const ir::operation::Rank &node) _return_fn = std::move(fn); } +void KernelGenerator::visit(const ir::operation::RmsNorm &node) +{ + const auto ofm_index{node.getOutputs().at(0)}; + const auto ifm_index{node.getInputs().at(ir::operation::RmsNorm::Input::INPUT)}; + const auto gamma_index{node.getInputs().at(ir::operation::RmsNorm::Input::GAMMA)}; + const auto beta_index{node.getInputs().at(ir::operation::RmsNorm::Input::BETA)}; + + auto ofm_tensor = _tensor_reg->getPortableTensor(ofm_index); + auto ifm_tensor = _tensor_reg->getPortableTensor(ifm_index); + auto gamma_tensor = _tensor_reg->getPortableTensor(gamma_index); + auto beta_tensor = _tensor_reg->getPortableTensor(beta_index); + auto epsilon = node.param().epsilon; + auto activation = node.param().activation; + + auto fn = std::make_unique(); + + fn->configure(ifm_tensor, gamma_tensor, beta_tensor, epsilon, activation, ofm_tensor); + + _return_fn = std::move(fn); +} + void KernelGenerator::visit(const ir::operation::SquaredDifference &node) { const auto ofm_index{node.getOutputs().at(0)}; diff --git a/runtime/onert/backend/cpu/KernelGenerator.h b/runtime/onert/backend/cpu/KernelGenerator.h index 8d2010151f8..2ab9973877d 100644 --- a/runtime/onert/backend/cpu/KernelGenerator.h +++ b/runtime/onert/backend/cpu/KernelGenerator.h @@ -81,6 +81,7 @@ class KernelGenerator : public basic::KernelGeneratorBase void visit(const ir::operation::Reshape &) override; void visit(const ir::operation::ResizeBilinear &node) override; void visit(const ir::operation::Reverse &) override; + void visit(const ir::operation::RmsNorm &) override; void visit(const ir::operation::Select &) override; void visit(const ir::operation::Shape &) override; void visit(const ir::operation::Slice &) override; diff --git a/runtime/onert/backend/cpu/ops/RmsNormLayer.cc b/runtime/onert/backend/cpu/ops/RmsNormLayer.cc new file mode 100644 index 00000000000..376d18d7ff1 --- /dev/null +++ b/runtime/onert/backend/cpu/ops/RmsNormLayer.cc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2024 Samsung Electronics Co., Ltd. All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "RmsNormLayer.h" + +#include "OperationUtils.h" + +#include +#include + +namespace onert +{ +namespace backend +{ +namespace cpu +{ +namespace ops +{ + +void RmsNormLayer::configure(const IPortableTensor *input, const IPortableTensor *gamma, + const IPortableTensor *beta, float epsilon, + const ir::Activation activation, IPortableTensor *output) +{ + assert(input != nullptr); + assert(output != nullptr); + + UNUSED_RELEASE(activation); + + _input = input; + _output = output; + _gamma = gamma; + _beta = beta; + _epsilon = epsilon; +} + +void RmsNormLayer::run() +{ + switch (_input->data_type()) + { + case OperandType::FLOAT32: + nnfw::cker::RmsNormParams param; + param.epsilon = _epsilon; + nnfw::cker::RmsNorm(param, getShape(_input), getBuffer(_input), getShape(_gamma), + getBuffer(_gamma), getShape(_beta), getBuffer(_beta), + getShape(_output), getBuffer(_output)); + break; + + default: + throw std::runtime_error{"RmsNorm: Unsupported data type"}; + } +} + +} // namespace ops +} // namespace cpu +} // namespace backend +} // namespace onert \ No newline at end of file diff --git a/runtime/onert/backend/cpu/ops/RmsNormLayer.h b/runtime/onert/backend/cpu/ops/RmsNormLayer.h new file mode 100644 index 00000000000..aa8072add1b --- /dev/null +++ b/runtime/onert/backend/cpu/ops/RmsNormLayer.h @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2024 Samsung Electronics Co., Ltd. All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in riting, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __ONERT_BACKEND_CPU_OPS_RMSNORM_LAYER_H__ +#define __ONERT_BACKEND_CPU_OPS_RMSNORM_LAYER_H__ + +#include +#include "OperationUtils.h" +#include + +namespace onert +{ +namespace backend +{ +namespace cpu +{ +namespace ops +{ +class RmsNormLayer : public ::onert::exec::IFunction +{ +public: + RmsNormLayer() + : _input(nullptr), _output(nullptr), _gamma(nullptr), _beta(nullptr), _epsilon(1e-06f) + { + // Nothing + } + +public: + void configure(const IPortableTensor *input, const IPortableTensor *gamma, + const IPortableTensor *beta, float epsilon, const ir::Activation activation, + IPortableTensor *output); + + void run() override; + +private: + const IPortableTensor *_input; + IPortableTensor *_output; + const IPortableTensor *_gamma; + const IPortableTensor *_beta; + float _epsilon; +}; + +} // namespace ops +} // namespace cpu +} // namespace backend +} // namespace onert + +#endif // __ONERT_BACKEND_CPU_OPS_RMSNORM_LAYER_H__ From fd672eaadb15efca973990218085b4623c584d8c Mon Sep 17 00:00:00 2001 From: "seockho.kim" Date: Tue, 10 Sep 2024 17:28:02 +0900 Subject: [PATCH 03/11] [onert/core] Support RmsNorm op on loader ONE-DCO-1.0-Signed-off-by: Seockho Kim seockho.kim@samsung.com --- runtime/onert/core/src/loader/CircleLoader.cc | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/runtime/onert/core/src/loader/CircleLoader.cc b/runtime/onert/core/src/loader/CircleLoader.cc index da5b4b892be..3f26c9b1cdc 100644 --- a/runtime/onert/core/src/loader/CircleLoader.cc +++ b/runtime/onert/core/src/loader/CircleLoader.cc @@ -70,6 +70,7 @@ class CircleLoader final : public loader::BaseLoader void loadInstanceNorm(const Operator *op, ir::Graph &subg); void loadBCQFullyConnected(const Operator *op, ir::Graph &subg); void loadBCQGather(const Operator *op, ir::Graph &subg); + void loadRmsNorm(const Operator *op, ir::Graph &subg); public: using BaseLoader::BaseLoader; @@ -150,6 +151,9 @@ class CircleLoader final : public loader::BaseLoader case circle::BuiltinOperator::BuiltinOperator_BCQ_GATHER: loadBCQGather(op, subg); return; + case circle::BuiltinOperator::BuiltinOperator_RMS_NORM: + loadRmsNorm(op, subg); + return; default: BaseLoader::loadOperation(op, subg); return; @@ -225,6 +229,24 @@ void CircleLoader::loadBCQFullyConnected(const Operator *op, ir::Graph &subg) subg.addOperation(std::move(new_op)); } +void CircleLoader::loadRmsNorm(const Operator *op, ir::Graph &subg) +{ + ir::OperandIndexSequence inputs; + ir::OperandIndexSequence outputs; + + loadOperationIO(op, inputs, outputs); + + ir::operation::RmsNorm::Param param; + const auto *options = op->builtin_options_as_RmsNormOptions(); + + param.activation = convertActivation(options->fused_activation_function()); + // Use default value 1e-6 if value of epsilon is zero + param.epsilon = options->epsilon() == 0.f ? 1e-6 : options->epsilon(); + + std::unique_ptr new_op(new ir::operation::RmsNorm(inputs, outputs, param)); + subg.addOperation(std::move(new_op)); +} + } // namespace std::unique_ptr loadCircleModel(const std::string &filename) From 32262570ec6512200c6db51769e044b36ef561bd Mon Sep 17 00:00:00 2001 From: "seockho.kim" Date: Tue, 10 Sep 2024 17:29:39 +0900 Subject: [PATCH 04/11] [test/nnfw_api] Add RmsNorm test ONE-DCO-1.0-Signed-off-by: Seockho Kim seockho.kim@samsung.com --- tests/nnfw_api/lib/CircleGen.cc | 8 +++ tests/nnfw_api/lib/CircleGen.h | 2 + .../one_op_tests/RmsNorm.test.cc | 57 +++++++++++++++++++ 3 files changed, 67 insertions(+) create mode 100644 tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc diff --git a/tests/nnfw_api/lib/CircleGen.cc b/tests/nnfw_api/lib/CircleGen.cc index b73ac8f65e8..be4428a2fbb 100644 --- a/tests/nnfw_api/lib/CircleGen.cc +++ b/tests/nnfw_api/lib/CircleGen.cc @@ -589,6 +589,14 @@ uint32_t CircleGen::addOperatorBatchToSpaceND(const OperatorParams ¶ms) circle::BuiltinOptions_BatchToSpaceNDOptions, options); } +uint32_t CircleGen::addOperatorRmsNorm(const OperatorParams ¶ms, float epsilon, + circle::ActivationFunctionType actfn) +{ + auto options = circle::CreateRmsNormOptions(_fbb, epsilon, actfn).Union(); + return addOperatorWithOptions(params, circle::BuiltinOperator_RMS_NORM, + circle::BuiltinOptions_RmsNormOptions, options); +} + // NOTE Please add addOperator functions ABOVE this lie // // % How to add a new addOperatorXXX fuction diff --git a/tests/nnfw_api/lib/CircleGen.h b/tests/nnfw_api/lib/CircleGen.h index 72ce6a4e9c4..59fad1b4cf3 100644 --- a/tests/nnfw_api/lib/CircleGen.h +++ b/tests/nnfw_api/lib/CircleGen.h @@ -201,6 +201,8 @@ class CircleGen uint32_t addOperatorRank(const OperatorParams ¶ms); uint32_t addOperatorReduce(const OperatorParams ¶ms, circle::BuiltinOperator reduce_op, bool keep_dims); + uint32_t addOperatorRmsNorm(const OperatorParams ¶ms, float epsilon, + circle::ActivationFunctionType actfn); /** * @brief Create circle Reshape op * the second param new_shape can be optional just like circle::CreateReshapeOptionsDirect diff --git a/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc b/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc new file mode 100644 index 00000000000..d8a918b45e4 --- /dev/null +++ b/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2024 Samsung Electronics Co., Ltd. All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "GenModelTest.h" + +TEST_F(GenModelTest, OneOp_RmsNorm) +{ + CircleGen cgen; + uint32_t beta_buf = cgen.addBuffer(std::vector{0}); + uint32_t gamma_buf = cgen.addBuffer(std::vector{1}); + int beta = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, beta_buf}); + int gamma = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, gamma_buf}); + int in = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); + int out = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); + + cgen.addOperatorRmsNorm({{in, gamma, beta}, {out}}, 0.00001f, circle::ActivationFunctionType_NONE); + cgen.setInputsAndOutputs({in}, {out}); + + _context = std::make_unique(cgen.finish()); + _context->addTestCase(uniformTCD({{0, 1, 2, 3}}, {{0, 1, 1, 1}})); + _context->setBackends({"cpu"}); + + SUCCEED(); +} + +TEST_F(GenModelTest, neg_OneOp_RmsNorm_InvalidActivation) +{ + CircleGen cgen; + uint32_t beta_buf = cgen.addBuffer(std::vector{1}); + uint32_t gamma_buf = cgen.addBuffer(std::vector{2}); + int beta = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, beta_buf}); + int gamma = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, gamma_buf}); + int in = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); + int out = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); + + cgen.addOperatorRmsNorm({{in, gamma, beta}, {out}}, 0.00001f, + static_cast(128) /* Invalid value*/); + cgen.setInputsAndOutputs({in}, {out}); + + _context = std::make_unique(cgen.finish()); + _context->expectFailModelLoad(); + + SUCCEED(); +} From c47dedb0212abbbeab5a69698623371d856fc66c Mon Sep 17 00:00:00 2001 From: "seockho.kim" Date: Tue, 10 Sep 2024 17:30:19 +0900 Subject: [PATCH 05/11] [onert/api] RmsNorm added to OpMap. ONE-DCO-1.0-Signed-off-by: Seockho Kim seockho.kim@samsung.com --- runtime/onert/api/nnfw/src/OpMap.lst | 1 + 1 file changed, 1 insertion(+) diff --git a/runtime/onert/api/nnfw/src/OpMap.lst b/runtime/onert/api/nnfw/src/OpMap.lst index 6d4d2fa6999..6b7aabcbad7 100644 --- a/runtime/onert/api/nnfw/src/OpMap.lst +++ b/runtime/onert/api/nnfw/src/OpMap.lst @@ -150,3 +150,4 @@ MAP_MACRO(BATCH_MATMUL , BatchMatMul) MAP_MACRO(BCQ_GATHER , BCQGather) MAP_MACRO(BCQ_FULLY_CONNECTED , BCQFullyConnected) MAP_MACRO(INSTANCE_NORM , InstanceNorm) +MAP_MACRO(RMS_NORM , RmsNorm) From 199e3d9a8ea82ee2fc0e254f018e0f0d0825b215 Mon Sep 17 00:00:00 2001 From: "seockho.kim" Date: Wed, 25 Sep 2024 13:14:37 +0900 Subject: [PATCH 06/11] [runtime] update circle schema header file ONE-DCO-1.0-Signed-off-by: Seockho Kim seockho.kim@samsung.com --- .../include/circle_schema_generated.h | 394 +++++++++++++++++- 1 file changed, 385 insertions(+), 9 deletions(-) diff --git a/runtime/libs/circle-schema/include/circle_schema_generated.h b/runtime/libs/circle-schema/include/circle_schema_generated.h index b481875e9cd..bf68cc1c185 100644 --- a/runtime/libs/circle-schema/include/circle_schema_generated.h +++ b/runtime/libs/circle-schema/include/circle_schema_generated.h @@ -667,6 +667,14 @@ struct InstanceNormOptions; struct InstanceNormOptionsBuilder; struct InstanceNormOptionsT; +struct RmsNormOptions; +struct RmsNormOptionsBuilder; +struct RmsNormOptionsT; + +struct RoPEOptions; +struct RoPEOptionsBuilder; +struct RoPEOptionsT; + struct OperatorCode; struct OperatorCodeBuilder; struct OperatorCodeT; @@ -1097,6 +1105,8 @@ inline const char *EnumNameCompressionType(CompressionType e) enum BuiltinOperator : int32_t { + BuiltinOperator_ROPE = -7, + BuiltinOperator_RMS_NORM = -6, BuiltinOperator_GRU = -5, BuiltinOperator_BCQ_GATHER = -4, BuiltinOperator_BCQ_FULLY_CONNECTED = -3, @@ -1307,13 +1317,15 @@ enum BuiltinOperator : int32_t BuiltinOperator_DILATE = 203, BuiltinOperator_STABLEHLO_RNG_BIT_GENERATOR = 204, BuiltinOperator_REDUCE_WINDOW = 205, - BuiltinOperator_MIN = BuiltinOperator_GRU, + BuiltinOperator_MIN = BuiltinOperator_ROPE, BuiltinOperator_MAX = BuiltinOperator_REDUCE_WINDOW }; -inline const BuiltinOperator (&EnumValuesBuiltinOperator())[210] +inline const BuiltinOperator (&EnumValuesBuiltinOperator())[212] { - static const BuiltinOperator values[] = {BuiltinOperator_GRU, + static const BuiltinOperator values[] = {BuiltinOperator_ROPE, + BuiltinOperator_RMS_NORM, + BuiltinOperator_GRU, BuiltinOperator_BCQ_GATHER, BuiltinOperator_BCQ_FULLY_CONNECTED, BuiltinOperator_INSTANCE_NORM, @@ -1528,7 +1540,9 @@ inline const BuiltinOperator (&EnumValuesBuiltinOperator())[210] inline const char *const *EnumNamesBuiltinOperator() { - static const char *const names[212] = {"GRU", + static const char *const names[214] = {"ROPE", + "RMS_NORM", + "GRU", "BCQ_GATHER", "BCQ_FULLY_CONNECTED", "INSTANCE_NORM", @@ -1745,9 +1759,9 @@ inline const char *const *EnumNamesBuiltinOperator() inline const char *EnumNameBuiltinOperator(BuiltinOperator e) { - if (::flatbuffers::IsOutRange(e, BuiltinOperator_GRU, BuiltinOperator_REDUCE_WINDOW)) + if (::flatbuffers::IsOutRange(e, BuiltinOperator_ROPE, BuiltinOperator_REDUCE_WINDOW)) return ""; - const size_t index = static_cast(e) - static_cast(BuiltinOperator_GRU); + const size_t index = static_cast(e) - static_cast(BuiltinOperator_ROPE); return EnumNamesBuiltinOperator()[index]; } @@ -1880,6 +1894,8 @@ enum BuiltinOptions : uint8_t BuiltinOptions_BitcastOptions = 124, BuiltinOptions_BitwiseXorOptions = 125, BuiltinOptions_RightShiftOptions = 126, + BuiltinOptions_RoPEOptions = 249, + BuiltinOptions_RmsNormOptions = 250, BuiltinOptions_GRUOptions = 251, BuiltinOptions_BCQGatherOptions = 252, BuiltinOptions_BCQFullyConnectedOptions = 253, @@ -1888,7 +1904,7 @@ enum BuiltinOptions : uint8_t BuiltinOptions_MAX = BuiltinOptions_InstanceNormOptions }; -inline const BuiltinOptions (&EnumValuesBuiltinOptions())[131] +inline const BuiltinOptions (&EnumValuesBuiltinOptions())[133] { static const BuiltinOptions values[] = {BuiltinOptions_NONE, BuiltinOptions_Conv2DOptions, @@ -2017,6 +2033,8 @@ inline const BuiltinOptions (&EnumValuesBuiltinOptions())[131] BuiltinOptions_BitcastOptions, BuiltinOptions_BitwiseXorOptions, BuiltinOptions_RightShiftOptions, + BuiltinOptions_RoPEOptions, + BuiltinOptions_RmsNormOptions, BuiltinOptions_GRUOptions, BuiltinOptions_BCQGatherOptions, BuiltinOptions_BCQFullyConnectedOptions, @@ -2275,8 +2293,8 @@ inline const char *const *EnumNamesBuiltinOptions() "", "", "", - "", - "", + "RoPEOptions", + "RmsNormOptions", "GRUOptions", "BCQGatherOptions", "BCQFullyConnectedOptions", @@ -2928,6 +2946,16 @@ template <> struct BuiltinOptionsTraits static const BuiltinOptions enum_value = BuiltinOptions_RightShiftOptions; }; +template <> struct BuiltinOptionsTraits +{ + static const BuiltinOptions enum_value = BuiltinOptions_RoPEOptions; +}; + +template <> struct BuiltinOptionsTraits +{ + static const BuiltinOptions enum_value = BuiltinOptions_RmsNormOptions; +}; + template <> struct BuiltinOptionsTraits { static const BuiltinOptions enum_value = BuiltinOptions_GRUOptions; @@ -3583,6 +3611,16 @@ template <> struct BuiltinOptionsUnionTraits static const BuiltinOptions enum_value = BuiltinOptions_RightShiftOptions; }; +template <> struct BuiltinOptionsUnionTraits +{ + static const BuiltinOptions enum_value = BuiltinOptions_RoPEOptions; +}; + +template <> struct BuiltinOptionsUnionTraits +{ + static const BuiltinOptions enum_value = BuiltinOptions_RmsNormOptions; +}; + template <> struct BuiltinOptionsUnionTraits { static const BuiltinOptions enum_value = BuiltinOptions_GRUOptions; @@ -5100,6 +5138,29 @@ struct BuiltinOptionsUnion ? reinterpret_cast(value) : nullptr; } + circle::RoPEOptionsT *AsRoPEOptions() + { + return type == BuiltinOptions_RoPEOptions ? reinterpret_cast(value) + : nullptr; + } + const circle::RoPEOptionsT *AsRoPEOptions() const + { + return type == BuiltinOptions_RoPEOptions + ? reinterpret_cast(value) + : nullptr; + } + circle::RmsNormOptionsT *AsRmsNormOptions() + { + return type == BuiltinOptions_RmsNormOptions + ? reinterpret_cast(value) + : nullptr; + } + const circle::RmsNormOptionsT *AsRmsNormOptions() const + { + return type == BuiltinOptions_RmsNormOptions + ? reinterpret_cast(value) + : nullptr; + } circle::GRUOptionsT *AsGRUOptions() { return type == BuiltinOptions_GRUOptions ? reinterpret_cast(value) @@ -6141,6 +6202,34 @@ inline const char *EnumNameReduceWindowFunction(ReduceWindowFunction e) return EnumNamesReduceWindowFunction()[index]; } +enum RoPEMode : int32_t +{ + RoPEMode_GPT_NEOX = 0, + RoPEMode_GPT_J = 1, + RoPEMode_MIN = RoPEMode_GPT_NEOX, + RoPEMode_MAX = RoPEMode_GPT_J +}; + +inline const RoPEMode (&EnumValuesRoPEMode())[2] +{ + static const RoPEMode values[] = {RoPEMode_GPT_NEOX, RoPEMode_GPT_J}; + return values; +} + +inline const char *const *EnumNamesRoPEMode() +{ + static const char *const names[3] = {"GPT_NEOX", "GPT_J", nullptr}; + return names; +} + +inline const char *EnumNameRoPEMode(RoPEMode e) +{ + if (::flatbuffers::IsOutRange(e, RoPEMode_GPT_NEOX, RoPEMode_GPT_J)) + return ""; + const size_t index = static_cast(e); + return EnumNamesRoPEMode()[index]; +} + enum CustomOptionsFormat : int8_t { CustomOptionsFormat_FLEXBUFFERS = 0, @@ -17780,6 +17869,132 @@ ::flatbuffers::Offset CreateInstanceNormOptions(::flatbuffers::FlatBufferBuilder &_fbb, const InstanceNormOptionsT *_o, const ::flatbuffers::rehasher_function_t *_rehasher = nullptr); +struct RmsNormOptionsT : public ::flatbuffers::NativeTable +{ + typedef RmsNormOptions TableType; + float epsilon = 0.0f; +}; + +struct RmsNormOptions FLATBUFFERS_FINAL_CLASS : private ::flatbuffers::Table +{ + typedef RmsNormOptionsT NativeTableType; + typedef RmsNormOptionsBuilder Builder; + enum FlatBuffersVTableOffset FLATBUFFERS_VTABLE_UNDERLYING_TYPE + { + VT_EPSILON = 4 + }; + float epsilon() const { return GetField(VT_EPSILON, 0.0f); } + bool Verify(::flatbuffers::Verifier &verifier) const + { + return VerifyTableStart(verifier) && VerifyField(verifier, VT_EPSILON, 4) && + verifier.EndTable(); + } + RmsNormOptionsT *UnPack(const ::flatbuffers::resolver_function_t *_resolver = nullptr) const; + void UnPackTo(RmsNormOptionsT *_o, + const ::flatbuffers::resolver_function_t *_resolver = nullptr) const; + static ::flatbuffers::Offset + Pack(::flatbuffers::FlatBufferBuilder &_fbb, const RmsNormOptionsT *_o, + const ::flatbuffers::rehasher_function_t *_rehasher = nullptr); +}; + +struct RmsNormOptionsBuilder +{ + typedef RmsNormOptions Table; + ::flatbuffers::FlatBufferBuilder &fbb_; + ::flatbuffers::uoffset_t start_; + void add_epsilon(float epsilon) + { + fbb_.AddElement(RmsNormOptions::VT_EPSILON, epsilon, 0.0f); + } + explicit RmsNormOptionsBuilder(::flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb) + { + start_ = fbb_.StartTable(); + } + ::flatbuffers::Offset Finish() + { + const auto end = fbb_.EndTable(start_); + auto o = ::flatbuffers::Offset(end); + return o; + } +}; + +inline ::flatbuffers::Offset +CreateRmsNormOptions(::flatbuffers::FlatBufferBuilder &_fbb, float epsilon = 0.0f) +{ + RmsNormOptionsBuilder builder_(_fbb); + builder_.add_epsilon(epsilon); + return builder_.Finish(); +} + +::flatbuffers::Offset +CreateRmsNormOptions(::flatbuffers::FlatBufferBuilder &_fbb, const RmsNormOptionsT *_o, + const ::flatbuffers::rehasher_function_t *_rehasher = nullptr); + +struct RoPEOptionsT : public ::flatbuffers::NativeTable +{ + typedef RoPEOptions TableType; + circle::RoPEMode mode = circle::RoPEMode_GPT_NEOX; +}; + +struct RoPEOptions FLATBUFFERS_FINAL_CLASS : private ::flatbuffers::Table +{ + typedef RoPEOptionsT NativeTableType; + typedef RoPEOptionsBuilder Builder; + enum FlatBuffersVTableOffset FLATBUFFERS_VTABLE_UNDERLYING_TYPE + { + VT_MODE = 4 + }; + circle::RoPEMode mode() const + { + return static_cast(GetField(VT_MODE, 0)); + } + bool Verify(::flatbuffers::Verifier &verifier) const + { + return VerifyTableStart(verifier) && VerifyField(verifier, VT_MODE, 4) && + verifier.EndTable(); + } + RoPEOptionsT *UnPack(const ::flatbuffers::resolver_function_t *_resolver = nullptr) const; + void UnPackTo(RoPEOptionsT *_o, + const ::flatbuffers::resolver_function_t *_resolver = nullptr) const; + static ::flatbuffers::Offset + Pack(::flatbuffers::FlatBufferBuilder &_fbb, const RoPEOptionsT *_o, + const ::flatbuffers::rehasher_function_t *_rehasher = nullptr); +}; + +struct RoPEOptionsBuilder +{ + typedef RoPEOptions Table; + ::flatbuffers::FlatBufferBuilder &fbb_; + ::flatbuffers::uoffset_t start_; + void add_mode(circle::RoPEMode mode) + { + fbb_.AddElement(RoPEOptions::VT_MODE, static_cast(mode), 0); + } + explicit RoPEOptionsBuilder(::flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb) + { + start_ = fbb_.StartTable(); + } + ::flatbuffers::Offset Finish() + { + const auto end = fbb_.EndTable(start_); + auto o = ::flatbuffers::Offset(end); + return o; + } +}; + +inline ::flatbuffers::Offset +CreateRoPEOptions(::flatbuffers::FlatBufferBuilder &_fbb, + circle::RoPEMode mode = circle::RoPEMode_GPT_NEOX) +{ + RoPEOptionsBuilder builder_(_fbb); + builder_.add_mode(mode); + return builder_.Finish(); +} + +::flatbuffers::Offset +CreateRoPEOptions(::flatbuffers::FlatBufferBuilder &_fbb, const RoPEOptionsT *_o, + const ::flatbuffers::rehasher_function_t *_rehasher = nullptr); + struct OperatorCodeT : public ::flatbuffers::NativeTable { typedef OperatorCode TableType; @@ -18700,6 +18915,18 @@ struct Operator FLATBUFFERS_FINAL_CLASS : private ::flatbuffers::Table ? static_cast(builtin_options()) : nullptr; } + const circle::RoPEOptions *builtin_options_as_RoPEOptions() const + { + return builtin_options_type() == circle::BuiltinOptions_RoPEOptions + ? static_cast(builtin_options()) + : nullptr; + } + const circle::RmsNormOptions *builtin_options_as_RmsNormOptions() const + { + return builtin_options_type() == circle::BuiltinOptions_RmsNormOptions + ? static_cast(builtin_options()) + : nullptr; + } const circle::GRUOptions *builtin_options_as_GRUOptions() const { return builtin_options_type() == circle::BuiltinOptions_GRUOptions @@ -19723,6 +19950,18 @@ Operator::builtin_options_as() const return builtin_options_as_RightShiftOptions(); } +template <> +inline const circle::RoPEOptions *Operator::builtin_options_as() const +{ + return builtin_options_as_RoPEOptions(); +} + +template <> +inline const circle::RmsNormOptions *Operator::builtin_options_as() const +{ + return builtin_options_as_RmsNormOptions(); +} + template <> inline const circle::GRUOptions *Operator::builtin_options_as() const { @@ -29000,6 +29239,91 @@ CreateInstanceNormOptions(::flatbuffers::FlatBufferBuilder &_fbb, const Instance return circle::CreateInstanceNormOptions(_fbb, _epsilon, _fused_activation_function); } +inline RmsNormOptionsT * +RmsNormOptions::UnPack(const ::flatbuffers::resolver_function_t *_resolver) const +{ + auto _o = std::unique_ptr(new RmsNormOptionsT()); + UnPackTo(_o.get(), _resolver); + return _o.release(); +} + +inline void RmsNormOptions::UnPackTo(RmsNormOptionsT *_o, + const ::flatbuffers::resolver_function_t *_resolver) const +{ + (void)_o; + (void)_resolver; + { + auto _e = epsilon(); + _o->epsilon = _e; + } +} + +inline ::flatbuffers::Offset +RmsNormOptions::Pack(::flatbuffers::FlatBufferBuilder &_fbb, const RmsNormOptionsT *_o, + const ::flatbuffers::rehasher_function_t *_rehasher) +{ + return CreateRmsNormOptions(_fbb, _o, _rehasher); +} + +inline ::flatbuffers::Offset +CreateRmsNormOptions(::flatbuffers::FlatBufferBuilder &_fbb, const RmsNormOptionsT *_o, + const ::flatbuffers::rehasher_function_t *_rehasher) +{ + (void)_rehasher; + (void)_o; + struct _VectorArgs + { + ::flatbuffers::FlatBufferBuilder *__fbb; + const RmsNormOptionsT *__o; + const ::flatbuffers::rehasher_function_t *__rehasher; + } _va = {&_fbb, _o, _rehasher}; + (void)_va; + auto _epsilon = _o->epsilon; + return circle::CreateRmsNormOptions(_fbb, _epsilon); +} + +inline RoPEOptionsT *RoPEOptions::UnPack(const ::flatbuffers::resolver_function_t *_resolver) const +{ + auto _o = std::unique_ptr(new RoPEOptionsT()); + UnPackTo(_o.get(), _resolver); + return _o.release(); +} + +inline void RoPEOptions::UnPackTo(RoPEOptionsT *_o, + const ::flatbuffers::resolver_function_t *_resolver) const +{ + (void)_o; + (void)_resolver; + { + auto _e = mode(); + _o->mode = _e; + } +} + +inline ::flatbuffers::Offset +RoPEOptions::Pack(::flatbuffers::FlatBufferBuilder &_fbb, const RoPEOptionsT *_o, + const ::flatbuffers::rehasher_function_t *_rehasher) +{ + return CreateRoPEOptions(_fbb, _o, _rehasher); +} + +inline ::flatbuffers::Offset +CreateRoPEOptions(::flatbuffers::FlatBufferBuilder &_fbb, const RoPEOptionsT *_o, + const ::flatbuffers::rehasher_function_t *_rehasher) +{ + (void)_rehasher; + (void)_o; + struct _VectorArgs + { + ::flatbuffers::FlatBufferBuilder *__fbb; + const RoPEOptionsT *__o; + const ::flatbuffers::rehasher_function_t *__rehasher; + } _va = {&_fbb, _o, _rehasher}; + (void)_va; + auto _mode = _o->mode; + return circle::CreateRoPEOptions(_fbb, _mode); +} + inline OperatorCodeT * OperatorCode::UnPack(const ::flatbuffers::resolver_function_t *_resolver) const { @@ -30834,6 +31158,16 @@ inline bool VerifyBuiltinOptions(::flatbuffers::Verifier &verifier, const void * auto ptr = reinterpret_cast(obj); return verifier.VerifyTable(ptr); } + case BuiltinOptions_RoPEOptions: + { + auto ptr = reinterpret_cast(obj); + return verifier.VerifyTable(ptr); + } + case BuiltinOptions_RmsNormOptions: + { + auto ptr = reinterpret_cast(obj); + return verifier.VerifyTable(ptr); + } case BuiltinOptions_GRUOptions: { auto ptr = reinterpret_cast(obj); @@ -31514,6 +31848,16 @@ inline void *BuiltinOptionsUnion::UnPack(const void *obj, BuiltinOptions type, auto ptr = reinterpret_cast(obj); return ptr->UnPack(resolver); } + case BuiltinOptions_RoPEOptions: + { + auto ptr = reinterpret_cast(obj); + return ptr->UnPack(resolver); + } + case BuiltinOptions_RmsNormOptions: + { + auto ptr = reinterpret_cast(obj); + return ptr->UnPack(resolver); + } case BuiltinOptions_GRUOptions: { auto ptr = reinterpret_cast(obj); @@ -32176,6 +32520,16 @@ BuiltinOptionsUnion::Pack(::flatbuffers::FlatBufferBuilder &_fbb, auto ptr = reinterpret_cast(value); return CreateRightShiftOptions(_fbb, ptr, _rehasher).Union(); } + case BuiltinOptions_RoPEOptions: + { + auto ptr = reinterpret_cast(value); + return CreateRoPEOptions(_fbb, ptr, _rehasher).Union(); + } + case BuiltinOptions_RmsNormOptions: + { + auto ptr = reinterpret_cast(value); + return CreateRmsNormOptions(_fbb, ptr, _rehasher).Union(); + } case BuiltinOptions_GRUOptions: { auto ptr = reinterpret_cast(value); @@ -32897,6 +33251,16 @@ inline BuiltinOptionsUnion::BuiltinOptionsUnion(const BuiltinOptionsUnion &u) new circle::RightShiftOptionsT(*reinterpret_cast(u.value)); break; } + case BuiltinOptions_RoPEOptions: + { + value = new circle::RoPEOptionsT(*reinterpret_cast(u.value)); + break; + } + case BuiltinOptions_RmsNormOptions: + { + value = new circle::RmsNormOptionsT(*reinterpret_cast(u.value)); + break; + } case BuiltinOptions_GRUOptions: { value = new circle::GRUOptionsT(*reinterpret_cast(u.value)); @@ -33685,6 +34049,18 @@ inline void BuiltinOptionsUnion::Reset() delete ptr; break; } + case BuiltinOptions_RoPEOptions: + { + auto ptr = reinterpret_cast(value); + delete ptr; + break; + } + case BuiltinOptions_RmsNormOptions: + { + auto ptr = reinterpret_cast(value); + delete ptr; + break; + } case BuiltinOptions_GRUOptions: { auto ptr = reinterpret_cast(value); From 2af4728491fc1b260bd7d83099d2ba59bc199701 Mon Sep 17 00:00:00 2001 From: "seockho.kim" Date: Wed, 25 Sep 2024 13:16:03 +0900 Subject: [PATCH 07/11] [runtime] Removed activation func from RmsNorm operation ONE-DCO-1.0-Signed-off-by: Seockho Kim seockho.kim@samsung.com --- compute/cker/include/cker/Types.h | 2 -- runtime/onert/backend/cpu/KernelGenerator.cc | 3 +-- runtime/onert/backend/cpu/ops/RmsNormLayer.cc | 5 +---- runtime/onert/backend/cpu/ops/RmsNormLayer.h | 3 +-- runtime/onert/core/include/ir/operation/RmsNorm.h | 3 +-- .../src/ir/train/operation/UntrainableOperation.test.cc | 1 - runtime/onert/core/src/loader/CircleLoader.cc | 1 - tests/nnfw_api/lib/CircleGen.cc | 5 ++--- tests/nnfw_api/lib/CircleGen.h | 3 +-- .../src/GenModelTests/one_op_tests/RmsNorm.test.cc | 9 ++++----- 10 files changed, 11 insertions(+), 24 deletions(-) diff --git a/compute/cker/include/cker/Types.h b/compute/cker/include/cker/Types.h index bca81aade39..0112aca88b2 100644 --- a/compute/cker/include/cker/Types.h +++ b/compute/cker/include/cker/Types.h @@ -319,8 +319,6 @@ struct ResizeBilinearParams struct RmsNormParams { float epsilon; - float float_activation_min; - float float_activation_max; }; struct TransposeConvParams diff --git a/runtime/onert/backend/cpu/KernelGenerator.cc b/runtime/onert/backend/cpu/KernelGenerator.cc index 7a33eaf42d5..992a35648a2 100644 --- a/runtime/onert/backend/cpu/KernelGenerator.cc +++ b/runtime/onert/backend/cpu/KernelGenerator.cc @@ -1114,11 +1114,10 @@ void KernelGenerator::visit(const ir::operation::RmsNorm &node) auto gamma_tensor = _tensor_reg->getPortableTensor(gamma_index); auto beta_tensor = _tensor_reg->getPortableTensor(beta_index); auto epsilon = node.param().epsilon; - auto activation = node.param().activation; auto fn = std::make_unique(); - fn->configure(ifm_tensor, gamma_tensor, beta_tensor, epsilon, activation, ofm_tensor); + fn->configure(ifm_tensor, gamma_tensor, beta_tensor, epsilon, ofm_tensor); _return_fn = std::move(fn); } diff --git a/runtime/onert/backend/cpu/ops/RmsNormLayer.cc b/runtime/onert/backend/cpu/ops/RmsNormLayer.cc index 376d18d7ff1..13838578767 100644 --- a/runtime/onert/backend/cpu/ops/RmsNormLayer.cc +++ b/runtime/onert/backend/cpu/ops/RmsNormLayer.cc @@ -31,14 +31,11 @@ namespace ops { void RmsNormLayer::configure(const IPortableTensor *input, const IPortableTensor *gamma, - const IPortableTensor *beta, float epsilon, - const ir::Activation activation, IPortableTensor *output) + const IPortableTensor *beta, float epsilon, IPortableTensor *output) { assert(input != nullptr); assert(output != nullptr); - UNUSED_RELEASE(activation); - _input = input; _output = output; _gamma = gamma; diff --git a/runtime/onert/backend/cpu/ops/RmsNormLayer.h b/runtime/onert/backend/cpu/ops/RmsNormLayer.h index aa8072add1b..646498ebd3c 100644 --- a/runtime/onert/backend/cpu/ops/RmsNormLayer.h +++ b/runtime/onert/backend/cpu/ops/RmsNormLayer.h @@ -40,8 +40,7 @@ class RmsNormLayer : public ::onert::exec::IFunction public: void configure(const IPortableTensor *input, const IPortableTensor *gamma, - const IPortableTensor *beta, float epsilon, const ir::Activation activation, - IPortableTensor *output); + const IPortableTensor *beta, float epsilon, IPortableTensor *output); void run() override; diff --git a/runtime/onert/core/include/ir/operation/RmsNorm.h b/runtime/onert/core/include/ir/operation/RmsNorm.h index b68e67dcdbb..71260bd0ab7 100644 --- a/runtime/onert/core/include/ir/operation/RmsNorm.h +++ b/runtime/onert/core/include/ir/operation/RmsNorm.h @@ -39,13 +39,12 @@ class RmsNorm : public Operation struct Param { - Activation activation; float epsilon; }; public: RmsNorm(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs, - const Param ¶m); + const Param ¶m); public: void accept(OperationVisitor &v) const override; diff --git a/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc b/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc index 0dc4275b647..7f8fd57531b 100644 --- a/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc +++ b/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc @@ -415,7 +415,6 @@ operation::Reverse generateReverse() operation::RmsNorm generateRmsNorm() { operation::RmsNorm::Param param; - param.activation = Activation::NONE; param.epsilon = 0.f; return operation::RmsNorm{OperandIndexSequence{1, 2, 3}, OperandIndexSequence{0}, param}; diff --git a/runtime/onert/core/src/loader/CircleLoader.cc b/runtime/onert/core/src/loader/CircleLoader.cc index 3f26c9b1cdc..d06d0252edb 100644 --- a/runtime/onert/core/src/loader/CircleLoader.cc +++ b/runtime/onert/core/src/loader/CircleLoader.cc @@ -239,7 +239,6 @@ void CircleLoader::loadRmsNorm(const Operator *op, ir::Graph &subg) ir::operation::RmsNorm::Param param; const auto *options = op->builtin_options_as_RmsNormOptions(); - param.activation = convertActivation(options->fused_activation_function()); // Use default value 1e-6 if value of epsilon is zero param.epsilon = options->epsilon() == 0.f ? 1e-6 : options->epsilon(); diff --git a/tests/nnfw_api/lib/CircleGen.cc b/tests/nnfw_api/lib/CircleGen.cc index be4428a2fbb..38559a678b2 100644 --- a/tests/nnfw_api/lib/CircleGen.cc +++ b/tests/nnfw_api/lib/CircleGen.cc @@ -589,10 +589,9 @@ uint32_t CircleGen::addOperatorBatchToSpaceND(const OperatorParams ¶ms) circle::BuiltinOptions_BatchToSpaceNDOptions, options); } -uint32_t CircleGen::addOperatorRmsNorm(const OperatorParams ¶ms, float epsilon, - circle::ActivationFunctionType actfn) +uint32_t CircleGen::addOperatorRmsNorm(const OperatorParams ¶ms, float epsilon) { - auto options = circle::CreateRmsNormOptions(_fbb, epsilon, actfn).Union(); + auto options = circle::CreateRmsNormOptions(_fbb, epsilon).Union(); return addOperatorWithOptions(params, circle::BuiltinOperator_RMS_NORM, circle::BuiltinOptions_RmsNormOptions, options); } diff --git a/tests/nnfw_api/lib/CircleGen.h b/tests/nnfw_api/lib/CircleGen.h index 59fad1b4cf3..388e173ae8e 100644 --- a/tests/nnfw_api/lib/CircleGen.h +++ b/tests/nnfw_api/lib/CircleGen.h @@ -201,8 +201,7 @@ class CircleGen uint32_t addOperatorRank(const OperatorParams ¶ms); uint32_t addOperatorReduce(const OperatorParams ¶ms, circle::BuiltinOperator reduce_op, bool keep_dims); - uint32_t addOperatorRmsNorm(const OperatorParams ¶ms, float epsilon, - circle::ActivationFunctionType actfn); + uint32_t addOperatorRmsNorm(const OperatorParams ¶ms, float epsilon); /** * @brief Create circle Reshape op * the second param new_shape can be optional just like circle::CreateReshapeOptionsDirect diff --git a/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc b/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc index d8a918b45e4..e19009c0ef9 100644 --- a/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc +++ b/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc @@ -26,7 +26,7 @@ TEST_F(GenModelTest, OneOp_RmsNorm) int in = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); int out = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); - cgen.addOperatorRmsNorm({{in, gamma, beta}, {out}}, 0.00001f, circle::ActivationFunctionType_NONE); + cgen.addOperatorRmsNorm({{in, gamma, beta}, {out}}, 0.00001f); cgen.setInputsAndOutputs({in}, {out}); _context = std::make_unique(cgen.finish()); @@ -36,18 +36,17 @@ TEST_F(GenModelTest, OneOp_RmsNorm) SUCCEED(); } -TEST_F(GenModelTest, neg_OneOp_RmsNorm_InvalidActivation) +TEST_F(GenModelTest, neg_OneOp_RmsNorm_InvalidType) { CircleGen cgen; uint32_t beta_buf = cgen.addBuffer(std::vector{1}); uint32_t gamma_buf = cgen.addBuffer(std::vector{2}); int beta = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, beta_buf}); int gamma = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, gamma_buf}); - int in = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); + int in = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_UINT8}); int out = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); - cgen.addOperatorRmsNorm({{in, gamma, beta}, {out}}, 0.00001f, - static_cast(128) /* Invalid value*/); + cgen.addOperatorRmsNorm({{in, gamma, beta}, {out}}, 0.00001f); cgen.setInputsAndOutputs({in}, {out}); _context = std::make_unique(cgen.finish()); From f3e31f6178db89560d4cb7154336411372b0e302 Mon Sep 17 00:00:00 2001 From: "seockho.kim" Date: Wed, 25 Sep 2024 13:18:18 +0900 Subject: [PATCH 08/11] [runtime] Fix format error of RmsNorm ONE-DCO-1.0-Signed-off-by: Seockho Kim seockho.kim@samsung.com --- runtime/onert/backend/cpu/ops/RmsNormLayer.cc | 2 +- runtime/onert/core/src/ir/operation/RmsNorm.cc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/runtime/onert/backend/cpu/ops/RmsNormLayer.cc b/runtime/onert/backend/cpu/ops/RmsNormLayer.cc index 13838578767..00c9bde9bef 100644 --- a/runtime/onert/backend/cpu/ops/RmsNormLayer.cc +++ b/runtime/onert/backend/cpu/ops/RmsNormLayer.cc @@ -63,4 +63,4 @@ void RmsNormLayer::run() } // namespace ops } // namespace cpu } // namespace backend -} // namespace onert \ No newline at end of file +} // namespace onert diff --git a/runtime/onert/core/src/ir/operation/RmsNorm.cc b/runtime/onert/core/src/ir/operation/RmsNorm.cc index 8547f0e1da9..b2c6b63807d 100644 --- a/runtime/onert/core/src/ir/operation/RmsNorm.cc +++ b/runtime/onert/core/src/ir/operation/RmsNorm.cc @@ -27,7 +27,7 @@ namespace operation void RmsNorm::accept(OperationVisitor &v) const { v.visit(*this); } RmsNorm::RmsNorm(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs, - const Param ¶m) + const Param ¶m) : Operation{OperandConstraint::createExact(3u), inputs, outputs}, _param{param} { } From bbf39eaaedd80b1e2e1b0d6a499cd0f5612d2765 Mon Sep 17 00:00:00 2001 From: "seockho.kim" Date: Wed, 25 Sep 2024 18:18:05 +0900 Subject: [PATCH 09/11] [runtime] Fix RmsNorm GenModelTest ONE-DCO-1.0-Signed-off-by: Seockho Kim seockho.kim@samsung.com --- .../src/GenModelTests/one_op_tests/RmsNorm.test.cc | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc b/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc index e19009c0ef9..a5b7d961419 100644 --- a/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc +++ b/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc @@ -36,21 +36,21 @@ TEST_F(GenModelTest, OneOp_RmsNorm) SUCCEED(); } -TEST_F(GenModelTest, neg_OneOp_RmsNorm_InvalidType) +TEST_F(GenModelTest, neg_OneOp_RmsNorm_InvalidShape) { CircleGen cgen; uint32_t beta_buf = cgen.addBuffer(std::vector{1}); uint32_t gamma_buf = cgen.addBuffer(std::vector{2}); int beta = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, beta_buf}); int gamma = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, gamma_buf}); - int in = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_UINT8}); - int out = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); + int in = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); + int out = cgen.addTensor({{2, 2, 2, 2}, circle::TensorType::TensorType_FLOAT32}); cgen.addOperatorRmsNorm({{in, gamma, beta}, {out}}, 0.00001f); cgen.setInputsAndOutputs({in}, {out}); _context = std::make_unique(cgen.finish()); - _context->expectFailModelLoad(); + _context->expectFailCompile(); SUCCEED(); -} +} \ No newline at end of file From 6ee3b0647522131c7870eb5512c3bacf56a08871 Mon Sep 17 00:00:00 2001 From: "seockho.kim" Date: Wed, 25 Sep 2024 18:42:48 +0900 Subject: [PATCH 10/11] [runtime] Fix format of RmsNorm test ONE-DCO-1.0-Signed-off-by: Seockho Kim seockho.kim@samsung.com --- tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc b/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc index a5b7d961419..08025713c56 100644 --- a/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc +++ b/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc @@ -53,4 +53,4 @@ TEST_F(GenModelTest, neg_OneOp_RmsNorm_InvalidShape) _context->expectFailCompile(); SUCCEED(); -} \ No newline at end of file +} From ea734e53321f41b3dd1a13c9c28444a60408ed7b Mon Sep 17 00:00:00 2001 From: "seockho.kim" Date: Mon, 30 Sep 2024 19:04:32 +0900 Subject: [PATCH 11/11] [runtime] Beta(bias) removed from RMSNorm ONE-DCO-1.0-Signed-off-by: Seockho Kim seockho.kim@samsung.com --- compute/cker/include/cker/operation/RmsNorm.h | 8 +++----- runtime/onert/backend/cpu/KernelGenerator.cc | 4 +--- runtime/onert/backend/cpu/ops/RmsNormLayer.cc | 6 ++---- runtime/onert/backend/cpu/ops/RmsNormLayer.h | 8 +++----- runtime/onert/core/include/ir/operation/RmsNorm.h | 1 - runtime/onert/core/src/compiler/ShapeValidator.cc | 2 -- runtime/onert/core/src/ir/OperationDumper.cc | 3 +-- runtime/onert/core/src/ir/operation/RmsNorm.cc | 2 +- .../src/ir/train/operation/UntrainableOperation.test.cc | 2 +- .../src/GenModelTests/one_op_tests/RmsNorm.test.cc | 6 ++---- 10 files changed, 14 insertions(+), 28 deletions(-) diff --git a/compute/cker/include/cker/operation/RmsNorm.h b/compute/cker/include/cker/operation/RmsNorm.h index 8db768f42bd..18b6cf5ec15 100644 --- a/compute/cker/include/cker/operation/RmsNorm.h +++ b/compute/cker/include/cker/operation/RmsNorm.h @@ -29,8 +29,8 @@ namespace cker { inline void RmsNorm(const RmsNormParams ¶ms, const Shape &input_shape, const float *input_data, - const Shape &gamma_shape, const float *gamma_data, const Shape &beta_shape, - const float *beta_data, const Shape &output_shape, float *output_data) + const Shape &gamma_shape, const float *gamma_data, const Shape &output_shape, + float *output_data) { const int32_t batches = MatchingDim(input_shape, 0, output_shape, 0); const int32_t heights = MatchingDim(input_shape, 1, output_shape, 1); @@ -38,7 +38,6 @@ inline void RmsNorm(const RmsNormParams ¶ms, const Shape &input_shape, const const int32_t channels = MatchingDim(input_shape, 3, output_shape, 3); UNUSED_RELEASE(gamma_shape); - UNUSED_RELEASE(beta_shape); for (int32_t batch = 0; batch < batches; batch++) { @@ -56,9 +55,8 @@ inline void RmsNorm(const RmsNormParams ¶ms, const Shape &input_shape, const for (int32_t channel = 0; channel < channels; channel++) { double gamma = gamma_data[channel]; - double beta = beta_data[channel]; output_data[Offset(output_shape, batch, height, width, channel)] = - (gamma * (input_data[Offset(input_shape, batch, height, width, channel)] / rms) + beta); + gamma * (input_data[Offset(input_shape, batch, height, width, channel)] / rms); } } } diff --git a/runtime/onert/backend/cpu/KernelGenerator.cc b/runtime/onert/backend/cpu/KernelGenerator.cc index 992a35648a2..6420fe17a02 100644 --- a/runtime/onert/backend/cpu/KernelGenerator.cc +++ b/runtime/onert/backend/cpu/KernelGenerator.cc @@ -1107,17 +1107,15 @@ void KernelGenerator::visit(const ir::operation::RmsNorm &node) const auto ofm_index{node.getOutputs().at(0)}; const auto ifm_index{node.getInputs().at(ir::operation::RmsNorm::Input::INPUT)}; const auto gamma_index{node.getInputs().at(ir::operation::RmsNorm::Input::GAMMA)}; - const auto beta_index{node.getInputs().at(ir::operation::RmsNorm::Input::BETA)}; auto ofm_tensor = _tensor_reg->getPortableTensor(ofm_index); auto ifm_tensor = _tensor_reg->getPortableTensor(ifm_index); auto gamma_tensor = _tensor_reg->getPortableTensor(gamma_index); - auto beta_tensor = _tensor_reg->getPortableTensor(beta_index); auto epsilon = node.param().epsilon; auto fn = std::make_unique(); - fn->configure(ifm_tensor, gamma_tensor, beta_tensor, epsilon, ofm_tensor); + fn->configure(ifm_tensor, gamma_tensor, epsilon, ofm_tensor); _return_fn = std::move(fn); } diff --git a/runtime/onert/backend/cpu/ops/RmsNormLayer.cc b/runtime/onert/backend/cpu/ops/RmsNormLayer.cc index 00c9bde9bef..4dcfa9d1045 100644 --- a/runtime/onert/backend/cpu/ops/RmsNormLayer.cc +++ b/runtime/onert/backend/cpu/ops/RmsNormLayer.cc @@ -31,7 +31,7 @@ namespace ops { void RmsNormLayer::configure(const IPortableTensor *input, const IPortableTensor *gamma, - const IPortableTensor *beta, float epsilon, IPortableTensor *output) + float epsilon, IPortableTensor *output) { assert(input != nullptr); assert(output != nullptr); @@ -39,7 +39,6 @@ void RmsNormLayer::configure(const IPortableTensor *input, const IPortableTensor _input = input; _output = output; _gamma = gamma; - _beta = beta; _epsilon = epsilon; } @@ -51,8 +50,7 @@ void RmsNormLayer::run() nnfw::cker::RmsNormParams param; param.epsilon = _epsilon; nnfw::cker::RmsNorm(param, getShape(_input), getBuffer(_input), getShape(_gamma), - getBuffer(_gamma), getShape(_beta), getBuffer(_beta), - getShape(_output), getBuffer(_output)); + getBuffer(_gamma), getShape(_output), getBuffer(_output)); break; default: diff --git a/runtime/onert/backend/cpu/ops/RmsNormLayer.h b/runtime/onert/backend/cpu/ops/RmsNormLayer.h index 646498ebd3c..134c39b6513 100644 --- a/runtime/onert/backend/cpu/ops/RmsNormLayer.h +++ b/runtime/onert/backend/cpu/ops/RmsNormLayer.h @@ -32,15 +32,14 @@ namespace ops class RmsNormLayer : public ::onert::exec::IFunction { public: - RmsNormLayer() - : _input(nullptr), _output(nullptr), _gamma(nullptr), _beta(nullptr), _epsilon(1e-06f) + RmsNormLayer() : _input(nullptr), _output(nullptr), _gamma(nullptr), _epsilon(1e-06f) { // Nothing } public: - void configure(const IPortableTensor *input, const IPortableTensor *gamma, - const IPortableTensor *beta, float epsilon, IPortableTensor *output); + void configure(const IPortableTensor *input, const IPortableTensor *gamma, float epsilon, + IPortableTensor *output); void run() override; @@ -48,7 +47,6 @@ class RmsNormLayer : public ::onert::exec::IFunction const IPortableTensor *_input; IPortableTensor *_output; const IPortableTensor *_gamma; - const IPortableTensor *_beta; float _epsilon; }; diff --git a/runtime/onert/core/include/ir/operation/RmsNorm.h b/runtime/onert/core/include/ir/operation/RmsNorm.h index 71260bd0ab7..88cde72d7c9 100644 --- a/runtime/onert/core/include/ir/operation/RmsNorm.h +++ b/runtime/onert/core/include/ir/operation/RmsNorm.h @@ -34,7 +34,6 @@ class RmsNorm : public Operation { INPUT = 0, GAMMA, - BETA }; struct Param diff --git a/runtime/onert/core/src/compiler/ShapeValidator.cc b/runtime/onert/core/src/compiler/ShapeValidator.cc index 88c16a15e37..555c46d6a2a 100644 --- a/runtime/onert/core/src/compiler/ShapeValidator.cc +++ b/runtime/onert/core/src/compiler/ShapeValidator.cc @@ -1132,12 +1132,10 @@ void ShapeValidator::visit(const ir::operation::RmsNorm &node) const auto ifm_index{node.getInputs().at(ir::operation::RmsNorm::Input::INPUT)}; const auto gamma_index{node.getInputs().at(ir::operation::RmsNorm::Input::GAMMA)}; - const auto beta_index{node.getInputs().at(ir::operation::RmsNorm::Input::BETA)}; OP_REQUIRES(operands.at(ifm_index).shape().rank() == 4); OP_REQUIRES(operands.at(ifm_index).shape() == operands.at(ofm_index).shape()); OP_REQUIRES(operands.at(gamma_index).shape().rank() == 1); - OP_REQUIRES(operands.at(beta_index).shape().rank() == 1); } } // namespace compiler diff --git a/runtime/onert/core/src/ir/OperationDumper.cc b/runtime/onert/core/src/ir/OperationDumper.cc index 771724a2bf3..933bc757cbd 100644 --- a/runtime/onert/core/src/ir/OperationDumper.cc +++ b/runtime/onert/core/src/ir/OperationDumper.cc @@ -321,8 +321,7 @@ void OperationDumper::visit(const Reverse &node) void OperationDumper::visit(const RmsNorm &node) { std::string inputs = - "Gamma(" + std::to_string(node.getInputs().at(RmsNorm::Input::GAMMA).value()) + ") Beta(" + - std::to_string(node.getInputs().at(RmsNorm::Input::BETA).value()) + ")"; + "Gamma(" + std::to_string(node.getInputs().at(RmsNorm::Input::GAMMA).value()) + ")"; dumpUnaryInputOp(node, inputs); } diff --git a/runtime/onert/core/src/ir/operation/RmsNorm.cc b/runtime/onert/core/src/ir/operation/RmsNorm.cc index b2c6b63807d..2f6f4927772 100644 --- a/runtime/onert/core/src/ir/operation/RmsNorm.cc +++ b/runtime/onert/core/src/ir/operation/RmsNorm.cc @@ -28,7 +28,7 @@ void RmsNorm::accept(OperationVisitor &v) const { v.visit(*this); } RmsNorm::RmsNorm(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs, const Param ¶m) - : Operation{OperandConstraint::createExact(3u), inputs, outputs}, _param{param} + : Operation{OperandConstraint::createExact(2u), inputs, outputs}, _param{param} { } diff --git a/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc b/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc index 7f8fd57531b..4ae72668dd9 100644 --- a/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc +++ b/runtime/onert/core/src/ir/train/operation/UntrainableOperation.test.cc @@ -417,7 +417,7 @@ operation::RmsNorm generateRmsNorm() operation::RmsNorm::Param param; param.epsilon = 0.f; - return operation::RmsNorm{OperandIndexSequence{1, 2, 3}, OperandIndexSequence{0}, param}; + return operation::RmsNorm{OperandIndexSequence{1, 2}, OperandIndexSequence{0}, param}; } operation::RNN generateRNN() diff --git a/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc b/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc index 08025713c56..f862e53a700 100644 --- a/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc +++ b/tests/nnfw_api/src/GenModelTests/one_op_tests/RmsNorm.test.cc @@ -21,12 +21,11 @@ TEST_F(GenModelTest, OneOp_RmsNorm) CircleGen cgen; uint32_t beta_buf = cgen.addBuffer(std::vector{0}); uint32_t gamma_buf = cgen.addBuffer(std::vector{1}); - int beta = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, beta_buf}); int gamma = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, gamma_buf}); int in = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); int out = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); - cgen.addOperatorRmsNorm({{in, gamma, beta}, {out}}, 0.00001f); + cgen.addOperatorRmsNorm({{in, gamma}, {out}}, 0.00001f); cgen.setInputsAndOutputs({in}, {out}); _context = std::make_unique(cgen.finish()); @@ -41,12 +40,11 @@ TEST_F(GenModelTest, neg_OneOp_RmsNorm_InvalidShape) CircleGen cgen; uint32_t beta_buf = cgen.addBuffer(std::vector{1}); uint32_t gamma_buf = cgen.addBuffer(std::vector{2}); - int beta = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, beta_buf}); int gamma = cgen.addTensor({{1}, circle::TensorType::TensorType_FLOAT32, gamma_buf}); int in = cgen.addTensor({{1, 2, 2, 1}, circle::TensorType::TensorType_FLOAT32}); int out = cgen.addTensor({{2, 2, 2, 2}, circle::TensorType::TensorType_FLOAT32}); - cgen.addOperatorRmsNorm({{in, gamma, beta}, {out}}, 0.00001f); + cgen.addOperatorRmsNorm({{in, gamma}, {out}}, 0.00001f); cgen.setInputsAndOutputs({in}, {out}); _context = std::make_unique(cgen.finish());