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mma_sm90_gmma.hpp
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mma_sm90_gmma.hpp
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/***************************************************************************************************
* Copyright (c) 2023 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: BSD-3-Clause
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************************************/
#pragma once
#include <cute/config.hpp>
#include <cute/arch/mma.hpp>
// Config
#if (defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 900) && defined(__CUDA_ARCH_FEAT_SM90_ALL))
# define CUTE_ARCH_MMA_SM90A_ENABLED
#endif
namespace cute {
////////////////////////////////////////////////////////////////////////////////////////////////////
// Warpgroup sync primitives
CUTE_HOST_DEVICE
void
warpgroup_arrive()
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile ("wgmma.fence.sync.aligned;\n" ::: "memory");
#else
CUTE_RUNTIME_ASSERT("Attempting to use wgmma.fence without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
template <int N>
CUTE_HOST_DEVICE
void
warpgroup_wait()
{
static_assert(N >= 0 && N <= 7, "WGMMA wait: N must be in range [0, 7]");
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile("wgmma.wait_group.sync.aligned %0;\n" :: "n"(N) : "memory");
#else
CUTE_RUNTIME_ASSERT("Attempting to use wgmma.wait_group<N> without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
// Marks the commit point for one or more sized batch of warpgroup MMAs.
CUTE_HOST_DEVICE
void
warpgroup_commit_batch()
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile("wgmma.commit_group.sync.aligned;\n" ::: "memory");
#else
CUTE_RUNTIME_ASSERT("Attempting to use wgmma.commit_group without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
CUTE_HOST_DEVICE
void
warpgroup_fence_operand(uint32_t& reg) {
// MSVC emits a build error for 'asm volatile'
// even if it only occurs in a __device__ function.
// This prevents the error.
#if defined(__CUDA_ARCH__)
asm volatile("" : "+r"(reg) :: "memory");
#endif
}
CUTE_HOST_DEVICE
void
warpgroup_fence_operand(float& reg) {
#if defined(__CUDA_ARCH__)
asm volatile("" : "+f"(reg) :: "memory");
#endif
}
namespace GMMA {
enum class Major {
K = 0,
MN = 1
};
enum class ScaleOut {
Zero = 0,
One = 1
};
enum class ScaleIn {
Neg = -1,
One = 1
};
} // namespace GMMA
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA PTX definitions: C = (scaleA * A) * (scaleB * B) + (scaleD * C)
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x8x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x8x16_F16F16F16_SS
{
using DRegisters = void;
using ARegisters = uint64_t[1];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[2];
CUTE_HOST_DEVICE static void
fma(uint64_t const& desc_a,
uint64_t const& desc_b,
uint32_t & d0, uint32_t & d1,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %4, 0;\n"
"wgmma.mma_async.sync.aligned.m64n8k16.f16.f16.f16 "
"{%0, %1},"
" %2,"
" %3,"
" p, %5, %6, %7, %8;\n"
"}\n"
: "+r"(d0), "+r"(d1)
: "l"(desc_a),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspA)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x8x16_F16F16F16_SS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x8x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x8x16_F16F16F16_RS
{
using DRegisters = void;
using ARegisters = uint32_t[4];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[2];
static_assert(tnspA == GMMA::Major::K,
"Register source operand A must have K major layout.");
CUTE_HOST_DEVICE static void
fma(uint32_t const& a0, uint32_t const& a1, uint32_t const& a2, uint32_t const& a3,
uint64_t const& desc_b,
uint32_t & d0, uint32_t & d1,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %7, 0;\n"
"wgmma.mma_async.sync.aligned.m64n8k16.f16.f16.f16 "
"{%0, %1},"
"{%2, %3, %4, %5},"
" %6,"
" p, %8, %9, %10;\n"
"}\n"
: "+r"(d0), "+r"(d1)
: "r"(a0), "r"(a1), "r"(a2), "r"(a3),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x8x16_F16F16F16_RS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x16x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x16x16_F16F16F16_SS
{
using DRegisters = void;
using ARegisters = uint64_t[1];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[4];
CUTE_HOST_DEVICE static void
fma(uint64_t const& desc_a,
uint64_t const& desc_b,
uint32_t & d0, uint32_t & d1, uint32_t & d2, uint32_t & d3,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %6, 0;\n"
"wgmma.mma_async.sync.aligned.m64n16k16.f16.f16.f16 "
"{%0, %1, %2, %3},"
" %4,"
" %5,"
" p, %7, %8, %9, %10;\n"
"}\n"
: "+r"(d0), "+r"(d1), "+r"(d2), "+r"(d3)
: "l"(desc_a),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspA)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x16x16_F16F16F16_SS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x16x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x16x16_F16F16F16_RS
{
using DRegisters = void;
using ARegisters = uint32_t[4];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[4];
static_assert(tnspA == GMMA::Major::K,
"Register source operand A must have K major layout.");
CUTE_HOST_DEVICE static void
fma(uint32_t const& a0, uint32_t const& a1, uint32_t const& a2, uint32_t const& a3,
uint64_t const& desc_b,
uint32_t & d0, uint32_t & d1, uint32_t & d2, uint32_t & d3,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %9, 0;\n"
"wgmma.mma_async.sync.aligned.m64n16k16.f16.f16.f16 "
"{%0, %1, %2, %3},"
"{%4, %5, %6, %7},"
" %8,"
" p, %10, %11, %12;\n"
"}\n"
: "+r"(d0), "+r"(d1), "+r"(d2), "+r"(d3)
: "r"(a0), "r"(a1), "r"(a2), "r"(a3),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x16x16_F16F16F16_RS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x32x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x32x16_F16F16F16_SS
{
using DRegisters = void;
using ARegisters = uint64_t[1];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[8];
CUTE_HOST_DEVICE static void
fma(uint64_t const& desc_a,
uint64_t const& desc_b,
uint32_t & d0, uint32_t & d1, uint32_t & d2, uint32_t & d3,
uint32_t & d4, uint32_t & d5, uint32_t & d6, uint32_t & d7,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %10, 0;\n"
"wgmma.mma_async.sync.aligned.m64n32k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7},"
" %8,"
" %9,"
" p, %11, %12, %13, %14;\n"
"}\n"
: "+r"(d0), "+r"(d1), "+r"(d2), "+r"(d3),
"+r"(d4), "+r"(d5), "+r"(d6), "+r"(d7)
: "l"(desc_a),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspA)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x32x16_F16F16F16_SS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x32x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x32x16_F16F16F16_RS
{
using DRegisters = void;
using ARegisters = uint32_t[4];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[8];
static_assert(tnspA == GMMA::Major::K,
"Register source operand A must have K major layout.");
CUTE_HOST_DEVICE static void
fma(uint32_t const& a0, uint32_t const& a1, uint32_t const& a2, uint32_t const& a3,
uint64_t const& desc_b,
uint32_t & d0, uint32_t & d1, uint32_t & d2, uint32_t & d3,
uint32_t & d4, uint32_t & d5, uint32_t & d6, uint32_t & d7,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %13, 0;\n"
"wgmma.mma_async.sync.aligned.m64n32k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7},"
"{%8, %9, %10, %11},"
" %12,"
" p, %14, %15, %16;\n"
"}\n"
: "+r"(d0), "+r"(d1), "+r"(d2), "+r"(d3),
"+r"(d4), "+r"(d5), "+r"(d6), "+r"(d7)
: "r"(a0), "r"(a1), "r"(a2), "r"(a3),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x32x16_F16F16F16_RS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x64x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x64x16_F16F16F16_SS
{
using DRegisters = void;
using ARegisters = uint64_t[1];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[16];
CUTE_HOST_DEVICE static void
fma(uint64_t const& desc_a,
uint64_t const& desc_b,
uint32_t & d00, uint32_t & d01, uint32_t & d02, uint32_t & d03,
uint32_t & d04, uint32_t & d05, uint32_t & d06, uint32_t & d07,
uint32_t & d08, uint32_t & d09, uint32_t & d10, uint32_t & d11,
uint32_t & d12, uint32_t & d13, uint32_t & d14, uint32_t & d15,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %18, 0;\n"
"wgmma.mma_async.sync.aligned.m64n64k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7, "
" %8, %9, %10, %11, %12, %13, %14, %15},"
" %16,"
" %17,"
" p, %19, %20, %21, %22;\n"
"}\n"
: "+r"(d00), "+r"(d01), "+r"(d02), "+r"(d03),
"+r"(d04), "+r"(d05), "+r"(d06), "+r"(d07),
"+r"(d08), "+r"(d09), "+r"(d10), "+r"(d11),
"+r"(d12), "+r"(d13), "+r"(d14), "+r"(d15)
: "l"(desc_a),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspA)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x64x16_F16F16F16_SS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x64x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x64x16_F16F16F16_RS
{
using DRegisters = void;
using ARegisters = uint32_t[4];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[16];
static_assert(tnspA == GMMA::Major::K,
"Register source operand A must have K major layout.");
CUTE_HOST_DEVICE static void
fma(uint32_t const& a00, uint32_t const& a01, uint32_t const& a02, uint32_t const& a03,
uint64_t const& desc_b,
uint32_t & d00, uint32_t & d01, uint32_t & d02, uint32_t & d03,
uint32_t & d04, uint32_t & d05, uint32_t & d06, uint32_t & d07,
uint32_t & d08, uint32_t & d09, uint32_t & d10, uint32_t & d11,
uint32_t & d12, uint32_t & d13, uint32_t & d14, uint32_t & d15,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %21, 0;\n"
"wgmma.mma_async.sync.aligned.m64n64k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7, "
" %8, %9, %10, %11, %12, %13, %14, %15},"
"{%16, %17, %18, %19},"
" %20,"
" p, %22, %23, %24;\n"
"}\n"
: "+r"(d00), "+r"(d01), "+r"(d02), "+r"(d03),
"+r"(d04), "+r"(d05), "+r"(d06), "+r"(d07),
"+r"(d08), "+r"(d09), "+r"(d10), "+r"(d11),
"+r"(d12), "+r"(d13), "+r"(d14), "+r"(d15)
: "r"(a00), "r"(a01), "r"(a02), "r"(a03),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x64x16_F16F16F16_RS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x96x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x96x16_F16F16F16_SS
{
using DRegisters = void;
using ARegisters = uint64_t[1];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[24];
CUTE_HOST_DEVICE static void
fma(uint64_t const& desc_a,
uint64_t const& desc_b,
uint32_t & d00, uint32_t & d01, uint32_t & d02, uint32_t & d03,
uint32_t & d04, uint32_t & d05, uint32_t & d06, uint32_t & d07,
uint32_t & d08, uint32_t & d09, uint32_t & d10, uint32_t & d11,
uint32_t & d12, uint32_t & d13, uint32_t & d14, uint32_t & d15,
uint32_t & d16, uint32_t & d17, uint32_t & d18, uint32_t & d19,
uint32_t & d20, uint32_t & d21, uint32_t & d22, uint32_t & d23,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %26, 0;\n"
"wgmma.mma_async.sync.aligned.m64n96k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7, "
" %8, %9, %10, %11, %12, %13, %14, %15, "
" %16, %17, %18, %19, %20, %21, %22, %23},"
" %24,"
" %25,"
" p, %27, %28, %29, %30;\n"
"}\n"
: "+r"(d00), "+r"(d01), "+r"(d02), "+r"(d03),
"+r"(d04), "+r"(d05), "+r"(d06), "+r"(d07),
"+r"(d08), "+r"(d09), "+r"(d10), "+r"(d11),
"+r"(d12), "+r"(d13), "+r"(d14), "+r"(d15),
"+r"(d16), "+r"(d17), "+r"(d18), "+r"(d19),
"+r"(d20), "+r"(d21), "+r"(d22), "+r"(d23)
: "l"(desc_a),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspA)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x96x16_F16F16F16_SS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x96x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x96x16_F16F16F16_RS
{
using DRegisters = void;
using ARegisters = uint32_t[4];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[24];
static_assert(tnspA == GMMA::Major::K,
"Register source operand A must have K major layout.");
CUTE_HOST_DEVICE static void
fma(uint32_t const& a00, uint32_t const& a01, uint32_t const& a02, uint32_t const& a03,
uint64_t const& desc_b,
uint32_t & d00, uint32_t & d01, uint32_t & d02, uint32_t & d03,
uint32_t & d04, uint32_t & d05, uint32_t & d06, uint32_t & d07,
uint32_t & d08, uint32_t & d09, uint32_t & d10, uint32_t & d11,
uint32_t & d12, uint32_t & d13, uint32_t & d14, uint32_t & d15,
uint32_t & d16, uint32_t & d17, uint32_t & d18, uint32_t & d19,
uint32_t & d20, uint32_t & d21, uint32_t & d22, uint32_t & d23,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %29, 0;\n"
"wgmma.mma_async.sync.aligned.m64n96k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7, "
" %8, %9, %10, %11, %12, %13, %14, %15, "
" %16, %17, %18, %19, %20, %21, %22, %23},"
"{%24, %25, %26, %27},"
" %28,"
" p, %30, %31, %32;\n"
"}\n"
: "+r"(d00), "+r"(d01), "+r"(d02), "+r"(d03),
"+r"(d04), "+r"(d05), "+r"(d06), "+r"(d07),
"+r"(d08), "+r"(d09), "+r"(d10), "+r"(d11),
"+r"(d12), "+r"(d13), "+r"(d14), "+r"(d15),
"+r"(d16), "+r"(d17), "+r"(d18), "+r"(d19),
"+r"(d20), "+r"(d21), "+r"(d22), "+r"(d23)
: "r"(a00), "r"(a01), "r"(a02), "r"(a03),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x96x16_F16F16F16_RS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x128x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x128x16_F16F16F16_SS
{
using DRegisters = void;
using ARegisters = uint64_t[1];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[32];
CUTE_HOST_DEVICE static void
fma(uint64_t const& desc_a,
uint64_t const& desc_b,
uint32_t & d00, uint32_t & d01, uint32_t & d02, uint32_t & d03,
uint32_t & d04, uint32_t & d05, uint32_t & d06, uint32_t & d07,
uint32_t & d08, uint32_t & d09, uint32_t & d10, uint32_t & d11,
uint32_t & d12, uint32_t & d13, uint32_t & d14, uint32_t & d15,
uint32_t & d16, uint32_t & d17, uint32_t & d18, uint32_t & d19,
uint32_t & d20, uint32_t & d21, uint32_t & d22, uint32_t & d23,
uint32_t & d24, uint32_t & d25, uint32_t & d26, uint32_t & d27,
uint32_t & d28, uint32_t & d29, uint32_t & d30, uint32_t & d31,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %34, 0;\n"
"wgmma.mma_async.sync.aligned.m64n128k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7, "
" %8, %9, %10, %11, %12, %13, %14, %15, "
" %16, %17, %18, %19, %20, %21, %22, %23, "
" %24, %25, %26, %27, %28, %29, %30, %31},"
" %32,"
" %33,"
" p, %35, %36, %37, %38;\n"
"}\n"
: "+r"(d00), "+r"(d01), "+r"(d02), "+r"(d03),
"+r"(d04), "+r"(d05), "+r"(d06), "+r"(d07),
"+r"(d08), "+r"(d09), "+r"(d10), "+r"(d11),
"+r"(d12), "+r"(d13), "+r"(d14), "+r"(d15),
"+r"(d16), "+r"(d17), "+r"(d18), "+r"(d19),
"+r"(d20), "+r"(d21), "+r"(d22), "+r"(d23),
"+r"(d24), "+r"(d25), "+r"(d26), "+r"(d27),
"+r"(d28), "+r"(d29), "+r"(d30), "+r"(d31)
: "l"(desc_a),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspA)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x128x16_F16F16F16_SS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x128x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x128x16_F16F16F16_RS
{
using DRegisters = void;
using ARegisters = uint32_t[4];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[32];
static_assert(tnspA == GMMA::Major::K,
"Register source operand A must have K major layout.");
CUTE_HOST_DEVICE static void
fma(uint32_t const& a00, uint32_t const& a01, uint32_t const& a02, uint32_t const& a03,
uint64_t const& desc_b,
uint32_t & d00, uint32_t & d01, uint32_t & d02, uint32_t & d03,
uint32_t & d04, uint32_t & d05, uint32_t & d06, uint32_t & d07,
uint32_t & d08, uint32_t & d09, uint32_t & d10, uint32_t & d11,
uint32_t & d12, uint32_t & d13, uint32_t & d14, uint32_t & d15,
uint32_t & d16, uint32_t & d17, uint32_t & d18, uint32_t & d19,
uint32_t & d20, uint32_t & d21, uint32_t & d22, uint32_t & d23,
uint32_t & d24, uint32_t & d25, uint32_t & d26, uint32_t & d27,
uint32_t & d28, uint32_t & d29, uint32_t & d30, uint32_t & d31,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %37, 0;\n"
"wgmma.mma_async.sync.aligned.m64n128k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7, "
" %8, %9, %10, %11, %12, %13, %14, %15, "
" %16, %17, %18, %19, %20, %21, %22, %23, "
" %24, %25, %26, %27, %28, %29, %30, %31},"
"{%32, %33, %34, %35},"
" %36,"
" p, %38, %39, %40;\n"
"}\n"
: "+r"(d00), "+r"(d01), "+r"(d02), "+r"(d03),
"+r"(d04), "+r"(d05), "+r"(d06), "+r"(d07),
"+r"(d08), "+r"(d09), "+r"(d10), "+r"(d11),
"+r"(d12), "+r"(d13), "+r"(d14), "+r"(d15),
"+r"(d16), "+r"(d17), "+r"(d18), "+r"(d19),
"+r"(d20), "+r"(d21), "+r"(d22), "+r"(d23),
"+r"(d24), "+r"(d25), "+r"(d26), "+r"(d27),
"+r"(d28), "+r"(d29), "+r"(d30), "+r"(d31)
: "r"(a00), "r"(a01), "r"(a02), "r"(a03),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x128x16_F16F16F16_RS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x192x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x192x16_F16F16F16_SS
{
using DRegisters = void;
using ARegisters = uint64_t[1];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[48];
CUTE_HOST_DEVICE static void
fma(uint64_t const& desc_a,
uint64_t const& desc_b,
uint32_t & d00, uint32_t & d01, uint32_t & d02, uint32_t & d03,
uint32_t & d04, uint32_t & d05, uint32_t & d06, uint32_t & d07,
uint32_t & d08, uint32_t & d09, uint32_t & d10, uint32_t & d11,
uint32_t & d12, uint32_t & d13, uint32_t & d14, uint32_t & d15,
uint32_t & d16, uint32_t & d17, uint32_t & d18, uint32_t & d19,
uint32_t & d20, uint32_t & d21, uint32_t & d22, uint32_t & d23,
uint32_t & d24, uint32_t & d25, uint32_t & d26, uint32_t & d27,
uint32_t & d28, uint32_t & d29, uint32_t & d30, uint32_t & d31,
uint32_t & d32, uint32_t & d33, uint32_t & d34, uint32_t & d35,
uint32_t & d36, uint32_t & d37, uint32_t & d38, uint32_t & d39,
uint32_t & d40, uint32_t & d41, uint32_t & d42, uint32_t & d43,
uint32_t & d44, uint32_t & d45, uint32_t & d46, uint32_t & d47,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %50, 0;\n"
"wgmma.mma_async.sync.aligned.m64n192k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7, "
" %8, %9, %10, %11, %12, %13, %14, %15, "
" %16, %17, %18, %19, %20, %21, %22, %23, "
" %24, %25, %26, %27, %28, %29, %30, %31, "
" %32, %33, %34, %35, %36, %37, %38, %39, "
" %40, %41, %42, %43, %44, %45, %46, %47},"
" %48,"
" %49,"
" p, %51, %52, %53, %54;\n"
"}\n"
: "+r"(d00), "+r"(d01), "+r"(d02), "+r"(d03),
"+r"(d04), "+r"(d05), "+r"(d06), "+r"(d07),
"+r"(d08), "+r"(d09), "+r"(d10), "+r"(d11),
"+r"(d12), "+r"(d13), "+r"(d14), "+r"(d15),
"+r"(d16), "+r"(d17), "+r"(d18), "+r"(d19),
"+r"(d20), "+r"(d21), "+r"(d22), "+r"(d23),
"+r"(d24), "+r"(d25), "+r"(d26), "+r"(d27),
"+r"(d28), "+r"(d29), "+r"(d30), "+r"(d31),
"+r"(d32), "+r"(d33), "+r"(d34), "+r"(d35),
"+r"(d36), "+r"(d37), "+r"(d38), "+r"(d39),
"+r"(d40), "+r"(d41), "+r"(d42), "+r"(d43),
"+r"(d44), "+r"(d45), "+r"(d46), "+r"(d47)
: "l"(desc_a),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspA)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x192x16_F16F16F16_SS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x192x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x192x16_F16F16F16_RS
{
using DRegisters = void;
using ARegisters = uint32_t[4];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[48];
static_assert(tnspA == GMMA::Major::K,
"Register source operand A must have K major layout.");
CUTE_HOST_DEVICE static void
fma(uint32_t const& a00, uint32_t const& a01, uint32_t const& a02, uint32_t const& a03,
uint64_t const& desc_b,
uint32_t & d00, uint32_t & d01, uint32_t & d02, uint32_t & d03,
uint32_t & d04, uint32_t & d05, uint32_t & d06, uint32_t & d07,
uint32_t & d08, uint32_t & d09, uint32_t & d10, uint32_t & d11,
uint32_t & d12, uint32_t & d13, uint32_t & d14, uint32_t & d15,
uint32_t & d16, uint32_t & d17, uint32_t & d18, uint32_t & d19,
uint32_t & d20, uint32_t & d21, uint32_t & d22, uint32_t & d23,
uint32_t & d24, uint32_t & d25, uint32_t & d26, uint32_t & d27,
uint32_t & d28, uint32_t & d29, uint32_t & d30, uint32_t & d31,
uint32_t & d32, uint32_t & d33, uint32_t & d34, uint32_t & d35,
uint32_t & d36, uint32_t & d37, uint32_t & d38, uint32_t & d39,
uint32_t & d40, uint32_t & d41, uint32_t & d42, uint32_t & d43,
uint32_t & d44, uint32_t & d45, uint32_t & d46, uint32_t & d47,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %53, 0;\n"
"wgmma.mma_async.sync.aligned.m64n192k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7, "
" %8, %9, %10, %11, %12, %13, %14, %15, "
" %16, %17, %18, %19, %20, %21, %22, %23, "
" %24, %25, %26, %27, %28, %29, %30, %31, "
" %32, %33, %34, %35, %36, %37, %38, %39, "
" %40, %41, %42, %43, %44, %45, %46, %47},"
"{%48, %49, %50, %51},"
" %52,"
" p, %54, %55, %56;\n"
"}\n"
: "+r"(d00), "+r"(d01), "+r"(d02), "+r"(d03),
"+r"(d04), "+r"(d05), "+r"(d06), "+r"(d07),
"+r"(d08), "+r"(d09), "+r"(d10), "+r"(d11),
"+r"(d12), "+r"(d13), "+r"(d14), "+r"(d15),
"+r"(d16), "+r"(d17), "+r"(d18), "+r"(d19),
"+r"(d20), "+r"(d21), "+r"(d22), "+r"(d23),
"+r"(d24), "+r"(d25), "+r"(d26), "+r"(d27),
"+r"(d28), "+r"(d29), "+r"(d30), "+r"(d31),
"+r"(d32), "+r"(d33), "+r"(d34), "+r"(d35),
"+r"(d36), "+r"(d37), "+r"(d38), "+r"(d39),
"+r"(d40), "+r"(d41), "+r"(d42), "+r"(d43),
"+r"(d44), "+r"(d45), "+r"(d46), "+r"(d47)
: "r"(a00), "r"(a01), "r"(a02), "r"(a03),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x192x16_F16F16F16_RS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x256x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x256x16_F16F16F16_SS
{
using DRegisters = void;
using ARegisters = uint64_t[1];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[64];
CUTE_HOST_DEVICE static void
fma(uint64_t const& desc_a,
uint64_t const& desc_b,
uint32_t & d00, uint32_t & d01, uint32_t & d02, uint32_t & d03,
uint32_t & d04, uint32_t & d05, uint32_t & d06, uint32_t & d07,
uint32_t & d08, uint32_t & d09, uint32_t & d10, uint32_t & d11,
uint32_t & d12, uint32_t & d13, uint32_t & d14, uint32_t & d15,
uint32_t & d16, uint32_t & d17, uint32_t & d18, uint32_t & d19,
uint32_t & d20, uint32_t & d21, uint32_t & d22, uint32_t & d23,
uint32_t & d24, uint32_t & d25, uint32_t & d26, uint32_t & d27,
uint32_t & d28, uint32_t & d29, uint32_t & d30, uint32_t & d31,
uint32_t & d32, uint32_t & d33, uint32_t & d34, uint32_t & d35,
uint32_t & d36, uint32_t & d37, uint32_t & d38, uint32_t & d39,
uint32_t & d40, uint32_t & d41, uint32_t & d42, uint32_t & d43,
uint32_t & d44, uint32_t & d45, uint32_t & d46, uint32_t & d47,
uint32_t & d48, uint32_t & d49, uint32_t & d50, uint32_t & d51,
uint32_t & d52, uint32_t & d53, uint32_t & d54, uint32_t & d55,
uint32_t & d56, uint32_t & d57, uint32_t & d58, uint32_t & d59,
uint32_t & d60, uint32_t & d61, uint32_t & d62, uint32_t & d63,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %66, 0;\n"
"wgmma.mma_async.sync.aligned.m64n256k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7, "
" %8, %9, %10, %11, %12, %13, %14, %15, "
" %16, %17, %18, %19, %20, %21, %22, %23, "
" %24, %25, %26, %27, %28, %29, %30, %31, "
" %32, %33, %34, %35, %36, %37, %38, %39, "
" %40, %41, %42, %43, %44, %45, %46, %47, "
" %48, %49, %50, %51, %52, %53, %54, %55, "
" %56, %57, %58, %59, %60, %61, %62, %63},"
" %64,"
" %65,"
" p, %67, %68, %69, %70;\n"
"}\n"
: "+r"(d00), "+r"(d01), "+r"(d02), "+r"(d03),
"+r"(d04), "+r"(d05), "+r"(d06), "+r"(d07),
"+r"(d08), "+r"(d09), "+r"(d10), "+r"(d11),
"+r"(d12), "+r"(d13), "+r"(d14), "+r"(d15),
"+r"(d16), "+r"(d17), "+r"(d18), "+r"(d19),
"+r"(d20), "+r"(d21), "+r"(d22), "+r"(d23),
"+r"(d24), "+r"(d25), "+r"(d26), "+r"(d27),
"+r"(d28), "+r"(d29), "+r"(d30), "+r"(d31),
"+r"(d32), "+r"(d33), "+r"(d34), "+r"(d35),
"+r"(d36), "+r"(d37), "+r"(d38), "+r"(d39),
"+r"(d40), "+r"(d41), "+r"(d42), "+r"(d43),
"+r"(d44), "+r"(d45), "+r"(d46), "+r"(d47),
"+r"(d48), "+r"(d49), "+r"(d50), "+r"(d51),
"+r"(d52), "+r"(d53), "+r"(d54), "+r"(d55),
"+r"(d56), "+r"(d57), "+r"(d58), "+r"(d59),
"+r"(d60), "+r"(d61), "+r"(d62), "+r"(d63)
: "l"(desc_a),
"l"(desc_b),
"r"(int32_t(scale_D)), "n"(int32_t(scaleA)), "n"(int32_t(scaleB)), "n"(int32_t(tnspA)), "n"(int32_t(tnspB)));
#else
CUTE_RUNTIME_ASSERT("Attempting to use SM90_64x256x16_F16F16F16_SS without CUTE_ARCH_MMA_SM90A_ENABLED");
#endif
}
};
////////////////////////////////////////////////////////////////////////////////////////////////////
// GMMA 64x256x16 F16+=F16*F16
template <
GMMA::Major tnspA,
GMMA::Major tnspB,
GMMA::ScaleIn scaleA = GMMA::ScaleIn::One,
GMMA::ScaleIn scaleB = GMMA::ScaleIn::One
>
struct SM90_64x256x16_F16F16F16_RS
{
using DRegisters = void;
using ARegisters = uint32_t[4];
using BRegisters = uint64_t[1];
using CRegisters = uint32_t[64];
static_assert(tnspA == GMMA::Major::K,
"Register source operand A must have K major layout.");
CUTE_HOST_DEVICE static void
fma(uint32_t const& a00, uint32_t const& a01, uint32_t const& a02, uint32_t const& a03,
uint64_t const& desc_b,
uint32_t & d00, uint32_t & d01, uint32_t & d02, uint32_t & d03,
uint32_t & d04, uint32_t & d05, uint32_t & d06, uint32_t & d07,
uint32_t & d08, uint32_t & d09, uint32_t & d10, uint32_t & d11,
uint32_t & d12, uint32_t & d13, uint32_t & d14, uint32_t & d15,
uint32_t & d16, uint32_t & d17, uint32_t & d18, uint32_t & d19,
uint32_t & d20, uint32_t & d21, uint32_t & d22, uint32_t & d23,
uint32_t & d24, uint32_t & d25, uint32_t & d26, uint32_t & d27,
uint32_t & d28, uint32_t & d29, uint32_t & d30, uint32_t & d31,
uint32_t & d32, uint32_t & d33, uint32_t & d34, uint32_t & d35,
uint32_t & d36, uint32_t & d37, uint32_t & d38, uint32_t & d39,
uint32_t & d40, uint32_t & d41, uint32_t & d42, uint32_t & d43,
uint32_t & d44, uint32_t & d45, uint32_t & d46, uint32_t & d47,
uint32_t & d48, uint32_t & d49, uint32_t & d50, uint32_t & d51,
uint32_t & d52, uint32_t & d53, uint32_t & d54, uint32_t & d55,
uint32_t & d56, uint32_t & d57, uint32_t & d58, uint32_t & d59,
uint32_t & d60, uint32_t & d61, uint32_t & d62, uint32_t & d63,
GMMA::ScaleOut const scale_D = GMMA::ScaleOut::One)
{
#if defined(CUTE_ARCH_MMA_SM90A_ENABLED)
asm volatile(
"{\n"
".reg .pred p;\n"
"setp.ne.b32 p, %69, 0;\n"
"wgmma.mma_async.sync.aligned.m64n256k16.f16.f16.f16 "
"{%0, %1, %2, %3, %4, %5, %6, %7, "