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"set: No match." error in yosys.sh #21
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So inside
but somehow
(where did the Anyway I kinda cheated by removing anything extra before 'ERROR' and it works now:
Can you please take a look @RTimothyEdwards to make sure this doesn't break anything else? I can make a patch. |
Honestly, I think the answer to annoying issues with tcsh and other annoying issue with bash is to stop using shell scripts altogether and rewrite everything in python. The problem here is that "|&" does not, as I would like, direct only stderr to the pipe; you can only either redirect stdout or both stdout and stderr together. Because they are output together but buffered separately, there is no guarantee that stderr and stdout won't be interleaved. Really, the best solution is to do it in python, where one can call subprocess() and then handle the stdout and stderr streams separately. Your solution seems reasonable, so I'll adopt it for now. |
in github issue #21. The problem is that the "|&" in the tcsh script combines stdout and stderr, and because stdout is not flushed by yosys, both come out randomly interleaved. So in parsing a line for "ERROR" one cannot assume that the line begins with "ERROR". The correction strips off anything in front of "ERROR" so that the subsequent parsing captures the text of the error message as intended. As I noted in a comment to the issue, the shell scripts should really all be rewritten in python.
I'm trying to synthesize this processor, specifically this build.
My flow is failing right at Synthesis with message:
After diving into
yosys.sh
, the culprit seems to be yosys.sh#L379. If I add this line before that:and run my script again, my output becomes:
This seems a problem on part of
tcsh
and can(?) be solved if we stop piping stderr so|&
becomes|
, yet I'm still not able to synthesize because_mapped.v
file does not exist. Full output after change:Any help would be appreciated.
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