Problem when configuring LiteFury with bin file from repo

[jkjoulesys]

I have a LiteFury attached to a RPi 5 via a PCIE carrier board. I'm using an XDMA driver from another project and everything works fine when I run using the factory default test image that came programmed into the LiteFury (lspci sees the card, I can load the driver and run test-general.py and test-ddr.py with no errors). But if I load the FPGA via JTAG with the out.bin file from the repo (in Sample-Projects/Project-0/FPGA/LiteFury/mcs) I can still see the card with lspci but the driver will no longer load. Should this work? Is the image in the repo the same as the one that came programmed on the board? I tried to do a verify, but this requires a mask file that's not in the repo. Should it work if I load it via JTAG instead of booting from flash at power-on?

[jkjoulesys]

Emailed the designer and got this...

Yes the binfile online should match what is programmed. Yeah the issue is that the PCIe device (the FPGA), must be up within 100ms of powerup (or reset). The motherboard looks for the device and enumerates it at this time.

Furthermore, if the link drops and comes back up, this usually results in an error where the device shows up in lspci but it won't work.

Some systems claim to be able to do a bus rescan, but I've never seen it work. Your best bet is to program your image into flash and have it ready at boot time. Make sure to use spi x4 mode just like the sample project so the bitstream can load in time.