From 0fc9fa541fe343c9c3c2d05956bd29edaa289193 Mon Sep 17 00:00:00 2001
From: refractionpcsx2 <refraction@gmail.com>
Date: Sat, 4 Nov 2023 21:50:51 +0000
Subject: [PATCH] IPU: Pause IPU_TO on tag edge. Stop repeat Interrupts

---
 pcsx2/IPU/IPU.cpp          |  2 +-
 pcsx2/IPU/IPU.h            |  2 +-
 pcsx2/IPU/IPU_Fifo.cpp     |  4 ++--
 pcsx2/IPU/IPU_MultiISA.cpp |  4 ++--
 pcsx2/IPU/IPUdma.cpp       | 10 +++++-----
 5 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/pcsx2/IPU/IPU.cpp b/pcsx2/IPU/IPU.cpp
index 036397dc31cf3..73849315492e3 100644
--- a/pcsx2/IPU/IPU.cpp
+++ b/pcsx2/IPU/IPU.cpp
@@ -539,7 +539,7 @@ __fi void IPUCMD_WRITE(u32 val)
 	{
 		IPUCoreStatus.WaitingOnIPUFrom = false;
 		IPUCoreStatus.WaitingOnIPUTo = false;
-		CPU_INT(IPU_PROCESS, 64);
+		IPU_INT_PROCESS(64);
 	}
 	else
 		IPUWorker();
diff --git a/pcsx2/IPU/IPU.h b/pcsx2/IPU/IPU.h
index c135c8290ce64..0bad7306872af 100644
--- a/pcsx2/IPU/IPU.h
+++ b/pcsx2/IPU/IPU.h
@@ -24,7 +24,7 @@
 
 #define IPU_INT_TO( cycles )  if(!(cpuRegs.interrupt & (1<<4))) CPU_INT( DMAC_TO_IPU, cycles )
 #define IPU_INT_FROM( cycles )  CPU_INT( DMAC_FROM_IPU, cycles )
-
+#define IPU_INT_PROCESS( cycles ) if(!(cpuRegs.interrupt & (1 << IPU_PROCESS))) CPU_INT( IPU_PROCESS, cycles )
 //
 // Bitfield Structures
 //
diff --git a/pcsx2/IPU/IPU_Fifo.cpp b/pcsx2/IPU/IPU_Fifo.cpp
index d0a39aac15dbd..bce512612e6c9 100644
--- a/pcsx2/IPU/IPU_Fifo.cpp
+++ b/pcsx2/IPU/IPU_Fifo.cpp
@@ -181,11 +181,11 @@ void WriteFIFO_IPUin(const mem128_t* value)
 	//committing every 16 bytes
 	if( ipu_fifo.in.write(value->_u32, 1) > 0 )
 	{
-		if (ipuRegs.ctrl.BUSY && IPUCoreStatus.WaitingOnIPUTo)
+		if (ipuRegs.ctrl.BUSY /*&& IPUCoreStatus.WaitingOnIPUTo*/)
 		{
 			IPUCoreStatus.WaitingOnIPUFrom = false;
 			IPUCoreStatus.WaitingOnIPUTo = false;
-			CPU_INT(IPU_PROCESS, 2 * BIAS);
+			IPU_INT_PROCESS(2 * BIAS);
 		}
 	}
 }
diff --git a/pcsx2/IPU/IPU_MultiISA.cpp b/pcsx2/IPU/IPU_MultiISA.cpp
index c49db385231f6..5ecbf45bcaf13 100644
--- a/pcsx2/IPU/IPU_MultiISA.cpp
+++ b/pcsx2/IPU/IPU_MultiISA.cpp
@@ -1126,7 +1126,7 @@ __ri static bool mpeg2sliceIDEC()
 					ready_to_decode = false;
 					IPUCoreStatus.WaitingOnIPUFrom = false;
 					IPUCoreStatus.WaitingOnIPUTo = false;
-					CPU_INT(IPU_PROCESS, 64); // Should probably be much higher, but myst 3 doesn't like it right now.
+					IPU_INT_PROCESS( 64); // Should probably be much higher, but myst 3 doesn't like it right now.
 					ipu_cmd.pos[1] = 2;
 					return false;
 				}
@@ -1522,7 +1522,7 @@ __fi static bool mpeg2_slice()
 			ready_to_decode = false;
 			IPUCoreStatus.WaitingOnIPUFrom = false;
 			IPUCoreStatus.WaitingOnIPUTo = false;
-			CPU_INT(IPU_PROCESS, 64); // Should probably be much higher, but myst 3 doesn't like it right now.
+			IPU_INT_PROCESS( 64); // Should probably be much higher, but myst 3 doesn't like it right now.
 			return false;
 		}
 
diff --git a/pcsx2/IPU/IPUdma.cpp b/pcsx2/IPU/IPUdma.cpp
index 378308378270d..00a578fa872b4 100644
--- a/pcsx2/IPU/IPUdma.cpp
+++ b/pcsx2/IPU/IPUdma.cpp
@@ -88,7 +88,7 @@ void IPU1dma()
 		if (IPUCoreStatus.WaitingOnIPUTo)
 		{
 			IPUCoreStatus.WaitingOnIPUTo = false;
-			CPU_INT(IPU_PROCESS, 4 * BIAS);
+			IPU_INT_PROCESS(4 * BIAS);
 		}
 		return;
 	}
@@ -130,7 +130,7 @@ void IPU1dma()
 		totalqwc += IPU1chain();
 
 	// Nothing has been processed except maybe a tag, or the DMA is ending
-	if(totalqwc == 0 || (IPU1Status.DMAFinished && !IPU1Status.InProgress) || IPUCoreStatus.DataRequested)
+	if(totalqwc == 0 || (IPU1Status.DMAFinished && !IPU1Status.InProgress))
 	{
 		totalqwc = std::max(4, totalqwc) + tagcycles;
 		IPU_INT_TO(totalqwc * BIAS);
@@ -144,7 +144,7 @@ void IPU1dma()
 	if (IPUCoreStatus.WaitingOnIPUTo && g_BP.IFC >= 1)
 	{
 		IPUCoreStatus.WaitingOnIPUTo = false;
-		CPU_INT(IPU_PROCESS, totalqwc * BIAS);
+		IPU_INT_PROCESS(totalqwc * BIAS);
 	}
 
 	IPU_LOG("Completed Call IPU1 DMA QWC Remaining %x Finished %d In Progress %d tadr %x", ipu1ch.qwc, IPU1Status.DMAFinished, IPU1Status.InProgress, ipu1ch.tadr);
@@ -174,7 +174,7 @@ void IPU0dma()
 		if (IPUCoreStatus.WaitingOnIPUFrom)
 		{
 			IPUCoreStatus.WaitingOnIPUFrom = false;
-			CPU_INT(IPU_PROCESS, ipuRegs.ctrl.OFC * BIAS);
+			IPU_INT_PROCESS(ipuRegs.ctrl.OFC * BIAS);
 		}
 		return;
 	}
@@ -208,7 +208,7 @@ void IPU0dma()
 	if (ipuRegs.ctrl.BUSY && IPUCoreStatus.WaitingOnIPUFrom)
 	{
 		IPUCoreStatus.WaitingOnIPUFrom = false;
-		CPU_INT(IPU_PROCESS, readsize * BIAS);
+		IPU_INT_PROCESS(readsize * BIAS);
 	}
 }