From 067604130d7e8881b2ba6affa8dbbe8ab3b1a9c6 Mon Sep 17 00:00:00 2001 From: good-circle Date: Thu, 21 Nov 2024 21:28:34 +0800 Subject: [PATCH] docs(Acknowledgement): Add acknowledgement in README --- README.md | 4 ++++ readme.zh-cn.md | 9 +-------- src/main/scala/xiangshan/backend/README.md | 5 +++++ src/main/scala/xiangshan/frontend/README.md | 9 +++++++++ 4 files changed, 19 insertions(+), 8 deletions(-) create mode 100644 src/main/scala/xiangshan/backend/README.md create mode 100644 src/main/scala/xiangshan/frontend/README.md diff --git a/README.md b/README.md index 548b6397bf..c071b00338 100644 --- a/README.md +++ b/README.md @@ -122,3 +122,7 @@ make emu CONFIG=MinimalConfig EMU_THREADS=2 -j10 ## Troubleshooting Guide [Troubleshooting Guide](https://github.com/OpenXiangShan/XiangShan/wiki/Troubleshooting-Guide) + +## Acknowledgement + +The implementation of XiangShan is inspired by several key papers. We list these papers in XiangShan document, see: [Acknowledgements](https://docs.xiangshan.cc/zh-cn/latest/acknowledgments/). We very much encourage and expect that more academic innovations can be realised based on XiangShan in the future. diff --git a/readme.zh-cn.md b/readme.zh-cn.md index 505a0ee54a..dcdd6b340a 100644 --- a/readme.zh-cn.md +++ b/readme.zh-cn.md @@ -120,11 +120,4 @@ make emu CONFIG=MinimalConfig EMU_THREADS=2 -j10 ## 致谢 -在香山的开发过程中，我们采用了来自开源社区的子模块。具体情况如下： - -| 子模块 | 来源 | 详细用途 | -| ------------------ | ------------------------------------------------------------ | ------------------------------------------------------------ | -| L2 Cache/LLC | [Sifive block-inclusivecache](https://github.com/ucb-bar/block-inclusivecache-sifive) | 我们的新 L2/L3 缓存设计受到了 Sifive `block-inclusivecache` 的启发. | -| Diplomacy/TileLink | [Rocket-chip](https://github.com/chipsalliance/rocket-chip) | 我们复用了来自 rocket-chip 的 Diplomacy 框架和 Tilelink 工具，来协商总线. | - -我们深深地感谢来自开源社区的支持，我们也鼓励其他开源项目在[木兰宽松许可证](LICENSE)的范围下复用我们的代码。 +香山处理器是绝佳的微架构学术研究平台，能够充分支持学术界的试验创新想法。香山处理器中已经实现或参考借鉴了如下论文，列举如下：[致谢](https://docs.xiangshan.cc/zh-cn/latest/acknowledgments/)。我们非常鼓励并期待，未来能够基于香山处理器实现更多的学术创新。 \ No newline at end of file diff --git a/src/main/scala/xiangshan/backend/README.md b/src/main/scala/xiangshan/backend/README.md new file mode 100644 index 0000000000..8a26f91354 --- /dev/null +++ b/src/main/scala/xiangshan/backend/README.md @@ -0,0 +1,5 @@ +# Acknowledgement + +The implementation of Backend is inspired by this following paper: + +[1] Robert. M. Tomasulo. "[An efficient algorithm for exploiting multiple arithmetic units.](https://doi.org/10.1147/rd.111.0025)" IBM Journal of Research and Development (IBMJ) 11.1: 25-33. 1967. \ No newline at end of file diff --git a/src/main/scala/xiangshan/frontend/README.md b/src/main/scala/xiangshan/frontend/README.md new file mode 100644 index 0000000000..5d78a28ba2 --- /dev/null +++ b/src/main/scala/xiangshan/frontend/README.md @@ -0,0 +1,9 @@ +# Acknowledgement + +The implementation of Frontend is inspired by following papers: + +[1] Alex Ramirez, Oliverio J. Santana, Josep L. Larriba-Pey, and Mateo Valero. "[Fetching instruction streams.](https://doi.org/10.1109/MICRO.2002.1176264)" 35th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO). 2002. + +[2] Yasuo Ishii, Jaekyu Lee, Krishnendra Nathella, and Dam Sunwoo. "[Rebasing instruction prefetching: An industry perspective.](https://doi.org/10.1109/LCA.2020.3035068)" IEEE Computer Architecture Letters 19.2: 147-150. 2020. + +[3] Yasuo Ishii, Jaekyu Lee, Krishnendra Nathella, and Dam Sunwoo. "[Re-establishing fetch-directed instruction prefetching: An industry perspective.](https://doi.org/10.1109/ISPASS51385.2021.00034)" 2021 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). 2021. \ No newline at end of file