diff --git a/ARM/gcc_clang/def/STM32L4P5AE.json b/ARM/gcc_clang/def/STM32L4P5AE.json
index aabd3d7e7..b25e8062b 100644
--- a/ARM/gcc_clang/def/STM32L4P5AE.json
+++ b/ARM/gcc_clang/def/STM32L4P5AE.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5AE",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4P5AG.json b/ARM/gcc_clang/def/STM32L4P5AG.json
index 579bdc5cc..1a1e002bf 100644
--- a/ARM/gcc_clang/def/STM32L4P5AG.json
+++ b/ARM/gcc_clang/def/STM32L4P5AG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5AG",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4P5CE.json b/ARM/gcc_clang/def/STM32L4P5CE.json
index 19e08c13f..ec44a7f86 100644
--- a/ARM/gcc_clang/def/STM32L4P5CE.json
+++ b/ARM/gcc_clang/def/STM32L4P5CE.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5CE",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4P5CG.json b/ARM/gcc_clang/def/STM32L4P5CG.json
index b2ea079a8..8337ed617 100644
--- a/ARM/gcc_clang/def/STM32L4P5CG.json
+++ b/ARM/gcc_clang/def/STM32L4P5CG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5CG",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4P5QE.json b/ARM/gcc_clang/def/STM32L4P5QE.json
index 781733c50..14a7d4918 100644
--- a/ARM/gcc_clang/def/STM32L4P5QE.json
+++ b/ARM/gcc_clang/def/STM32L4P5QE.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5QE",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4P5QG.json b/ARM/gcc_clang/def/STM32L4P5QG.json
index 16819e9b9..7aee72b28 100644
--- a/ARM/gcc_clang/def/STM32L4P5QG.json
+++ b/ARM/gcc_clang/def/STM32L4P5QG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5QG",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4P5RE.json b/ARM/gcc_clang/def/STM32L4P5RE.json
index e4b4ec330..e6e3b05c9 100644
--- a/ARM/gcc_clang/def/STM32L4P5RE.json
+++ b/ARM/gcc_clang/def/STM32L4P5RE.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5RE",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4P5RG.json b/ARM/gcc_clang/def/STM32L4P5RG.json
index 581825848..20178bfa8 100644
--- a/ARM/gcc_clang/def/STM32L4P5RG.json
+++ b/ARM/gcc_clang/def/STM32L4P5RG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5RG",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4P5VE.json b/ARM/gcc_clang/def/STM32L4P5VE.json
index 07b6d3c1b..ade94e70b 100644
--- a/ARM/gcc_clang/def/STM32L4P5VE.json
+++ b/ARM/gcc_clang/def/STM32L4P5VE.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5VE",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4P5VG.json b/ARM/gcc_clang/def/STM32L4P5VG.json
index 1acc79bfa..2fe7a3d7b 100644
--- a/ARM/gcc_clang/def/STM32L4P5VG.json
+++ b/ARM/gcc_clang/def/STM32L4P5VG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5VG",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4P5ZE.json b/ARM/gcc_clang/def/STM32L4P5ZE.json
index 150baae99..5f8d3a608 100644
--- a/ARM/gcc_clang/def/STM32L4P5ZE.json
+++ b/ARM/gcc_clang/def/STM32L4P5ZE.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5ZE",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4P5ZG.json b/ARM/gcc_clang/def/STM32L4P5ZG.json
index 126a89b71..4ec95faff 100644
--- a/ARM/gcc_clang/def/STM32L4P5ZG.json
+++ b/ARM/gcc_clang/def/STM32L4P5ZG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4P5ZG",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4Q5AG.json b/ARM/gcc_clang/def/STM32L4Q5AG.json
index 66ecb3657..8a6a8010e 100644
--- a/ARM/gcc_clang/def/STM32L4Q5AG.json
+++ b/ARM/gcc_clang/def/STM32L4Q5AG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4Q5AG",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4Q5CG.json b/ARM/gcc_clang/def/STM32L4Q5CG.json
index 8385ea485..8051a3ecd 100644
--- a/ARM/gcc_clang/def/STM32L4Q5CG.json
+++ b/ARM/gcc_clang/def/STM32L4Q5CG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4Q5CG",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4Q5QG.json b/ARM/gcc_clang/def/STM32L4Q5QG.json
index 313100648..d152b6cf5 100644
--- a/ARM/gcc_clang/def/STM32L4Q5QG.json
+++ b/ARM/gcc_clang/def/STM32L4Q5QG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4Q5QG",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4Q5RG.json b/ARM/gcc_clang/def/STM32L4Q5RG.json
index 6bf0c887f..4b36b58e2 100644
--- a/ARM/gcc_clang/def/STM32L4Q5RG.json
+++ b/ARM/gcc_clang/def/STM32L4Q5RG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4Q5RG",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4Q5VG.json b/ARM/gcc_clang/def/STM32L4Q5VG.json
index c2997ca67..52983825b 100644
--- a/ARM/gcc_clang/def/STM32L4Q5VG.json
+++ b/ARM/gcc_clang/def/STM32L4Q5VG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4Q5VG",
-    "clock": 4
+    "clock": 120
 }
diff --git a/ARM/gcc_clang/def/STM32L4Q5ZG.json b/ARM/gcc_clang/def/STM32L4Q5ZG.json
index ad211cf46..d5e73ec4d 100644
--- a/ARM/gcc_clang/def/STM32L4Q5ZG.json
+++ b/ARM/gcc_clang/def/STM32L4Q5ZG.json
@@ -40,7 +40,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1000000",
                     "key": "PLLON",
                     "label": "Main PLL enable",
                     "mask": "1000000",
@@ -142,7 +142,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "100",
                     "key": "HSION",
                     "label": "HSI clock enable",
                     "mask": "100",
@@ -250,7 +250,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000001",
+                    "init": "0",
                     "key": "MSION",
                     "label": "MSI clock enable",
                     "mask": "1",
@@ -476,7 +476,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "3",
                     "key": "SW",
                     "label": "System clock switch",
                     "mask": "3",
@@ -760,7 +760,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00001000",
+                    "init": "00000f00",
                     "key": "PLLN",
                     "label": "Main PLL multiplication factor for VCO",
                     "mask": "7f00",
@@ -1322,7 +1322,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "00000000",
+                    "init": "2",
                     "key": "PLLSRC",
                     "label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
                     "mask": "3",
@@ -1656,5 +1656,5 @@
     "core": "M4EF",
     "delay_src_path": "delays/m4ef/__lib_delays.c",
     "mcu": "STM32L4Q5ZG",
-    "clock": 4
+    "clock": 120
 }