SystemVerilog LRM errors and inaccuracies reporting ways #1033
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Hi, Everyone! I am aware of the size of the community involved in the slang project. Can anyone help me understand the process of reporting bugs in SystemVerilog LRM? I am familiar with the forum at https://verificationacademy.com, but is that the only platform to inquire about inaccuracies or issues in the LRM? Does anyone know if there are private forums or an Accellera bug tracker that could provide additional information? Thank you! |
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Replies: 1 comment 1 reply
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I know of this issue tracker: https://accellera.mantishub.io/ but I don't know if or how you can get permission to post new issues there. It might give you a good starting point if you want to see the people involved though. |
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Thanks a lot! |
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I know of this issue tracker: https://accellera.mantishub.io/ but I don't know if or how you can get permission to post new issues there. It might give you a good starting point if you want to see the people involved though.