Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Setting alredy set bit in vresg_enable #85

Open
vlebedev-ora opened this issue Dec 11, 2024 · 1 comment · May be fixed by #86
Open

Setting alredy set bit in vresg_enable #85

vlebedev-ora opened this issue Dec 11, 2024 · 1 comment · May be fixed by #86
Assignees

Comments

@vlebedev-ora
Copy link

ic_conf->vregs_enable |= BIT(1);

I'id suggest:

bq769x2_configure_voltage_regs(const struct device *dev, struct bms_ic_conf *ic_conf)
{
	int err = 0;

	uint8_t reg12_config;
	uint8_t vregs_enable = 0;

	err = bq769x2_datamem_read_u1(dev, BQ769X2_SET_CONF_REG12,
				      &reg12_config);
	if (err != 0) {
		return -EIO;
	}

	/* clear REG2_EN and REG1_EN bits and keep voltage setting untouched */
	reg12_config &= ~0x11;

	if (ic_conf->vregs_enable &  BIT(1)) {
		reg12_config |= 0x01; /* REG1_EN */
		vregs_enable |= BIT(1);
	}

	if (ic_conf->vregs_enable & BIT(2)) {
		reg12_config |= 0x10; /* REG2_EN */
		vregs_enable |= BIT(2);
	}

	if (config->vregs_enable & BIT(0)) {
		vregs_enable |= BIT(0);
	}

	err = bq769x2_datamem_write_u1(dev, BQ769X2_SET_CONF_REG12,
				       reg12_config);

	if (err != 0) {
		return -EIO;
	}

	/* control REG0 to enable/disable Pre-Regulator */
	err = bq769x2_datamem_write_u1(dev, BQ769X2_SET_CONF_REG0,
				       vregs_enable & BIT(0));	
	if (err != 0) {
		return -EIO;
	}
	ic_conf->vregs_enable = vregs_enable;
	return 0;
}

@martinjaeger
Copy link
Member

Hi @vlebedev-ora!

Thanks for your suggested improvement.

I have extended it a a bit, so that REG0 can also be configured via Devicetree at compile-time, see #86. What do you think?

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
Development

Successfully merging a pull request may close this issue.

2 participants