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[BUG] Possible misaligned memory access in GPU fused vector workspace #619

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balos1 opened this issue Dec 10, 2024 · 0 comments
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balos1 commented Dec 10, 2024

As discussed in #617 (comment). The fused operations buffer usage for the CUDA, HIP, SYCL, and RAJA vectors may result in undefined behavior due to misaligned memory accesses.

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