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As discussed in #617 (comment). The fused operations buffer usage for the CUDA, HIP, SYCL, and RAJA vectors may result in undefined behavior due to misaligned memory accesses.
The text was updated successfully, but these errors were encountered:
As discussed in #617 (comment). The fused operations buffer usage for the CUDA, HIP, SYCL, and RAJA vectors may result in undefined behavior due to misaligned memory accesses.
The text was updated successfully, but these errors were encountered: