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Things are messy since the same number means different things on different devices (mode 1 means pinned memory on CPU and CUB memory pool on GPU). This was not a good design (mea culpa). Imagine an idyllic future with something like:
We currently specify memory modes for the
Memory
class with anunsigned int
:Elemental/include/El/core/Memory/decl.hpp
Line 62 in ae00b5b
Things are messy since the same number means different things on different devices (mode 1 means pinned memory on CPU and CUB memory pool on GPU). This was not a good design (mea culpa). Imagine an idyllic future with something like:
This would require making simultaneous changes in LBANN.
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