From 3fe6c231f8f6ca4768184f9630dd891f18034987 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Fri, 22 Dec 2023 15:36:13 -0800 Subject: [PATCH] imx: add several backport patches from upstream Linux backport some patches from updstream: - add TPM for gw71xx/gw72xx/gw73xx - fix GSC vdd_bat hwmon value Signed-off-by: Tim Harvey --- ...8mm-venice-Fix-GSC-vdd_bat-data-size.patch | 95 +++++++++++++++++++ ...mx8mm-venice-gw71xx-fix-USB-OTG-VBUS.patch | 79 +++++++++++++++ ...-imx8mm-venice-gw71xx-add-TPM-device.patch | 48 ++++++++++ ...-imx8mm-venice-gw72xx-add-TPM-device.patch | 44 +++++++++ ...-imx8mm-venice-gw73xx-add-TPM-device.patch | 46 +++++++++ 5 files changed, 312 insertions(+) create mode 100644 target/linux/imx/patches-5.15/0053-arm64-dts-imx8mm-venice-Fix-GSC-vdd_bat-data-size.patch create mode 100644 target/linux/imx/patches-5.15/0054-arm64-dts-imx8mm-venice-gw71xx-fix-USB-OTG-VBUS.patch create mode 100644 target/linux/imx/patches-5.15/0055-arm64-dts-imx8mm-venice-gw71xx-add-TPM-device.patch create mode 100644 target/linux/imx/patches-5.15/0056-arm64-dts-imx8mm-venice-gw72xx-add-TPM-device.patch create mode 100644 target/linux/imx/patches-5.15/0057-arm64-dts-imx8mm-venice-gw73xx-add-TPM-device.patch diff --git a/target/linux/imx/patches-5.15/0053-arm64-dts-imx8mm-venice-Fix-GSC-vdd_bat-data-size.patch b/target/linux/imx/patches-5.15/0053-arm64-dts-imx8mm-venice-Fix-GSC-vdd_bat-data-size.patch new file mode 100644 index 00000000000..8cfe154385c --- /dev/null +++ b/target/linux/imx/patches-5.15/0053-arm64-dts-imx8mm-venice-Fix-GSC-vdd_bat-data-size.patch @@ -0,0 +1,95 @@ +From 1b822632c257dc2c3ff432fe6ccc52f710cc02c3 Mon Sep 17 00:00:00 2001 +From: Nicolas Cavallari +Date: Mon, 5 Jun 2023 11:04:42 +0200 +Subject: [PATCH 53/57] arm64: dts: imx8mm-venice: Fix GSC vdd_bat data size. + +On these boards, vdd_bat is 16bit, not 24bit. Reading them as 24bit +values yield garbage values because of the additional byte, which is a +configurable fan trippoint[1]. + +So set their mode to mode_voltage_16bit = 3 instead of +mode_voltage_24bit = 1. + +[1]: http://trac.gateworks.com/wiki/gsc#SystemTemperatureandVoltageMonitor + +Only tested on GW7100. + +Signed-off-by: Nicolas Cavallari +Acked-by: Tim Harvey +Signed-off-by: Shawn Guo +--- + arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi | 2 +- + arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts | 2 +- + arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts | 2 +- + arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts | 2 +- + arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts | 2 +- + 5 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi +index 00f86cada30d..a22bde401d0b 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi +@@ -146,7 +146,7 @@ channel@6 { + }; + + channel@8 { +- gw,mode = <1>; ++ gw,mode = <3>; + reg = <0x08>; + label = "vdd_bat"; + }; +diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts +index 5f67c272d8d6..341d813e8b70 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts ++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts +@@ -351,7 +351,7 @@ channel@6 { + }; + + channel@8 { +- gw,mode = <1>; ++ gw,mode = <3>; + reg = <0x08>; + label = "vdd_bat"; + }; +diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts +index f7df47aecb96..58e920f6191a 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts ++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts +@@ -325,7 +325,7 @@ channel@6 { + }; + + channel@8 { +- gw,mode = <1>; ++ gw,mode = <3>; + reg = <0x08>; + label = "vdd_bat"; + }; +diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts +index 99feec6ab047..ff60bd3720ce 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts ++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts +@@ -290,7 +290,7 @@ channel@6 { + }; + + channel@8 { +- gw,mode = <1>; ++ gw,mode = <3>; + reg = <0x08>; + label = "vdd_bat"; + }; +diff --git a/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts +index f53cdb63e0bb..5ca9a09d1cae 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts ++++ b/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts +@@ -315,7 +315,7 @@ channel@6 { + }; + + channel@8 { +- gw,mode = <1>; ++ gw,mode = <3>; + reg = <0x08>; + label = "vdd_bat"; + }; +-- +2.25.1 + diff --git a/target/linux/imx/patches-5.15/0054-arm64-dts-imx8mm-venice-gw71xx-fix-USB-OTG-VBUS.patch b/target/linux/imx/patches-5.15/0054-arm64-dts-imx8mm-venice-gw71xx-fix-USB-OTG-VBUS.patch new file mode 100644 index 00000000000..6242b3685ac --- /dev/null +++ b/target/linux/imx/patches-5.15/0054-arm64-dts-imx8mm-venice-gw71xx-fix-USB-OTG-VBUS.patch @@ -0,0 +1,79 @@ +From 12f4d2babf9ee7ba0c9fb312490f188d70ecbcbb Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Wed, 29 Nov 2023 08:34:34 -0800 +Subject: [PATCH 54/57] arm64: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS + +The GW71xx does not have a gpio controlled vbus regulator but it does +require some pinctrl. Remove the regulator and move the valid pinctrl +into the usbotg1 node. + +Fixes: bd306fdb4e60 ("arm64: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS") +Signed-off-by: Tim Harvey +--- + .../dts/freescale/imx8mm-venice-gw71xx.dtsi | 29 ++++++------------- + 1 file changed, 9 insertions(+), 20 deletions(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi +index 0378a5c4ab6d..c30623df5e16 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi +@@ -47,17 +47,6 @@ pps { + gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +- +- reg_usb_otg1_vbus: regulator-usb-otg1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_reg_usb1_en>; +- compatible = "regulator-fixed"; +- regulator-name = "usb_otg1_vbus"; +- gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; +- enable-active-high; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- }; + }; + + /* off-board header */ +@@ -145,9 +134,10 @@ &uart3 { + }; + + &usbotg1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg1>; + dr_mode = "otg"; + over-current-active-low; +- vbus-supply = <®_usb_otg1_vbus>; + status = "okay"; + }; + +@@ -205,14 +195,6 @@ MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41 + >; + }; + +- pinctrl_reg_usb1_en: regusb1grp { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x41 +- MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x141 +- MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41 +- >; +- }; +- + pinctrl_spi2: spi2grp { + fsl,pins = < + MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 +@@ -235,4 +217,11 @@ MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 + MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 + >; + }; ++ ++ pinctrl_usbotg1: usbotg1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x141 ++ MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41 ++ >; ++ }; + }; +-- +2.25.1 + diff --git a/target/linux/imx/patches-5.15/0055-arm64-dts-imx8mm-venice-gw71xx-add-TPM-device.patch b/target/linux/imx/patches-5.15/0055-arm64-dts-imx8mm-venice-gw71xx-add-TPM-device.patch new file mode 100644 index 00000000000..a702f575add --- /dev/null +++ b/target/linux/imx/patches-5.15/0055-arm64-dts-imx8mm-venice-gw71xx-add-TPM-device.patch @@ -0,0 +1,48 @@ +From 56876f88954fe81a7e0cfbf343298de730ca800c Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Wed, 29 Nov 2023 09:53:04 -0800 +Subject: [PATCH 55/57] arm64: dts: imx8mm-venice-gw71xx: add TPM device + +Add the TPM device found on the GW71xx revision E PCB. + +Signed-off-by: Tim Harvey +--- + .../boot/dts/freescale/imx8mm-venice-gw71xx.dtsi | 11 +++++++++-- + 1 file changed, 9 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi +index c30623df5e16..a1f4068dc488 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi +@@ -49,12 +49,18 @@ pps { + }; + }; + +-/* off-board header */ + &ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi2>; +- cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>; ++ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, ++ <&gpio1 10 GPIO_ACTIVE_LOW>; + status = "okay"; ++ ++ tpm@1 { ++ compatible = "tcg,tpm_tis-spi"; ++ reg = <0x1>; ++ spi-max-frequency = <36000000>; ++ }; + }; + + &gpio1 { +@@ -201,6 +207,7 @@ MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6 + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6 + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6 ++ MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6 + >; + }; + +-- +2.25.1 + diff --git a/target/linux/imx/patches-5.15/0056-arm64-dts-imx8mm-venice-gw72xx-add-TPM-device.patch b/target/linux/imx/patches-5.15/0056-arm64-dts-imx8mm-venice-gw72xx-add-TPM-device.patch new file mode 100644 index 00000000000..cd61ec21256 --- /dev/null +++ b/target/linux/imx/patches-5.15/0056-arm64-dts-imx8mm-venice-gw72xx-add-TPM-device.patch @@ -0,0 +1,44 @@ +From 7d3bec79d45d8e85dc48190d037be442052ed133 Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Thu, 28 Sep 2023 14:10:39 -0700 +Subject: [PATCH 56/57] arm64: dts: imx8mm-venice-gw72xx: add TPM device + +Add the TPM device found on the GW72xx revision F PCB. + +Signed-off-by: Tim Harvey +--- + .../arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi +index 604a1f39f923..2f7dbee70e06 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi +@@ -84,8 +84,15 @@ reg_usb_otg2_vbus: regulator-usb-otg2 { + &ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi2>; +- cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>; ++ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, ++ <&gpio1 10 GPIO_ACTIVE_LOW>; + status = "okay"; ++ ++ tpm@1 { ++ compatible = "tcg,tpm_tis-spi"; ++ reg = <0x1>; ++ spi-max-frequency = <36000000>; ++ }; + }; + + &gpio1 { +@@ -313,6 +320,7 @@ MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6 + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6 + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6 ++ MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6 + >; + }; + +-- +2.25.1 + diff --git a/target/linux/imx/patches-5.15/0057-arm64-dts-imx8mm-venice-gw73xx-add-TPM-device.patch b/target/linux/imx/patches-5.15/0057-arm64-dts-imx8mm-venice-gw73xx-add-TPM-device.patch new file mode 100644 index 00000000000..aaf4991f56d --- /dev/null +++ b/target/linux/imx/patches-5.15/0057-arm64-dts-imx8mm-venice-gw73xx-add-TPM-device.patch @@ -0,0 +1,46 @@ +From 86d80cbaca9b8ac44b18e2832a2bd2cd6d0c7fbc Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Mon, 26 Jun 2023 11:51:13 -0700 +Subject: [PATCH 57/57] arm64: dts: imx8mm-venice-gw73xx: add TPM device + +Add the TPM device found on the GW73xx revision F PCB. + +Signed-off-by: Tim Harvey +--- + .../boot/dts/freescale/imx8mm-venice-gw73xx.dtsi | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi +index 474e0cf71e8d..8bff21fa9a4a 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi +@@ -104,8 +104,17 @@ reg_wifi_en: regulator-wifi-en { + &ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi2>; +- cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>; ++ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, ++ <&gpio1 10 GPIO_ACTIVE_LOW>; + status = "okay"; ++ ++ tpm@1 { ++ compatible = "tcg,tpm_tis-spi"; ++ #address-cells = <0x1>; ++ #size-cells = <0x1>; ++ reg = <0x1>; ++ spi-max-frequency = <36000000>; ++ }; + }; + + &gpio1 { +@@ -362,6 +371,7 @@ MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6 + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6 + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6 ++ MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6 + >; + }; + +-- +2.25.1 +