From c4b5b36d90200d963bce378d1458a6326f35e433 Mon Sep 17 00:00:00 2001 From: Romain Dolbeau Date: Thu, 29 Aug 2019 05:52:40 -0400 Subject: [PATCH 1/2] Add support for the RISC-V 'rdcycle' (and 'rdcycleh' for RV32) instruction(s) as a cycle counter --- kernel/cycle.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/kernel/cycle.h b/kernel/cycle.h index 16dfdc98f..308744368 100644 --- a/kernel/cycle.h +++ b/kernel/cycle.h @@ -562,3 +562,28 @@ static inline ticks getticks(void) INLINE_ELAPSED(inline) #define HAVE_TICK_COUNTER #endif + +#if defined(__riscv_xlen) && !defined(HAVE_TICK_COUNTER) +typedef uint64_t ticks; +static inline ticks getticks(void) +{ + uint64_t result; +#if __riscv_xlen == 64 + asm volatile("rdcycle %0" : "=r" (result)); +#elif __riscv_xlen == 32 + uint32_t l, h, h2; + asm volatile( "start:\n" + "rdcycleh %0\n" + "rdcycle %1\n" + "rdcycleh %2\n" + "bne %0, %2, start\n" + : "=r" (h), "=r" (l), "=r" (h2)); + result = (((uint64_t)h)<<32) | ((uint64_t)l); +#else +#error "unknown __riscv_xlen" +#endif + return result; +} +INLINE_ELAPSED(inline) +#define HAVE_TICK_COUNTER +#endif From d46ecddd6284f0c468ecd8680ce61fa7ee1bff63 Mon Sep 17 00:00:00 2001 From: Romain Dolbeau Date: Sun, 14 Jul 2024 13:10:29 +0000 Subject: [PATCH 2/2] rdcycle -> rdtime (rdcycle no longer accessible in user-mode...) --- kernel/cycle.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/kernel/cycle.h b/kernel/cycle.h index 308744368..ca2b3b706 100644 --- a/kernel/cycle.h +++ b/kernel/cycle.h @@ -569,13 +569,13 @@ static inline ticks getticks(void) { uint64_t result; #if __riscv_xlen == 64 - asm volatile("rdcycle %0" : "=r" (result)); + asm volatile("rdtime %0" : "=r" (result)); #elif __riscv_xlen == 32 uint32_t l, h, h2; asm volatile( "start:\n" - "rdcycleh %0\n" - "rdcycle %1\n" - "rdcycleh %2\n" + "rdtimeh %0\n" + "rdtime %1\n" + "rdtimeh %2\n" "bne %0, %2, start\n" : "=r" (h), "=r" (l), "=r" (h2)); result = (((uint64_t)h)<<32) | ((uint64_t)l);