From 69a70bcbf18c3561e0269b4a59d3af76eb3462d8 Mon Sep 17 00:00:00 2001
From: Homin Lee <ff4500@gmail.com>
Date: Sun, 15 Dec 2024 16:46:35 +0900
Subject: [PATCH] add support for esp32s2

---
 ci-esp.sh              | 2 ++
 src/chip.rs            | 1 +
 src/chip/family/esp.rs | 2 ++
 src/chip/target.rs     | 2 ++
 src/init.rs            | 1 +
 5 files changed, 8 insertions(+)

diff --git a/ci-esp.sh b/ci-esp.sh
index ca8cd40..62af45b 100755
--- a/ci-esp.sh
+++ b/ci-esp.sh
@@ -19,6 +19,7 @@ cd $test_dir
 
 # generation
 $cwd/target/release/cargo-embassy embassy init test-esp32c3 --chip esp32c3
+$cwd/target/release/cargo-embassy embassy init test-esp32s2 --chip esp32s2
 $cwd/target/release/cargo-embassy embassy init test-esp32s3 --chip esp32s3
 
 # esp toolchain
@@ -33,6 +34,7 @@ fi
 
 # compile
 cd $test_dir/test-esp32c3; cargo build --release
+cd $test_dir/test-esp32s2; cargo build --release
 cd $test_dir/test-esp32s3; cargo build --release
 
 # clean up
diff --git a/src/chip.rs b/src/chip.rs
index 99a8a24..af015c9 100644
--- a/src/chip.rs
+++ b/src/chip.rs
@@ -52,6 +52,7 @@ impl FromStr for Chip {
             ("stm32wl", (STM, Thumbv7e)),
             // ESP32
             ("esp32c3", (ESP(Variant::C3), Risc32Imc)),
+            ("esp32s2", (ESP(Variant::S2), XTensaS2)),
             ("esp32s3", (ESP(Variant::S3), XTensaS3)),
         ];
 
diff --git a/src/chip/family/esp.rs b/src/chip/family/esp.rs
index 3a3f996..b5dd25e 100644
--- a/src/chip/family/esp.rs
+++ b/src/chip/family/esp.rs
@@ -3,6 +3,7 @@ use std::fmt::Display;
 #[derive(Clone, Debug)]
 pub enum Variant {
     C3,
+    S2,
     S3,
 }
 
@@ -10,6 +11,7 @@ impl Display for Variant {
     fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
         f.write_str(match self {
             Self::C3 => "esp32c3",
+            Self::S2 => "esp32s2",
             Self::S3 => "esp32s3",
         })
     }
diff --git a/src/chip/target.rs b/src/chip/target.rs
index 1943914..249be3d 100644
--- a/src/chip/target.rs
+++ b/src/chip/target.rs
@@ -7,6 +7,7 @@ pub enum Target {
     Thumbv7e,
     Thumbv7f,
     Thumbv8,
+    XTensaS2,
     XTensaS3,
     Risc32Imc,
 }
@@ -19,6 +20,7 @@ impl Display for Target {
             Self::Thumbv7e => "thumbv7em-none-eabi",
             Self::Thumbv7f => "thumbv7em-none-eabihf",
             Self::Thumbv8 => "thumbv8m.main-none-eabihf",
+            Self::XTensaS2 => "xtensa-esp32s2-none-elf",
             Self::XTensaS3 => "xtensa-esp32s3-none-elf",
             Self::Risc32Imc => "riscv32imc-unknown-none-elf",
         })
diff --git a/src/init.rs b/src/init.rs
index 02dd180..380d261 100644
--- a/src/init.rs
+++ b/src/init.rs
@@ -139,6 +139,7 @@ impl Init {
                     target = chip.target,
                     rustflags = match variant {
                         Variant::C3 => "rustflags = [\n\"-C\", \"force-frame-pointers\",\n]",
+                        Variant::S2 => "rustflags = [\n\"-C\", \"link-arg=-nostartfiles\",\n]",
                         Variant::S3 => "rustflags = [\n\"-C\", \"link-arg=-nostartfiles\",\n]",
                     }
                 ),