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test1.S
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test1.S
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#######################################################
###Generated by PlainSyc, a plain SysC Compiler########
##### presented by bzq @ hust##########################
#######################################################
.arch armv8-a
.arm
.fpu vfp
.macro mov32I, reg, val
movw \reg, #:lower16:\val
movt \reg, #:upper16:\val
.endm
.text
.global sort
.type sort, %function
sort:
SUB sp, sp, #24 @ 9
## NOP
STM sp, {r4,r5,r6,r7,r8,r11} @ 11
MOV r2, #0 @ 16
## NOP
## NOP
## NOP
## NOP
## BLK_SEP
WHILE_STMT_5:
SUB r3, r1, #1 @ 32
CMP r2, r3 @ 34
BGE DONE_5 @ 36
## BLK_SEP
## NOP
## NOP
## NOP
## NOP
ADD r3, r2, #1 @ 49
MOV r4, r3 @ 51
## NOP
## NOP
## NOP
## NOP
## NOP
## BLK_SEP
WHILE_STMT_39:
CMP r4, r1 @ 66
BGE DONE_39 @ 68
## BLK_SEP
## NOP
## NOP
## NOP
## NOP
IF_STMT_60:
LSL r5, r2, #2 @ 83
## NOP
LDR r6, [r5,r0] @ 86
LSL r7, r4, #2 @ 88
## NOP
LDR r12, [r7,r0] @ 91
CMP r6, r12 @ 93
BGE ELSE_60 @ 95
## BLK_SEP
## NOP
## NOP
## NOP
## NOP
THEN_60:
## NOP
LDR r6, [r5,r0] @ 111
## NOP
LDR r12, [r7,r0] @ 114
STR r12, [r0,r5] @ 116
STR r6, [r0,r7] @ 118
## NOP
## BLK_SEP
ELSE_60:
## NOP
## NOP
## NOP
## NOP
IF_END_60:
ADD r4, r4, #1 @ 139
B WHILE_STMT_39 @ 142
## BLK_SEP
DONE_39:
MOV r2, r3 @ 146
B WHILE_STMT_5 @ 148
## BLK_SEP
DONE_5:
## NOP
LDM sp, {r4,r5,r6,r7,r8,r11} @ 153
ADD sp, sp, #24 @ 156
MOV pc, lr @ 157
## BLK_SEP
.text
.global param32_rec
.type param32_rec, %function
param32_rec:
SUB sp, sp, #228 @ 9
STR lr, [sp,#224] @ 11
ADD r14, sp, #192 @ 12
STM r14, {r4,r5,r6,r7,r8,r9,r10,r11} @ 13
STR r3, [sp,#112] @ 19
LDR r10, [sp,#228] @ 21
STR r10, [sp,#116] @ 22
LDR r10, [sp,#232] @ 24
STR r10, [sp,#120] @ 25
LDR r10, [sp,#236] @ 27
STR r10, [sp,#124] @ 28
LDR r10, [sp,#240] @ 30
STR r10, [sp,#128] @ 31
LDR r10, [sp,#244] @ 33
STR r10, [sp,#132] @ 34
LDR r10, [sp,#248] @ 36
STR r10, [sp,#136] @ 37
LDR r10, [sp,#252] @ 39
STR r10, [sp,#140] @ 40
LDR r10, [sp,#256] @ 42
STR r10, [sp,#144] @ 43
LDR r10, [sp,#260] @ 45
STR r10, [sp,#148] @ 46
LDR r10, [sp,#264] @ 48
STR r10, [sp,#152] @ 49
LDR r10, [sp,#268] @ 51
STR r10, [sp,#156] @ 52
LDR r10, [sp,#272] @ 54
STR r10, [sp,#160] @ 55
LDR r10, [sp,#276] @ 57
STR r10, [sp,#164] @ 58
LDR r10, [sp,#280] @ 60
STR r10, [sp,#168] @ 61
LDR r10, [sp,#284] @ 63
STR r10, [sp,#172] @ 64
LDR r10, [sp,#288] @ 66
STR r10, [sp,#176] @ 67
LDR r10, [sp,#292] @ 69
STR r10, [sp,#180] @ 70
LDR r10, [sp,#296] @ 72
STR r10, [sp,#184] @ 73
LDR r10, [sp,#300] @ 75
STR r10, [sp,#188] @ 76
LDR r5, [sp,#304] @ 78
LDR r6, [sp,#308] @ 80
LDR r7, [sp,#312] @ 82
LDR r8, [sp,#316] @ 84
LDR r9, [sp,#320] @ 86
LDR r10, [sp,#324] @ 88
LDR r14, [sp,#328] @ 90
LDR r4, [sp,#332] @ 92
LDR r3, [sp,#336] @ 94
IF_STMT_112:
CMP r0, #0 @ 98
BNE ELSE_112 @ 100
## BLK_SEP
## NOP
## NOP
## NOP
## NOP
THEN_112:
MOV r0, r1 @ 115
LDR lr, [sp,#224] @ 117
ADD r1, sp, #192 @ 118
LDM r1, {r4,r5,r6,r7,r8,r9,r10,r11} @ 119
ADD sp, sp, #228 @ 122
MOV pc, lr @ 123
## BLK_SEP
ELSE_112:
SUB r0, r0, #1 @ 127
ADD r11, r1, r2 @ 129
mov32I r12, 998244353 @ 131
SDIV r2, r11, r12 @ 132
## NOP
MLS r1, r2, r12, r11 @ 135
## NOP
MOV r11, #0 @ 139
STR r11, [sp,#108] @ 140
STR r3, [sp,#104] @ 142
STR r4, [sp,#100] @ 144
STR r14, [sp,#96] @ 146
STR r10, [sp,#92] @ 148
STR r9, [sp,#88] @ 150
STR r8, [sp,#84] @ 152
STR r7, [sp,#80] @ 154
STR r6, [sp,#76] @ 156
STR r5, [sp,#72] @ 158
LDR r10, [sp,#188] @ 160
STR r10, [sp,#68] @ 161
LDR r10, [sp,#184] @ 163
STR r10, [sp,#64] @ 164
LDR r10, [sp,#180] @ 166
STR r10, [sp,#60] @ 167
LDR r10, [sp,#176] @ 169
STR r10, [sp,#56] @ 170
LDR r10, [sp,#172] @ 172
STR r10, [sp,#52] @ 173
LDR r10, [sp,#168] @ 175
STR r10, [sp,#48] @ 176
LDR r10, [sp,#164] @ 178
STR r10, [sp,#44] @ 179
LDR r10, [sp,#160] @ 181
STR r10, [sp,#40] @ 182
LDR r10, [sp,#156] @ 184
STR r10, [sp,#36] @ 185
LDR r10, [sp,#152] @ 187
STR r10, [sp,#32] @ 188
LDR r10, [sp,#148] @ 190
STR r10, [sp,#28] @ 191
LDR r10, [sp,#144] @ 193
STR r10, [sp,#24] @ 194
LDR r10, [sp,#140] @ 196
STR r10, [sp,#20] @ 197
LDR r10, [sp,#136] @ 199
STR r10, [sp,#16] @ 200
LDR r10, [sp,#132] @ 202
STR r10, [sp,#12] @ 203
LDR r10, [sp,#128] @ 205
STR r10, [sp,#8] @ 206
LDR r10, [sp,#124] @ 208
STR r10, [sp,#4] @ 209
LDR r10, [sp,#120] @ 211
STR r10, [sp,#0] @ 212
LDR r3, [sp,#116] @ 214
LDR r2, [sp,#112] @ 216
BL param32_rec @ 220
LDR lr, [sp,#224] @ 223
ADD r1, sp, #192 @ 224
LDM r1, {r4,r5,r6,r7,r8,r9,r10,r11} @ 225
ADD sp, sp, #228 @ 228
MOV pc, lr @ 229
## BLK_SEP
.text
.global param32_arr
.type param32_arr, %function
param32_arr:
SUB sp, sp, #120 @ 9
STR lr, [sp,#116] @ 11
ADD r14, sp, #84 @ 12
STM r14, {r4,r5,r6,r7,r8,r9,r10,r11} @ 13
LDR r11, [sp,#120] @ 20
LDR r4, [sp,#124] @ 22
LDR r5, [sp,#128] @ 24
LDR r6, [sp,#132] @ 26
LDR r7, [sp,#136] @ 28
LDR r8, [sp,#140] @ 30
LDR r9, [sp,#144] @ 32
LDR r10, [sp,#148] @ 34
STR r10, [sp,#80] @ 35
LDR r10, [sp,#152] @ 37
STR r10, [sp,#0] @ 38
LDR r10, [sp,#156] @ 40
STR r10, [sp,#4] @ 41
LDR r10, [sp,#160] @ 43
STR r10, [sp,#8] @ 44
LDR r10, [sp,#164] @ 46
STR r10, [sp,#12] @ 47
LDR r10, [sp,#168] @ 49
STR r10, [sp,#16] @ 50
LDR r10, [sp,#172] @ 52
STR r10, [sp,#20] @ 53
LDR r10, [sp,#176] @ 55
STR r10, [sp,#24] @ 56
LDR r10, [sp,#180] @ 58
STR r10, [sp,#28] @ 59
LDR r10, [sp,#184] @ 61
STR r10, [sp,#32] @ 62
LDR r10, [sp,#188] @ 64
STR r10, [sp,#36] @ 65
LDR r10, [sp,#192] @ 67
STR r10, [sp,#40] @ 68
LDR r10, [sp,#196] @ 70
STR r10, [sp,#44] @ 71
LDR r10, [sp,#200] @ 73
STR r10, [sp,#48] @ 74
LDR r10, [sp,#204] @ 76
STR r10, [sp,#52] @ 77
LDR r10, [sp,#208] @ 79
STR r10, [sp,#56] @ 80
LDR r10, [sp,#212] @ 82
STR r10, [sp,#60] @ 83
LDR r10, [sp,#216] @ 85
STR r10, [sp,#64] @ 86
LDR r10, [sp,#220] @ 88
STR r10, [sp,#68] @ 89
LDR r10, [sp,#224] @ 91
STR r10, [sp,#72] @ 92
LDR r10, [sp,#228] @ 94
STR r10, [sp,#76] @ 95
LDR r12, [r0] @ 97
LDR r14, [r0,#4] @ 99
ADD r10, r12, r14 @ 101
LDR r14, [r1] @ 103
ADD r0, r10, r14 @ 105
LDR r10, [r1,#4] @ 107
ADD r12, r0, r10 @ 109
LDR r1, [r2] @ 111
ADD r10, r12, r1 @ 113
LDR r1, [r2,#4] @ 115
ADD r12, r10, r1 @ 117
LDR r10, [r3] @ 119
ADD r14, r12, r10 @ 121
LDR r1, [r3,#4] @ 123
ADD r10, r14, r1 @ 125
LDR r12, [r11] @ 127
ADD r14, r10, r12 @ 129
LDR r1, [r11,#4] @ 131
ADD r10, r14, r1 @ 133
LDR r11, [r4] @ 135
ADD r12, r10, r11 @ 137
LDR r1, [r4,#4] @ 139
ADD r10, r12, r1 @ 141
LDR r11, [r5] @ 143
ADD r12, r10, r11 @ 145
LDR r1, [r5,#4] @ 147
ADD r10, r12, r1 @ 149
LDR r11, [r6] @ 151
ADD r12, r10, r11 @ 153
LDR r1, [r6,#4] @ 155
ADD r10, r12, r1 @ 157
LDR r11, [r7] @ 159
ADD r12, r10, r11 @ 161
LDR r1, [r7,#4] @ 163
ADD r10, r12, r1 @ 165
LDR r11, [r8] @ 167
ADD r12, r10, r11 @ 169
LDR r1, [r8,#4] @ 171
ADD r10, r12, r1 @ 173
LDR r11, [r9] @ 175
ADD r14, r10, r11 @ 177
LDR r1, [r9,#4] @ 179
ADD r10, r14, r1 @ 181
LDR r11, [sp,#80] @ 183
LDR r12, [r11] @ 184
ADD r14, r10, r12 @ 186
LDR r0, [sp,#80] @ 188
LDR r1, [r0,#4] @ 189
ADD r10, r14, r1 @ 191
LDR r11, [sp,#0] @ 193
LDR r12, [r11] @ 194
ADD r11, r10, r12 @ 196
LDR r0, [sp,#0] @ 198
LDR r1, [r0,#4] @ 199
ADD r10, r11, r1 @ 201
LDR r11, [sp,#4] @ 203
LDR r12, [r11] @ 204
ADD r11, r10, r12 @ 206
LDR r0, [sp,#4] @ 208
LDR r1, [r0,#4] @ 209
ADD r10, r11, r1 @ 211
LDR r11, [sp,#8] @ 213
LDR r12, [r11] @ 214
ADD r11, r10, r12 @ 216
LDR r0, [sp,#8] @ 218
LDR r1, [r0,#4] @ 219
ADD r10, r11, r1 @ 221
LDR r11, [sp,#12] @ 223
LDR r12, [r11] @ 224
ADD r11, r10, r12 @ 226
LDR r0, [sp,#12] @ 228
LDR r1, [r0,#4] @ 229
ADD r10, r11, r1 @ 231
LDR r11, [sp,#16] @ 233
LDR r12, [r11] @ 234
ADD r11, r10, r12 @ 236
LDR r0, [sp,#16] @ 238
LDR r1, [r0,#4] @ 239
ADD r10, r11, r1 @ 241
LDR r11, [sp,#20] @ 243
LDR r12, [r11] @ 244
ADD r11, r10, r12 @ 246
LDR r0, [sp,#20] @ 248
LDR r1, [r0,#4] @ 249
ADD r10, r11, r1 @ 251
LDR r11, [sp,#24] @ 253
LDR r12, [r11] @ 254
ADD r11, r10, r12 @ 256
LDR r0, [sp,#24] @ 258
LDR r1, [r0,#4] @ 259
ADD r10, r11, r1 @ 261
LDR r11, [sp,#28] @ 263
LDR r12, [r11] @ 264
ADD r11, r10, r12 @ 266
LDR r0, [sp,#28] @ 268
LDR r1, [r0,#4] @ 269
ADD r10, r11, r1 @ 271
LDR r11, [sp,#32] @ 273
LDR r12, [r11] @ 274
ADD r11, r10, r12 @ 276
LDR r0, [sp,#32] @ 278
LDR r1, [r0,#4] @ 279
ADD r10, r11, r1 @ 281
LDR r11, [sp,#36] @ 283
LDR r12, [r11] @ 284
ADD r11, r10, r12 @ 286
LDR r0, [sp,#36] @ 288
LDR r1, [r0,#4] @ 289
ADD r10, r11, r1 @ 291
LDR r11, [sp,#40] @ 293
LDR r12, [r11] @ 294
ADD r11, r10, r12 @ 296
LDR r0, [sp,#40] @ 298
LDR r1, [r0,#4] @ 299
ADD r10, r11, r1 @ 301
LDR r11, [sp,#44] @ 303
LDR r12, [r11] @ 304
ADD r11, r10, r12 @ 306
LDR r0, [sp,#44] @ 308
LDR r1, [r0,#4] @ 309
ADD r10, r11, r1 @ 311
LDR r11, [sp,#48] @ 313
LDR r12, [r11] @ 314
ADD r11, r10, r12 @ 316
LDR r0, [sp,#48] @ 318
LDR r1, [r0,#4] @ 319
ADD r10, r11, r1 @ 321
LDR r11, [sp,#52] @ 323
LDR r12, [r11] @ 324
ADD r11, r10, r12 @ 326
LDR r0, [sp,#52] @ 328
LDR r1, [r0,#4] @ 329
ADD r10, r11, r1 @ 331
LDR r11, [sp,#56] @ 333
LDR r12, [r11] @ 334
ADD r11, r10, r12 @ 336
LDR r0, [sp,#56] @ 338
LDR r1, [r0,#4] @ 339
ADD r10, r11, r1 @ 341
LDR r11, [sp,#60] @ 343
LDR r12, [r11] @ 344
ADD r11, r10, r12 @ 346
LDR r0, [sp,#60] @ 348
LDR r1, [r0,#4] @ 349
ADD r10, r11, r1 @ 351
LDR r11, [sp,#64] @ 353
LDR r12, [r11] @ 354
ADD r11, r10, r12 @ 356
LDR r0, [sp,#64] @ 358
LDR r1, [r0,#4] @ 359
ADD r10, r11, r1 @ 361
LDR r11, [sp,#68] @ 363
LDR r12, [r11] @ 364
ADD r11, r10, r12 @ 366
LDR r0, [sp,#68] @ 368
LDR r1, [r0,#4] @ 369
ADD r10, r11, r1 @ 371
LDR r11, [sp,#72] @ 373
LDR r12, [r11] @ 374
ADD r14, r10, r12 @ 376
LDR r0, [sp,#72] @ 378
LDR r1, [r0,#4] @ 379
ADD r12, r14, r1 @ 381
LDR r10, [sp,#76] @ 383
LDR r0, [r10] @ 384
ADD r1, r12, r0 @ 386
LDR r0, [sp,#76] @ 388
LDR r10, [r0,#4] @ 389
ADD r0, r1, r10 @ 391
LDR lr, [sp,#116] @ 394
ADD r1, sp, #84 @ 395
LDM r1, {r4,r5,r6,r7,r8,r9,r10,r11} @ 396
ADD sp, sp, #120 @ 399
MOV pc, lr @ 400
## BLK_SEP
.text
.global param16
.type param16, %function
param16:
SUB sp, sp, #292 @ 9
STR lr, [sp,#288] @ 11
ADD r12, sp, #256 @ 12
STM r12, {r4,r5,r6,r7,r8,r9,r10,r11} @ 13
STR r0, [sp,#112] @ 16
STR r1, [sp,#116] @ 18
STR r2, [sp,#120] @ 20
STR r3, [sp,#124] @ 22
LDR r0, [sp,#292] @ 24
STR r0, [sp,#128] @ 25
LDR r0, [sp,#296] @ 27
STR r0, [sp,#132] @ 28
LDR r0, [sp,#300] @ 30
STR r0, [sp,#136] @ 31
LDR r0, [sp,#304] @ 33
STR r0, [sp,#140] @ 34
LDR r0, [sp,#308] @ 36
STR r0, [sp,#144] @ 37
LDR r11, [sp,#312] @ 39
LDR r6, [sp,#316] @ 41
LDR r7, [sp,#320] @ 43
LDR r8, [sp,#324] @ 45
LDR r9, [sp,#328] @ 47
LDR r10, [sp,#332] @ 49
LDR r4, [sp,#336] @ 51
MOV r2, #64 @ 54
MOV r1, #0 @ 56
ADD r0, sp, #192 @ 58
BL memset @ 60
LDR r0, [sp,#112] @ 62
STR r0, [sp,#192] @ 63
LDR r0, [sp,#116] @ 65
STR r0, [sp,#196] @ 66
LDR r0, [sp,#120] @ 68
STR r0, [sp,#200] @ 69
LDR r0, [sp,#124] @ 71
STR r0, [sp,#204] @ 72
LDR r0, [sp,#128] @ 74
STR r0, [sp,#208] @ 75
LDR r0, [sp,#132] @ 77
STR r0, [sp,#212] @ 78
LDR r0, [sp,#136] @ 80
STR r0, [sp,#216] @ 81
LDR r0, [sp,#140] @ 83
STR r0, [sp,#220] @ 84
LDR r0, [sp,#144] @ 86
STR r0, [sp,#224] @ 87
STR r11, [sp,#228] @ 89
STR r6, [sp,#232] @ 91
STR r7, [sp,#236] @ 93
STR r8, [sp,#240] @ 95
STR r9, [sp,#244] @ 97
STR r10, [sp,#248] @ 99
STR r4, [sp,#252] @ 101
MOV r1, #16 @ 103
ADD r0, sp, #192 @ 105
BL sort @ 107
LDR r0, [sp,#192] @ 109
STR r0, [sp,#148] @ 110
LDR r0, [sp,#196] @ 112
STR r0, [sp,#152] @ 113
LDR r0, [sp,#200] @ 115
STR r0, [sp,#156] @ 116
LDR r0, [sp,#204] @ 118
STR r0, [sp,#160] @ 119
LDR r0, [sp,#208] @ 121
STR r0, [sp,#164] @ 122
LDR r0, [sp,#212] @ 124
STR r0, [sp,#168] @ 125
LDR r0, [sp,#216] @ 127
STR r0, [sp,#172] @ 128
LDR r0, [sp,#220] @ 130
STR r0, [sp,#176] @ 131
LDR r0, [sp,#224] @ 133
STR r0, [sp,#180] @ 134
LDR r0, [sp,#228] @ 136
STR r0, [sp,#184] @ 137
LDR r0, [sp,#232] @ 139
STR r0, [sp,#188] @ 140
LDR r2, [sp,#236] @ 142
LDR r3, [sp,#240] @ 144
LDR r0, [sp,#244] @ 146
LDR r12, [sp,#248] @ 148
LDR r5, [sp,#252] @ 150
STR r4, [sp,#108] @ 152
STR r10, [sp,#104] @ 154
STR r9, [sp,#100] @ 156
STR r8, [sp,#96] @ 158
STR r7, [sp,#92] @ 160
STR r6, [sp,#88] @ 162
STR r11, [sp,#84] @ 164
LDR r1, [sp,#144] @ 166
STR r1, [sp,#80] @ 167
LDR r1, [sp,#140] @ 169
STR r1, [sp,#76] @ 170
LDR r1, [sp,#136] @ 172
STR r1, [sp,#72] @ 173
LDR r1, [sp,#132] @ 175
STR r1, [sp,#68] @ 176
LDR r1, [sp,#128] @ 178
STR r1, [sp,#64] @ 179
LDR r1, [sp,#124] @ 181
STR r1, [sp,#60] @ 182
LDR r1, [sp,#120] @ 184
STR r1, [sp,#56] @ 185
LDR r1, [sp,#116] @ 187
STR r1, [sp,#52] @ 188
LDR r1, [sp,#112] @ 190
STR r1, [sp,#48] @ 191
STR r5, [sp,#44] @ 193
STR r12, [sp,#40] @ 195
STR r0, [sp,#36] @ 197
STR r3, [sp,#32] @ 199
STR r2, [sp,#28] @ 201
LDR r0, [sp,#188] @ 203
STR r0, [sp,#24] @ 204
LDR r0, [sp,#184] @ 206
STR r0, [sp,#20] @ 207
LDR r0, [sp,#180] @ 209
STR r0, [sp,#16] @ 210
LDR r0, [sp,#176] @ 212
STR r0, [sp,#12] @ 213
LDR r0, [sp,#172] @ 215
STR r0, [sp,#8] @ 216
LDR r0, [sp,#168] @ 218
STR r0, [sp,#4] @ 219
LDR r0, [sp,#164] @ 221
STR r0, [sp,#0] @ 222
LDR r3, [sp,#160] @ 224
LDR r2, [sp,#156] @ 226
LDR r1, [sp,#152] @ 228
LDR r0, [sp,#148] @ 230
BL param32_rec @ 232
LDR lr, [sp,#288] @ 235
ADD r1, sp, #256 @ 236
LDM r1, {r4,r5,r6,r7,r8,r9,r10,r11} @ 237
ADD sp, sp, #292 @ 240
MOV pc, lr @ 241
## BLK_SEP
.text
.global main
.type main, %function
main:
SUB sp, sp, #660 @ 9
STR lr, [sp,#656] @ 11
ADD r0, sp, #624 @ 12
STM r0, {r4,r5,r6,r7,r8,r9,r10,r11} @ 13
MOV r2, #256 @ 17
MOV r1, #0 @ 19
ADD r0, sp, #304 @ 21
BL memset @ 23
BL getint @ 25
MOV r6, r0 @ 26
BL getint @ 28
MOV r7, r0 @ 29
BL getint @ 31
MOV r8, r0 @ 32
BL getint @ 34
MOV r10, r0 @ 35
BL getint @ 37
MOV r11, r0 @ 38
BL getint @ 40
MOV r14, r0 @ 41
BL getint @ 43
MOV r4, r0 @ 44
BL getint @ 46
STR r0, [sp,#112] @ 47
BL getint @ 49
STR r0, [sp,#116] @ 50
BL getint @ 52
STR r0, [sp,#120] @ 53
BL getint @ 55
STR r0, [sp,#124] @ 56
BL getint @ 58
STR r0, [sp,#128] @ 59
BL getint @ 61
STR r0, [sp,#132] @ 62
BL getint @ 64
STR r0, [sp,#136] @ 65
BL getint @ 67
STR r0, [sp,#140] @ 68
BL getint @ 70
STR r6, [sp,#144] @ 88
STR r7, [sp,#148] @ 90
STR r8, [sp,#152] @ 92
STR r10, [sp,#156] @ 94
STR r11, [sp,#160] @ 96
STR r14, [sp,#164] @ 98
STR r4, [sp,#168] @ 100
LDR r1, [sp,#112] @ 102
STR r1, [sp,#172] @ 103
LDR r1, [sp,#116] @ 105
STR r1, [sp,#176] @ 106
LDR r4, [sp,#120] @ 108
LDR r5, [sp,#124] @ 110
LDR r14, [sp,#128] @ 112
LDR r11, [sp,#132] @ 114
LDR r6, [sp,#136] @ 116
LDR r7, [sp,#140] @ 118
MOV r8, r0 @ 120
MOV r2, #64 @ 123
MOV r1, #0 @ 125
ADD r0, sp, #560 @ 127
BL memset @ 129
LDR r0, [sp,#144] @ 131
STR r0, [sp,#560] @ 132
LDR r0, [sp,#148] @ 134
STR r0, [sp,#564] @ 135
LDR r0, [sp,#152] @ 137
STR r0, [sp,#568] @ 138
LDR r0, [sp,#156] @ 140
STR r0, [sp,#572] @ 141
LDR r0, [sp,#160] @ 143
STR r0, [sp,#576] @ 144
LDR r0, [sp,#164] @ 146
STR r0, [sp,#580] @ 147
LDR r0, [sp,#168] @ 149
STR r0, [sp,#584] @ 150
LDR r0, [sp,#172] @ 152
STR r0, [sp,#588] @ 153
LDR r0, [sp,#176] @ 155
STR r0, [sp,#592] @ 156
STR r4, [sp,#596] @ 158
STR r5, [sp,#600] @ 160
STR r14, [sp,#604] @ 162
STR r11, [sp,#608] @ 164
STR r6, [sp,#612] @ 166
STR r7, [sp,#616] @ 168
STR r8, [sp,#620] @ 170
MOV r1, #16 @ 172
ADD r0, sp, #560 @ 174
BL sort @ 176
LDR r0, [sp,#560] @ 178
STR r0, [sp,#180] @ 179
LDR r0, [sp,#564] @ 181
STR r0, [sp,#184] @ 182
LDR r0, [sp,#568] @ 184
STR r0, [sp,#188] @ 185
LDR r0, [sp,#572] @ 187
STR r0, [sp,#192] @ 188
LDR r0, [sp,#576] @ 190
STR r0, [sp,#196] @ 191
LDR r0, [sp,#580] @ 193
STR r0, [sp,#200] @ 194
LDR r0, [sp,#584] @ 196
STR r0, [sp,#204] @ 197
LDR r0, [sp,#588] @ 199
STR r0, [sp,#208] @ 200
LDR r0, [sp,#592] @ 202
STR r0, [sp,#212] @ 203
LDR r0, [sp,#596] @ 205
STR r0, [sp,#216] @ 206
LDR r0, [sp,#600] @ 208
STR r0, [sp,#220] @ 209
LDR r2, [sp,#604] @ 211
LDR r10, [sp,#608] @ 213
LDR r0, [sp,#612] @ 215
LDR r12, [sp,#616] @ 217
LDR r3, [sp,#620] @ 219
STR r8, [sp,#108] @ 221
STR r7, [sp,#104] @ 223
STR r6, [sp,#100] @ 225
STR r11, [sp,#96] @ 227
STR r14, [sp,#92] @ 229
STR r5, [sp,#88] @ 231
STR r4, [sp,#84] @ 233
LDR r1, [sp,#176] @ 235
STR r1, [sp,#80] @ 236
LDR r1, [sp,#172] @ 238
STR r1, [sp,#76] @ 239
LDR r1, [sp,#168] @ 241
STR r1, [sp,#72] @ 242
LDR r1, [sp,#164] @ 244
STR r1, [sp,#68] @ 245
LDR r1, [sp,#160] @ 247
STR r1, [sp,#64] @ 248
LDR r1, [sp,#156] @ 250
STR r1, [sp,#60] @ 251
LDR r1, [sp,#152] @ 253
STR r1, [sp,#56] @ 254
LDR r1, [sp,#148] @ 256
STR r1, [sp,#52] @ 257
LDR r1, [sp,#144] @ 259
STR r1, [sp,#48] @ 260
STR r3, [sp,#44] @ 262
STR r12, [sp,#40] @ 264
STR r0, [sp,#36] @ 266
STR r10, [sp,#32] @ 268
STR r2, [sp,#28] @ 270
LDR r0, [sp,#220] @ 272
STR r0, [sp,#24] @ 273
LDR r0, [sp,#216] @ 275
STR r0, [sp,#20] @ 276
LDR r0, [sp,#212] @ 278
STR r0, [sp,#16] @ 279
LDR r0, [sp,#208] @ 281
STR r0, [sp,#12] @ 282
LDR r0, [sp,#204] @ 284
STR r0, [sp,#8] @ 285
LDR r0, [sp,#200] @ 287
STR r0, [sp,#4] @ 288
LDR r0, [sp,#196] @ 290
STR r0, [sp,#0] @ 291
LDR r3, [sp,#192] @ 293
LDR r2, [sp,#188] @ 295
LDR r1, [sp,#184] @ 297
LDR r0, [sp,#180] @ 299
BL param32_rec @ 301
## NOP
INLINE_END_442:
STR r0, [sp,#304] @ 311
MOV r0, #8848 @ 313
STR r0, [sp,#308] @ 314
MOV r0, #1 @ 316
## NOP
## NOP
## NOP
## NOP
## BLK_SEP
WHILE_STMT_337:
CMP r0, #32 @ 332
BGE DONE_337 @ 334
## BLK_SEP
## NOP
## NOP
## NOP
## NOP
MOV r12, #1 @ 347
LSL r4, r12, #2 @ 348
MOV r12, #8 @ 350
SUB r3, r0, #1 @ 352
MLA r2, r12, r3, r4 @ 354
## NOP
ADD r4, sp, #304 @ 358
LDR r12, [r2,r4] @ 359
SUB r1, r12, #1 @ 361
MOV r4, #0 @ 363
LSL r12, r4, #2 @ 364
MOV r4, #8 @ 366
MLA r2, r4, r0, r12 @ 368
## NOP
ADD r4, sp, #304 @ 372
STR r1, [r4,r2] @ 373
MOV r2, #0 @ 375
LSL r4, r2, #2 @ 376
MOV r12, #8 @ 378
MLA r1, r12, r3, r4 @ 380
## NOP
ADD r2, sp, #304 @ 384
LDR r4, [r1,r2] @ 385
SUB r1, r4, #2 @ 387
MOV r12, #1 @ 389
LSL r3, r12, #2 @ 390
MOV r4, #8 @ 392
MLA r2, r4, r0, r3 @ 394
## NOP
ADD r3, sp, #304 @ 398
STR r1, [r3,r2] @ 399
ADD r0, r0, #1 @ 401
B WHILE_STMT_337 @ 404
## BLK_SEP
DONE_337:
ADD r10, sp, #304 @ 408
## NOP
STR r10, [sp,#224] @ 410
## NOP
ADD r0, r10, #8 @ 413
STR r0, [sp,#228] @ 414
## NOP
ADD r0, r10, #16 @ 417
STR r0, [sp,#232] @ 418
## NOP
ADD r0, r10, #24 @ 421
STR r0, [sp,#236] @ 422
## NOP
ADD r0, r10, #32 @ 425
STR r0, [sp,#240] @ 426
## NOP
ADD r0, r10, #40 @ 429
STR r0, [sp,#244] @ 430
## NOP
ADD r0, r10, #48 @ 433
STR r0, [sp,#248] @ 434
## NOP
ADD r0, r10, #56 @ 437
STR r0, [sp,#252] @ 438
ADD r10, sp, #304 @ 440
ADD r0, r10, #64 @ 441
STR r0, [sp,#256] @ 442
## NOP
ADD r0, r10, #72 @ 445
STR r0, [sp,#260] @ 446
## NOP
ADD r0, r10, #80 @ 449
STR r0, [sp,#264] @ 450
## NOP
ADD r0, r10, #88 @ 453
STR r0, [sp,#268] @ 454
## NOP
ADD r0, r10, #96 @ 457
STR r0, [sp,#272] @ 458
## NOP
ADD r0, r10, #104 @ 461
STR r0, [sp,#276] @ 462
## NOP
ADD r0, r10, #112 @ 465
STR r0, [sp,#280] @ 466
## NOP
ADD r0, r10, #120 @ 469
STR r0, [sp,#284] @ 470
ADD r10, sp, #304 @ 472
ADD r1, r10, #128 @ 473
STR r1, [sp,#288] @ 474
## NOP
ADD r1, r10, #136 @ 477
STR r1, [sp,#292] @ 478
## NOP
ADD r1, r10, #144 @ 481
STR r1, [sp,#296] @ 482
## NOP
ADD r1, r10, #152 @ 485
STR r1, [sp,#300] @ 486
## NOP
ADD r4, r10, #160 @ 489
## NOP
ADD r5, r10, #168 @ 492
## NOP
ADD r6, r10, #176 @ 495
## NOP
ADD r7, r10, #184 @ 498
## NOP
ADD r11, r10, #192 @ 501
ADD r8, sp, #304 @ 503
ADD r9, r8, #200 @ 504
## NOP
ADD r10, r8, #208 @ 507
## NOP
ADD r14, r8, #216 @ 510
## NOP
ADD r0, r8, #224 @ 513
## NOP
ADD r12, r8, #232 @ 516
## NOP
ADD r1, r8, #240 @ 519
## NOP
ADD r2, r8, #248 @ 522
STR r2, [sp,#108] @ 524
STR r1, [sp,#104] @ 526
STR r12, [sp,#100] @ 528
STR r0, [sp,#96] @ 530
STR r14, [sp,#92] @ 532
STR r10, [sp,#88] @ 534
STR r9, [sp,#84] @ 536
STR r11, [sp,#80] @ 538
STR r7, [sp,#76] @ 540
STR r6, [sp,#72] @ 542
STR r5, [sp,#68] @ 544
STR r4, [sp,#64] @ 546
LDR r0, [sp,#300] @ 548
STR r0, [sp,#60] @ 549
LDR r0, [sp,#296] @ 551
STR r0, [sp,#56] @ 552
LDR r0, [sp,#292] @ 554
STR r0, [sp,#52] @ 555
LDR r0, [sp,#288] @ 557
STR r0, [sp,#48] @ 558
LDR r0, [sp,#284] @ 560
STR r0, [sp,#44] @ 561
LDR r0, [sp,#280] @ 563
STR r0, [sp,#40] @ 564
LDR r0, [sp,#276] @ 566
STR r0, [sp,#36] @ 567
LDR r0, [sp,#272] @ 569
STR r0, [sp,#32] @ 570
LDR r0, [sp,#268] @ 572
STR r0, [sp,#28] @ 573
LDR r0, [sp,#264] @ 575
STR r0, [sp,#24] @ 576
LDR r0, [sp,#260] @ 578
STR r0, [sp,#20] @ 579
LDR r0, [sp,#256] @ 581
STR r0, [sp,#16] @ 582
LDR r0, [sp,#252] @ 584
STR r0, [sp,#12] @ 585
LDR r0, [sp,#248] @ 587
STR r0, [sp,#8] @ 588
LDR r0, [sp,#244] @ 590
STR r0, [sp,#4] @ 591
LDR r0, [sp,#240] @ 593
STR r0, [sp,#0] @ 594
LDR r3, [sp,#236] @ 596
LDR r2, [sp,#232] @ 598
LDR r1, [sp,#228] @ 600
LDR r0, [sp,#224] @ 602
BL param32_arr @ 604
BL putint @ 607
MOV r0, #10 @ 609
BL putch @ 611
MOV r0, #0 @ 613
LDR lr, [sp,#656] @ 615
ADD r1, sp, #624 @ 616
LDM r1, {r4,r5,r6,r7,r8,r9,r10,r11} @ 617
ADD sp, sp, #660 @ 620
MOV pc, lr @ 621
## BLK_SEP