- 8.1 host_slave_sbe_config
- 8.2 host_setup_sbe
- 8.3 host_cbs_start
- 8.4 proc_check_slave_sbe_seeprom_complete: Check Slave SBE Complete
- 8.5 host_attnlisten_proc: Start attention poll for P9(s)
- 8.6 host_p9_fbc_eff_config: Determine Powerbus config
- 8.7 host_p9_eff_config_links: Powerbuslinkconfig
- 8.8 proc_attr_update: Proc ATTR Update
- 8.9 proc_chiplet_scominit: Scom inits to all chiplets (sans Quad)
- 8.10 proc_xbus_scominit: Apply scom inits to Xbus
- 8.11 proc_chiplet_enable_ridi: Enable RI/DI for xbus
- 8.12 host_set_voltages: Enable RI/DI for xbus
- 9.1 fabric_erepair: Restore Fabric Bus eRepair data
- 9.2 fabric_io_dccal: Calibrate Fabric interfaces
- 9.3 fabric_pre_trainadv: Advanced pre training
- 9.4 fabric_io_run_training: Run training on internal buses
- 9.5 fabric_post_trainadv: Advanced post EI/EDI training
- 9.6 proc_smp_link_layer: Start SMP link layer
- 9.7 proc_fab_iovalid: Lower functional fences on local SMP
- 9.8 host_fbc_eff_config_aggregate: Pick link(s) for coherency
- 13.1 host_disable_memvolt.md: Disable VDDR on Warm Reboots
- 13.2 mem_pll_reset.md: Reset PLL for MCAs in async
- 13.3 mem_pll_initf.md: PLL Initfile for MBAs
- 13.4 mem_pll_setup.md: Setup PLL for MBAs
- 13.5 proc_mcs_skewadjust.md: Update clock mesh deskew
- 13.6 mem_startclocks.md: Start clocks on MBA/MCAs
- 13.7 host_enable_memvolt.md: Enable the VDDR3 Voltage Rail
- 13.8 mss_scominit.md: Perform scom inits to MC and PHY
- 13.9 mss_ddr_phy_reset.md: Soft reset of DDR PHY macros
- 13.10 mss_draminit.md: Dram initialize
- 13.11 mss_draminit_training.md: Dram training
- 13.12 mss_draminit_trainadv.md: Advanced dram training
- 13.13 mss_draminit_mc.md: Hand off control to MC